CN116719752A

CN116719752A - Memory allocation method, electronic equipment and storage medium

Info

Publication number: CN116719752A
Application number: CN202211214353.2A
Authority: CN
Inventors: 袁晓峰; 窦泽飞; 李志卫
Original assignee: Honor Device Co Ltd
Current assignee: Honor Device Co Ltd
Priority date: 2022-09-30
Filing date: 2022-09-30
Publication date: 2023-09-08

Abstract

The application discloses a method for distributing memory, electronic equipment and a storage medium. Or if the memory interval corresponding to the first process is not movable, the memory interval is allocated to the first process by the plurality of subareas at the tail, and if the size of the memory interval applied by the first process is larger, the memory interval is allocated to the first process by the subareas at the back of the plurality of subareas at the tail, so that a large number of movable page frames exist in the head area of the memory, the tail area can easily obtain the free page frames due to fragmentation, and when the memory fragments are sorted, continuous page frames can be quickly obtained, and the efficiency of fragment sorting is improved.

Description

Memory allocation method, electronic equipment and storage medium

Technical Field

The present application relates to the field of electronic technologies, and in particular, to a method for allocating memory, an electronic device, and a storage medium.

Background

As a storage space of the electronic device, a memory is an integral part of the electronic device. The memory is in a unit of page frames, when a program of the electronic device needs to apply for the memory to run, the electronic device allocates continuous idle page frames for the program to be run, and the memory is released after the running of the program to be run is finished, so that after the electronic device is used for a period of time, some continuous page frames in the memory are scattered, the idle page frames are separated to form memory fragments, a larger area consisting of the continuous idle page frames is lacking in the memory, and the problem of overlong application time possibly exists when the next application of the larger memory is performed.

In order to solve the fragmentation problem, the electronic device may sort the memory fragments, and move some of the in-use page frames, so that the idle page frames are connected to form a larger applicable area, but many in-use page frames cannot be moved, which results in lower efficiency of the current memory fragment sorting.

Disclosure of Invention

The application provides a method for distributing memory, electronic equipment and a storage medium, which can improve the efficiency of memory defragmentation. The technical scheme is as follows:

In a first aspect, an embodiment of the present application provides a method for allocating memory, where the method is applied to an electronic device, and a memory area of the electronic device includes a first area and a second area, and a termination address of the first area is located before a start address of the second area, where the method includes:

according to the first process, memory intervals are allocated for the first process in a first area, and the memory intervals corresponding to the first process are movable; or alternatively, the process may be performed,

according to the first process, a memory interval is allocated for the first process in the second area, and the memory interval corresponding to the first process is not movable.

After the memory is allocated according to the method provided by the application, the memory interval in the first area is movable, and the memory interval in the second area is not movable. Because the ending address of the first area is located before the starting address of the second area, that is, the first area is located at the head and the second area is located at the tail, when the memory defragmentation is performed, the head area has a large number of movable page frames, so that the speed of scanning the movable page frames at the head can be increased, continuous page frames can be obtained quickly, and the defragmentation efficiency is improved.

Wherein the terminating address and the starting address both refer to physical addresses. The first region and the second region are both continuous memory regions. The size of the first area and the size of the second area can be determined according to historical use conditions of the mobile phone.

The first region may comprise a plurality of sub-regions and the second region may likewise comprise a plurality of sub-regions. When the memory is allocated, the memory interval is allocated for the first process by sequentially selecting the subareas from the rear subarea to the front subarea in the first area when the applied memory size is smaller than or equal to a first threshold value, and the memory interval is allocated for the first process by sequentially selecting the subareas from the front subarea to the rear subarea in the first area when the applied memory size is larger than the first threshold value. The second region is the same. Taking the first area and the second area as examples and describing that the first area and the second area both comprise 2 sub-areas, wherein the first area comprises a first sub-area and a second sub-area, the termination address of the first sub-area is positioned before the start address of the second sub-area, and when the memory size applied by the first process is smaller than or equal to a first threshold value, the memory interval allocated to the first process in the first area is positioned in the first sub-area; or under the condition that the memory size applied by the first process is larger than the first threshold value, the memory interval allocated to the first process in the first area is located in the second sub-area.

The second area comprises a third sub-area and a fourth sub-area, the termination address of the third sub-area is positioned in front of the starting address of the fourth sub-area, and under the condition that the memory size applied by the first process is smaller than or equal to a second threshold value, the memory interval distributed for the first process in the second area is positioned in the third sub-area; or under the condition that the memory size applied by the first process is larger than the second threshold value, the memory interval allocated to the first process in the second area is located in the fourth sub-area.

Wherein the first threshold and the second threshold may be the same. The first sub-region, the second sub-region, the third sub-region and the fourth sub-region are all continuous memory regions. In the embodiment of the application, the memory area is divided into a plurality of subareas, the first subarea and the third subarea are preferentially allocated to the process with smaller memory interval size, and the second subarea and the fourth subarea are preferentially allocated to the process with larger memory interval size, in consideration of the size of the memory interval applied by the first process.

Because the fourth sub-region is located at the tail of the memory region, the process with a larger memory interval and an immovable memory interval is preferentially allocated to the process with a larger memory interval, so that memory fragments are easy to generate at the tail of the memory region, for example, after the fourth sub-region allocates a memory interval with a size of 3 steps to the first process, if the memory interval is released and is not combined with other memory intervals to form a larger memory interval, the size of the memory interval which can be allocated is 3 steps or less and cannot be allocated to the process with a size above 3 steps, and the memory interval can be easily made into idle pages; in addition, if the process with the smaller memory interval is preferentially allocated to the fourth sub-area, after the memory interval is released, the process is easily occupied by the next process, so that the occupied concentration of the fourth sub-area is high; therefore, the tail is preferentially allocated to the process with larger memory interval, and the free memory is easily acquired at the tail of the memory due to fragmentation, so that the efficiency of scanning the tail to the free page during defragmentation is improved.

Considering that the continuous memory of the subareas may not meet the requirement of the first process, when a certain priority allocation area does not acquire a memory interval, the electronic device acquires the memory interval in other subareas of the same type according to the movable priority allocation relation. If the other subareas of the same type do not have enough memory intervals, the memory intervals are acquired from the subareas of the other types according to the priority distribution relation of the memory intervals and the size of the memory intervals required by the process.

In one implementation manner, the memory interval corresponding to the first process is movable, and when the memory size applied by the first process is smaller than or equal to a first threshold value, and the size of the remaining continuous memory in the first sub-area is larger than or equal to the memory size required by the first process, the memory interval allocated for the first process is located in the first sub-area; and under the condition that the memory size applied by the first process is smaller than or equal to a first threshold value, the size of the residual continuous memory in the first subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the second subarea is larger than or equal to the memory size required by the first process, and the memory interval allocated for the first process is positioned in the second subarea.

And under the condition that the memory size applied by the first process is smaller than or equal to a first threshold value, the size of the residual continuous memory in the first subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the second subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the third subarea is larger than or equal to the memory size required by the first process, and the memory interval allocated for the first process is positioned in the third subarea.

And under the condition that the memory size of the first process application is smaller than or equal to a first threshold value, the size of the continuous memory remained in the first subarea is smaller than the memory size required by the first process, the size of the continuous memory remained in the second subarea is smaller than the memory size required by the first process, the size of the continuous memory remained in the third subarea is smaller than the memory size required by the first process, the size of the continuous memory remained in the fourth subarea is larger than or equal to the memory size required by the first process, and the memory interval allocated for the first process is positioned in the fourth subarea.

In one implementation manner, the memory interval corresponding to the first process is movable, and when the memory size applied by the first process is greater than a first threshold value, and the size of the remaining continuous memory in the second sub-area is greater than or equal to the memory size required by the first process, the memory interval allocated for the first process is located in the second sub-area; and under the condition that the memory size applied by the first process is larger than a first threshold value, the size of the residual continuous memory in the second subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the first subarea is larger than or equal to the memory size required by the first process, and the memory interval allocated for the first process is positioned in the first subarea.

And under the condition that the memory size applied by the first process is larger than a first threshold value, the size of the residual continuous memory in the second subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the first subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the fourth subarea is larger than or equal to the memory size required by the first process, and the memory interval allocated for the first process is positioned in the fourth subarea.

And under the condition that the memory size applied by the first process is larger than a first threshold, the size of the residual continuous memory in the second subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the first subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the fourth subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the third subarea is larger than or equal to the memory size required by the first process, and the memory interval allocated for the first process is located in the third subarea.

In one implementation manner, the memory interval corresponding to the first process is not movable, and when the memory size applied by the first process is smaller than or equal to the second threshold value, and the size of the remaining continuous memory in the third sub-area is larger than or equal to the memory size required by the first process, the memory interval allocated for the first process is located in the third sub-area; and under the condition that the memory size applied by the first process is smaller than or equal to a second threshold value, the size of the continuous memory remained in the third subarea is smaller than the memory size required by the first process, the size of the continuous memory remained in the fourth subarea is larger than or equal to the memory size required by the first process, and the memory interval allocated for the first process is positioned in the fourth subarea.

And under the condition that the memory size applied by the first process is smaller than or equal to a second threshold value, the size of the residual continuous memory in the third subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the fourth subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the first subarea is larger than or equal to the memory size required by the first process, and the memory interval allocated for the first process is positioned in the first subarea.

And under the condition that the memory size applied by the first process is smaller than or equal to a second threshold value, the size of the continuous memory remained in the third subarea is smaller than the memory size required by the first process, the size of the continuous memory remained in the fourth subarea is smaller than the memory size required by the first process, the size of the continuous memory remained in the first subarea is smaller than the memory size required by the first process, the size of the continuous memory remained in the second subarea is larger than or equal to the memory size required by the first process, and the memory interval allocated for the first process is positioned in the second subarea.

In one implementation manner, the memory interval corresponding to the first process is not movable, and under the condition that the memory size applied by the first process is greater than the second threshold value, and the size of the remaining continuous memory in the fourth sub-area is greater than or equal to the memory size required by the first process, the memory interval allocated for the first process is located in the fourth sub-area; and under the condition that the memory size applied by the first process is larger than a second threshold value, the size of the residual continuous memory in the fourth subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the third subarea is larger than or equal to the memory size required by the first process, and the memory interval allocated for the first process is positioned in the third subarea.

And under the condition that the memory size applied by the first process is larger than a second threshold value, the size of the residual continuous memory in the fourth subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the third subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the second subarea is larger than or equal to the memory size required by the first process, and the memory interval allocated for the first process is positioned in the second subarea.

And under the condition that the memory size applied by the first process is larger than a second threshold value, the size of the residual continuous memory in the fourth subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the third subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the second subarea is smaller than the memory size required by the first process, the size of the residual continuous memory in the first subarea is larger than or equal to the memory size required by the first process, and the memory interval allocated for the first process is positioned in the first subarea.

Under the condition that the memory interval is not acquired, the electronic equipment sorts the memory defragmentation, and the memory defragmentation efficiency is improved by the method for distributing the memory, so that the time for applying the memory by the process is shortened, and the memory application efficiency is further optimized.

In a second aspect, an embodiment of the present application provides an electronic device, including: one or more processors; one or more memories; the memory stores one or more programs that, when executed by the processor, cause the electronic device to perform any of the possible methods of the first aspect described above.

In a third aspect, an embodiment of the present application provides an apparatus, where the apparatus is included in an electronic device, and the apparatus has a function of implementing the foregoing aspects and a behavior of the electronic device in a possible implementation manner of the foregoing aspects. The functions may be realized by hardware, or may be realized by hardware executing corresponding software. The hardware or software includes one or more modules or units corresponding to the functions described above. Such as a display module or unit, a detection module or unit, a processing module or unit, etc.

In a fourth aspect, embodiments of the present application provide a computer readable storage medium having instructions stored therein, which when run on a computer, cause the computer to perform the method of the first aspect described above.

In a fifth aspect, embodiments of the present application provide a computer program product comprising instructions which, when run on a computer, cause the computer to perform the method of the first aspect described above.

The technical effects obtained by the second, third, fourth and fifth aspects are similar to the technical effects obtained by the corresponding technical means in the first aspect, and are not described in detail herein.

Drawings

FIG. 1 is a schematic diagram illustrating an example of a memory management structure according to an embodiment of the present application;

FIG. 2 is a schematic diagram illustrating an example of memory fragmentation according to an embodiment of the present application;

FIG. 3 is a schematic flow chart of an example of memory defragmentation according to an embodiment of the present application;

fig. 4 is a schematic structural diagram of an example of an electronic device 100 according to an embodiment of the present application;

FIG. 5 is a block diagram of an exemplary software architecture provided by an embodiment of the present application;

FIG. 6 is a schematic diagram showing the flow of information for implementing the method of the present application in cooperation with each of the software structures in FIG. 5;

FIG. 7 is a flowchart illustrating an exemplary method for allocating memory according to an embodiment of the present application;

FIG. 8 is a schematic diagram illustrating another memory management structure according to an embodiment of the present application;

FIG. 9 is a schematic diagram illustrating an example of memory allocation according to the memory management structure shown in FIG. 8 according to an embodiment of the present application;

FIG. 10 is a flowchart illustrating another method for allocating memory according to an embodiment of the present application;

FIG. 11 is a schematic diagram illustrating an example of applying for a memory according to an embodiment of the present application;

fig. 12 is a schematic view of another scenario of applying for a memory according to an embodiment of the present application.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the present application more apparent, embodiments of the present application will be described in further detail below with reference to the accompanying drawings. The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present embodiment, unless otherwise specified, the meaning of "plurality" is two or more.

In order to facilitate understanding of the embodiments of the present application, the related concepts involved in the embodiments of the present application will be explained first.

1. Progress of a process

A process is a running activity of a program with independent functions with respect to a certain data set, and is a basic unit of resource allocation and scheduling of a system.

2. Memory

The memory is used for storing programs and data when the process runs, and is also called as an executable memory. In the present application, the memory area refers to the physical address space.

The memory is divided into nodes, each of which is associated with a processor in the system. The Node is divided into different areas (Zone) for managing different memory areas. The memory Zone is further divided into physical pages (page frames), which are the smallest units of memory allocation, each page frame containing one page of data, each page frame being a segment of consecutive physical addresses.

In order to facilitate memory allocation, the kernel of the electronic device manages page frames through a linked list structure. As shown in fig. 1, the memory includes at least two areas, dma_zone and normal_zone. Dma_zone is the memory area associated with the hardware operation and normal_zone is the area of the physical page that the kernel normally maps. Taking normal_zone as an example, during use of the electronic device, the memory area normal_zone is divided into a plurality of memory blocks each having Fang Mi (2 ⁿ ) The exponent n of the square power is called the order (order) for successive page frames. The orders being identical (i.eThe same size) is linked into a linked list. For example, the order (order) ranges from [0, 11]All the different size memory blocks in the memory region NORMAL_ZONE form 11 linked lists, wherein free_area [ order ] ]Is an array, free_area [0 ]]Is 0, and the size of all memory blocks linked in the linked list is 2 ⁰ =1 page frame; free_area [1 ]]Is 1, and the size of all memory blocks linked in the linked list is 2 ¹ =2 page frames, free_area [2 ]]Is 2, and the size of all memory blocks linked in the linked list is 2 ² =4 page frames, and so on, free_area [3 ]]To free_area [11 ]]The size of each memory block is 8, 16, 32, 64, 128, 256, 512, and 1024 consecutive page frames, respectively.

Further, page frames in one linked list can be divided into different linked lists according to migration types (migration_types), and free_list can be used for representing idle linked lists of different migration types in a specific order. As shown in fig. 1, the migration types may include the following. (1) The non-movable page (MIGRATE _ UNMOVABLE) has a fixed memory address in memory and cannot be moved to other places. (2) The memory address in the memory can be moved freely without affecting the application running. (3) The RECLAIMABLE page (migratjreciimable) cannot be moved directly, but can be deleted, the content of which can be regenerated from some source. For example, data mapped from a file belongs to the category. (4) MIGRATE CMA is used to reserve a piece of memory for the drive, but when the drive is not running, the reserved memory can be allocated to other processes. (5) Migratpcptypes, which represents the number of migration types of the linked list in the data structure of the variable per cpu page set cache. (6) The migrateheatomic, from which the core needs to allocate a higher order block to be unable to sleep, may be allocated if a request to allocate memory to a list with a particular mobility fails.

The above migration type division is only convenient for memory management, and memory balance is preserved. In practice, all page frames in the initialized state are marked as movable. The electronic device allocates memory for different processes during use, and the allocated page frames can be divided into: movable page frames and non-movable page frames. The movable page frame includes the following migration types: the migratjmobile page frame includes the following migration types: migrate_ UNMOVABLE, MIGRATE _ RECLAIMABLE, MIGRATE _cma.

Based on the above-mentioned linked list structure, when memory allocation, for example, a process applies for a block with a memory size of 256 page frames, firstly searches for an idle block from the 8-order linked list corresponding to the 256 page frames, if there are no idle blocks (continuous 256 idle page frames) in the 8-order linked list, searches for the 9-order linked list corresponding to the 512 page frames, if there are idle blocks (continuous 512 idle page frames) in the 9-order linked list, then divides the idle block in the 9-order linked list into 2 idle blocks with a size of 256 page frames, wherein one idle block is allocated to the process, and the other idle block is migrated into the 8-order linked list. If no free block exists in the 9-order linked list, searching in the 10-order linked list corresponding to 1024 page frames is continued, and if no free block exists, an error is returned to the process.

3. Memory fragmentation

In practical use of the electronic device, the memory needs to allocate continuous free frames for the program when the program runs, and the memory needs to recover the allocated frames when the program ends. During long-term operation of the electronic device, the memory needs to frequently allocate and release page frames with different sizes, so that many free page frames in the memory are scattered around the physical address space, that is, a larger memory block consisting of continuous free page frames is lacking in the memory. These scattered free page frames are referred to as memory fragmentation.

As shown in fig. 2 (a), in a block memory area, white is a free page frame and black is an already allocated page frame, and although the free page frames are scattered in the memory physical address space, the largest consecutive free page frame is only one page, and a memory block larger than one page cannot be allocated. When a program needs to apply for a larger continuous memory block, due to the lack of a larger memory block formed by continuous idle page frames, the application time may be too long, for example, when a request is made for a continuous memory with a size of 39KB, the required application time is 179ms+, and the application time is too long, which may cause performance problems such as application start and exit blocking of the electronic device.

4. Defragmentation

In the current memory Zone, the electronic device may sort the memory fragments based on the movable page frame and the non-movable page frame, as shown in (b) in fig. 2, and after sorting, the idle page frames are connected to form a larger applicable memory block.

Specifically, before memory defragmentation begins, the electronic device sets a pointer at the head and tail of the memory area. When the memory defragmentation is performed, as shown in (a) in fig. 3, the head pointer scans movable page frames from the head to the tail of the memory area, after the movable page frames are scanned, as shown in (b) in fig. 3, the tail pointer scans free page frames from the tail to the head of the memory area, and when the number of the scanned free page frames satisfies the requirement that the movable page frames are scanned, as shown in (c) in fig. 3, data in the movable page frames are migrated into the free page frames, so that the movable page frames are changed into free page frames, and the continuous free page frames of the head form a larger memory block which can be used for applying for the memory.

However, (a) to (c) in fig. 3 are ideal conditions, and in fact, according to the current memory management structure allocation, there may be an immovable frame after the movable frame, as shown in (d) in fig. 3, the immovable frame needs to be skipped when the head pointer scans, resulting in slower speed of scanning to the movable frame, slower speed of obtaining continuous frame, and lower efficiency of defragmentation.

In view of this, the present application provides a method for allocating memory, which divides a memory area normal_zone into a first area and a second area, wherein a termination address of the first area is located before a start address of the second area, and the termination address and the start address refer to physical addresses. When the electronic device needs to run the first process in the using process, a memory interval is allocated to the electronic device according to the first process, wherein the memory interval refers to a continuous page frame or a memory block. And if the memory interval corresponding to the first process is movable, distributing the memory interval for the first process in the first area. Or if the memory interval corresponding to the first process is not movable, the memory interval is allocated to the first process in the second area.

The method for allocating the memory provided by the embodiment of the application can be applied to electronic equipment such as mobile phones, tablet computers, notebook computers (Personal Computer, PC), ultra-mobile personal computers (UMPC), vehicle-mounted equipment, netbooks, personal digital assistants (personal digital assistant, PDA) and the like. The application is not limited in this regard.

A schematic hardware architecture of the electronic device 100 implementing the above method is described below with reference to fig. 4.

The electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (universal serial bus, USB) interface 130, a charge management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, keys 190, a motor 191, an indicator 192, a camera 193, a display 194, and a subscriber identity module (subscriber identification module, SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyro sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, and the like.

The processor 110 may include one or more processing units, such as: the processor 110 may include an application processor (application processor, AP), a modem processor, a graphics processor (graphics processing unit, GPU), an image signal processor (image signal processor, ISP), a controller, a video codec, a digital signal processor (digital signal processor, DSP), a baseband processor, and/or a neural network processor (neural-network processing unit, NPU), etc. Wherein the different processing units may be separate devices or may be integrated in one or more processors.

The controller can generate operation control signals according to the instruction operation codes and the time sequence signals to finish the control of instruction fetching and instruction execution.

A memory may also be provided in the processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may hold instructions or data that the processor 110 has just used or recycled. If the processor 110 needs to reuse the instruction or data, it can be called directly from the memory. Repeated accesses are avoided and the latency of the processor 110 is reduced, thereby improving the efficiency of the system.

In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an integrated circuit (inter-integrated circuit, I2C) interface, an integrated circuit built-in audio (inter-integrated circuit sound, I2S) interface, a pulse code modulation (pulse code modulation, PCM) interface, a universal asynchronous receiver transmitter (universal asynchronous receiver/transmitter, UART) interface, a mobile industry processor interface (mobile industry processor interface, MIPI), a general-purpose input/output (GPIO) interface, a subscriber identity module (subscriber identity module, SIM) interface, and/or a universal serial bus (universal serial bus, USB) interface, among others.

The charge management module 140 is configured to receive a charge input from a charger. The charger can be a wireless charger or a wired charger. In some wired charging embodiments, the charge management module 140 may receive a charging input of a wired charger through the USB interface 130. In some wireless charging embodiments, the charge management module 140 may receive wireless charging input through a wireless charging coil of the electronic device 100. The charging management module 140 may also supply power to the electronic device through the power management module 141 while charging the battery 142.

The power management module 141 is used for connecting the battery 142, and the charge management module 140 and the processor 110. The power management module 141 receives input from the battery 142 and/or the charge management module 140 to power the processor 110, the internal memory 121, the display 194, the camera 193, the wireless communication module 160, and the like. The power management module 141 may also be configured to monitor battery capacity, battery cycle number, battery health (leakage, impedance) and other parameters. In other embodiments, the power management module 141 may also be provided in the processor 110. In other embodiments, the power management module 141 and the charge management module 140 may be disposed in the same device.

The wireless communication function of the electronic device 100 may be implemented by the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, a modem processor, a baseband processor, and the like.

The electronic device 100 implements display functions through a GPU, a display screen 194, an application processor, and the like. The GPU is a microprocessor for image processing, and is connected to the display 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 110 may include one or more GPUs that execute program instructions to generate or change display information.

The display screen 194 is used to display images, videos, and the like. The electronic device 100 may implement photographing functions through an ISP, a camera 193, a video codec, a GPU, a display screen 194, an application processor, and the like.

The ISP is used to process data fed back by the camera 193. For example, when photographing, the shutter is opened, light is transmitted to the camera photosensitive element through the lens, the optical signal is converted into an electric signal, and the camera photosensitive element transmits the electric signal to the ISP for processing and is converted into an image visible to naked eyes. ISP can also optimize the noise, brightness and skin color of the image. The ISP can also optimize parameters such as exposure, color temperature and the like of a shooting scene. In some embodiments, the ISP may be provided in the camera 193.

The external memory interface 120 may be used to connect an external memory card, such as a Micro SD card, to enable expansion of the memory capabilities of the electronic device 100. The external memory card communicates with the processor 110 through an external memory interface 120 to implement data storage functions. For example, files such as music, video, etc. are stored in an external memory card.

The internal memory 121 may be used to store computer executable program code including instructions. The internal memory 121 may include a storage program area and a storage data area. The storage program area may store an application program (such as a sound playing function, an image playing function, etc.) required for at least one function of the operating system, etc. The storage data area may store data created during use of the electronic device 100 (e.g., audio data, phonebook, etc.), and so on. In addition, the internal memory 121 may include a high-speed random access memory, and may further include a nonvolatile memory such as at least one magnetic disk storage device, a flash memory device, a universal flash memory (universal flash storage, UFS), and the like. The processor 110 performs various functional applications of the electronic device 100 and data processing by executing instructions stored in the internal memory 121 and/or instructions stored in a memory provided in the processor.

The electronic device 100 may implement audio functions through an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, an application processor, and the like. Such as music playing, recording, etc.

The speaker 170A, also referred to as a "horn," is used to convert audio electrical signals into sound signals. The electronic device 100 may listen to music, or to hands-free conversations, through the speaker 170A.

A receiver 170B, also referred to as a "earpiece", is used to convert the audio electrical signal into a sound signal. When electronic device 100 is answering a telephone call or voice message, voice may be received by placing receiver 170B in close proximity to the human ear.

The temperature sensor 180J is for detecting temperature. In some embodiments, the electronic device 100 performs a temperature processing strategy using the temperature detected by the temperature sensor 180J. For example, when the temperature reported by temperature sensor 180J exceeds a threshold, electronic device 100 performs a reduction in the performance of a processor located in the vicinity of temperature sensor 180J in order to reduce power consumption to implement thermal protection. In other embodiments, when the temperature is below another threshold, the electronic device 100 heats the battery 142 to avoid the low temperature causing the electronic device 100 to be abnormally shut down. In other embodiments, when the temperature is below a further threshold, the electronic device 100 performs boosting of the output voltage of the battery 142 to avoid abnormal shutdown caused by low temperatures.

The touch sensor 180K, also referred to as a "touch device". The touch sensor 180K may be disposed on the display screen 194, and the touch sensor 180K and the display screen 194 form a touch screen, which is also called a "touch screen". The touch sensor 180K is for detecting a touch operation acting thereon or thereabout. The touch sensor may communicate the detected touch operation to the application processor to determine the touch event type. Visual output related to touch operations may be provided through the display 194. In other embodiments, the touch sensor 180K may also be disposed on the surface of the electronic device 100 at a different location than the display 194.

The keys 190 include a power-on key, a volume key, etc. The keys 190 may be mechanical keys. Or may be a touch key. The electronic device 100 may receive key inputs, generating key signal inputs related to user settings and function controls of the electronic device 100.

The motor 191 may generate a vibration cue. The motor 191 may be used for incoming call vibration alerting as well as for touch vibration feedback. For example, touch operations acting on different applications (e.g., photographing, audio playing, etc.) may correspond to different vibration feedback effects. The motor 191 may also correspond to different vibration feedback effects by touching different areas of the display screen 194. Different application scenarios (such as time reminding, receiving information, alarm clock, game, etc.) can also correspond to different vibration feedback effects. The touch vibration feedback effect may also support customization.

The indicator 192 may be an indicator light, may be used to indicate a state of charge, a change in charge, a message indicating a missed call, a notification, etc.

The SIM card interface 195 is used to connect a SIM card. The SIM card may be inserted into the SIM card interface 195, or removed from the SIM card interface 195 to enable contact and separation with the electronic device 100. The electronic device 100 may support 1 or N SIM card interfaces, N being a positive integer greater than 1. The SIM card interface 195 may support Nano SIM cards, micro SIM cards, and the like. The same SIM card interface 195 may be used to insert multiple cards simultaneously. The types of the plurality of cards may be the same or different. The SIM card interface 195 may also be compatible with different types of SIM cards. The SIM card interface 195 may also be compatible with external memory cards. The electronic device 100 interacts with the network through the SIM card to realize functions such as communication and data communication. In some embodiments, the electronic device 100 employs esims, i.e.: an embedded SIM card. The eSIM card can be embedded in the electronic device 100 and cannot be separated from the electronic device 100.

It should be understood that the illustrated structure of the embodiment of the present application does not constitute a specific limitation on the electronic device 100. In other embodiments of the application, electronic device 100 may include more or fewer components than shown, or certain components may be combined, or certain components may be split, or different arrangements of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

The software system of the electronic device 100 may employ a layered architecture, an event driven architecture, a microkernel architecture, a microservice architecture, or a cloud architecture. In the embodiment of the invention, taking an Android system with a layered architecture as an example, a software structure of the electronic device 100 is illustrated.

Fig. 5 is a software configuration block diagram of the electronic device 100 according to the embodiment of the present invention.

The layered architecture divides the software into several layers, each with distinct roles and branches. The layers communicate with each other through a software interface. In some embodiments, the Android system is divided into four layers, from top to bottom, an application layer, an application framework layer, an Zhuoyun row (Android run) and system libraries, and a kernel layer, respectively.

The application layer may include a series of application packages.

As shown in fig. 5, the application package may include applications for cameras, gallery, calendar, phone calls, maps, navigation, WLAN, bluetooth, music, video, short messages, etc.

The application framework layer provides an application programming interface (application programming interface, API) and programming framework for application programs of the application layer. The application framework layer includes a number of predefined functions.

As shown in fig. 5, the application framework layer may include a window manager, a content provider, a view system, a telephony manager, a resource manager, a notification manager, and the like.

The window manager is used for managing window programs. The window manager can acquire the size of the display screen, judge whether a status bar exists, lock the screen, intercept the screen and the like.

The content provider is used to store and retrieve data and make such data accessible to applications. The data may include video, images, audio, calls made and received, browsing history and bookmarks, phonebooks, etc.

The view system includes visual controls, such as controls to display text, controls to display pictures, and the like. The view system may be used to build applications. The display interface may be composed of one or more views. For example, a display interface including a text message notification icon may include a view displaying text and a view displaying a picture.

The telephony manager is used to provide the communication functions of the electronic device 100. Such as the management of call status (including on, hung-up, etc.).

The resource manager provides various resources for the application program, such as localization strings, icons, pictures, layout files, video files, and the like.

The notification manager allows the application to display notification information in a status bar, can be used to communicate notification type messages, can automatically disappear after a short dwell, and does not require user interaction. Such as notification manager is used to inform that the download is complete, message alerts, etc. The notification manager may also be a notification in the form of a chart or scroll bar text that appears on the system top status bar, such as a notification of a background running application, or a notification that appears on the screen in the form of a dialog window. For example, a text message is prompted in a status bar, a prompt tone is emitted, the electronic device vibrates, and an indicator light blinks, etc.

Android run time includes a core library and virtual machines. Android run time is responsible for scheduling and management of the Android system.

The core library consists of two parts: one part is a function which needs to be called by java language, and the other part is a core library of android.

The application layer and the application framework layer run in a virtual machine. The virtual machine executes java files of the application program layer and the application program framework layer as binary files. The virtual machine is used for executing the functions of object life cycle management, stack management, thread management, security and exception management, garbage collection and the like.

The system library may include a plurality of functional modules. For example: surface manager (surface manager), media Libraries (Media Libraries), three-dimensional graphics processing Libraries (e.g., openGL ES), 2D graphics engines (e.g., SGL), etc.

The surface manager is used to manage the display subsystem and provides a fusion of 2D and 3D layers for multiple applications.

Media libraries support a variety of commonly used audio, video format playback and recording, still image files, and the like. The media library may support a variety of audio and video encoding formats, such as MPEG4, h.264, MP3, AAC, AMR, JPG, PNG, etc.

The three-dimensional graphic processing library is used for realizing three-dimensional graphic drawing, image rendering, synthesis, layer processing and the like.

The 2D graphics engine is a drawing engine for 2D drawing.

The kernel layer is a layer between hardware and software. The kernel layer at least comprises a display driver, a camera driver, a memory partition management module, a memory allocation optimization module and a memory recycling optimization module.

Fig. 6 shows an information transmission flow chart in a memory management process according to an embodiment of the present application. As shown in fig. 6, the memory partition management module, the memory allocation optimization module, and the memory reclamation optimization module may be referred to as partner systems. In the embodiment of the application, the electronic equipment initializes the memory in a starting-up stage, and in the process, the memory partition management module divides the memory of each region (zone) into a plurality of molecular regions according to physical addresses, and different sub-regions are used for being distributed to different types of processes. The memory partition management module also records the termination address and the median address of each sub-area, so that the management is convenient when the memory is applied and released.

The memory allocation optimization module is used for receiving a memory application request of a process, determining a sub-region of the memory allocated for the process according to whether a memory interval corresponding to the process is movable or not according to the size of the memory requested by the process, and allocating the memory interval for the process from the sub-region.

The memory recycling optimization module is used for recycling the memory. After the process is finished, the memory interval occupied by the process is released, and the memory recovery optimization module returns the memory interval to the linked list of the subareas allocated with the memory interval according to the physical address of the memory interval so that the memory partition management module manages the idle memory.

In the following, a mobile phone is taken as an example to describe the method provided by the present application in detail, fig. 7 shows a flow chart of a method for allocating memory provided by an embodiment of the present application, where the method for allocating memory at least includes S701-S704.

S701, a memory allocation optimization module receives a request for allocating memory for a first process.

Many applications are installed on the handset, including applications that can run in the foreground and applications that can run in the background for a long period without an interface. Memory is required for starting up, loading a desktop system, starting and running various application programs, for example, the application programs are used for completing various functions of photographing, listening to music, watching video, talking, sending messages, and the like, and switching among a plurality of user interfaces in one application, switching among a plurality of application scenes, for example, switching from a browser to shopping software, switching from shopping software to photographing software, switching from photographing scenes in photographing software to photo preview scenes, and the like, and memory allocation is involved.

The process is a carrier for running the application program, when the application program runs, the operating system of the mobile phone provides one or more processes for the application program, different processes respectively run different functions of the application program, and each process is allocated with a memory interval for running the program and storing data. Taking a 32-bit video application program as an example, when the video application program is started, the operating system creates a 32-bit process for the video application program, and in the running process of the created process, the operating system also allocates a memory interval of maximum 4GB for the process.

When the application program is started or operated, a memory allocation request is sent to a memory allocation optimization module, the memory allocation request is used for allocating the memory required by the operation for the first process of the application program, and the first process is one of one or more processes of the application program.

S702, judging whether a memory interval corresponding to the first process is movable or not.

The memory interval assignment corresponding to the first process is the memory interval applied for the first process at this time. Whether a memory interval is movable is determined according to the purpose of the memory interval after it is applied, or it may be determined according to the type of process applying memory.

The memory interval allocated to the first process stores data and programs required for running the first process, and if the data and programs do not affect the running of the first process after moving from the allocated memory interval to another memory interval, the memory interval corresponding to the first process is movable, for example, the memory interval required for starting or sliding WeChat, today's top-hat, and the like when using the upper application program mostly belongs to the movable process, and such a process may be referred to as a user state process.

If the first process is running in error after the data and the program move from the allocated memory interval to another memory interval, the memory interval corresponding to the first process is not movable, for example, a camera driver, an audio driver, a network message block or a file descriptor, and the memory interval required by a driver or a kernel in an operating system is mostly not movable, and such a process may be referred to as a kernel state process.

After receiving the memory allocation request, the memory allocation optimization module determines whether the memory interval corresponding to the first process is movable according to the flag bit in the memory allocation request. For example, when the flag bit is "1", it indicates that the memory interval corresponding to the first process is movable; when the data type flag bit is "0", it indicates that the memory interval corresponding to the first process is not movable. For example, the flag bit is a migration type size_type, and when the migration type is migratjmobile and the like belonging to a type of a MOVABLE page frame, the memory interval corresponding to the first process is indicated to be MOVABLE; when the migration type is a type belonging to an immovable page frame, for example, migratjunmovable, it indicates that the memory space corresponding to the first process is immovable.

S703, the memory interval corresponding to the first process is movable, and the memory interval is allocated to the first process in the first area.

S704, the memory interval corresponding to the first process is not movable, and the memory interval is allocated for the first process in the second area.

In the embodiment of the present application, the first area is a continuous memory area preferentially allocated to the movable page frame, and the second area is a continuous memory area preferentially allocated to the non-movable page frame. In the memory physical address space, the ending address of the first area is located before the starting address of the second area.

The size of the first area and the size of the second area can be determined according to historical use conditions of the mobile phone. When the mobile phone initializes the memory each time, for example, after the mobile phone is started up each time, the allocation proportion of the movable page frame and the immovable page frame in the history is counted, and the size of the first area and the size of the second area are divided when the memory is initialized according to the allocation proportion. For example, if the allocation ratio of the movable page frame to the non-movable page frame in the history is 1:3, the size of the second area divided this time is 3 times the size of the first area. The size ratio of the first region and the second region may be different after each initialization of the memory. The division ratio of different electronic devices may be different. Alternatively, the size of the first region and the size of the second region may be preset according to the experimental test value.

If the memory interval corresponding to the first process is movable, distributing the memory interval for the first process in the first area; if the memory interval corresponding to the first process is immovable, the memory interval is allocated to the first process in the second area, so that a large number of movable page frames exist in the head area of the memory, when the memory defragmentation is performed, the speed of scanning the movable page frames in the head can be increased, continuous page frames can be obtained rapidly, and the defragmentation efficiency is improved.

As shown in fig. 8, the embodiment of the present application manages the memory through a linked list structure, where the memory area dma_zone is divided into a plurality of sub-areas, which may be denoted as DMA0, DMA1, DMA2, and DMA3, respectively. The memory region NORMAL_ZONE is divided into a plurality of sub-regions, which can be denoted as Nomal0, nomal1, nomal2, nomal3, respectively. The first region may include one or more sub-regions and the second region may also include one or more sub-regions. For example, DMA0 may be divided into a first area of the memory area dma_zone and DMA1, DMA2, DMA3 may be divided into a second area of the memory area dma_zone. Illustratively, according to the allocation ratio, nomal0, nomal1 may be divided into a first area of the memory area nomal_zone, and Nomal2, nomal3 may be divided into a second area of the memory area nomal_zone. The allocation manner provided in the embodiment of the application is a priority allocation mechanism, so that each sub-region is divided into memory sections by a free_area [ order ] array, and each free_area [ order ] array is further divided into a plurality of free_list linked lists according to migration types. For ease of viewing, only the linked list structure of Nomal1 is shown in the figure.

It should be noted that the above embodiment shows a case where one memory area is divided into 4 sub-areas, and in fact, the memory area may be divided into more or less sub-areas, which is not limited by the present application. After dividing the subareas, marking the priority allocation relation of each subarea so as to find the corresponding area when the memory is allocated later.

In the embodiment of the application, the mobility of the memory interval is considered, and the size of the applied memory interval is also considered. As shown in fig. 9, the first region may be divided into a first sub-region and a second sub-region, and the second region may be divided into a third sub-region and a fourth sub-region. The termination address of the first sub-region is located before the start address of the second sub-region and the termination address of the third sub-region is located before the start address of the fourth sub-region.

Because the fourth subregion is located at the tail of the memory region and is preferentially allocated to the process with larger memory interval, the tail of the memory region is easy to generate memory fragments, for example, after the fourth subregion allocates a memory interval with 3 steps for the first process, if the memory interval is released and is not combined with other memory intervals to form a larger memory interval, the size of the memory interval which can be allocated is 3 steps and below 3 steps and cannot be allocated to the process with the size above 3 steps, the memory interval can be easily changed into an idle page; in addition, if the process with the smaller memory interval is preferentially allocated to the fourth sub-area, after the memory interval is released, the process is easily occupied by the next process, so that the occupied concentration of the fourth sub-area is high; therefore, the tail is preferentially allocated to the process with larger memory interval, and the free memory is easily acquired at the tail of the memory due to fragmentation, so that the efficiency of scanning the tail to the free page during defragmentation is improved.

Fig. 10 is a flowchart illustrating a method for allocating memory according to an embodiment of the present application, where the method for allocating memory includes at least S1001-S1012.

S1001, a memory allocation optimization module receives a request for allocating memory for a first process.

S1002, judging whether the memory section corresponding to the first process is movable.

S1003, if the memory interval corresponding to the first process is movable, judging whether the size of the memory interval required by the first process is larger than a first threshold.

S1004, determining whether the remaining continuous memory in the first sub-area is sufficient or not under the condition that the size of the memory interval required by the first process is smaller than or equal to a first threshold.

S1005, if the continuous memory remaining in the first sub-area is sufficient, allocating a memory interval for the first process in the first sub-area.

The memory allocation request includes a migration type, and also includes the size of the applied memory interval, which is indicated by a parameter order (order), for example, order=1, and indicates that 2 consecutive page frames are applied. The memory allocation optimization module sequentially finds a linked list corresponding to the appointed sub-region, the appointed order and the appointed migration type in the linked list structure shown in fig. 8 according to the order and the migration type in the memory allocation request, and if enough free page frames exist in the linked list, the memory interval is allocated for the first process from the linked list. If the linked list does not have enough free page frames, the memory allocation optimization module acquires the free page frames from other subareas of the same type according to the movable priority allocation relation. If the other subareas of the same type do not have enough free page frames, the memory allocation optimization module acquires the free page frames from the other subareas of the same type according to the priority allocation relation of the memory interval size and the memory interval size required by the process.

The magnitude of the first threshold is not limited in the embodiment of the present application. For example, the first threshold may be 2 steps, that is, 4 consecutive page frames, and the memory interval is smaller when the size of the memory interval is 0 steps, 1 steps, and 2 steps, and the memory interval is larger when the size of the memory interval is 3 steps and above.

For example, in the scenario shown in FIG. 11, the user clicks on an applicationIcon open +.>At-> Receiving files, pictures or text messages sent by other users, and operating system is +.>Creating a process 1, wherein the memory interval corresponding to the process 1 is movable, and the memory interval required by the process 1 is smaller,/-for>And sending a memory allocation request 1 to the memory allocation optimization module, wherein the memory allocation request 1 carries a migration type and an order, for example, the migration type of the process 1 is MIGRATE_MOVABLE, and the order is 1 (two continuous page frames). The memory allocation optimization module determines that a memory interval corresponding to the process 1 is movable according to the migration type, searches a first region, wherein the first region comprises a first sub-region and a second sub-region, and determines that the size of the memory interval required by the process 1 is smaller according to the order, and searches the first sub-region. Determining whether the continuous memory remained in the first subarea is sufficient, namely determining whether the size of the continuous memory remained in the first subarea is larger than or equal to the size of a memory interval required by the process 1, namely determining whether the free page frames remained in the first subarea comprise two continuous page frames, and if the first subarea comprises two continuous page frames, distributing the memory interval for the process 1 in the first subarea.

S1006, determining whether the continuous memory remained in the second sub-area is sufficient or not under the condition that the continuous memory remained in the first sub-area is insufficient.

S1007, in the case where the continuous memory remaining in the second sub-area is sufficient, allocating a memory interval for the first process in the second sub-area.

Both the first sub-region and the second sub-region belong to the first region and are preferentially allocated to the movable page frame. If the first subarea does not have two continuous page frames, searching the second subarea, determining whether the second subarea has two continuous page frames, and if the second subarea comprises two continuous page frames, distributing a memory interval for the process 1 in the second subarea.

S1008, if the continuous memory remaining in the second sub-area is insufficient, determining whether the continuous memory remaining in the third sub-area is sufficient.

S1009, if the continuous memory remaining in the third sub-area is sufficient, allocating a memory space for the first process in the third sub-area.

Under the condition that the residual continuous memories in the first subarea and the second subarea are insufficient, a memory interval is allocated for the process 1 in the second area, wherein the second area comprises a third subarea and a fourth subarea, the third subarea is preferentially allocated to a smaller memory, and as the memory interval required by the process 1 is smaller, the third subarea is searched first to determine whether the third subarea has two continuous page frames, if the third subarea comprises two continuous page frames, the memory interval is allocated for the process 1 in the third subarea.

S1010, if the continuous memory remained in the third subarea is insufficient, determining whether the continuous memory remained in the fourth subarea is sufficient.

S1011, if the continuous memory remained in the fourth subarea is sufficient, the memory interval is allocated for the first process in the fourth subarea.

If two continuous page frames still do not exist in the third subarea, a fourth subarea is further searched, and under the condition that the continuous memory remained in the fourth subarea is sufficient, a memory interval is allocated for the first process in the fourth subarea.

And S1012, under the condition that the residual continuous memory in the fourth subarea is still insufficient, the memory defragmentation is performed.

And under the condition that the application of the memory is not completed, the memory allocation optimization module defragments the memory so as to obtain continuous idle page frames required by the process 1.

S1013, if the memory interval corresponding to the first process is movable and the size of the memory interval required by the first process is greater than the first threshold, the memory interval is allocated to the first process in the second sub-region.

S1014, if the memory interval corresponding to the first process is not movable, the memory interval is allocated for the first process in the second area.

Similarly, S1013 may specifically be: if the memory interval corresponding to the first process is movable and the size of the memory interval required by the first process is larger than a first threshold value, determining whether the residual continuous memory in the second subarea is sufficient; if the remaining continuous memory in the second sub-area is sufficient, memory intervals are allocated for the first process in the second sub-area; if the remaining continuous memory in the second sub-area is insufficient, determining whether the remaining continuous memory in the first sub-area is sufficient; if the residual continuous memory in the first subarea is sufficient, memory intervals are allocated for the first process in the first subarea; if the continuous memory remained in the first subarea is insufficient, determining whether the continuous memory remained in the fourth subarea is sufficient; if the remaining continuous memory in the fourth sub-area is sufficient, allocating a memory interval for the first process in the fourth sub-area; if the continuous memory remaining in the fourth sub-area is insufficient, determining whether the continuous memory remaining in the third sub-area is sufficient; if the remaining continuous memory in the third sub-area is sufficient, a memory interval is allocated for the first process in the third sub-area; and if the residual continuous memory in the third subarea is insufficient, sorting the memory defragmentation.

Describing S1014 exemplarily, in the scenario as shown in fig. 12 (a), the user is inThe voice message is sent to other users, the audio drive is needed to be used for sending or listening to the voice message, and the operating system is +>Creating a process 2, wherein the memory interval corresponding to the process 2 is not movable, and the memory interval required by the process 2 is smaller, +.>A memory allocation request 2 is sent to a memory allocation optimization module,the memory allocation request 2 carries a migration type and an order, for example, the migration type of the process 2 is migratjunmovable, and the order is 2 (four consecutive page frames). The memory allocation optimization module determines that the memory interval corresponding to the process 2 is immovable according to the migration type, searches the second region, wherein the second region comprises a third sub-region and a fourth sub-region, and determines that the size of the memory interval required by the process 2 is smaller according to the order, and searches the third sub-region. Determining whether the residual continuous memory in the third subarea is sufficient, and if the residual continuous memory in the third subarea is sufficient, distributing a memory interval for the process 2 in the third subarea; if the continuous memory remained in the third subarea is insufficient, determining whether the continuous memory remained in the fourth subarea is sufficient; if the remaining continuous memory in the fourth sub-area is sufficient, a memory interval is allocated for the process 2 in the fourth sub-area; if the continuous memory remaining in the fourth sub-area is insufficient, determining whether the continuous memory remaining in the first sub-area is sufficient; if the residual continuous memory in the first subarea is sufficient, memory intervals are distributed for the process 2 in the first subarea; if the residual continuous memory in the first subarea is insufficient, determining whether the residual continuous memory in the second subarea is sufficient; if the remaining continuous memory in the second sub-area is sufficient, memory intervals are allocated for the process 2 in the second sub-area; and if the remaining continuous memory in the second subarea is insufficient, sorting the memory defragmentation.

In the scenario as shown in fig. 12 (b), the user is inThe user can communicate with other users by video, and the camera is required to be used for driving, and the operating system is +.>Creating process 3, wherein the memory interval corresponding to process 3 is not movable, and the memory interval required by process 3 is larger, for example, 4 th order is required. The memory allocation optimization module preferentially searches the fourth subarea according to the migration type and the order, determines whether the residual continuous memory in the fourth subarea is sufficient, and if so, determines that the residual continuous memory in the fourth subarea is sufficientSufficient memory exists, and a memory interval is allocated for the process 3 in the fourth sub-region; if the continuous memory remaining in the fourth sub-area is insufficient, determining whether the continuous memory remaining in the third sub-area is sufficient; if the remaining continuous memory in the third sub-area is sufficient, allocating a memory interval for the process 3 in the third sub-area; if the remaining continuous memory in the third sub-area is insufficient, determining whether the remaining continuous memory in the second sub-area is sufficient; if the remaining continuous memory in the second sub-area is sufficient, allocating a memory interval for the process 3 in the second sub-area; if the remaining continuous memory in the second sub-area is insufficient, determining whether the remaining continuous memory in the first sub-area is sufficient; if the residual continuous memory in the first subarea is sufficient, a memory interval is allocated for the process 3 in the first subarea; and if the residual continuous memory in the first subarea is insufficient, sorting the memory defragmentation.

It should be noted that, in some cases, the memory space required for audio driving may be larger, and the foregoing is merely exemplary. When the camera is used for photographing, a camera is also used for driving, so that a larger immovable memory section is applied.

After the process is finished, for example, the user exits the WeChat or ends the video call, the memory interval occupied by the process is released, and the memory recovery optimization module returns the memory interval to the linked list of the sub-regions of the allocated memory interval according to the physical address of the memory interval.

In addition to the continuous memory shortage triggering the memory defragmentation when applying for memory, the memory defragmentation can also be triggered after each memory reclamation, or the user can actively input instructions to trigger the memory defragmentation.

In summary, in the embodiment of the present application, the memory area is divided into a plurality of sub-areas, and a priority allocation policy is set for the plurality of sub-areas, and when allocating the memory, the sub-areas for dividing the memory interval for the first process are determined based on different migration types and orders. The memory interval which is allocated first by the first area and is allocated first by the second area is movable, and the memory interval which is allocated first by the second area is not movable, so that the memory head has a large number of movable page frames, the efficiency of scanning the head to the movable page frames during the memory defragmentation can be accelerated, and the efficiency of the memory defragmentation is improved. The second area is divided into a third sub-area and a fourth sub-area, the termination address of the third sub-area is before the start address of the fourth sub-area, and the fourth sub-area is preferentially allocated with a high-order memory, so that the tail part of the memory is easy to fragment, a free page frame is easy to obtain, the tail part scanning efficiency of the memory to the free page frame during the memory fragment arrangement can be accelerated, and the memory fragment arrangement efficiency is improved. When the memory is applied, the efficiency of memory application is further optimized due to the improvement of the efficiency of memory defragmentation.

The method for distributing the memory provided by the embodiment of the application can be realized in the kernel, namely, the kernel distributes the memory for the process. The configuration interface can also be provided for the kernel, the allocation strategy is configured in the user mode, namely, when the mobile phone is started and initialized, or other designated occasions (such as low memory, low power and the like), the memory partition is obtained through the interface provided by the kernel, and the priority allocation strategy of the memory partition is configured by the application program, but the application program is required to have preset authority, so that the implementation code is further protected.

The electronic device provided in this embodiment is configured to perform the above method, so that the same effects as those of the implementation method can be achieved. In case an integrated unit is employed, the electronic device may comprise a processing module, a storage module and a communication module. The processing module may be configured to control and manage actions of the electronic device, for example, may be configured to support the electronic device to execute steps executed by the processing unit. The memory module may be used to support the electronic device to execute stored program code, data, etc. And the communication module can be used for supporting the communication between the electronic device and other devices.

Embodiments of the present application also provide a computer readable storage medium storing a computer program which, when executed by a processor, implements steps for implementing the various method embodiments described above.

Embodiments of the present application provide a computer program product enabling an electronic device to carry out the steps of the various method embodiments described above when the computer program product is run on a mobile terminal.

In addition, embodiments of the present application also provide an apparatus, which may be embodied as a chip, component or module, which may include a processor and a memory coupled to each other; the memory is configured to store computer-executable instructions, and when the device is operated, the processor may execute the computer-executable instructions stored in the memory, so that the chip performs the methods in the above method embodiments.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus/electronic device and method may be implemented in other manners. For example, the apparatus/electronic device embodiments described above are merely illustrative, e.g., the division of the modules or units is merely a logical function division, and there may be additional divisions in actual implementation, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection via interfaces, devices or units, which may be in electrical, mechanical or other forms.

In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.

The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the present application may implement all or part of the flow of the method of the above-described embodiments, and may be implemented by a computer program to instruct related hardware, where the computer program may be stored in a computer readable storage medium, and the computer program may implement the steps of the method embodiments described above when executed by a processor. Wherein the computer program comprises computer program code which may be in source code form, object code form, executable file or some intermediate form etc. The computer readable medium may include at least: any entity or device capable of carrying the computer program code to the terminal equipment, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (random access memory, RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium. Such as a U-disk, removable hard disk, magnetic or optical disk, etc. In some jurisdictions, computer readable media may not be electrical carrier signals and telecommunications signals in accordance with legislation and patent practice.

The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In the description above, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It should also be understood that reference to "a plurality" in the present specification and appended claims means two or more. In the description of the present application, "/" means or, unless otherwise indicated, for example, A/B may represent A or B; "and/or" herein is merely an association describing an associated object, and refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations, e.g., a and/or B, which may represent: a exists alone, A and B exist together, and B exists alone.

As used in the present description and the appended claims, the term "if" may be interpreted as "when..once" or "in response to a determination" or "in response to detection" depending on the context. Similarly, the phrase "if a determination" or "if a [ described condition or event ] is detected" may be interpreted in the context of meaning "upon determination" or "in response to determination" or "upon detection of a [ described condition or event ]" or "in response to detection of a [ described condition or event ]".

In addition, in order to facilitate the clear description of the technical solution of the present application, the words "first", "second", etc. are used to distinguish the same item or similar items having substantially the same function and function. It will be appreciated by those of skill in the art that the words "first," "second," and the like do not limit the amount and order of execution, are not to be construed as indicating or implying any particular importance, and that the words "first," "second," and the like do not necessarily differ.

Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.

The above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims

1. A method for allocating memory, the method being applied to an electronic device, a memory area of the electronic device comprising a first area and a second area, a termination address of the first area being located before a start address of the second area, the method comprising:

according to a first process, memory intervals are allocated for the first process in the first area, and the memory intervals corresponding to the first process are movable; or alternatively, the process may be performed,

and according to the first process, memory intervals are allocated for the first process in the second area, and the memory intervals corresponding to the first process are immovable.

2. The method of claim 1, wherein the first region includes a first sub-region and a second sub-region, wherein a termination address of the first sub-region is located before a start address of the second sub-region, and wherein a memory interval allocated to the first process in the first region is located in the first sub-region if a memory size applied by the first process is less than or equal to a first threshold; or alternatively, the process may be performed,

and under the condition that the memory size applied by the first process is larger than the first threshold value, the memory interval allocated to the first process in the first area is positioned in the second sub-area.

3. The method of claim 1, wherein the second region includes a third sub-region and a fourth sub-region, and wherein a termination address of the third sub-region is located before a start address of the fourth sub-region, and wherein a memory interval allocated to the first process in the second region is located in the third sub-region if a memory size applied by the first process is less than or equal to a second threshold; or alternatively, the process may be performed,

and under the condition that the memory size applied by the first process is larger than the second threshold value, the memory interval allocated to the first process in the second region is positioned in the fourth sub-region.

4. A method according to claim 3, wherein, in the case where the memory size of the first process application is greater than the second threshold, and the remaining memory size in the fourth sub-area is smaller than the memory size of the first process application, and the remaining memory size in the third sub-area is greater than or equal to the memory size of the first process application, the memory interval allocated for the first process is located in the third sub-area; or alternatively, the process may be performed,

and when the memory size of the first process application is larger than the second threshold, and the remaining memory size in the fourth sub-area is smaller than the memory size of the first process application, and the remaining memory size in the third sub-area is smaller than the memory size of the first process application, the memory interval allocated for the first process is located in the first area.

5. The method of claim 4, wherein the memory interval allocated for the first process is located in a second one of the first process application, if the memory size of the first process application is greater than the second threshold, and the remaining memory size in the fourth sub-region is less than the memory size of the first process application, and the remaining memory size in the third sub-region is less than the memory size of the first process application, and the remaining memory size in the second sub-region is greater than or equal to the memory size of the first process application; or alternatively, the process may be performed,

and when the memory size of the first process application is larger than the second threshold, and the remaining memory size in the fourth sub-area is smaller than the memory size of the first process application, and the remaining memory size in the third sub-area is smaller than the memory size of the first process application, and the remaining memory size in the second sub-area is smaller than the memory size of the first process application, the memory interval allocated for the first process is located in the first sub-area in the first area.

6. The method according to claim 1, wherein the method further comprises:

after the memory interval is divided for the first process from the first area or the second area, the termination address of the memory interval is recorded.

7. The method of any of claims 1 to 6, wherein the termination address and the start address are partitioned by physical address.

8. An electronic device, comprising: one or more processors; one or more memories; the memory stores one or more programs that, when executed by the processor, cause the electronic device to perform the method of any of claims 1-7.

9. A computer readable storage medium having instructions stored therein which, when run on a computer, cause the computer to perform the method of any of claims 1 to 7.