CN116718830A

CN116718830A - Zero crossing signal detection circuit

Info

Publication number: CN116718830A
Application number: CN202310947562.6A
Authority: CN
Inventors: 张腾翔; 南洋; 李亘; 张晓娜
Original assignee: Core Semiconductor Technology Beijing Co ltd
Current assignee: Core Semiconductor Technology Beijing Co ltd
Priority date: 2023-07-31
Filing date: 2023-07-31
Publication date: 2023-09-08

Abstract

The embodiment of the invention discloses a zero-crossing signal detection circuit. The voltage dividing circuit of the zero-crossing signal detection circuit is provided with a first resistor and a second resistor, the first resistor is connected with one end of a signal source, the second resistor is connected with the other end of the signal source, an alternating current signal provided by the signal source is divided to obtain an input signal, then zero-crossing detection is carried out by the detection circuit when the voltage of the input signal is switched from a positive half cycle to a negative half cycle and from the negative half cycle to the positive half cycle, so as to output a corresponding zero-crossing signal, and then a corresponding output signal is generated by the output circuit according to the zero-crossing signal. Therefore, the voltage of the input signal can be detected in the zero crossing process, the voltage difference of the detection circuit can be reduced in the detection process, and the method has higher applicability.

Description

Zero crossing signal detection circuit

Technical Field

The invention relates to the technical field of power electronics, in particular to a zero crossing signal detection circuit.

Background

Zero crossing signal detection refers to the detection of the moment of zero potential of an alternating current waveform as it transitions from a negative half cycle to a positive half cycle, or from a positive half cycle to a negative half cycle. For example, in the power line broadband carrier communication, whether the neutral and live wires are properly connected, phase line identification, station area identification, and the like can be determined by performing zero-crossing detection.

In the prior art, two zero-crossing detection circuits are generally independently arranged to perform zero-crossing signal detection. For example, zero crossing detection (i.e., rising edge zero crossing) is performed by one zero crossing detection circuit when the ac waveform transitions from a negative half cycle to a positive half cycle, and zero crossing detection (i.e., falling edge zero crossing) is performed by another zero crossing detection circuit when the ac waveform transitions from a positive half cycle to a negative half cycle.

In the prior art, when in zero crossing detection, two independently arranged zero crossing detection circuits have larger voltage difference, so that strong electric isolation is needed, and the limitation is larger.

Disclosure of Invention

Therefore, the embodiment of the invention provides the zero-crossing signal detection circuit, which can detect the voltage of the input signal at the zero crossing point, reduce the voltage difference of the detection circuit in the detection process and has higher applicability.

In a first aspect, an embodiment of the present invention provides a zero-crossing signal detection circuit, including:

the voltage dividing circuit comprises a first resistor and a second resistor, wherein the first resistor is connected with one end of a signal source, the second resistor is connected with the other end of the signal source, and the voltage dividing circuit is configured to divide an alternating current electric signal transmitted by the signal source so as to obtain an input signal;

The detection circuit is connected with the voltage dividing circuit and is configured to output a corresponding zero crossing signal when the voltage of the input signal crosses zero;

and the output circuit is connected with the detection circuit and is configured to generate a corresponding output signal according to the zero crossing signal.

In some embodiments, the detection circuit comprises:

a first detection sub-circuit configured to perform zero-crossing detection when a voltage of the input signal is switched from a positive half-cycle to a negative half-cycle to output a first zero-crossing signal;

a second detection sub-circuit configured to perform zero-crossing detection when the voltage of the input signal is switched from a negative half-cycle to a positive half-cycle to output a second zero-crossing signal;

the first detection sub-circuit and the second detection sub-circuit have the same circuit structure, the circuit structure comprises a first input end, a second input end, a first output end and a second output end, the first input end of the first detection sub-circuit is connected with the first resistor, the second input end of the first detection sub-circuit is connected with the second resistor, the first input end of the second detection sub-circuit is connected with the second resistor, the second input end of the second detection sub-circuit is connected with the first resistor, and the first output end and the second output end of the first detection sub-circuit and the second detection sub-circuit are connected with the output circuit.

In some embodiments, the output circuit comprises:

a first DC power supply;

a first optocoupler connected between the first dc power supply and the first detection subcircuit, configured to be turned on according to the first zero crossing signal, such that the first dc power supply provides a first output signal;

a second DC power supply;

and a second photo coupler connected between the second direct current power supply and the second detection subcircuit and configured to be conducted according to the second zero crossing signal, so that the second direct current power supply provides a second output signal.

In some embodiments, the output circuit comprises:

a third DC power supply;

and the third photoelectric coupler is connected with the first detection subcircuit, the second detection subcircuit and the third direct-current power supply and is configured to be conducted according to the first zero crossing signal or the second zero crossing signal, so that the third direct-current power supply provides a third output signal.

In some embodiments, the circuit structure further comprises:

the anode of the first diode is connected with the first input end, and the cathode of the first diode is connected with the first output end;

one end of the third resistor is connected with the second input end, and the other end of the third resistor is connected to the second output end through the first triode;

The first triode, the base level is connected with the third resistor, the collector is connected with the second output end, and the emitter is connected to the second input end through the second diode;

the anode of the second diode is connected with the emitter of the first triode, and the cathode of the second diode is connected with the second input end;

a fourth resistor having one end connected to a node between the cathode of the first diode and the first output terminal and the other end connected to a node between the second input terminal and the third resistor;

a first capacitor having one end connected to a node between the cathode of the first diode and the first output terminal and the other end connected to a node between the second diode and the emitter of the first triode;

when the voltage of the input signal is in a positive half period, a first diode and a second diode in the first detection subcircuit are conducted, a first triode in the first detection subcircuit is turned off to charge a first capacitor in the first detection subcircuit, when the voltage of the input signal is switched from the positive half period to the negative half period, the first diode and the second diode in the first detection subcircuit are turned off, the first triode in the first detection subcircuit is conducted, so that the first capacitor in the first detection subcircuit discharges to output the first zero crossing signal, when the voltage of the input signal is in the negative half period, the first diode and the second diode in the second detection subcircuit are conducted, and the first triode in the second detection subcircuit is turned off to charge the first capacitor in the second detection subcircuit, when the voltage of the input signal is switched from the negative half period to the positive half period, the first diode and the second diode in the second detection subcircuit is turned on, and the second triode in the second detection subcircuit is turned off, and the first triode in the second detection subcircuit discharges.

In some embodiments, the circuit structure further comprises:

a second capacitor, one end of which is connected to a node between the cathode of the first diode and the first output terminal, and the other end of which is connected to the second input terminal, the cathode of the second diode and the third resistor, and the second capacitor and the fourth resistor are connected in parallel;

a third capacitor having one end connected to a node between the third resistor and the base of the first transistor and the other end connected to a node between the anode of the second diode and the emitter of the first transistor;

wherein the second and third capacitors are configured to filter an interference signal generated when a voltage of the input signal crosses a zero point.

In some embodiments, the circuit structure further comprises:

a third diode having one end connected to a node between the cathode of the first diode and the first output terminal and the other end connected to the first capacitor, the first capacitor and the third diode being connected in parallel;

the third diode is configured to perform voltage stabilization processing on the charging voltage of the first capacitor when the first capacitor is charged.

In some embodiments, the circuit structure further comprises:

one end of the fifth resistor is connected with the second input end, and the other end of the fifth resistor is connected with the second output end through a second triode;

the base stage of the second triode is connected with the fifth resistor, and the collector electrode of the second triode is connected with the second output end;

the third triode has an emitter connected with the first input end, a collector connected with the first output end and a base connected with a sixth resistor;

one end of the sixth resistor is connected with the base level of the third triode, and the other end of the sixth resistor is connected with the fourth diode;

a fourth diode having a cathode connected to the sixth resistor and an anode connected to a node between the second input terminal and the fifth resistor, the sixth resistor and the fourth diode being connected in series;

one end of the fourth capacitor is connected to a node between the collector electrode of the third triode and the first output end, and the other end of the fourth capacitor is connected with the fifth diode;

a fifth diode, the anode of which is connected with the fourth capacitor, the cathode of which is connected with the node between the second input end and the fifth resistor, and the emitter of which is connected with the node between the fourth capacitor and the anode of the fifth diode;

When the voltage of the input signal is switched from a positive half cycle to a negative half cycle, the second triode in the first detection subcircuit is turned on, the fifth diode and the third triode are turned off, when the voltage of the input signal is switched from the positive half cycle to the negative half cycle, the fourth capacitor in the first detection subcircuit is discharged to output the first zero crossing signal, when the voltage of the input signal is in the negative half cycle, the second triode in the second detection subcircuit is turned off, the fifth diode and the third triode are turned on to charge the fourth capacitor in the second detection subcircuit, and when the voltage of the input signal is switched from the negative half cycle to the positive half cycle, the second triode in the second detection subcircuit is turned on, the fifth diode and the third triode are turned off, so that the fourth capacitor in the second detection subcircuit is discharged to output the second zero crossing signal.

In some embodiments, the fourth capacitor in the first detection sub-circuit and the fourth capacitor in the second detection sub-circuit have different capacitance values, so that the duration of conduction of the third photo-coupler according to the first zero crossing signal or the second zero crossing signal is different, and further, the duration of providing the third output signal by the third direct current power supply is different.

In some embodiments, the circuit structure further comprises:

a sixth diode, the cathode of which is connected to the node between the collector of the third triode and the first output terminal, the anode of which is connected to the fourth capacitor, the anode of the fifth diode and the emitter of the second triode, the sixth diode being connected in parallel with the fourth capacitor and configured to perform voltage stabilizing processing on the charging voltage of the fourth capacitor when the fourth capacitor is charged;

and a fifth capacitor, one end of which is connected to a node between the fifth resistor and the base of the second triode, and the other end of which is connected to the emitter of the second triode, the fifth capacitor being connected in parallel with the fifth diode and configured to filter an interference signal generated when the voltage of the input signal crosses the zero point.

According to the embodiment of the invention, the first resistor and the second resistor are arranged in the voltage dividing circuit of the zero-crossing signal detection circuit, the first resistor is connected with one end of the signal source, the second resistor is connected with the other end of the signal source, the alternating current signal provided by the signal source is subjected to voltage dividing processing to obtain an input signal, then zero-crossing detection is carried out by the detection circuit when the voltage of the input signal is switched from a positive half cycle to a negative half cycle and from the negative half cycle to the positive half cycle, so that a corresponding zero-crossing signal is output, and a corresponding output signal is generated by the output circuit according to the zero-crossing signal. Thus, the voltage of the input signal can be detected at the zero crossing point, and the voltage difference of the detection circuit can be reduced in the detection process.

Drawings

The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the present invention with reference to the accompanying drawings, in which:

fig. 1 is a circuit diagram of a zero crossing signal detection circuit of an embodiment of the present invention;

fig. 2 is an equivalent circuit diagram of a zero-crossing signal detection circuit of an embodiment of the present invention;

FIG. 3 is an equivalent circuit diagram of a zero crossing signal detection circuit in an embodiment of the invention;

FIG. 4 is an equivalent circuit diagram of a zero crossing signal detection circuit in an embodiment of the invention;

FIG. 5 is an equivalent circuit diagram of a zero crossing signal detection circuit in an embodiment of the invention;

FIG. 6 is a schematic diagram of a first output signal according to an embodiment of the invention;

FIG. 7 is a schematic diagram of a second output signal according to an embodiment of the present invention;

FIG. 8 is a schematic diagram of an AC signal in an embodiment of the invention;

FIG. 9 is an equivalent circuit diagram of a zero crossing signal detection circuit in an embodiment of the invention;

FIG. 10 is an equivalent circuit diagram of a zero crossing signal detection circuit in an embodiment of the invention;

FIG. 11 is an equivalent circuit diagram of a zero crossing signal detection circuit in an embodiment of the invention;

FIG. 12 is a schematic diagram of a third output signal in an embodiment of the invention;

FIG. 13 is a schematic diagram of an AC signal in an embodiment of the invention;

Fig. 14 is a circuit diagram of a zero-crossing detection circuit of the comparative example;

fig. 15 is an equivalent circuit diagram of the zero-crossing signal detection circuit of the comparative example;

FIG. 16 is a fourth output signal schematic of the comparative example;

fig. 17 is a schematic diagram of an alternating current signal of the comparative example.

Detailed Description

The present invention is described below based on examples, but the present invention is not limited to only these examples. In the following detailed description of the present invention, certain specific details are set forth in detail. The present invention will be fully understood by those skilled in the art without the details described herein. Well-known methods, procedures, flows, components and circuits have not been described in detail so as not to obscure the nature of the invention.

Moreover, those of ordinary skill in the art will appreciate that the drawings are provided herein for illustrative purposes and that the drawings are not necessarily drawn to scale.

Meanwhile, it should be understood that in the following description, "circuit" refers to a conductive loop constituted by at least one element or sub-circuit through electrical connection or electromagnetic connection. When an element or circuit is referred to as being "connected to" another element or being "connected between" two nodes, it can be directly coupled or connected to the other element or intervening elements may be present and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled to" or "directly connected to" another element, it means that there are no intervening elements present between the two.

Unless the context clearly requires otherwise, throughout the application, the words "comprise," "comprising," and the like are to be construed as including, rather than being exclusive or exhaustive; that is, it is the meaning of "including but not limited to".

In the description of the present invention, it should be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Furthermore, in the description of the present invention, unless otherwise indicated, the meaning of "a plurality" is two or more.

Fig. 1 is a circuit diagram of a zero crossing signal detection circuit of an embodiment of the present invention. As shown in fig. 1, the zero-crossing signal detection circuit of the present embodiment includes a voltage division circuit 1, a detection circuit 2, and an output circuit 3. The voltage dividing circuit 1 includes a first resistor R1 and a second resistor R2 (hereinafter simply referred to as a resistor R1 and a resistor R2). The resistor R1 is connected to one end of the signal source 4, and the resistor R2 is connected to the other end of the signal source 4. The detection circuit 2 is connected to the resistor R1 and the resistor R2, and the detection circuit 2 is connected to the output circuit 3.

In this embodiment, the signal source 4 may be a node device or the like in a broadband power line carrier communication network for providing an alternating current signal (voltage of the alternating current signal, for example, 220V, frequency, for example, 50 HZ). The broadband power line carrier communication network uses a power line as a communication medium to realize convergence, transmission and interaction of power consumption information of a low-voltage power user. Power lines such as Neutral Wire (NW), live Wire (LW), and the like. Node devices in the broadband power line carrier communication network may be a proxy coordinator (Proxy Coordinator, PCO), a Station device (STA), and the like. The proxy coordinator PCO, such as a smart meter, a type I collector communication unit, a broadband carrier type II collector, etc., is generally used for communication and data forwarding between the central coordinator (Central Coordinator, CCO) and the station device STA, or between the station device STA, etc. Station equipment STA such as smart meter, type I collector communication unit, broadband carrier type II collector, etc. For example, if the zero-crossing signal detection circuit is provided in the node device and the node device is connected to the power line, the zero-crossing signal detection circuit may perform zero-crossing detection on the ac signal transmitted by the power line to obtain the output signal. Further, the output signal is transmitted to the central coordinator CCO (e.g., a local communication unit of the concentrator), so that the central coordinator CCO can determine the phase line (e.g., a phase, B phase and C phase, and a predetermined phase relationship exists between different phase voltages, and the phase is 120 degrees) of the phase line according to the time information of the zero crossing point of the ac signal represented by the output signal and the reference time of the broadband carrier network of the power line carried by the ac signal transmitted by the power line. The central coordinator CCO may also determine a zone (a power supply range or a region in the power system is represented by the zone) to which the node device belongs according to the power frequency period value of the zero crossing point of the ac signal represented by the output signal.

Alternatively, resistor R1 may be connected to the hot line and resistor R2 may be connected to the neutral line. When the alternating current signal is in a positive half period, the voltage value of the live wire is positive and is larger than the voltage of the zero wire. When the alternating current signal is in a negative half period, the voltage value of the live wire is negative and smaller than the voltage of the zero wire. Thus, the zero-crossing signal detection circuit of the present embodiment can realize zero-crossing detection when the alternating current signal is switched from the positive half cycle to the negative half cycle, or from the negative half cycle to the positive half cycle.

In this embodiment, since the two zero-crossing detection circuits independently provided in the prior art have a large voltage difference during zero-crossing detection, strong electric isolation is required, resulting in a large limitation, which has a large influence on the safety, aging, and the like of the zero-crossing detection circuits. In this case, the present embodiment obtains the input signal by providing the voltage dividing circuit 1 in the zero-crossing detection circuit, and dividing the alternating current signal supplied from the signal source 4 by the resistors R1 and R2 in the voltage dividing circuit 1, so that the voltage difference when the voltage zero-crossing of the input signal is detected by the detection circuit 2 is reduced. Therefore, the zero-crossing signal detection circuit of the embodiment can realize zero-crossing detection of alternating current signals on the premise of not carrying out strong electric isolation.

Alternatively, the resistances of the resistors R1 and R2 are the same, for example, the resistances of the resistors R1 and R2 are 510kΩ (kilohms).

Optionally, the resistors R1 and R2 are further used to limit the ac signal provided by the signal source 4, so as to reduce the power consumption of the zero crossing signal detection circuit. That is, since a voltage drop occurs when the ac electric signal supplied from the signal source 4 passes through the resistors R1 and R2, by setting the resistance values of the resistors R1 and R2, the current of the zero-crossing signal detection circuit can be controlled, thereby achieving the current limiting effect.

In the present embodiment, the detection circuit 2 outputs a corresponding zero-crossing signal to transmit to the output circuit 3 when detecting a voltage zero-crossing point of the input signal. Further, the output circuit 3 generates a corresponding output signal according to the zero-crossing signal to realize zero-crossing detection. Specifically, the detection circuit 2 includes a first detection sub-circuit and a second detection sub-circuit. The equivalent circuit diagram of the zero-crossing signal detection circuit of the present embodiment can refer to fig. 2.

Fig. 2 is an equivalent circuit diagram of a zero-crossing signal detection circuit of an embodiment of the present invention. As shown in fig. 2, the detection circuit 2 of the present embodiment includes a first detection sub-circuit 21 and a second detection sub-circuit 22. Wherein the first detection sub-circuit 21 and the second detection sub-circuit 22 have the same circuit configuration. Specifically, the first detection sub-circuit 21 includes a first input terminal 2a, a second input terminal 2b, a first output terminal 2c, and a second output terminal 2d. The second detection sub-circuit 22 comprises a first input 2e, a second input 2f, a first output 2g and a second output 2h.

In the present embodiment, for the first detection sub-circuit 21, the first input terminal 2a is connected to the resistor R1. The second input terminal 2b is connected to a resistor R2. The first output terminal 2c and the second output terminal 2d are connected to the output circuit 3.

In the present embodiment, for the second detection sub-circuit 22, the first input terminal 2e is connected to the resistor R2. The second input terminal 2f is connected to the resistor R1. The first output terminal 2g and the second output terminal 2h are connected to the output circuit 3.

In the present embodiment, the first detection sub-circuit 21 and the second detection sub-circuit 22 are both connected to the voltage dividing circuit 1, so that the voltage dividing circuit 1 can transmit an input signal to the first detection sub-circuit 21 and the second detection sub-circuit 22 at the same time. That is, the ac signal of the signal source 4 is in a positive half-cycle or a negative half-cycle, and the voltage dividing circuit 1 provides an input signal to both the first detection sub-circuit 21 and the second detection sub-circuit 22. Therefore, the first detection sub-circuit 21 and the second detection sub-circuit 22 have the same voltage during zero crossing detection, that is, the voltage difference between the first detection sub-circuit 21 and the second detection sub-circuit 22 during zero crossing detection is zero, so that the zero crossing signal detection circuit of the embodiment can realize zero crossing detection of the alternating current signal without strong electric isolation.

In this embodiment, since two zero-crossing detection circuits are independently provided to detect zero-crossing signals in the prior art, that is, one zero-crossing detection circuit in the prior art cannot detect zero-crossing points of a rising edge and a falling edge, the limitation is large. In this case, the present embodiment realizes accurate detection at zero crossing points of the rising and falling edges of the voltage of the input signal by providing the first detection sub-circuit 21 and the second detection sub-circuit 22 in the detection circuit 2. Specifically, the first detection sub-circuit 21 is configured to perform zero-crossing detection when the voltage of the input signal is switched from the positive half-cycle to the negative half-cycle, so as to obtain a first zero-crossing signal for transmission to the output circuit 3. The second detection sub-circuit 22 is configured to perform zero crossing detection when the voltage of the input signal is switched from the negative half-cycle to the positive half-cycle, so as to obtain a second zero crossing signal for transmission to the output circuit 3. The output circuit 3 may generate a corresponding output signal from the first zero crossing signal and the second zero crossing signal. Therefore, the zero crossing signal detection circuit of the embodiment can accurately detect the zero crossing point of the rising edge and the falling edge of the voltage of the input signal, and has higher universality.

In an alternative embodiment, the first detection subcircuit 21 and the second detection subcircuit 22 may be implemented with discrete devices (e.g., capacitors, resistors, diodes, transistors, etc.). For example, by providing discrete devices on a circuit board and providing the circuit board in the central coordinator CCO, zero-crossing detection of alternating current signals of a certain phase line (e.g., a phase, B phase, etc.) can be achieved. Similarly, a plurality of first detection subcircuits 21 and second detection subcircuits 22 may also be provided on the circuit board through discrete devices to enable rising edge and falling edge zero crossing signal detection of a phase a, B phase and C phase ac electrical signals. In addition, since the voltage dividing circuit 1 provides the same voltage for the input signals of the first detection sub-circuit 21 and the second detection sub-circuit 22, zero-crossing detection can be realized on the premise of no need of strong electric isolation, so that the complexity of the zero-crossing detection circuit is reduced, and the applicability is higher.

In another alternative embodiment, the first detection subcircuit 21 and the second detection subcircuit 22 may be integrated in a chip. In particular, the first detection sub-circuit 21 and the second detection sub-circuit 22 may be integrated in a chip in various ways. For example, the first detection sub-circuit 21 and the second detection sub-circuit 22 may be integrated in a chip by means of an analog circuit design. For another example, the first detection sub-circuit 21 and the second detection sub-circuit 22 may also be designed as application specific integrated circuits (Application Specific Integrated Circuit, ASIC) or the like. Therefore, the first detection sub-circuit 21 and the second detection sub-circuit 22 can be integrated in a chip, and the first detection sub-circuit 21 and the second detection sub-circuit 22 can be arranged in a scene requiring zero crossing signal detection due to the small occupied space of the chip, so that the applicability is improved. That is, the present embodiment is described taking a case where the zero-crossing signal detection circuit is applied to a broadband power line carrier communication network as an example, but the zero-crossing signal detection circuit of the present embodiment may also be applied to a case where zero-crossing signal detection is required, for example, a zero-crossing detection case of audio processing, a zero-crossing detection case of mechanical vibration, and the like. Specifically, for the zero-crossing detection scenario of audio processing, zero-crossing signal detection may be used for audio feature extraction or the like (e.g., voice activity detection (Voice Activity Detection, VAD) or the like), for example, by detecting the zero-crossing probability of an audio signal for a certain period of time, comparing the zero-crossing probability with a probability threshold, thereby determining whether audio activity (sound) or silence is present. For the zero-crossing detection scenario of mechanical vibration, the zero-crossing signal detection can be used for fault determination, maintenance and the like of the mechanical equipment, that is, since the mechanical equipment generally comprises rotating devices, transmission devices, gears, bearings and other components, and the components generate vibration signals when in operation, the vibration signals represent that the components are in a normal working state or a fault state, and therefore, whether the mechanical equipment is faulty or not can be determined by carrying out zero-crossing detection on the vibration signals.

Alternatively, the output circuit 3 may include a plurality of photocouplers and a plurality of direct current power sources. Specifically, an equivalent circuit diagram of the zero-crossing signal detection circuit may refer to fig. 3.

Fig. 3 is an equivalent circuit diagram of a zero-crossing signal detection circuit in an embodiment of the invention. As shown in fig. 3, the output circuit 3 includes a first output sub-circuit 31 and a second output sub-circuit 32. At this time, the first detection sub-circuit 21 further includes a first diode D11, a second diode D21, a third diode D31, a first capacitor C11, a second capacitor C21, a third capacitor C31, a third resistor R31, a fourth resistor R41, and a first transistor Q11 (hereinafter, simply referred to as a diode D11, a diode D21, a diode D31, a capacitor C11, a capacitor C21, a capacitor C31, a resistor R41, and a transistor Q11).

In the present embodiment, the second detection sub-circuit 22 has the same circuit configuration as the first detection sub-circuit 21. Specifically, the second detection sub-circuit 22 includes a first diode D12, a second diode D22, a third diode D32, a first capacitor C12, a second capacitor C22, a third capacitor C32, a third resistor R32, a fourth resistor R42, and a first triode Q12 (hereinafter, simply referred to as a diode D12, a diode D22, a diode D32, a capacitor C12, a capacitor C22, a capacitor C32, a resistor R42, and a triode Q12).

In the present embodiment, the first output sub-circuit 31 includes a first photo-coupler U1, a first direct current power supply VCC1, a sixth capacitance C6, a seventh capacitance C7, and a seventh resistance R7. The first photo-coupler U1 includes a seventh diode D7 and a fourth triode Q4 (hereinafter, simply referred to as photo-coupler U1, dc power supply VCC1, capacitor C6, capacitor C7, resistor R7, diode D7 and triode Q4). Wherein the photo coupler U1 is connected between the direct current power supply VCC1 and the first detection sub-circuit 21.

In the present embodiment, the second output sub-circuit 32 and the first output sub-circuit 31 have the same circuit configuration. Specifically, the second output sub-circuit 32 includes a second photo-coupler U2, a second dc power supply VCC2, an eighth capacitor C8, a ninth capacitor C9, and an eighth resistor R8. The second photo-coupler U2 includes an eighth diode D8 and a fifth triode Q5 (hereinafter, simply referred to as photo-coupler U2, dc power supply VCC2, capacitor C8, capacitor C9, resistor R8, diode D8 and triode Q5). Wherein the photo coupler U2 is connected between the dc power supply VCC2 and the second detection sub-circuit 22. In the following description, the connection manner of the first detection sub-circuit 21 is exemplified.

In the present embodiment, the anode of the diode D11 is connected to the first input terminal 2a, and the cathode is connected to the first output terminal 2 c.

One end of the resistor R31 is connected to the second input terminal 2b, and the other end is connected to the second output terminal 2d through the transistor Q11.

The base of transistor Q11 is connected to resistor R31, the collector is connected to second output terminal 2D, and the emitter is connected to second input terminal 2b via diode D21.

The diode D21 has an anode connected to the emitter of the transistor Q11, and a cathode connected to the second input terminal 2b, the capacitor C21, the resistor R41, and the resistor R31.

The resistor R41 has one end connected to a node between the cathode of the diode D11 and the first output terminal 2c, and the other end connected to a node between the second input terminal 2b and the resistor R31.

The capacitor C11 has one end connected to a node between the cathode of the diode D11 and the first output terminal 2C and the other end connected to a node between the anode of the diode D21 and the emitter of the transistor Q11.

One end of the capacitor C21 is connected to a node between the cathode of the diode D11 and the first output terminal 2C, and the other end is connected to the second input terminal 2b, the cathode of the diode D21, and the resistor R31. The capacitor C21 and the resistor R41 are connected in parallel.

The capacitor C31 has one end connected to a node between the resistor R31 and the base of the transistor Q11 and the other end connected to a node between the anode of the diode D21 and the emitter of the transistor Q11.

Diode D31 has one end connected to the node between the cathode of diode D11 and first output terminal 2C and the other end connected to capacitor C11. The capacitor C11 is connected in parallel with the diode D31.

The anode of the diode D7 of the photo coupler U1 is connected to the first output terminal 2c, and the cathode is connected to the second output terminal 2D.

In the photocoupler U1, the collector of the triode Q4 is connected to the capacitor C6 and the dc power supply VCC1, and the emitter is connected to the capacitor C7 and the resistor R7.

One end of the capacitor C6 is connected to a node between the collector of the transistor Q4 and the dc power supply VCC1, and the other end is grounded.

One end of the resistor R7 is connected with the emitter of the triode Q4, and the other end of the resistor R is grounded.

One end of the capacitor C7 is connected with the emitter of the triode Q4, and the other end of the capacitor C is grounded. The capacitor C7 is connected in parallel with the resistor R7.

The anode of the diode D8 in the photo coupler U2 is connected to the first output terminal 2g, and the cathode is connected to the second output terminal 2 h.

In the photocoupler U2, the collector of the triode Q5 is connected with the capacitor C8 and the dc power supply VCC2, and the emitter is connected with the capacitor C9 and the resistor R8.

One end of the capacitor C8 is connected to a node between the collector of the transistor Q5 and the dc power supply VCC2, and the other end is grounded.

One end of the resistor R8 is connected with the emitter of the triode Q5, and the other end of the resistor R is grounded.

One end of the capacitor C9 is connected with the emitter of the triode Q5, and the other end of the capacitor C is grounded. The capacitor C9 is connected in parallel with the resistor R8.

In this embodiment, transistors Q11 and Q12 are NPN transistors. For the NPN type triode, when the voltage value of the base level is larger than that of the emitter, the emitter junction of the NPN type triode is positively biased. When the voltage value of the base stage is smaller than that of the emitter, the emitter junction of the NPN triode is reversely biased. When the voltage value of the base level is larger than that of the collector, the collector junction of the NPN triode is positively biased. When the voltage value of the base stage is smaller than that of the collector, the collector junction of the NPN triode is reversely biased. Further, in the case that the emitter junction is reversely biased and the collector junction is reversely biased, or the emitter junction is reversely biased and the collector junction is positively biased, the NPN transistor is turned off. And under the condition that the emission junction is forward biased and the current collection junction is forward biased or the emission junction is forward biased and the current collection junction is reverse biased, the NPN triode is conducted. That is, the NPN transistor turns on when the emitter junction is forward biased and turns off when the emitter junction is reverse biased.

In an alternative embodiment, the dc power sources VCC1 and VCC2 may be provided in a zero-crossing signal detection circuit, which may be implemented by a battery or the like.

In another alternative embodiment, the dc power sources VCC1 and VCC2 may be provided outside the zero-crossing signal detection circuit. That is, the dc power sources VCC1 and VCC2 may be external batteries, or an external circuit or the like that can provide a desired dc voltage.

In this embodiment, the diodes D7 and D8 are photodiodes, the triodes Q4 and Q5 are phototransistors, the diode D7 is coupled to the triode Q4, and the diode D8 is coupled to the triode Q5. Wherein when the photodiode is turned on, light of a certain wavelength can be output. Correspondingly, since the emitters of the triodes Q4 and Q5 are grounded through a resistor, the emitter voltage is zero. When the triodes Q4 and Q5 detect the light of the photodiode, the voltage of the base level is enabled to be larger than that of the emitter, and then the emitter junction is enabled to be forward biased, and at the moment, the triodes Q4 and Q5 are conducted. Further, with transistors Q4 and Q5 on, dc power supply VCC1 provides a first output signal through transistor Q4 and dc power supply VCC2 provides a second output signal through transistor Q5. Thus, by controlling the on or off of the diodes D7 and D8, detection at the zero crossing point of the input signal can be achieved. Specifically, when the ac signal provided by the signal source 4 is in a positive half cycle, that is, the input signal provided by the voltage dividing circuit 1 is in a positive half cycle, the equivalent circuit diagram of the zero crossing signal detection circuit of the present embodiment may refer to fig. 4.

Fig. 4 is an equivalent circuit diagram of a zero-crossing signal detection circuit in an embodiment of the invention. As shown in fig. 4, when the ac signal provided by the signal source 4 is in the positive half cycle, the resistor R1 is connected to the positive pole of the signal source 4. Resistor R2 is connected to the negative electrode of signal source 4.

In the present embodiment, with the first detection sub-circuit 21, when the input signal supplied from the voltage dividing circuit 1 is in the positive half cycle, the diode D11 and the diode D21 are turned on, the transistor Q11 is turned off, so that the resistors R1 and R2 are connected to the capacitor C11 through the diodes D11 and D21, and the capacitor C11 is charged. Specifically, the anode of the diode D11 is connected to the anode of the signal source 4 through the first input terminal 2a and the resistor R1, and thus the diode D11 is turned on, so that the anode of the signal source 4 is connected to the capacitor C11 through the diode D11. Correspondingly, the cathode of the diode D21 is connected to the cathode of the signal source 4 via the second input terminal 2b and the resistor R2, so that the diode D21 is turned on, so that the cathode of the signal source 4 is connected to the capacitor C11 via the diode D21. Correspondingly, the base of the triode Q11 is connected to the negative electrode of the signal source 4 through the resistor R31, the second input end 2b and the resistor R2, and the emitter is connected to the negative electrode of the signal source 4 through the diode D21, the second input end 2b and the resistor R2, and at the moment, the voltage value of the base of the triode Q11 is smaller than that of the emitter, so that the emitter junction of the triode Q11 is reversely biased, and therefore the triode Q11 is cut off. Thereby, the capacitor C12 can be charged.

In the present embodiment, the diode D31 is used to perform voltage stabilization processing on the charging voltage of the capacitor C11 when the capacitor C11 is charged.

Alternatively, the Diode D31 may be a Zener Diode (ZD). The zener diode may exhibit stable voltage characteristics when operated at a specific reverse voltage, that is, if the reverse voltage reaches the zener voltage of the zener diode, the zener diode is turned on to stabilize the voltage at the zener voltage value. Therefore, the cathode of the diode D31 is connected to the positive electrode of the signal source 4 through the diode D11, the first input terminal 2a and the resistor R1, and the anode of the diode D31 is connected to the negative electrode of the signal source 4 through the diode D21, the second input terminal 2b and the resistor R2, so that the diode D31 can perform voltage stabilizing processing on the charging voltage of the capacitor C11. For example, the zener voltage is 6V, and when the charging voltage of the capacitor C11 exceeds 6V, the diode D31 is turned on, so that the charging voltage of the capacitor C11 is stabilized at 6V. Thus, circuit protection can be realized, and the power consumption of the zero-crossing signal detection circuit can be reduced.

In the present embodiment, for the second detection sub-circuit 22, the diode D12 and the diode D22 are turned off. Specifically, the anode of the diode D12 is connected to the negative electrode of the signal source 4 via the first input terminal 2e and the resistor R2, and thus the diode D12 is turned off. Correspondingly, the cathode of the diode D22 is connected to the positive pole of the signal source 4 via the second input terminal 2f and the resistor R1, so that the diode D22 is turned off.

Further, when the ac electrical signal supplied from the signal source 4 is switched from the positive half cycle to the negative half cycle, that is, the input signal supplied from the voltage dividing circuit 1 is switched from the positive half cycle to the negative half cycle, the equivalent circuit diagram of the zero crossing signal detecting circuit of the present embodiment may refer to fig. 5.

Fig. 5 is an equivalent circuit diagram of a zero-crossing signal detection circuit in an embodiment of the invention. As shown in fig. 5, when the ac electrical signal supplied from the signal source 4 is switched from the positive half cycle to the negative half cycle, the resistor R1 is connected to the negative electrode of the signal source 4. Resistor R2 is connected to the positive electrode of signal source 4.

In the present embodiment, with the first detection sub-circuit 21, when the input signal supplied from the voltage dividing circuit 1 is switched from the positive half cycle to the negative half cycle, the diode D11 and the diode D21 are turned off, the transistor Q11 is turned on, so that the capacitor C11 is discharged through the connection of the transistor Q11 and the diode D7 in the photo coupler U1 to output the first zero crossing signal. Specifically, the anode of the diode D11 is connected to the negative electrode of the signal source 4 via the first input terminal 2a and the resistor R1, and thus the diode D11 is turned off. Correspondingly, the cathode of the diode D21 is connected to the positive pole of the signal source 4 via the second input terminal 2b and the resistor R2, so that the diode D21 is turned off.

Further, since the diodes D11 and D21 are turned off, the capacitor C11 starts to discharge, and at this time, the capacitor C11 may be equivalent to a dc power supply. Specifically, in the process of charging the capacitor C11, the electrode plate connected to the positive electrode of the signal source 4 and the capacitor C11 may be equivalent to the positive electrode of the dc power supply during discharging. Correspondingly, the electrode plate of the capacitor C11 connected to the negative electrode of the signal source 4 may be equivalent to the negative electrode of the dc power supply during discharge. More specifically, during the charging process of the capacitor C11, the potential of the electrode plate connected to the positive electrode of the signal source 4 by the capacitor C11 gradually increases, that is, the potential of the electrode plate connected to the positive electrode of the signal source 4 by the capacitor C11 is higher than the potential of the electrode plate connected to the negative electrode of the signal source 4 by the capacitor C11, so that when the capacitor C11 discharges, the electrode plate with higher potential is positive, and the electrode plate with lower potential is negative.

Further, when the capacitor C11 discharges, the base of the triode Q11 is connected to the positive electrode of the signal source 4 through the resistor R31, the second input end 2b and the resistor R2, the emitter of the triode Q11 is connected to the negative electrode of the equivalent dc power supply of the capacitor C11, and at this time, the voltage value of the base of the triode Q11 is greater than the voltage value of the emitter, so that the emitter junction of the triode Q11 is forward biased, and therefore the triode Q11 is turned on.

In this embodiment, the anode of the diode D7 in the photo coupler U1 is connected to the anode of the equivalent dc power supply of the capacitor C11 during discharging of the capacitor C11. That is, the capacitor C11 provides a forward bias voltage (i.e., a first zero crossing signal) to the anode of the diode D7 when discharging. Meanwhile, the cathode of the diode D7 is connected to the cathode of the equivalent dc power supply of the capacitor C11 through the triode Q11, so that the diode D7 is turned on, so that the triode Q4 in the photo coupler U1 is turned on, and the dc power supply VCC1 provides the first output signal through the triode Q4. Further, after the capacitor C11 is discharged, the photo coupler U1 is switched from on to off, so that the dc power VCC1 stops providing the first output signal. Thereby, a falling edge, i.e. detection of a zero crossing when the voltage of the input signal is switched from a positive half-cycle to a negative half-cycle, can be achieved.

In the present embodiment, during discharging of the capacitor C11, the resistor R41 is used to keep the diode D21 in the off state, and further keep the diode D11 in the off state. Specifically, the positive electrode of the equivalent dc power supply of the capacitor C11 is connected to the cathode of the diode D21 through the resistor R41, and the negative electrode of the equivalent dc power supply of the capacitor C11 is connected to the anode of the diode D21. That is, the capacitor C11 forms a loop with the resistor R41 and the diode D21, so that the diode D21 maintains the off state, and further the diode D11 maintains the off state. Therefore, leakage of the first zero crossing signal (namely forward bias voltage) and the like provided during discharging of the capacitor C11 to other circuits (such as a power line and the like) can be avoided, so that safety of a zero crossing signal detection circuit is improved, and accurate detection of the zero crossing signal can be realized.

In this embodiment, with continued reference to fig. 5, for the second detection sub-circuit 22, after the input signal provided by the voltage dividing circuit 1 is switched from the positive half-cycle to the negative half-cycle, that is, the input signal is in the negative half-cycle, the diodes D12 and D22 are turned on, the transistor Q12 is turned off, so that the resistors R1 and R2 are respectively connected to the capacitor C12 through the diodes D12 and D22, and the capacitor C12 is charged. Specifically, similar to the charging process of the capacitor C11, the anode of the diode D12 is connected to the anode of the signal source 4 through the first input terminal 2e and the resistor R2, and thus the diode D12 is turned on, so that the anode of the signal source 4 is connected to the capacitor C12 through the diode D12. Correspondingly, the cathode of the diode D22 is connected to the cathode of the signal source 4 via the second input terminal 2f and the resistor R1, so that the diode D22 is turned on, so that the cathode of the signal source 4 is connected to the capacitor C12 via the diode D22. Correspondingly, the base of the triode Q12 is connected to the negative electrode of the signal source 4 through the resistor R32, the second input end 2f and the resistor R1, the emitter is connected to the negative electrode of the signal source 4 through the diode D22, the second input end 2f and the resistor R1, and at the moment, the voltage value of the base of the triode Q12 is smaller than that of the emitter, so that the emitter junction of the triode Q12 is reversely biased, and therefore the triode Q12 is cut off. Thereby, the capacitor C12 can be charged.

In this embodiment, the diode D32 is used to stabilize the charging voltage of the capacitor C12 when the capacitor C12 is charged.

Alternatively, the diode D32 may be a zener voltage-resistant diode.

Further, reference may be continued to fig. 4 when the ac electrical signal provided by the signal source 4 is switched from a negative half-cycle to a positive half-cycle, i.e. the input signal provided by the voltage divider circuit 1 is switched from a negative half-cycle to a positive half-cycle. At this time, for the second detection sub-circuit 22, the diodes D12 and D22 are turned off, the transistor Q12 is turned on, so that the capacitor C12 is discharged through the connection of the transistor Q12 with the diode D8 in the photo coupler U2 to output the second zero crossing signal. Similar to the discharging process of the capacitor C11, since the diodes D12 and D22 are turned off, the capacitor C12 starts to discharge, and the capacitor C12 can be equivalently a dc power supply. Specifically, in the process of charging the capacitor C12, the electrode plate connected to the positive electrode of the signal source 4 by the capacitor C12 may be equivalent to the positive electrode of the dc power supply during discharging. Correspondingly, the electrode plate of the capacitor C12 connected to the negative electrode of the signal source 4 may be equivalent to the negative electrode of the dc power supply during discharge.

Further, when the capacitor C12 discharges, the base of the triode Q12 is connected to the positive electrode of the signal source 4 through the resistor R32, the second input end 2f and the resistor R1, the emitter of the triode Q12 is connected to the negative electrode of the equivalent dc power supply of the capacitor C12, and at this time, the voltage value of the base of the triode Q12 is greater than the voltage value of the emitter, so that the emitter junction of the triode Q12 is forward biased, and therefore the triode Q12 is turned on.

In this embodiment, the anode of the diode D8 in the photo coupler U2 is connected to the anode of the equivalent dc power supply of the capacitor C12 when the capacitor C12 is discharged, that is, the capacitor C12 provides the positive bias voltage (i.e., the second zero crossing signal) to the anode of the diode D8 when the capacitor C12 is discharged. Meanwhile, the cathode of the diode D8 is connected to the cathode of the equivalent dc power supply of the capacitor C12 through the triode Q12, so that the diode D8 is turned on, so that the triode Q5 in the photo coupler U2 is turned on, and the dc power supply VCC2 provides a second output signal through the triode Q5. Further, after the capacitor C12 is discharged, the photo coupler U2 is switched from on to off, so that the dc power VCC2 stops providing the second output signal. Thereby, a rising edge, i.e. detection of a zero crossing when the voltage of the input signal switches from a negative half-cycle to a positive half-cycle, can be achieved.

In the present embodiment, during the discharging process of the capacitor C12, the resistor R42 is used to keep the diode D22 in the off state, and further keep the diode D12 in the off state. The specific embodiment is similar to the resistor R41, and the present invention will not be described herein.

In the present embodiment, since the frequency of the alternating current signal is high, the switching frequency of the positive half period and the negative half period of the input signal supplied from the voltage dividing circuit 1 is high, which results in that the zero-crossing signal detecting circuit may generate an instantaneous disturbance signal at the time of the voltage zero-crossing point of the input signal. That is, since the frequency of the input signal is high, the switching frequency of the on and off of the diodes D11, D21, D12, and D22 and the transistors Q11 and Q12 is high, and at the same time, the switching frequency of the charge and discharge of the capacitors C11 and C12 is high, resulting in the possibility of generating an instantaneous disturbance signal. For this case, the present embodiment implements filtering of the interference signal by providing the capacitances C21 and C31 in the first detection sub-circuit 21 and the capacitances C22 and C32 in the second detection sub-circuit 22. Similarly, in the output circuit 3, since the switching frequency of on and off of the photocouplers U1 and U2 is high, an instantaneous disturbance signal may be generated. For this case, the present embodiment implements filtering of the interference signal by providing capacitances C6, C7, C8, and C9 in the output circuit 3.

In this embodiment, the first output signal and the second output signal provided by the dc power sources VCC1 and VCC2 in the output circuit 3 may be collected by the signal collecting circuit, so as to implement zero-crossing detection of the input signal. That is, the first output signal corresponds to a falling edge zero crossing and the second output signal corresponds to a rising edge zero crossing. The signal acquisition circuit can be realized by a DSP (Digital Signal Processor, a signal processor), an ASIC (Application Specific Integrated Circuit, an application specific integrated circuit), a singlechip and the like. Meanwhile, since the frequency of the input signal is high, the first output signal and the second output signal may be periodic pulse signals.

In an alternative embodiment, the capacitance values of the capacitors C11 and C12 may be the same, so that the capacitors C11 and C12 have the same discharge duration, and thus the photo-couplers U1 and U2 have the same on duration, and thus the first output signal and the second output signal provided by the dc power sources VCC1 and VCC2 have the same duration. Therefore, the collected first output signal and second output signal are convenient to analyze subsequently, and phase line identification, station area identification and the like are conducted.

In another alternative embodiment, the capacitance values of the capacitors C11 and C12 may be different, so that the capacitors C11 and C12 have different discharge durations, and thus the photo-couplers U1 and U2 have different on durations, and further the first output signal and the second output signal provided by the dc power sources VCC1 and VCC2 have different durations. Therefore, the corresponding zero crossing point can be directly determined according to the duration of the acquired first output signal and second output signal, wherein the zero crossing point is the zero crossing point when the voltage of the input signal is switched from a positive half cycle to a negative half cycle or the zero crossing point when the voltage of the input signal is switched from a negative half cycle to a positive half cycle. In the following description, the capacitance values of the capacitances C11 and C12 are the same, for example.

For example, the ac signal voltage provided by the signal source 4 is 220V, the frequency is 50HZ, and the waveform is a sine wave. The resistances of the resistors R1 and R2 are 510kΩ (kilo ohm). Diodes D11, D21, D12 and D22 are model 1N4148. The capacitances C21, C31, C22, C32, C7 and C9 have capacitance values of 1nF (nanofarad). The capacitance of the capacitors C6, C8 was 100nF. The capacitance value of the capacitors C11 and C12 is 220nF. The resistances of the resistors R31, R41, R32, R42, R7, and R8 are 470kΩ. Diodes D31 and D32 are model BZX84C6V2L. Transistors Q11 and Q12 are model number 2N2222. The photo-couplers U1 and U2 are of the type PC817A. The dc voltage supplied by the dc power sources VCC1 and VCC2 is 3.3V.

In the present embodiment, the ac electric signal supplied from the signal source 4 is collected by the signal collection circuit, and the first output signal and the second output signal supplied from the dc power supplies VCC1 and VCC2 are collected. Schematic diagrams of the first output signal, the second output signal and the alternating current signal may be referred to fig. 6, fig. 7 and fig. 8, respectively.

Fig. 6, fig. 7 and fig. 8 are schematic diagrams of the first output signal, the second output signal and the ac signal, respectively, according to an embodiment of the present invention. Reference is first made to fig. 4, 6, 7 and 8. In the 0-10ms (millisecond) period, the waveform of the alternating current signal is in the positive half cycle and its voltage value is positive. At this time, for the first detection sub-circuit 21, the diodes D11 and D21 are turned on, the transistor Q11 is turned off, so that the resistors R1 and R2 are connected to the capacitor C11 through the diodes D11 and D21, and the capacitor C11 is charged. At this time, for the second detection subcircuit 22, the diode D12, the diode D22, and the transistor Q12 are turned off. So that the first output signal and the second output signal are not detected within a period of 0-10 ms.

Further, reference may be made to fig. 5-8. At 10ms, the voltage of the alternating current signal is switched from positive half-cycles to negative half-cycles, and the voltage thereof is switched from positive to negative. At this time, for the first detection sub-circuit 21, the diodes D11 and D21 are turned off, the transistor Q11 is turned on, so that the capacitor C11 is discharged through the connection of the transistor Q11 with the diode D7 in the photo coupler U1 to output the first zero crossing signal. The diode D7 in the photo coupler U1 is turned on according to the first zero crossing signal, so that the triode Q4 is turned on, and the direct current power supply VCC1 provides a first output signal through the photo coupler U1. Thereby, the capacitor C11 is discharged within the period of 10ms-t 1. Correspondingly, the DC power supply VCC1 provides a first output signal in a 10ms-t1 time period. Since the first zero crossing signal (i.e., the forward bias voltage) provided gradually decreases during the discharging of the capacitor C11, the light intensity provided by the diode D7 gradually decreases, and thus the voltage of the base of the transistor Q4 gradually decreases. The voltage value of the first output signal detected at the time of 10ms is thus at most M1, and the voltage of the first output signal detected during the time period of 10ms-t1 gradually decreases. Further, at time t1, the discharge of the capacitor C11 is completed, and the photo coupler U1 is switched from on to off, so that the first output signal is not detected within the time period of t1 to 20 ms. Meanwhile, after the voltage of the ac signal is switched from the positive half-cycle to the negative half-cycle, that is, in the period of 10ms-20ms, for the second detection sub-circuit 22, the diodes D12 and D22 are turned on, the transistor Q12 is turned off, so that the resistors R1 and R2 are respectively connected to the capacitor C12 through the diodes D22 and D12, and charge the capacitor C12. So that no second output signal is detected within a period of 10ms-20 ms.

Still further, reference is made to fig. 4, 6, 7 and 8. At 20ms, the voltage of the ac electrical signal switches from negative half-cycles to positive half-cycles and from negative to positive. At this time, for the second detection sub-circuit 22, the diodes D12 and D22 are turned off, the transistor Q12 is turned on, so that the capacitor C12 is discharged through the connection of the transistor Q12 with the diode D8 in the photo coupler U2 to output the second zero crossing signal. The diode D2 in the photo coupler U2 is turned on according to the second zero crossing signal, so that the triode Q5 is turned on, and the direct current power supply VCC2 provides a second output signal through the photo coupler U2. Thus, the capacitor C12 discharges during the 20ms-t2 period. Correspondingly, the direct current power supply VCC2 provides a second output signal in a period of 20ms-t 2. Since the second zero crossing signal (i.e., the forward bias voltage) provided gradually decreases during the discharging of the capacitor C12, the light intensity provided by the diode D8 gradually decreases, and thus the voltage of the base of the transistor Q5 gradually decreases. The voltage value of the second output signal detected at the moment of 20ms is thus at most M1, and the voltage of the second output signal detected during the period of 20ms-t2 gradually decreases. Further, at time t2, the discharge of the capacitor C11 is completed, and the photo coupler U2 is switched from on to off, so that the second output signal is not detected within the time period of t2 to 30 ms. Meanwhile, after the voltage of the ac signal is switched from the negative half cycle to the positive half cycle, the diodes D11 and D21 are turned on, the transistor Q11 is turned off, so that the resistors R1 and R2 are connected to the capacitor C11 through the diodes D11 and D21, and the capacitor C11 is charged. Therefore, the zero-crossing signal detection circuit can accurately detect the voltage of the input signal when the zero-crossing point is formed on the rising edge and the falling edge, can reduce the voltage difference of the detection circuit in the detection process, and has higher applicability.

Alternatively, the output circuit 3 may also comprise a photo coupler and a dc power supply. Specifically, an equivalent circuit diagram of the zero-crossing signal detection circuit may refer to fig. 9.

Fig. 9 is an equivalent circuit diagram of a zero-crossing signal detection circuit in an embodiment of the invention. As shown in fig. 9, the output circuit 3 includes a third direct current power supply VCC3, a third photocoupler U3, a tenth capacitor C10, an eleventh capacitor C11, and a ninth resistor R9. The third photo-coupler U3 includes a ninth diode D9 and a sixth triode Q6 (hereinafter, abbreviated as a dc power supply VCC3, a photo-coupler U3, a capacitor C10, a capacitor C11, a resistor R9, a diode D9, and a triode Q6). Wherein the photo coupler U3 is connected to the first detection sub-circuit 21, the second detection sub-circuit 22 and the third dc power supply VCC 3. At this time, the first detection sub-circuit 21 further includes a fifth resistor R51, a sixth resistor R61, a second triode Q21, a third triode Q31, a fourth diode D41, a fifth diode D51, a sixth diode D61, a fourth capacitor C41, and a fifth capacitor C51 (hereinafter simply referred to as resistor R51, resistor R61, triode Q21, triode Q31, diode D41, diode D51, diode D61, capacitor C41, and capacitor C51).

In the present embodiment, the second detection sub-circuit 22 has the same circuit configuration as the first detection sub-circuit 21. The second detection subcircuit 22 further includes a fifth resistor R52, a sixth resistor R62, a second transistor Q22, a third transistor Q32, a fourth diode D42, a fifth diode D52, a sixth diode D62, a fourth capacitor C42, and a fifth capacitor C52 (hereinafter referred to as resistor R52, resistor R62, transistor Q22, transistor Q32, diode D42, diode D52, diode D62, capacitor C42, and capacitor C52). In the following description, the connection manner of the first detection sub-circuit 21 is exemplified.

In this embodiment, the resistor R51 has one end connected to the second input terminal 2b and the other end connected to the second output terminal 2d through the transistor Q21.

The base of transistor Q21 is connected to resistor R51, the collector to the second output terminal 2D, and the emitter to the node between capacitor C41 and the anode of diode D51.

The emitter of the transistor Q31 is connected to the first input terminal 2a, the collector is connected to the first output terminal 2c, and the base is connected to the resistor R61.

Resistor R61 has one end connected to the base of transistor Q31 and the other end connected to the cathode of diode D41.

The cathode of the diode D41 is connected to the resistor R61, and the anode is connected to the node between the second input terminal 2b and the resistor R51. Resistor R61 is connected in series with diode D41.

One end of the capacitor C41 is connected to a node between the collector of the transistor Q31 and the first output terminal 2C, and the other end is connected to the anode of the diode D51.

The anode of the diode D51 is connected to the capacitor C41, and the cathode is connected to the node between the second input terminal 2b and the resistor R51.

The cathode of the diode D61 is connected to the node between the collector of the transistor Q31 and the first output terminal 2C, and the anode is connected to the capacitor C41, the anode of the diode D51 and the emitter of the transistor Q21. Diode D61 is connected in parallel with capacitor C41.

One end of the capacitor C51 is connected to a node between the resistor R51 and the base of the transistor Q21, and the other end is connected to the emitter of the transistor Q21. Capacitor C51 is connected in parallel with diode D51

The anode of the diode D9 in the photo coupler U3 is connected to the first output terminals 2c and 2g, and the cathode is connected to the second output terminals 2D and 2 h.

In the photocoupler U3, the collector of the triode Q6 is connected to the capacitor C10 and the dc power supply VCC3, and the emitter is connected to the capacitor C11 and the resistor R9.

One end of the capacitor C10 is connected to a node between the collector of the transistor Q6 and the dc power supply VCC3, and the other end is grounded.

One end of the resistor R9 is connected with the emitter of the triode Q6, and the other end of the resistor R is grounded.

One end of the capacitor C11 is connected with the emitter of the triode Q6, and the other end of the capacitor C is grounded. The capacitor C11 is connected in parallel with the resistor R9.

In this embodiment, transistors Q21 and Q22 are NPN transistors.

In this embodiment, the transistors Q31 and Q32 are PNP transistors. For the PNP triode, when the voltage value of the base stage is larger than that of the emitter, the emitter junction of the PNP triode is reversely biased. When the voltage value of the base stage is smaller than that of the emitter, the emitter junction of the PNP triode is forward biased. When the voltage value of the base level is larger than that of the collector, the collector junction of the PNP triode is reversely biased. When the voltage value of the base stage is smaller than that of the collector, the collector junction of the PNP triode is positively biased. Further, in the case that the emitter junction is reversely biased and the collector junction is reversely biased, or the emitter junction is reversely biased and the collector junction is positively biased, the PNP transistor is turned off. And under the condition that the emitter junction is forward biased and the collector junction is forward biased or the emitter junction is forward biased and the collector junction is reverse biased, the PNP triode is conducted. That is, the PNP transistor is turned on when the emitter junction is forward biased and turned off when the emitter junction is reverse biased.

In this embodiment, the diode D9 is a photodiode, the transistor Q6 is a phototransistor, and the diode D9 is coupled to the transistor Q6. The photocoupler U3 is similar to U2 and U1 in that when the diode D9 is turned on, light of a certain wavelength can be output to turn on the transistor Q6. Further, when the transistor Q6 is turned on, the dc power VCC3 provides a first output signal through the transistor Q6. Therefore, by controlling the on or off of the diode D9 so that the transistor Q6 is turned on or off, detection at the zero-crossing point of the input signal can be achieved. Specifically, when the ac signal provided from the signal source 4 is in a positive half cycle, that is, the input signal provided from the voltage dividing circuit 1 is in a positive half cycle, the equivalent circuit diagram of the zero crossing signal detection circuit of the present embodiment may refer to fig. 10.

Fig. 10 is an equivalent circuit diagram of a zero-crossing signal detection circuit in an embodiment of the invention. As shown in fig. 10, when the ac signal provided by the signal source 4 is in the positive half cycle, the resistor R1 is connected to the positive electrode of the signal source 4. Resistor R2 is connected to the negative electrode of signal source 4.

In the present embodiment, with the first detection sub-circuit 21, when the input signal supplied from the voltage dividing circuit 1 is in the positive half cycle, the transistor Q21 and the diode D41 are turned off, and the diode D51 and the transistor Q31 are turned on, so that the resistors R1 and R2 are connected to the capacitor C41 through the transistor Q31 and the diode D51, and the capacitor C41 is charged.

In the present embodiment, the diode D41 is used to control the on and off of the transistor Q31, and the diode D41 is turned off because the anode of the diode D41 is connected to the cathode of the signal source 4 through the second input terminal 2b and the resistor R2. At this time, the emitter of the transistor Q31 is connected to the positive electrode of the signal source 4 via the first input terminal 2a and the resistor R1, and the base is connected to the diode D41 via the resistor R61. Since the diode D41 is turned off, the voltage of the base stage of the transistor Q31 is smaller than the voltage of the emitter, so that the emitter junction of the transistor Q31 is forward biased, and the transistor Q31 is turned on.

Further, the anode of the diode D51 is connected to the positive electrode of the signal source 4 through the transistor Q31, the first input terminal 2a and the resistor R1, and the cathode of the diode D51 is connected to the negative electrode of the signal source 4 through the second input terminal 2b and the resistor R2, so that the diode D51 is turned on. Correspondingly, the base of the triode Q21 is connected to the negative electrode of the signal source 4 through the resistor R51, the second input end 2b and the resistor R2, and the emitter is connected to the negative electrode of the signal source 4 through the diode D51, the second input end 2b and the resistor R2, and at the moment, the voltage value of the base of the triode Q21 is smaller than that of the emitter, so that the emitter junction of the triode Q21 is reversely biased, and therefore the triode Q21 is cut off. Thereby, the capacitor C41 can be charged.

In the present embodiment, the diode D61 is used to perform voltage stabilization processing on the charging voltage of the capacitor C41 when the capacitor C41 is charged.

Alternatively, the diode D61 may be a zener voltage-resistant diode. Similar to diode D31 in the embodiment shown in fig. 3. In this embodiment, the cathode of the diode D61 is connected to the positive electrode of the signal source 4 through the triode Q31, the first input terminal 2a and the resistor R1, and the anode of the diode D61 is connected to the negative electrode of the signal source 4 through the diode D51, the second input terminal 2b and the resistor R2, so that the diode D51 can perform voltage stabilizing processing on the charging voltage of the capacitor C41. For example, the zener voltage value is 6V, and when the charging voltage of the capacitor C41 exceeds 6V, the diode D61 is turned on, so that the voltage is stabilized at 6V. Thus, circuit protection can be realized, and the power consumption of the zero-crossing signal detection circuit can be reduced.

In the present embodiment, for the second detection subcircuit 22, the transistor Q32 and the diode D52 are off, and the diode D42 is on.

In the present embodiment, the diode D42 is used to control the on and off of the transistor Q32, and the diode D42 is turned on because the anode of the diode D42 is connected to the positive electrode of the signal source 4 through the second input terminal 2f and the resistor R1. At this time, the emitter of the transistor Q32 is connected to the negative electrode of the signal source 4 via the first input terminal 2e and the resistor R2, and the base is connected to the diode D42 via the resistor R62. Since the diode D42 is turned on, the base of the transistor Q32 is connected to the positive electrode of the signal source 4 through the diode D42, the second input terminal 2f and the resistor R1, and at this time, the voltage of the base of the transistor Q32 is greater than the voltage of the emitter, so that the emitter junction of the transistor Q32 is reversely biased, and therefore the transistor Q32 is turned off. Further, the cathode of the diode D52 is connected to the positive electrode of the signal source 4 via the second input terminal 2f and the resistor R1, and thus the diode D52 is turned off.

Further, when the ac electric signal supplied from the signal source 4 is switched from the positive half cycle to the negative half cycle, that is, the input signal supplied from the voltage dividing circuit 1 is switched from the positive half cycle to the negative half cycle, the equivalent circuit diagram of the zero-crossing signal detecting circuit of the present embodiment may refer to fig. 11.

Fig. 11 is an equivalent circuit diagram of a zero-crossing signal detection circuit in an embodiment of the present invention. As shown in fig. 11, when the ac electrical signal supplied from the signal source 4 is switched from the positive half cycle to the negative half cycle, the resistor R1 is connected to the negative electrode of the signal source 4. Resistor R2 is connected to the positive electrode of signal source 4.

In the present embodiment, with the first detection sub-circuit 21, when the input signal supplied from the voltage dividing circuit 1 is switched from the positive half cycle to the negative half cycle, the transistor Q21 and the diode D41 are turned on, and the diode D51 and the transistor Q31 are turned off, so that the capacitor C41 is discharged through the connection of the transistor Q21 and the diode D9 in the photo coupler U3 to output the first zero crossing signal.

In the present embodiment, since the anode of the diode D41 is connected to the positive electrode of the signal source 4 via the second input terminal 2b and the resistor R2, the diode D41 is turned on. At this time, the emitter of the transistor Q31 is connected to the negative electrode of the signal source 4 via the first input terminal 2a and the resistor R1, and the base is connected to the diode D41 via the resistor R61. Since the diode D41 is turned on, the base of the transistor Q31 is connected to the positive electrode of the signal source 4 through the diode D41, the second input terminal 2b and the resistor R2, and at this time, the voltage of the base of the transistor Q31 is greater than the voltage of the emitter, so that the emitter junction of the transistor Q31 is reversely biased, and therefore the transistor Q31 is turned off. Correspondingly, the cathode of the diode D51 is connected to the positive pole of the signal source 4 via the second input terminal 2b and the resistor R2, so that the diode D51 is turned off.

Further, since the diode D51 and the transistor Q31 are turned off, the capacitor C41 starts to discharge, and the capacitor C41 can be equivalently used as a dc power supply. Specifically, in the process of charging the capacitor C41, the electrode plate connected to the positive electrode of the signal source 4 and the capacitor C41 may be equivalent to the positive electrode of the dc power supply during discharging. Correspondingly, the electrode plate of the capacitor C41 connected to the negative electrode of the signal source 4 may be equivalent to the negative electrode of the dc power supply during discharge.

Further, when the capacitor C41 discharges, the base of the triode Q21 is connected to the positive electrode of the signal source 4 through the resistor R51, the second input end 2b and the resistor R2, the emitter of the triode Q21 is connected to the negative electrode of the equivalent dc power supply of the capacitor C41, and at this time, the voltage value of the base of the triode Q21 is greater than the voltage value of the emitter, so that the emitter junction of the triode Q21 is forward biased, and therefore the triode Q21 is turned on.

In this embodiment, during discharging, the anode of the diode D9 in the photo coupler U3 is connected to the anode of the equivalent dc power supply of the capacitor C41, that is, the capacitor C41 provides a forward bias voltage (i.e., the first zero crossing signal) to the anode of the diode D9 during discharging. Meanwhile, the cathode of the diode D9 is connected to the cathode of the equivalent dc power supply of the capacitor C41 through the triode Q21, so that the diode D9 is turned on to turn on the triode Q6 in the photo coupler U3, and further the dc power supply VCC3 provides a third output signal through the triode Q6. Further, after the capacitor C41 is discharged, the photo coupler U3 is switched from on to off, so that the dc power VCC3 stops providing the third output signal. Thereby, a falling edge, i.e. detection of a zero crossing when the voltage of the input signal is switched from a positive half-cycle to a negative half-cycle, can be achieved.

In the present embodiment, with continued reference to fig. 11, for the second detection sub-circuit 22, after the input signal provided by the voltage dividing circuit 1 is switched from the positive half-cycle to the negative half-cycle, that is, the input signal is in the negative half-cycle at this time, the transistor Q32 and the diode D52 are turned on, and the diode D42 and the transistor Q22 are turned off. So that resistors R1 and R2 are connected to capacitor C42 via diode D52 and transistor Q32, respectively, to charge capacitor C42.

In the present embodiment, similarly to the charging process of the capacitor C41, since the anode of the diode D42 is connected to the negative electrode of the signal source 4 via the second input terminal 2f and the resistor R1, the diode D42 is turned off. The emitter of the triode Q32 is connected to the positive electrode of the signal source 4 through the first input terminal 2e and the resistor R2, and since the voltage of the base stage of the triode Q32 is smaller than the voltage of the emitter, the emitter junction of the triode Q32 is forward biased, so that the triode Q32 is turned on.

Further, the cathode of the diode D52 is connected to the negative electrode of the signal source 4 through the second input terminal 2f and the resistor R1, and the anode of the diode D52 is connected to the positive electrode of the signal source 4 through the transistor Q32, the first input terminal 2e and the resistor R2, so that the diode D52 is turned on.

Further, the base of the transistor Q22 is connected to the negative electrode of the signal source 4 through the resistor R52, the second input terminal 2f and the resistor R1, and the emitter is connected to the negative electrode of the signal source 4 through the diode D52, the second input terminal 2f and the resistor R1, at this time, the voltage value of the base of the transistor Q22 is smaller than the voltage value of the emitter, so that the emitter junction of the transistor Q22 is reversely biased, and the transistor Q21 is turned off. Thereby, the capacitor C42 can be charged.

In this embodiment, the diode D62 is used to stabilize the charging voltage of the capacitor C42 when the capacitor C42 is charged.

Alternatively, the diode D62 may be a zener voltage-resistant diode. The specific voltage stabilizing process is similar to the diode D61, and the present invention will not be described herein.

In this embodiment, reference may be continued to fig. 10 when the ac electrical signal provided by the signal source 4 is switched from a negative half-cycle to a positive half-cycle, i.e. the input signal provided by the voltage divider circuit 1 is switched from a negative half-cycle to a positive half-cycle. At this time, for the second detection sub-circuit 22, the transistor Q32 and the diode D52 are turned off, and the diode D42 and the transistor Q22 are turned on, so that the capacitor C42 is discharged through the connection of the transistor Q22 and the diode D9 in the photo coupler U3 to output the second zero crossing signal.

In this embodiment, similar to the discharging process of the capacitor C41, the transistor Q32 and the diode D52 are turned off, and the capacitor C42 starts to discharge, and the capacitor C42 can be equivalently a dc power supply. Specifically, in the process of charging the capacitor C42, the electrode plate connected to the positive electrode of the signal source 4 by the capacitor C42 may be equivalent to the positive electrode of the dc power supply during discharging. Correspondingly, the electrode plate of the capacitor C42 connected to the negative electrode of the signal source 4 may be equivalent to the negative electrode of the dc power supply during discharge.

Further, when the capacitor C42 discharges, the base of the triode Q22 is connected to the positive electrode of the signal source 4 through the resistor R52, the second input end 2f and the resistor R1, the emitter of the triode Q22 is connected to the negative electrode of the equivalent dc power supply of the capacitor C42, and at this time, the voltage value of the base of the triode Q22 is greater than the voltage value of the emitter, so that the emitter junction of the triode Q22 is forward biased, and therefore the triode Q22 is turned on.

In this embodiment, during discharging of the capacitor C42, the anode of the diode D9 in the photo coupler U3 is connected to the anode of the equivalent dc power supply of the capacitor C42. That is, the capacitor C42 provides a forward bias voltage (i.e., a second zero crossing signal) to the anode of the diode D9 when discharging. Meanwhile, the cathode of the diode D9 is connected to the cathode of the equivalent dc power supply of the capacitor C42 through the triode Q22, so that the diode D9 is turned on to turn on the triode Q6 in the photo coupler U3, and further the dc power supply VCC3 provides a third output signal through the triode Q6. Further, after the capacitor C42 is discharged, the photo coupler U3 is switched from on to off, so that the dc power VCC3 stops providing the third output signal. Thereby, a rising edge, i.e. zero crossing detection when the voltage of the input signal is switched from a negative half-cycle to a positive half-cycle, can be achieved.

In the present embodiment, since the frequency of the input signal is high, the switching frequency of the on and off of the diodes D41, D51, D42, and D52 and the transistors Q21, Q31, Q22, and Q32 is high, and at the same time, the switching frequency of the charge and discharge of the capacitors C41 and C42 is high, resulting in the possibility of generating an instantaneous disturbance signal. In this case, the present embodiment implements filtering of the interference signal by providing the capacitor C51 in the first detection sub-circuit 21 and the capacitor C52 in the second detection sub-circuit 22. Similarly, in the output circuit 3, since the switching frequency of on and off of the photocoupler U3 is high, an instantaneous disturbance signal may be generated. For this case, the present embodiment implements filtering of the interference signal by providing the capacitances C10 and C11 in the output circuit 3.

In this embodiment, the third output signal provided by the dc power VCC3 in the output circuit 3 may be collected by the signal collecting circuit, so as to implement zero crossing detection of the input signal. Meanwhile, since the frequency of the input signal is high, the third output signal may be a periodic pulse signal.

In this embodiment, the capacitors C41 and C42 have different capacitance values, so that the capacitors C41 and C42 have different discharge durations, that is, the durations of the first zero crossing signal and the second zero crossing signal (that is, the forward bias voltage) provided by the capacitors C41 and C42 are different, so that the duration of the photo coupler U3 turned on according to the first zero crossing signal or the second zero crossing signal is different, and finally, the duration of the third output signal provided by the dc power VCC3 is different. Therefore, the corresponding zero crossing point of the third output signal can be directly determined according to the time length of the third output signal, namely the falling edge zero crossing point of the voltage of the input signal, which is switched from the positive half cycle to the negative half cycle, or the rising edge zero crossing point of the positive half cycle, which is switched from the negative half cycle to the positive half cycle.

Alternatively, the capacitance value of the capacitor C41 may be set to be about five times the capacitance value of the capacitor C42, or the capacitance value of the capacitor C42 may be set to be about five times the capacitance value of the capacitor C41, so that the corresponding zero crossing point is conveniently determined according to the duration of the third output signal provided by the dc power supply VCC 3.

For example, the ac signal voltage provided by the signal source 4 is 220V, the frequency is 50HZ, and the waveform is a sine wave. The resistances of the resistors R1 and R2 are 510kΩ (kilo ohm). Diodes D41, D51, D42 and D52 are model 1N4148. The capacitance values of the capacitances C51, C52 and C11 are 1nF (nanofarad). The capacitance value of the capacitor C10 is 100nF. The capacitance value of the capacitor C41 is 220nF. The capacitance value of the capacitor C42 is 47nF. The resistances of the resistors R51, R61, R52, R62 and R9 are 47kΩ. Diodes D61 and D62 are model BZX84C6V2L. Transistors Q21 and Q22 are model number 2N2222. Transistors Q31 and Q32 are model number 2N3906. The model of the photo coupler U3 is PC817A. The dc voltage supplied by the dc power supply VCC3 is 3.3V.

In the present embodiment, the ac electric signal provided by the signal source 4 is collected by the signal collection circuit, and the third output signal provided by the dc power supply V3 is collected. The schematic diagrams of the third output signal and the ac electrical signal may refer to fig. 12 and 13, respectively.

Fig. 12 and 13 are schematic diagrams of a third output signal and an ac signal, respectively, in an embodiment of the present invention. Reference is first made to fig. 10, 12 and 13. In the period of 0-t3, the waveform of the alternating current signal is in a positive half cycle, and the voltage value of the alternating current signal is positive. At this time, for the first detection sub-circuit 21, the transistor Q21 and the diode D41 are turned off, and the diode D51 and the transistor Q31 are turned on, so that the resistors R1 and R2 are connected to the capacitor C41 through the transistor Q31 and the diode D51, and the capacitor C41 is charged. For the second detection subcircuit 22, the transistors Q32 and Q22 and diode D52 are off, and diode D42 is on. So that no third output signal is detected during the period 0-t 3.

Further, reference may be made to fig. 11-13. At t3, the voltage of the alternating current signal is switched from positive half-cycle to negative half-cycle, and the voltage thereof is switched from positive to negative. At this time, for the first detection sub-circuit 21, the transistor Q21 and the diode D41 are turned on, and the diode D51 and the transistor Q31 are turned off, so that the capacitor C41 is discharged through the connection of the transistor Q21 and the diode D9 in the photo coupler U3 to output the first zero crossing signal. The diode D9 in the photo coupler U3 is turned on according to the first zero crossing signal, so that the triode Q6 is turned on, and the dc power VCC3 provides a third output signal through the photo coupler U3. Thereby, the capacitor C41 discharges in the period of t3-t 4. Wherein t3 is less than t4 and t4 is less than 12ms. the time period of t3-t4 is the difference between t4 and t3, i.e. Δt1. Correspondingly, the direct current power supply VCC3 provides a third output signal in the period of t3-t 4. Since the first zero crossing signal (i.e., the forward bias voltage) provided gradually decreases during the discharging of the capacitor C41, the light intensity provided by the diode D9 gradually decreases, and thus the voltage of the base of the transistor Q6 gradually decreases. The voltage value of the third output signal detected at time t3 is thus at most M2, and the voltage of the third output signal detected during the time period t3-t4 gradually decreases. Further, at time t4, since the capacitor C41 is discharged and the transistor Q21 and the photocoupler U3 are switched from on to off, the third output signal is not detected within the period of time t4 to t5, and t4 is smaller than t5. Meanwhile, after the voltage of the ac signal is switched from the positive half cycle to the negative half cycle, that is, in the period of t3-t5, for the second detection subcircuit 22, the transistor Q32 and the diode D52 are turned on, and the diode D42 and the transistor Q22 are turned off. So that resistors R1 and R2 are connected to capacitor C42 via diode D52 and transistor Q32, respectively, to charge capacitor C42.

Still further, reference is made to fig. 10, 12 and 13. At time t5, the voltage of the ac electrical signal is switched from the negative half-cycle to the positive half-cycle, and the voltage thereof is switched from negative to positive. At this time, for the second detection sub-circuit 22, the transistor Q32 and the diode D52 are turned off, and the diode D42 and the transistor Q22 are turned on, so that the capacitor C42 is discharged through the connection of the transistor Q22 and the diode D9 in the photo coupler U3 to output the second zero crossing signal. The diode D9 in the photo coupler U3 is turned on according to the second zero crossing signal, so that the triode Q6 is turned on, and the dc power VCC3 provides a third output signal through the photo coupler U3. Thus, the capacitor C42 discharges during the period t5-t 6. Wherein t5 is less than t6 and t6 is less than 24ms. the time period of t5-t6 is the difference between t6 and t5, i.e. Δt2. Correspondingly, the direct current power supply VCC3 provides a third output signal in the period of t5-t 6. Since the second zero crossing signal (i.e., the forward bias voltage) provided gradually decreases during the discharging of the capacitor C42, the light intensity provided by the diode D9 gradually decreases, which in turn gradually decreases the voltage of the base of the transistor Q6. The voltage value of the third output signal detected at time t5 is thus at most M2, and the voltage of the third output signal detected during the time period t5-t6 gradually decreases. Further, at time t6, the discharge of the capacitor C42 is completed, and the transistor Q22 and the photocoupler U3 are switched from on to off, so that the third output signal is not detected within the time period of t6 to 24ms. Meanwhile, after the voltage of the ac electric signal is switched from the negative half cycle to the positive half cycle, for the first detection subcircuit 21, the transistor Q21 and the diode D41 are turned off, and the diode D51 and the transistor Q31 are turned on, so that the resistors R1 and R2 are connected to the capacitor C41 through the diode D51 and the transistor Q31, and the capacitor C41 is charged.

Note that, since the capacitance value of the capacitor C41 is 220nF, and the capacitance value of the capacitor C42 is 47nF. Accordingly, the capacitor C41 has a longer discharge duration than the capacitor C42, i.e. the duration Δt1 of the first zero crossing signal provided by the capacitor C41 is longer than the duration Δt2 of the second zero crossing signal provided by the capacitor C42. Therefore, the duration Δt1 of the photo-coupler U3 turned on according to the first zero crossing signal is longer than the duration Δt2 of the photo-coupler U3 turned on according to the second zero crossing signal. Therefore, the output circuit 3 supplies the third output signal according to the first zero crossing signal for a period of Δt1 and supplies the third output signal according to the second zero crossing signal for a period of Δt2. The detection circuit may then determine a falling edge zero-crossing corresponding to the switching of the ac signal voltage from the positive half-cycle to the negative half-cycle, based on the duration Δt1 of the detection of the third output signal. And from the duration deltat 2 during which the third output signal is detected, it can be determined that it corresponds to a rising edge zero-crossing of the alternating current signal voltage switching from the negative half-cycle to the positive half-cycle. Therefore, the zero-crossing signal detection circuit can accurately detect the voltage of the input signal when the zero-crossing point is formed on the rising edge and the falling edge, can reduce the voltage difference of the detection circuit in the detection process, and has higher applicability. Further, a circuit diagram of the zero-crossing detection circuit of the comparative example may refer to fig. 14.

Fig. 14 is a circuit diagram of the zero-cross detection circuit of the comparative example. As shown in fig. 14, the zero-crossing detection circuit of the comparative example includes a detection circuit 1', an output circuit 2', and an alternating-current signal source 3'. The detection circuit 1 'includes resistors R1', R2', R3', and R4', capacitors C1', C2', and C3', diodes D1', D2', and D3', and a transistor Q1'. The output circuit 2 'comprises capacitors C4' and C5', a photo coupler U1', a resistor R5', a dc power supply VCC1'. The photo coupler U1' includes a photodiode D4' and a phototransistor Q2'.

In the comparative example, an ac signal source 3' is connected to a detection circuit 1', and the detection circuit 1' is connected between the ac signal source 3' and an output circuit 2'. Specifically, one end of the ac signal source 3' is connected to the anode of the diode D1', and the other end is connected to the resistor R3'.

The anode of the diode D1' is connected to the ac signal source 3', and the cathode is connected to the resistor R1 '.

One end of the resistor R1' is connected with the cathode of the diode D1', and the other end is connected with the resistor R2'.

One end of the resistor R2' is connected with the resistor R1', and the other end is connected with the anode of the photodiode D4 '.

One end of the resistor R4' is connected with the alternating current signal source 3', and the other end is connected with the base stage of the triode Q1'.

One end of the resistor R3' is connected to the node between the resistor R2' and the anode of the photodiode D4', and the other end is connected to the node between the alternating current signal source 3' and the resistor R4 '.

The anode of the diode D2 'is connected to the emitter of the transistor Q1' and the cathode is connected to the node between the ac signal source 3 'and the resistor R4'.

The base of the triode Q1 'is connected with a resistor R4', the emitter is connected with the anode of a diode D2', and the collector is connected with the cathode of a photodiode D4'. The transistor Q1' is an NPN transistor.

One end of the capacitor C2 'is connected to the node between the resistor R2' and the anode of the photodiode D4', and the other end is connected to the AC signal source 3', the cathode of the diode D2 'and the resistor R4'. The capacitor C2 'is connected in parallel with the resistor R3'.

The capacitor C1' has one end connected to a node between the resistor R2' and the anode of the photodiode D4', and the other end connected to a node between the diode D2' and the emitter of the transistor Q1 '.

The cathode of diode D3 'is connected to the node between resistor R2' and the anode of photodiode D4', and the anode is connected to capacitor C1'. The diode D3 'is connected in parallel with the capacitor C1'.

The capacitor C3' is connected at one end to the node between the resistor R4' and the base of the transistor Q1', and at the other end to the node between the diode D2' and the emitter of the transistor Q1 '.

The anode of the photodiode D4' is connected with the resistor R2', and the cathode is connected with the collector of the triode Q1 '. Photodiode D4 'is coupled to the base of phototransistor Q2'.

The collector of the phototransistor Q2' is connected with a direct current power supply VCC1' and a capacitor C4', and the emitter is connected with a resistor R5' and a capacitor C5 '.

The direct current power supply VCC1 'is connected with the collector of the phototransistor Q2'.

One end of the capacitor C4' is connected to a node between the direct current power supply VCC1' and the collector of the phototransistor Q2', and the other end is grounded.

One end of the resistor R5 'is connected to the emitter of the phototransistor Q2', and the other end is grounded.

One end of the capacitor C5 'is connected to the emitter of the phototransistor Q2', and the other end is grounded. The capacitor C5 'is connected in parallel with the resistor R5'.

In the comparative example, an ac signal source 3' is used to provide an ac signal. At this time, the voltage of the ac signal is in the positive half cycle, the diodes D1 'and D2' are turned on, and the transistor Q1 'is turned off, so that the capacitor C1' is charged. Specifically, the anode of the diode D1' is connected to the positive electrode of the ac signal source 3' for conduction, so that the positive electrode of the ac signal source 3' is connected to the capacitor C1' through the diode D1', the resistors R1' and R2 '. The cathode of the diode D2' is connected to the negative pole of the ac signal source 3' so as to be conductive, so that the negative pole of the ac signal source 3' is connected to the capacitor C1' through the diode D2 '. Thus, when the voltage of the ac signal is in the positive half cycle, the ac signal source 3 'charges the capacitor C1'. Further, the base of the triode Q1' is connected to the negative electrode of the alternating current signal source 3' through a resistor R4', and the emitter is connected to the negative electrode of the alternating current signal source 3' through a diode D2', and the voltage of the base of the triode Q1' is smaller than the voltage of the emitter due to the voltage division of the resistor R4', namely the emitting junction of the triode Q1' is reversely biased, so that the triode Q1' is cut off.

In the comparative example, the resistors R1' and R2' are used to limit the ac signal supplied from the ac signal source 3' during the charging of the capacitor C1', so as to reduce the power consumption of the detection circuit 1 '. Further, when the alternating-current signal supplied from the alternating-current signal source 3' is switched from the positive half cycle to the negative half cycle, an equivalent circuit diagram of the zero-crossing detection circuit of the comparative example may refer to fig. 15.

Fig. 15 is an equivalent circuit diagram of the zero-crossing signal detection circuit of the comparative example. As shown in fig. 14, when the voltage of the ac electrical signal is switched from the positive half-cycle to the negative half-cycle, the diodes D1' and D2' are turned off, the transistor Q1' is turned on, so that the capacitor C1' discharges, and the photo-coupler U1' is turned on, so that the dc power VCC1' provides a fourth output signal through the photo-coupler U1 '. Wherein, the anode of the diode D1 'is connected to the negative electrode cutoff of the alternating current signal source 3', and the cathode of the diode D2 'is connected to the positive electrode cutoff of the alternating current signal source 3'. The base of the triode Q1 'is connected to the positive electrode of the alternating current signal source 3' through a resistor R4', the emitter of the triode Q1' is connected to the negative electrode of an equivalent direct current power supply of the capacitor C1', and the voltage of the base is larger than the voltage of the emitter, so that the triode Q1' is conducted. Thereby, zero crossing detection of the falling edge, i.e. when the voltage of the alternating current signal is switched from a positive half-cycle to a negative half-cycle, can be achieved.

For example, in the comparative example, the ac signal source 3' provides an ac signal having a voltage of 220V and a frequency of 50Hz. The resistances of the resistors R1 'and R2' are 510kΩ. The resistance of the resistor R3' is 470kΩ. The resistances of the resistors R4 'and R5' are 47kΩ. The capacitance values of the capacitances C1 'and C4' are 100nF. The capacitances C2', C3' and C5' have a capacitance value of 1nF. The diodes D1', D2' are of model 1N4148. The diode D3' is BZX84C6V2L. The model of the photo coupler U1' is PC817A. The dc voltage provided by the dc power supply VCC1' is 3.3V.

In the comparative example, the ac signal provided from the ac signal source 3 'may be collected by the signal collection circuit, and the fourth output signal provided from the dc power source VCC1' may be collected. Schematic diagrams of the alternating current signal and the fourth output signal of the comparative example can be referred to fig. 16 and 17, respectively.

Fig. 16 and 17 are schematic diagrams of a fourth output signal and an alternating current signal of the comparative example, respectively. Reference is first made to fig. 14, 16 and 17. In the period of 0-10ms, the waveform of the alternating current signal is in a positive half cycle, and the voltage value of the alternating current signal is positive. At this time, the diodes D1 'and D2' are turned on in the comparative example, the transistor Q1 'is turned off, so that the capacitor C1' is charged, and thus the fourth output signal is not detected.

Further, reference may be made to fig. 15-17. At the time of 10ms, the voltage of the alternating current signal of the comparative example was switched from the positive half cycle to the negative half cycle, and the voltage thereof was switched from the positive to the negative. At this time, the diodes D1' and D2' of the comparative example are turned off, and the transistor Q1' is turned on, so that the capacitor C1' is discharged, and further the photo coupler U1' is turned on, so that the dc power VCC1' provides a fourth output signal through the photo coupler U1 '. Thus, the capacitor C1' discharges within a period of 10ms-t 7. Correspondingly, the direct current power supply VCC1' provides a fourth output signal in a period of 10ms-t 7. Further, at time t7, the discharge of the capacitor C1' is completed, and the transistor Q1' and the photocoupler U1' are switched from on to off, so that the fourth output signal is not detected within t7 to 20 ms. Thereby, zero crossing detection of the falling edge, i.e. the switching of the voltage of the alternating current signal from a positive half-cycle to a negative half-cycle, can be achieved.

In the comparative example, since the zero-crossing signal detection circuit of the comparative example cannot perform zero-crossing detection on the rising edge, that is, the voltage of the ac signal is switched from the negative half cycle to the positive half cycle, it is necessary to separately provide a zero-crossing signal detection circuit to perform zero-crossing detection on the rising edge, that is, to perform zero-crossing detection by two zero-crossing signal detection circuits. However, when the voltage of the ac signal is in the positive half cycle, since the diode D1' is turned on, the voltage of the ac signal of the input resistors R1' and R2' is 220V. Correspondingly, when the voltage of the ac signal is in the negative half cycle, the voltage of the ac signal of the input resistors R1' and R2' is 0 due to the cut-off of the diode D1 '. That is, for the voltages of the alternating current signals in the positive half cycle or the negative half cycle, the voltages of the alternating current signals input to the resistors R1 'and R2' in one zero-crossing signal detection circuit are 220V, and the voltages of the alternating current signals input to the resistors R1 'and R2' in the other zero-crossing signal detection circuit are 0. Therefore, the two zero-crossing signal detection circuits have a large voltage difference, so that strong electrical isolation is required. Specifically, the two zero-crossing signal detection circuits are subjected to strong electric isolation in a magnetic isolation (for example, a magnetic material is arranged for electric isolation) mode and the like.

In the comparative example shown in fig. 14, on the one hand, the zero-crossing signal detection circuit in the comparative example cannot detect the rising-edge and falling-edge zero-crossing points, and is more limited than the embodiment shown in fig. 1. On the other hand, in the case of the comparative example in which two zero-crossing signal detection circuits are independently provided, strong electric isolation is required, resulting in an increase in complexity of the zero-crossing signal detection circuits and poor applicability.

According to the embodiment of the invention, the first resistor and the second resistor are arranged in the voltage dividing circuit of the zero-crossing signal detection circuit, the first resistor is connected with one end of the signal source, the second resistor is connected with the other end of the signal source, the alternating current signal provided by the signal source is subjected to voltage dividing processing to obtain an input signal, then zero-crossing detection is carried out by the detection circuit when the voltage of the input signal is switched from a positive half cycle to a negative half cycle and from the negative half cycle to the positive half cycle, so that a corresponding zero-crossing signal is output, and a corresponding output signal is generated by the output circuit according to the zero-crossing signal. Therefore, the voltage of the input signal can be accurately detected when the zero crossing point of the rising edge and the falling edge is realized, the voltage difference of the detection circuit can be reduced in the detection process, and the method has higher applicability.

The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, and various modifications and variations may be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A zero-crossing signal detection circuit, characterized in that the zero-crossing signal detection circuit comprises:

2. The zero-crossing signal detection circuit of claim 1, wherein the detection circuit comprises:

3. The zero-crossing signal detection circuit of claim 2, wherein the output circuit comprises:

a first DC power supply;

A second DC power supply;

4. The zero-crossing signal detection circuit of claim 2, wherein the output circuit comprises:

a third DC power supply;

5. A zero crossing signal detection circuit as claimed in claim 3, wherein the circuit arrangement further comprises:

6. The zero crossing signal detection circuit of claim 5, wherein the circuit structure further comprises:

7. The zero crossing signal detection circuit of claim 5, wherein the circuit structure further comprises:

8. The zero crossing signal detection circuit as claimed in claim 4, wherein the circuit structure further comprises:

9. The zero crossing signal detection circuit of claim 8, wherein a fourth capacitance in the first detection sub-circuit and a fourth capacitance in the second detection sub-circuit have different capacitance values, such that a duration of time that the third photo coupler is turned on according to the first zero crossing signal or the second zero crossing signal is different, and such that a duration of time that the third output signal is provided by the third dc power supply is different.

10. The zero crossing signal detection circuit of claim 8, wherein the circuit structure further comprises: