CN116705136A - eMMC internal information analysis method and system - Google Patents

eMMC internal information analysis method and system Download PDF

Info

Publication number
CN116705136A
CN116705136A CN202310446673.9A CN202310446673A CN116705136A CN 116705136 A CN116705136 A CN 116705136A CN 202310446673 A CN202310446673 A CN 202310446673A CN 116705136 A CN116705136 A CN 116705136A
Authority
CN
China
Prior art keywords
access
emmc
write command
read command
command
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202310446673.9A
Other languages
Chinese (zh)
Other versions
CN116705136B (en
Inventor
李伊君
宋魏杰
赖鼐
龚晖
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhuhai Miaocun Technology Co ltd
Original Assignee
Zhuhai Miaocun Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhuhai Miaocun Technology Co ltd filed Critical Zhuhai Miaocun Technology Co ltd
Priority to CN202310446673.9A priority Critical patent/CN116705136B/en
Priority claimed from CN202310446673.9A external-priority patent/CN116705136B/en
Publication of CN116705136A publication Critical patent/CN116705136A/en
Application granted granted Critical
Publication of CN116705136B publication Critical patent/CN116705136B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C29/56004—Pattern generation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C29/56016—Apparatus features
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C2029/5602—Interface to device under test
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

The application discloses a method and a system for analyzing internal information of eMMC, and relates to the technical field of storage products. The eMMC internal information analysis method comprises the following steps: capturing an interactive protocol between host and eMMC through a fly line, and generating a file to be analyzed; analyzing the file to be analyzed to obtain the access information of host to eMMC; the access information includes, but is not limited to, a read command, a write command, an access address for each read command, an access address for each write command, an access length for each read command, and an access length for each write command; analyzing the access information, generating a chart according to the analysis result and displaying the chart; the chart is used for displaying the access address distribution condition of the read command, the access address distribution condition of the write command, the access length distribution condition of the read command and the access length distribution condition of the write command. According to the eMMC internal information analysis method provided by the embodiment of the application, the actual use behavior of a user can be simulated, and the eMMC can be verified.

Description

eMMC internal information analysis method and system
Technical Field
The present application relates to the field of storage products, and in particular, to a method and system for analyzing internal information of eMMC, an electronic device, and a storage medium.
Background
eMMC (Embedded Multi Media Card ) is used as a storage device with excellent performance, and is increasingly used in applications such as tablet computers, television boxes, mobile phones, car navigation, etc.
In the process of eMMC product development, it is very important to test and verify eMMC, and whether each function and each protocol of the eMMC product are normal or not is verified, so that the eMMC product can work normally. In the existing test method, when in test, the eMMC product is tested according to the written test case, and although the simple verification of the eMMC product can be realized, the test method does not simulate the actual use behavior of a user to verify the eMMC product, so that the obtained verification result is not very in line with the actual use condition of the eMMC product.
Disclosure of Invention
The present application aims to solve at least one of the technical problems existing in the prior art. Therefore, the application provides a method and a system for analyzing the internal information of the eMMC, electronic equipment and a storage medium, which can acquire an interactive protocol between a host and the eMMC and analyze and obtain the access condition of the host to the eMMC, so that the actual use behavior of a user can be simulated, and the eMMC can be verified.
In one aspect, the eMMC internal information analysis method according to the embodiment of the present application includes the steps of:
capturing an interactive protocol between host and eMMC through a fly line, and generating a file to be analyzed;
analyzing the file to be analyzed to obtain the access information of the host to the eMMC; the access information includes, but is not limited to, a read command, a write command, an access address for each read command, an access address for each write command, an access length for each read command, and an access length for each write command;
analyzing the access information, generating a chart according to an analysis result and displaying the chart; the chart is used for displaying the access address distribution condition of the read command, the access address distribution condition of the write command, the access length distribution condition of the read command and the access length distribution condition of the write command.
According to some embodiments of the application, the eMMC internal information analysis method further includes the steps of:
generating a test case according to the analysis result of the access information;
and testing the eMMC according to the test case.
According to some embodiments of the application, the graph includes a first graph for displaying access address distribution of read commands and write commands, a second graph for displaying access length distribution of read commands, and a third graph for displaying access length distribution of write commands.
According to some embodiments of the application, the first graph is a scatter plot, the abscissa of the first graph is a sequence number, and the ordinate of the first graph is an access address; the second graph and the third graph are pie-shaped graphs, and the second graph is used for displaying the duty ratio of the read commands with different access lengths; the third graphic is used for displaying the duty ratio of the write commands with different access lengths.
According to some embodiments of the application, the access information further includes a total amount of erase commands, access addresses of the erase commands, and a size of the erase group.
According to some embodiments of the application, the access information further comprises at least one of an index value of a configuration register, a frequency configuration, a mode configuration, and a line width configuration.
On the other hand, the eMMC internal information analysis system according to the embodiment of the present application includes:
the grabbing module is used for grabbing an interactive protocol between host and eMMC through a flying lead and generating a file to be analyzed;
the analysis module is used for analyzing the file to be analyzed to obtain the access information of the host to the eMMC; the access information includes, but is not limited to, a read command, a write command, an access address for each read command, an access address for each write command, an access length for each read command, and an access length for each write command;
the analysis display module is used for analyzing the access information, generating a chart according to the analysis result and displaying the chart; the chart is used for displaying the access address distribution condition of the read command, the access address distribution condition of the write command, the access length distribution condition of the read command and the access length distribution condition of the write command.
According to some embodiments of the application, the analysis display module includes a first graphic for displaying an access address distribution of the read command and the write command, a second graphic for displaying an access length distribution of the read command, and a third graphic for displaying an access length distribution of the write command.
On the other hand, the electronic device according to the embodiment of the application includes:
a memory for storing program instructions;
and the processor is used for calling the program instructions stored in the memory and executing the eMMC internal information analysis method according to the obtained program instructions.
On the other hand, according to the storage medium of the embodiment of the present application, the storage medium stores computer-executable instructions for causing a computer to perform the eMMC internal information analysis method of the above embodiment.
The eMMC internal information analysis method, the eMMC internal information analysis system, the electronic equipment and the storage medium have at least the following beneficial effects: capturing an interaction protocol between a host and an eMMC through a fly line, wherein the interaction protocol comprises various access commands of the host to the eMMC, such as a read command, a write command and the like, and obtaining the access information of the host to the eMMC through analyzing the captured interaction protocol; then, these access information are analyzed, and the analysis result is displayed through a graph, so that the tester can intuitively see the read/write amount of host to the eMMC, the access address distribution situation of the read command, the access address distribution situation of the write command, the access length distribution situation of the read command, and the access length distribution situation of the write command. Because the access information is obtained by capturing the interactive protocol between the host and the eMMC, that is, the access information corresponds to the access operation of the host to the eMMC when the user actually uses the terminal, the actual access condition of the host to the eMMC can be obtained by analyzing the access information, so that when the eMMC is to be tested later, a test case conforming to the actual use behavior of the user can be generated according to the analysis results, the eMMC is tested and verified, and the verification result better conforms to the actual condition of the eMMC.
Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.
Drawings
The foregoing and/or additional aspects and advantages of the application will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
fig. 1 is a flowchart illustrating steps of an eMMC internal information analysis method according to an embodiment of the present application;
fig. 2 is a flowchart illustrating steps of an eMMC internal information analysis method according to another embodiment of the present application;
FIG. 3 is a schematic diagram of a first pattern according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a second pattern according to an embodiment of the present application;
fig. 5 is a schematic diagram of a third graph according to an embodiment of the present application.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the application. The step numbers in the following embodiments are set for convenience of illustration only, and the order between the steps is not limited in any way, and the execution order of the steps in the embodiments may be adaptively adjusted according to the understanding of those skilled in the art.
The terms "first," "second," "third," and "fourth" and the like in the description and in the claims and drawings are used for distinguishing between different objects and not necessarily for describing a particular sequential or chronological order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference in the specification to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
emmc: embedded Multi Media Card, an embedded multimedia card, is an embedded memory standard specification defined by the MMC society and mainly aimed at products such as mobile phones or tablet computers. The eMMC is an embedded non-volatile memory system, mainly comprising a flash memory, a flash memory access system, an eMMC protocol interface and the like, defines the physical architecture and the access interface and the protocol of the memory system based on an embedded multimedia card, has the advantages of small volume, low power consumption, large capacity and the like, and is very suitable for being used as a memory medium of electronic equipment such as a smart phone, a tablet personal computer, mobile internet equipment and the like.
host: the master control refers to a master control chip applied to a terminal (such as a mobile phone, a tablet personal computer and the like) of the eMMC. When the terminal performs various operations, such as playing video, starting up, shutting down, playing games, etc., host can continuously access eMMC, generate various read commands, write commands, erase commands, etc., so that the terminal can normally perform various operations, and run various programs and software.
The eMMC, as a storage device with excellent performance, is being increasingly used in applications such as tablet computers, television boxes, mobile phones, car navigation, and the like. In the process of eMMC product development, it is very important to test and verify eMMC, and whether each function and each protocol of the eMMC product are normal or not is verified, so that the eMMC product can work normally. In the existing test method, when in test, the eMMC product is tested according to the written test case, and although the simple verification of the eMMC product can be realized, the test method does not simulate the actual use behavior of a user to verify the eMMC product, so that the obtained verification result is not very in line with the actual use condition of the eMMC product.
Therefore, the embodiment of the application provides an eMMC internal information analysis method, which comprises the following steps:
capturing an interactive protocol between host and eMMC through a fly line, and generating a file to be analyzed;
analyzing the file to be analyzed to obtain the access information of the host to the eMMC; the access information includes, but is not limited to, a read command, a write command, an access address for each read command, an access address for each write command, an access length for each read command, and an access length for each write command;
analyzing the access information, generating a chart according to the analysis result and displaying the chart; the chart is used for displaying the access address distribution condition of the read command, the access address distribution condition of the write command, the access length distribution condition of the read command and the access length distribution condition of the write command.
According to the method for analyzing the internal information of the eMMC, the protocol analysis tool captures an interactive protocol between the host and the eMMC through a fly line, various access commands of the host to the eMMC, such as a read command, a write command and the like, are included in the interactive protocol, and the access information of the host to the eMMC can be obtained through analyzing the captured interactive protocol; then, these access information are analyzed, and the analysis result is displayed through a graph, so that the tester can intuitively see the read/write amount of host to the eMMC, the access address distribution situation of the read command, the access address distribution situation of the write command, the access length distribution situation of the read command, and the access length distribution situation of the write command. Because the access information is obtained by capturing the interactive protocol between the host and the eMMC, that is, the access information corresponds to the access operation of the host to the eMMC when the user actually uses the terminal, the actual access condition of the host to the eMMC can be obtained by analyzing the access information, so that when the eMMC is to be tested later, a test case conforming to the actual use behavior of the user can be generated according to the analysis results, the eMMC is tested and verified, and the verification result better conforms to the actual condition of the eMMC.
The method, system, electronic device and storage medium for analyzing the internal information of eMMC according to the embodiments of the present application are described in detail below with reference to fig. 1 to 5.
In one aspect, as shown in fig. 1, an eMMC internal information analysis method is provided in an embodiment of the present application, and the method includes the following steps:
step S100: capturing an interactive protocol between host and eMMC through a fly line, and generating a file to be analyzed;
specifically, in practical application, the protocol analyzer flies a line in the middle of a signal line between the host and the eMMC, so as to capture an interaction protocol between the host and the eMMC, where the interaction protocol mainly includes an access command between the host and the eMMC. For example, it is assumed that when the terminal performs operations such as playing video, playing game, opening various APPs, various access commands such as various read commands and write commands to eMMC are generated by host in the terminal, so that the terminal can normally perform these operations. After the protocol analyzer grabs the interactive protocol through the fly line, a file to be analyzed can be automatically generated, and subsequent analysis is facilitated. The file to be analyzed is automatically generated after the protocol analyzer captures the interaction protocol, and the suffix of the file is BFW.
Step S200: analyzing the file to be analyzed to obtain the access information of the host to the eMMC; the access information includes, but is not limited to, a read command, a write command, an access address for each read command, an access address for each write command, an access length for each read command, and an access length for each write command;
specifically, in practical application, after the protocol analyzer grabs the interaction protocol and generates the file to be analyzed, the file to be analyzed is analyzed, so that the access information of host to eMMC is obtained; in general, when a terminal performs various operations, host generates various commands to eMMC, and we mainly concern among them a read command, a write command, an access address of each read command, an access address of each write command, an access length of each read command, and an access length of each write command. Wherein, the access address refers to a logical block address (LBA, logic Block Address) where the data accessed by the command is located; logical block addresses are a common mechanism for describing the block of data on a storage device, and LBAs may refer to the address of a certain data block or the data block to which a certain address points. The access length refers to the length of data accessed by the command, for example, 1MB of data is accessed from address 0, and the access length is 1MB. The access of host to eMMC is performed by logical block address and access length, so it is necessary to analyze which locations the host has accessed to eMMC by resolving the address and length in the protocol. Assuming that the terminal plays two hours of video, the host performs various access operations on the eMMC during this period, we can know the total amount of reading and writing of the host to the eMMC, and the address distribution condition and the length distribution condition of the reading and writing command by acquiring the access information of the host to the eMMC.
Step S300: analyzing the access information, generating a chart according to an analysis result and displaying the chart; the chart is used for displaying the access address distribution condition of the read command, the access address distribution condition of the write command, the access length distribution condition of the read command and the access length distribution condition of the write command.
After specific access information is acquired, the protocol analyzer analyzes the access information, automatically generates a chart according to an analysis result, and displays the chart on an interface, so that a tester can intuitively see the access condition of host to eMMC. The chart is used for displaying the access address distribution condition of the read command, the access address distribution condition of the write command, the access length distribution condition of the read command and the access length distribution condition of the write command. Because we are mainly concerned about the condition of the host performing the read-write operation on the eMMC when verifying the eMMC, we can obtain the access condition of the host to the eMMC in the actual application according to the analysis results by analyzing the access address distribution condition of the read command and the write command and the access length distribution condition of the read command and the write command, so that the corresponding test case can be further generated and the eMMC can be tested. When testing and verifying the eMMC, the more the test case approaches the actual use behavior of the user, the more accurate the obtained verification result is.
Therefore, according to the method for analyzing the internal information of the eMMC, according to the embodiment of the application, the protocol analysis tool captures the interactive protocol between the host and the eMMC through the fly line, various access commands of the host to the eMMC, such as a read command, a write command and the like, are included in the interactive protocol, and the access information of the host to the eMMC can be obtained by analyzing the captured interactive protocol; then, these access information are analyzed, and the analysis result is displayed through a graph, so that the tester can intuitively see the read/write amount of host to the eMMC, the access address distribution situation of the read command, the access address distribution situation of the write command, the access length distribution situation of the read command, and the access length distribution situation of the write command. Because the access information is obtained by capturing the interactive protocol between the host and the eMMC, that is, the access information corresponds to the access operation of the host to the eMMC when the user actually uses the terminal, the actual access condition of the host to the eMMC can be obtained by analyzing the access information, so that when the eMMC is to be tested later, a test case conforming to the actual use behavior of the user can be generated according to the analysis results, the eMMC is tested and verified, and the verification result better conforms to the actual condition of the eMMC.
Further, in some embodiments of the present application, the eMMC internal information analysis method according to the embodiment of the present application further includes the steps of:
step S400: generating a test case according to the analysis result of the access information;
step S500: and testing the eMMC according to the test case.
After the analysis of the access information of the host to the eMMC is completed, we can obtain the total amount of reading and writing of the host to the eMMC, the duty ratio of the reading and writing command, the address distribution of the reading and writing command and the length distribution of the reading and writing command, and these information exactly meet the access operation of the host to the eMMC when the user actually uses the terminal to execute various operations. According to the analysis result, the method and the device can automatically generate a tested code (namely a test case) according to the read-write quantity, the address distribution and the length distribution of the read-write command, and test the eMMC according to the test case, so that the actual use behavior of a user is simulated to verify the eMMC, and the obtained verification result is more accurate and more accords with the actual condition of the eMMC.
Further, as shown in fig. 3 to 5, in some embodiments of the present application, after the access information is analyzed, a chart is automatically generated and displayed according to the analysis result. In this example, the generated charts are three, namely a first graph (shown in fig. 3), a second graph (shown in fig. 4) and a third graph (shown in fig. 5); the first graph is used for displaying the access address distribution condition of the read command and the write command, the second graph is used for displaying the access length distribution condition of the read command, and the third graph is used for displaying the access length distribution condition of the write command. As shown in fig. 3, the first graph is a scatter diagram, the abscissa thereof is a sequence number, the ordinate thereof is an access address, the sequence number refers to the sequence of a read command/write command executed by host to eMMC, the access address refers to a logical block address LBA, and the unit is MB; fig. 3 shows the access address distribution of host to eMMC read command and write command after two hours of video play, where gray dots are read command and black dots are write command, and during this period, host mainly executes the read command to eMMC, and a small amount of write command is inserted in the middle of the host, as can be seen from fig. 3; and the total amount of read and write of host to eMMC can also be seen from fig. 3. As shown in fig. 4, the second graph is a pie chart, and the distribution of different access lengths of the read command is shown by the pie chart; fig. 4 shows the situation of the different access length of host to the eMMC read command after the terminal plays the video for two hours, and as can be seen from fig. 4, the access length is 8KB read command, the maximum is 33%; a 16% access length of 16KB read command; the read command with an access length of 256KB has a 18% duty cycle, and the rest of the read commands with an access length have a relatively small duty cycle. As shown in fig. 5, the third graph is a pie chart, and the distribution of different access lengths of the write command is shown by the pie chart; fig. 5 shows the distribution of different access lengths of the host to the eMMC write command after the terminal plays the video for two hours, and as can be seen from fig. 5, the access length is 8KB write command with a maximum duty ratio, and the duty ratio is 59%; a 9% access to a write command of length 16 KB; the access length is 1024KB of write command with 12%; the access length of the write command is 24KB, and the duty ratio is 6%; the occupation of the write commands of the remaining access length is relatively small.
Through the graphs, a tester can intuitively see the read-write quantity of the host to the eMMC, the length distribution ratio condition of the read-write command and the address distribution ratio condition of the read-write command, so that the access condition of the host to the eMMC can be analyzed, the actual use behavior of a user can be simulated according to the analysis result, a corresponding test case can be generated, and the eMMC can be verified.
In some embodiments of the present application, in addition to acquiring the read-write condition of the host to the eMMC, the erase condition of the host to the eMMC may also be acquired, such as the total amount of the erase command, the access address of the erase command, and the size of the erase group. Likewise, for this information, a graph relating to the erase command may be drawn, and the number of erase commands, the access address distribution of the erase commands, and the size distribution of the erase groups may be shown by the graph.
In some embodiments of the present application, in addition to obtaining the read-write condition of host to eMMC, one or more of the index value, the frequency configuration, the mode configuration, and the line width configuration of the configuration register may also be obtained. When host performs access operation on eMMC, some attributes may need to be configured to perform communication on eMMC, and at this time, registers need to be configured, and corresponding functional configuration is completed by configuring corresponding index values (i.e. sequence numbers), for example, configuring index values of line widths to be 183, where the line widths have modes of 1 line/4 line single edge/8 line single edge/4 line double edge/8 line double edge, and the like; the index value of the mode configuration is 185, the mode has modes such as HS200/HS400, the HS200 is to transmit data at a frequency of clk (clock) of 200M, and the HS400 is to transmit data at a frequency of clk of 200M, but is a dual channel, so the data rate is 200×2=400. The frequency configuration refers to the sampling frequency of the clock. By acquiring the information, the host can know in what mode to execute the read-write command to the eMMC, so that when the test case is generated, the test case which is most suitable for the actual use behavior of the user can be generated by combining the configuration information and the read-write condition, and the eMMC is verified and tested.
On the other hand, the embodiment of the application also provides an eMMC internal information analysis system, which includes:
the grabbing module is used for grabbing an interactive protocol between host and eMMC through a flying lead and generating a file to be analyzed;
the analysis module is used for analyzing the file to be analyzed to obtain the access information of the host to the eMMC; the access information includes, but is not limited to, a read command, a write command, an access address for each read command, an access address for each write command, an access length for each read command, and an access length for each write command;
the analysis display module is used for analyzing the access information, generating a chart according to the analysis result and displaying the chart; the chart is used for displaying the access address distribution condition of the read command, the access address distribution condition of the write command, the access length distribution condition of the read command and the access length distribution condition of the write command.
It should be noted that, the content in the above method embodiment is applicable to the system embodiment, and the functions specifically implemented by the system embodiment are the same as those of the above method embodiment, and the beneficial effects achieved by the method embodiment are the same as those achieved by the above method embodiment.
Further, as shown in fig. 3 to 5, in some embodiments of the present application, the analysis display module includes a first graphic, a second graphic, and a third graphic, where the first graphic is used to display an access address distribution situation of a read command and a write command, the second graphic is used to display an access length distribution situation of the read command, and the third graphic is used to display an access length distribution situation of the write command. As shown in fig. 3, the first graph is a scatter diagram, the abscissa thereof is a sequence number, the ordinate thereof is an access address, the sequence number refers to the sequence of a read command/write command executed by host to eMMC, the access address refers to a logical block address LBA, and the unit is MB; fig. 3 shows the access address distribution of host to eMMC read command and write command after two hours of video play, where gray dots are read command and black dots are write command, and during this period, host mainly executes the read command to eMMC, and a small amount of write command is inserted in the middle of the host, as can be seen from fig. 3; and the total amount of read and write of host to eMMC can also be seen from fig. 3. As shown in fig. 4, the second graph is a pie chart, and the distribution of different access lengths of the read command is shown by the pie chart; fig. 4 shows the situation of the different access length of host to the eMMC read command after the terminal plays the video for two hours, and as can be seen from fig. 4, the access length is 8KB read command, the maximum is 33%; a 16% access length of 16KB read command; the read command with an access length of 256KB has a 18% duty cycle, and the rest of the read commands with an access length have a relatively small duty cycle. As shown in fig. 5, the third graph is a pie chart, and the distribution of different access lengths of the write command is shown by the pie chart; fig. 5 shows the distribution of different access lengths of the host to the eMMC write command after the terminal plays the video for two hours, and as can be seen from fig. 5, the access length is 8KB write command with a maximum duty ratio, and the duty ratio is 59%; a 9% access to a write command of length 16 KB; the access length is 1024KB of write command with 12%; the access length of the write command is 24KB, and the duty ratio is 6%; the occupation of the write commands of the remaining access length is relatively small.
Through the graphs, a tester can intuitively see the read-write quantity of the host to the eMMC, the length distribution ratio condition of the read-write command and the address distribution ratio condition of the read-write command, so that the access condition of the host to the eMMC can be analyzed, the actual use behavior of a user can be simulated according to the analysis result, a corresponding test case can be generated, and the eMMC can be verified.
On the other hand, the embodiment of the application also provides electronic equipment, which comprises:
a memory for storing program instructions;
and the processor is used for calling the program instructions stored in the memory and executing the eMMC internal information analysis method according to the obtained program instructions.
It should be noted that, the content in the above method embodiment is applicable to the present electronic device embodiment, and the functions specifically implemented by the present electronic device embodiment are the same as those of the above method embodiment, and the achieved beneficial effects are the same as those of the above method embodiment.
Although specific embodiments are described herein, those of ordinary skill in the art will recognize that many other modifications or alternative embodiments are also within the scope of the present disclosure. For example, any of the functions and/or processing capabilities described in connection with a particular device or component may be performed by any other device or component. In addition, while various exemplary implementations and architectures have been described in terms of embodiments of the present disclosure, those of ordinary skill in the art will recognize that many other modifications to the exemplary implementations and architectures described herein are also within the scope of the present disclosure.
Certain aspects of the present disclosure are described above with reference to block diagrams and flowchart illustrations of systems, methods, systems and/or computer program products according to example embodiments. It will be understood that one or more blocks of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, respectively, can be implemented by executing computer-executable program instructions. Also, some of the blocks in the block diagrams and flowcharts may not need to be performed in the order shown, or may not need to be performed in their entirety, according to some embodiments. In addition, additional components and/or operations beyond those shown in blocks of the block diagrams and flowcharts may be present in some embodiments.
Accordingly, blocks of the block diagrams and flowchart illustrations support combinations of means for performing the specified functions, combinations of elements or steps for performing the specified functions and program instruction means for performing the specified functions. It will also be understood that each block of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, can be implemented by special purpose hardware-based computer systems that perform the specified functions, elements or steps, or combinations of special purpose hardware and computer instructions.
Program modules, applications, etc. described herein may include one or more software components including, for example, software objects, methods, data structures, etc. Each such software component may include computer-executable instructions that, in response to execution, cause at least a portion of the functions described herein (e.g., one or more operations of the exemplary methods described herein) to be performed.
The software components may be encoded in any of a variety of programming languages. An exemplary programming language may be a low-level programming language, such as an assembly language associated with a particular hardware architecture and/or operating system platform. Software components including assembly language instructions may need to be converted into executable machine code by an assembler prior to execution by a hardware architecture and/or platform. Another exemplary programming language may be a higher level programming language that may be portable across a variety of architectures. Software components, including higher-level programming languages, may need to be converted to an intermediate representation by an interpreter or compiler before execution. Other examples of programming languages include, but are not limited to, a macro language, a shell or command language, a job control language, a scripting language, a database query or search language, or a report writing language. In one or more exemplary embodiments, a software component containing instructions of one of the programming language examples described above may be executed directly by an operating system or other software component without first converting to another form.
The software components may be stored as files or other data storage constructs. Software components having similar types or related functionality may be stored together, such as in a particular directory, folder, or library. The software components may be static (e.g., preset or fixed) or dynamic (e.g., created or modified at execution time).
The embodiments of the present application have been described in detail with reference to the accompanying drawings, but the present application is not limited to the above embodiments, and various changes can be made within the knowledge of one of ordinary skill in the art without departing from the spirit of the present application.

Claims (10)

1. An eMMC internal information analysis method, comprising the steps of:
capturing an interactive protocol between host and eMMC through a fly line, and generating a file to be analyzed;
analyzing the file to be analyzed to obtain the access information of the host to the eMMC; the access information includes, but is not limited to, a read command, a write command, an access address for each read command, an access address for each write command, an access length for each read command, and an access length for each write command;
analyzing the access information, generating a chart according to an analysis result and displaying the chart; the chart is used for displaying the access address distribution condition of the read command, the access address distribution condition of the write command, the access length distribution condition of the read command and the access length distribution condition of the write command.
2. The eMMC internal information analysis method according to claim 1, further comprising the step of:
generating a test case according to the analysis result of the access information;
and testing the eMMC according to the test case.
3. The eMMC internal information analysis method of claim 1, wherein the graph includes a first graph for displaying access address distribution of the read command and the write command, a second graph for displaying access length distribution of the read command, and a third graph for displaying access length distribution of the write command.
4. The eMMC internal information analysis method of claim 3, wherein the first graphic is a scatter plot, an abscissa of the first graphic is a sequence number, and an ordinate of the first graphic is an access address; the second graph and the third graph are pie-shaped graphs, and the second graph is used for displaying the duty ratio of the read commands with different access lengths; the third graphic is used for displaying the duty ratio of the write commands with different access lengths.
5. The eMMC internal information analysis method of claim 1, wherein the access information further includes a total amount of erase commands, an access address of the erase commands, and a size of the erase group.
6. The eMMC internal information analysis method of claim 1, wherein the access information further includes at least one of an index value, a frequency configuration, a mode configuration, and a line width configuration of a configuration register.
7. An eMMC internal information analysis system, comprising:
the grabbing module is used for grabbing an interactive protocol between host and eMMC through a flying lead and generating a file to be analyzed;
the analysis module is used for analyzing the file to be analyzed to obtain the access information of the host to the eMMC; the access information includes, but is not limited to, a read command, a write command, an access address for each read command, an access address for each write command, an access length for each read command, and an access length for each write command;
the analysis display module is used for analyzing the access information, generating a chart according to the analysis result and displaying the chart; the chart is used for displaying the access address distribution condition of the read command, the access address distribution condition of the write command, the access length distribution condition of the read command and the access length distribution condition of the write command.
8. The eMMC internal information analysis system of claim 7, wherein the analysis display module includes a first graphic to display an access address distribution of the read command and the write command, a second graphic to display an access length distribution of the read command, and a third graphic to display an access length distribution of the write command.
9. An electronic device, comprising:
a memory for storing program instructions;
a processor for calling program instructions stored in the memory and executing the eMMC internal information analysis method according to any one of claims 1 to 6 according to the obtained program instructions.
10. A storage medium storing computer-executable instructions for causing a computer to perform the eMMC internal information analysis method according to any one of claims 1 to 6.
CN202310446673.9A 2023-04-23 EMMC internal information analysis method and system Active CN116705136B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310446673.9A CN116705136B (en) 2023-04-23 EMMC internal information analysis method and system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310446673.9A CN116705136B (en) 2023-04-23 EMMC internal information analysis method and system

Publications (2)

Publication Number Publication Date
CN116705136A true CN116705136A (en) 2023-09-05
CN116705136B CN116705136B (en) 2024-06-28

Family

ID=

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140082267A1 (en) * 2012-09-14 2014-03-20 Kyung Phil Yoo EMBEDDED MULTIMEDIA CARD (eMMC), HOST CONTROLLING eMMC, AND METHOD OPERATING eMMC SYSTEM
WO2015032282A1 (en) * 2013-09-03 2015-03-12 北京安兔兔科技有限公司 Method and apparatus for testing hardware performance of electronic equipment
CN112445670A (en) * 2019-08-27 2021-03-05 合肥格易集成电路有限公司 eMMC test method and device
CN112988616A (en) * 2019-12-13 2021-06-18 美光科技公司 Reading sequential data from memory using hub table
CN114902191A (en) * 2022-03-24 2022-08-12 苏州佳世达电通有限公司 Monitoring method and device for electronic equipment and electronic equipment
CN114925304A (en) * 2022-05-25 2022-08-19 北京沃东天骏信息技术有限公司 Information access method, device and system
CN115762625A (en) * 2022-11-21 2023-03-07 珠海妙存科技有限公司 Method, system, electronic device and storage medium for verifying eMMC function

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140082267A1 (en) * 2012-09-14 2014-03-20 Kyung Phil Yoo EMBEDDED MULTIMEDIA CARD (eMMC), HOST CONTROLLING eMMC, AND METHOD OPERATING eMMC SYSTEM
WO2015032282A1 (en) * 2013-09-03 2015-03-12 北京安兔兔科技有限公司 Method and apparatus for testing hardware performance of electronic equipment
CN112445670A (en) * 2019-08-27 2021-03-05 合肥格易集成电路有限公司 eMMC test method and device
CN112988616A (en) * 2019-12-13 2021-06-18 美光科技公司 Reading sequential data from memory using hub table
CN114902191A (en) * 2022-03-24 2022-08-12 苏州佳世达电通有限公司 Monitoring method and device for electronic equipment and electronic equipment
CN114925304A (en) * 2022-05-25 2022-08-19 北京沃东天骏信息技术有限公司 Information access method, device and system
CN115762625A (en) * 2022-11-21 2023-03-07 珠海妙存科技有限公司 Method, system, electronic device and storage medium for verifying eMMC function

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
NING FU等: "Realization of controlling eMMC 5.0 device based on FPGA for automatic test system", IEEE XPLORE, 17 December 2015 (2015-12-17) *
张煜;陈微;吴利舟;肖侬;: "基于FPGA的HS400模式eMMC控制器设计与实现", 计算机工程与科学, no. 06, 15 June 2018 (2018-06-15) *
王凯;王笑强;: "基于eMMC芯片安卓智能手机数据直读技术研究", 信息安全研究, no. 04, 5 April 2016 (2016-04-05) *

Similar Documents

Publication Publication Date Title
CN102662690B (en) Method and apparatus for starting application program
CN108717393B (en) Application program testing method and mobile terminal
CN109445691B (en) Method and device for improving FTL algorithm development and verification efficiency
CN111143200A (en) Method and device for recording and playing back touch event, storage medium and equipment
CN115966247A (en) ZNS solid state disk performance test method
CN108509348A (en) A kind of test method and mobile terminal of system aging
CN108897657B (en) SSD (solid State disk) simulation platform-oriented error injection method and related device
CN101196848B (en) Method for acquiring operation log
CN117076337B (en) Data transmission method and device, electronic equipment and readable storage medium
CN116705136B (en) EMMC internal information analysis method and system
CN111708704B (en) Cloud real machine testing method, device, terminal and storage medium
CN107678770B (en) Interface chip upgrading method and device, storage medium and processor
CN113032246A (en) SSD (solid State disk) firmware operation method and device, readable storage medium and electronic equipment
CN112965661A (en) Data storage method, device, equipment and storage medium
CN100440383C (en) External storing performance testing method and apparatus
CN116705136A (en) eMMC internal information analysis method and system
CN111782474A (en) Log processing method and device, electronic equipment and medium
CN110058938B (en) Memory processing method and device, electronic equipment and readable medium
CN111028881A (en) Open Block testing device, method and system
CN111897582B (en) All-in-one machine Ethernet refreshing method and device, storage medium and all-in-one machine equipment
CN115718692A (en) Solid state disk evaluation method and device based on firmware simulation and readable storage medium
CN109542531B (en) File layout adjustment method and device
CN116483639B (en) eMMC information acquisition method and system, electronic device and storage medium
CN106648751B (en) Method for rapidly upgrading embedded software and embedded equipment
CN112148486B (en) Memory page management method, device, equipment and readable storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant