CN116668230B - Cloud host and multipath comparison method - Google Patents

Cloud host and multipath comparison method Download PDF

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Publication number
CN116668230B
CN116668230B CN202310735587.XA CN202310735587A CN116668230B CN 116668230 B CN116668230 B CN 116668230B CN 202310735587 A CN202310735587 A CN 202310735587A CN 116668230 B CN116668230 B CN 116668230B
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task
cache
computing
path
module
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CN116668230A (en
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陈典
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Siemens Mobility Technologies Beijing Co Ltd
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Siemens Mobility Technologies Beijing Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40169Flexible bus arrangements
    • H04L12/40176Flexible bus arrangements involving redundancy
    • H04L12/40189Flexible bus arrangements involving redundancy by using a plurality of bus systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40006Architecture of a communication node
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/40Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks using virtualisation of network functions or resources, e.g. SDN or NFV entities
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L2012/40267Bus for use in transportation systems
    • H04L2012/40293Bus for use in transportation systems the transportation system being a train
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

The embodiment of the invention provides a cloud host and a multipath comparison method. The cloud host includes: n core modules, each core module executing a path of computing task; the internal bus module is connected with the N core modules, can provide N internal bus channels, each internal bus channel is special for one of N computing tasks, and different internal bus channels are isolated from each other for the same task; the external bus module is connected between the cache module and the memory module, can provide N external bus channels, each external bus channel is special for one of N computing tasks, and different external bus channels are isolated from each other for the same task; and the cache module can provide N cache areas, each cache area is special for one of the N core modules, and different cache areas are isolated from each other for the same task. The embodiment of the invention can improve the reliability of the task execution result in the multipath comparison method.

Description

Cloud host and multipath comparison method
Technical Field
The invention relates to the technical field of networks, in particular to a cloud host and a multipath comparison method.
Background
In a service system, reliability is a key factor that the service system can safely perform service operation. For example, in a train control system, whether the calculation and triggering of an emergency brake command are reliable or not affects whether the train control system can safely run.
In order to improve the reliability, on the premise that the single-path reliability cannot meet the safety requirement, multi-path calculation comparison is mainly adopted to improve the reliability of the system. The implementation process of the multipath calculation comparison method comprises the following steps: aiming at the same safe calculation task, multiple paths of safe calculation tasks are adopted to respectively execute the safe calculation tasks, each path adopts a physical independent mode for the use of hardware, the influence caused by common cause faults is avoided, voting is carried out on the execution results of the multiple paths of safe calculation tasks, and the final execution results of the safe calculation tasks are determined according to the voting results. For example, 3 paths (each path includes a CPU, a cache, a memory, a bus, etc.) are used to perform calculation respectively for the same secure calculation task, and voting is performed on the calculation results of the 3 paths, for example, a mode of taking 2 paths is adopted, that is, if the calculation results of the 2 paths are the same, the calculation results of the 2 paths are used as the final calculation results of the secure calculation task. Therefore, in the multi-path calculation comparison method, the execution result of the safe calculation task does not depend on the execution condition of a single path of hardware, so that the reliability of the system is greatly improved.
However, in the existing cloud platform technology, hardware, a platform, a compiling tool and the like do not support multi-path calculation comparison of the CPU instruction level, synchronization of the instruction level is achieved, and a computing system only depends on software to ensure reliability. Such as running multiple instances on one or more cloud platforms, each instance occupying a CPU or a core, there is basically no way for other hardware resources to be specified. The utilization of computing resources and the reliability of the system are to be further improved. In addition, in the existing cloud architecture, no special support is made for the multi-path calculation comparison method, so that additional design and deployment means are required to be added.
Disclosure of Invention
The embodiment of the invention provides a cloud host and a multi-path comparison method, which can improve the reliability of a task execution result in the multi-path comparison method.
According to a first aspect, a cloud host provided by an embodiment of the present invention includes: m core modules, an internal bus module, an external bus module, a cache module and a memory module; wherein M and N are positive integers greater than 1, and M is greater than or equal to N;
N core modules in the M core modules all execute the same task, the same task is mapped into N paths of computing tasks, and each core module executes one path of computing task; voting according to N paths of task execution results obtained by the N core modules for the same task, and obtaining a final task execution result through N paths of comparison;
The internal bus module is connected with the N core modules, can provide N internal bus channels, and each internal bus channel is special for one of N computing tasks; n internal bus channels transmit N paths of task data of the same task among the N core modules, and different internal bus channels are isolated from each other aiming at the same task;
The external bus module is connected between the cache module and the memory module, and can provide N external bus channels, and each external bus channel is special for one of N computing tasks; n external bus channels transmit N paths of task data of the same task between the cache module and the memory module, and different external bus channels are isolated from each other aiming at the same task;
The cache module can provide N cache areas, and each cache area is special for one of the N core modules; the N cache areas are used for caching N paths of cache data of the same task, and different cache areas are isolated from each other aiming at the same task.
In a first aspect, the memory module may provide N memory areas, where the N memory areas are used to store N paths of data of the same task, and different memory areas are isolated from each other for the same task.
In a first aspect, the internal bus module includes N internal buses, each internal bus being used as one of the internal bus channels; or the internal bus module comprises M internal buses; wherein M is a positive integer smaller than N and larger than 0, and a plurality of data bits of one of the M internal buses is used as a plurality of the internal bus channels.
In a first aspect, the external bus module includes N external buses, each external bus being used as one external bus channel; or the external bus module comprises L external buses; wherein L is a positive integer smaller than N and larger than 0, and a plurality of data bits of one external bus of the L external buses are used as a plurality of the external bus channels.
In a first aspect, the buffer module includes N buffers, and correspondingly, the N buffer areas for buffering N paths of buffer data of the same task are respectively located in the N buffers; or the buffer memory module comprises S buffer memories, wherein S is a positive integer smaller than N and larger than 0; correspondingly, one cache in the S caches provides at least two cache areas, and the distance between storage positions of the at least two cache areas in the same cache is larger than a preset value; or the buffer memory module comprises N secondary buffers and N primary buffers, the secondary buffers are connected to the core module, and the primary buffers are connected between the secondary buffers and the memory; each core module corresponds to a special secondary cache and a primary cache, and correspondingly, N cache areas for caching N paths of cache data of the same task are included in N secondary caches, and N cache areas for caching N paths of cache data of the same task are included in N primary caches;
Or alternatively
The cache module comprises N secondary caches and a primary cache, the secondary caches are connected to the core module, and the primary cache is connected between the secondary caches and the memory; each core module corresponds to a special secondary cache, one primary cache is a shared cache, correspondingly, N secondary caches comprise N cache areas for caching N paths of cache data of the same task, one primary cache also comprises N cache areas for caching N paths of cache data of the same task, and the distance between every two storage positions of the N cache areas in the primary cache is larger than a preset value.
In a first aspect, the N core modules are implemented using at least two types of hardware.
In a first aspect, the instruction set of the cloud host includes P sets of computing task instructions compiled for the same task; wherein P is a positive integer greater than 1 and less than or equal to N; the calculation processes of the P sets of calculation task instructions are different from each other, but the same task can be completed;
And the N core modules load one set of calculation task instructions in the P sets of calculation task instructions respectively, and each core module executes one path of calculation task mapped by the same task according to the set of calculation task instructions loaded by the core modules.
According to a second aspect, there is provided a method for implementing multiple comparisons based on a cloud host, the method comprising:
mapping the same task into N paths of computing tasks;
Triggering each core module in the N core modules to execute one path of calculation task mapped by the same task;
for each path of computing task, a core module transmits task data of the path of computing task from a memory to a buffering area exclusive to the path of computing task by utilizing an exclusive external bus channel of the path of computing task;
For each path of computing task, a core module reads task data from a cache area exclusive to the path of computing task to obtain a task execution result of the path of computing task;
Aiming at each path of computing task, transmitting task execution results of the path of computing task among N core modules by utilizing an exclusive internal bus channel of the path of computing task;
And voting according to N task execution results obtained by the N core modules for the same task, and obtaining a final task execution result through N paths of comparison.
In a second aspect, the method further comprises: at the compilation stage, at least one of the following CPU instructions is compiled by a compiler:
At least one first type of instruction, wherein the first type of instruction is used for setting an internal bus channel special for each path of computing task;
at least one second type instruction, the second type instruction is used for locking an internal bus channel special for each path of computing task aiming at N paths of computing tasks of the same task according to the first type instruction, and unlocking the internal bus channel special for each path of computing task after the N paths of computing tasks of the same task are completed;
At least one third type of instruction, wherein the third type of instruction is used for setting an external bus channel special for each path of computing task;
The system comprises at least one fourth type instruction, a first control unit and a second control unit, wherein the fourth type instruction is used for locking an external bus channel special for each path of computing task aiming at N paths of computing tasks of the same task according to the third type instruction, and unlocking the external bus channel special for each path of computing task after the N paths of computing tasks of the same task are completed;
At least one fifth type of instruction for synchronizing data of N computing tasks for the same task among the N core modules;
and the sixth type of instruction is used for dividing N cache areas for caching N paths of cache data of the same task in one shared cache, and the distance between every two storage positions of the N cache areas is larger than a preset value.
In a second aspect, the method further comprises:
In the compiling stage, compiling P sets of computing task instructions aiming at the same task; wherein P is a positive integer greater than 1 and less than or equal to N; the calculation processes of the P sets of calculation task instructions are different from each other, but the same task can be completed;
Setting the N core modules to load the P sets of computing task instructions respectively, and executing one path of computing task mapped by the same task by each core module according to one set of computing task instructions loaded by the core modules.
The cloud host and the multipath comparison method provided by the embodiment of the invention have the following technical effects:
In the embodiment of the invention, the multiple comparison method is not realized by using a plurality of independent cloud hosts, but is realized by using a single cloud host. In the embodiment of the invention, the cloud host is a virtual server, and is host resources generated by resource integration by a virtualization technology and a cluster technology and installation requirements of a cloud control platform. If multiple comparison methods are implemented using multiple individual computer devices, the resources they occupy are enormous and the cost of implementing the business is too high, which is unacceptable in business implementation. The method for realizing the multi-path comparison by adopting the single cloud host greatly reduces the realization cost of the multi-path comparison method, is easy to realize business and is more suitable for complex tasks.
Meanwhile, according to the embodiment of the invention, the structure and the function of the cloud host can be obtained, in the embodiment of the invention, aiming at multiple paths of computing tasks, namely N paths of computing tasks, which are mapped by the same task, the exclusive internal bus channel of each path of computing task, the exclusive external bus channel of each path of computing task and the exclusive cache area of each path of computing task are arranged, that is, the task execution processes of all paths of computing tasks are mutually isolated in hardware, and the task execution processes of all paths of computing tasks are mutually independent in physics, even if the exclusive internal bus channel of one path of computing task goes wrong, or the exclusive external bus channel of one path of computing task goes wrong, or the exclusive cache area of one path of computing task goes wrong, other paths of computing tasks are not influenced, so that the advantage of a multipath selection method is maximized, and the reliability of the task execution result in the multipath selection method is greatly improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained based on these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a cloud host according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a cloud host according to another embodiment of the present invention;
FIG. 3 is a flow chart of a multi-path comparison method implemented based on a cloud host in one embodiment of the invention.
Reference numerals:
101 Core module
102 Internal bus module
103 External bus module
104 Cache module
105 Memory module
T1 Internal bus channel
T2 External bus channel
T3 Cache area
T4 Memory area
301~311 Step (a)
Detailed Description
In the multipath comparison method, each path needs to use hardware including a CPU, a cache, a memory, a bus and the like to execute tasks, and a task execution result of the path is obtained. In order to improve the reliability of the final task execution result selected by the vote, the task execution processes of each path should be physically independent as far as possible, otherwise, the reliability of the task execution result will be affected. However, in the prior art, for the same task, the task execution processes of each path cannot be independent from each other, for example, a bus is shared or a cache is shared, for example, bits in multiple paths of shared caches are all wrong, which results in simultaneous errors of multiple paths of calculation results, and the advantage of a multiple path selection method is lost, so that the reliability of the task execution results is greatly reduced.
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments, and all other embodiments obtained by those skilled in the art without making any inventive effort based on the embodiments of the present invention are within the scope of protection of the present invention.
According to a first aspect, an embodiment of the present invention provides a cloud host, see fig. 1, comprising: m core modules, an internal bus module 102, an external bus module 103, a cache module 104, and a memory module 105; wherein M and N are positive integers greater than 1, and M is greater than or equal to N;
N core modules 101 in the M core modules all execute the same task, the same task is mapped into N paths of computing tasks, and each core module 101 executes one path of computing task; voting according to N paths of task execution results obtained by the N core modules 101 aiming at the same task, and obtaining a final task execution result through N paths of comparison;
The internal bus module 102 is connected with the N core modules 101, where the internal bus module 102 may provide at least N internal bus channels T1 that are physically independent, and each internal bus channel T1 is dedicated to one of N computing tasks; n internal bus channels T1 transmit N paths of task data of the same task among the N core modules 101, and different internal bus channels T1 are isolated from each other aiming at the same task;
The external bus module 103 is connected between the cache module 104 and the memory module 105, where the external bus module 103 can provide N external bus channels T2, and each external bus channel T2 is dedicated to one of N computing tasks; n external bus channels T2 transmit N paths of task data of the same task between the cache module 104 and the memory module 105, and different external bus channels T2 are isolated from each other aiming at the same task;
The cache module 104 may provide N cache areas T3, each cache area T3 being dedicated to one of the N core modules; the N cache areas T3 are used for caching N paths of cache data of the same task, and different cache areas T3 are isolated from each other aiming at the same task.
In the embodiment of the present invention, the multiple comparison method is not implemented by using a plurality of separate cloud hosts, but is implemented by using a single cloud host or even a single cloud instance as shown in fig. 1. In the embodiment of the invention, the cloud host is a virtual server, and is host resources generated by resource integration by a virtualization technology and a cluster technology and installation requirements of a cloud control platform. If multiple comparison methods are implemented using multiple individual computer devices, the resources they occupy are enormous and the cost of implementing the business is too high, which is unacceptable in business implementation. The method for realizing the multi-path comparison by adopting the single cloud host greatly reduces the realization cost of the multi-path comparison method, is easy to realize business and is more suitable for complex tasks.
Meanwhile, according to the structure and function of the cloud host shown in fig. 1, in the embodiment of the present invention, for multiple paths of computing tasks, i.e., N paths of computing tasks, which are mapped by a same task, an internal bus channel dedicated to each path of computing task, an external bus channel dedicated to each path of computing task, and a buffer area dedicated to each path of computing task are set, that is, task execution processes of each path of computing task are isolated from each other in hardware, and task execution processes of each path of computing task are physically independent from each other, even if an internal bus channel dedicated to a certain path of computing task is wrong, or an external bus channel dedicated to a certain path of computing task is wrong, or a buffer area dedicated to a certain path of computing task is wrong, other paths of computing tasks are not affected, so that the advantage of a multiplexing method is maximized, and thus reliability of task execution results in the multiplexing method is greatly improved.
It should be noted that, in the embodiment of the present disclosure, the computing task may be a secure computing task, such as the computation and triggering of an emergency brake command, or an unsafe computing task, such as a schedule task.
Referring to fig. 2, in one embodiment of the present invention, the memory module 105 may provide N memory areas T4, where the N memory areas T4 are used to store N paths of data of the same task, and different memory areas T4 are isolated from each other for the same task. According to the cloud host shown in fig. 2, even if an exclusive memory area of a certain path of computing task is wrong, other paths of computing tasks are not affected, so that the advantage of the multi-path selection method is further improved, and the reliability of the task execution result in the multi-path selection method is further improved.
Referring to the cloud host shown in fig. 1 or fig. 2, in order to provide an internal bus channel T1 dedicated to each computing task, so that different internal bus channels are isolated from each other for the same task, in one embodiment of the present invention, the internal bus module 102 may include two implementations as follows:
mode 1 the internal bus module 102 includes N internal buses, each of which is used as one internal bus channel T1.
In this mode 1, each internal bus is dedicated to one of the N computing tasks, for example, the first internal bus transmits only the task data of the first computing task, the second internal bus transmits only the task data of the second computing task, and so on.
Mode 2, the internal bus module 102 includes M internal buses; where M is a positive integer smaller than N and larger than 0, a plurality of data bits of one of the M internal buses is used as the plurality of internal bus channels T1.
In this mode 2, at least one internal bus is not dedicated to one of the N computing tasks, but because there are multiple data bits in each bus, isolation can be achieved by different data bits. For example, M is equal to 1, the internal bus module includes 1 internal bus, N data bits in the 1 internal bus are used as N internal bus channels T1, where a first data bit in the internal bus only transmits task data of a first computing task, a second data bit in the internal bus only transmits task data of a second computing task, and so on.
Referring to the cloud host shown in fig. 1 or fig. 2, in order to provide an external bus channel T2 dedicated to each computing task, so that different external bus channels T2 are isolated from each other for the same task, in one embodiment of the present invention, the external bus module 103 may include two implementations as follows:
the first external bus module 103 includes N external buses, each of which is used as one external bus channel T2.
In the first mode, each external bus is dedicated to one of the N computing tasks, for example, the first external bus only transmits task data of a first computing task, the second external bus only transmits task data of a second computing task, and so on.
The second mode, the external bus module 103 includes L internal buses; where L is a positive integer smaller than N and larger than 0, a plurality of data bits of one external bus of the L external buses are used as the plurality of external bus channels T2.
In this second mode, at least one external bus is not dedicated to one of the N computing tasks, but because there are multiple data bits in each bus, isolation can be achieved by different data bits. For example, L is equal to 1, the external bus module includes 1 external bus, N data bits in the 1 external bus are used as N external bus channels T2, where a first data bit in the external bus only transmits task data of a first computing task, a second data bit in the external bus only transmits task data of a second computing task, and so on.
Referring to the cloud host shown in fig. 1 or fig. 2, in order to provide a dedicated cache area T3 for each computing task, so that different cache areas T3 are isolated from each other for the same task, in one embodiment of the present invention, the cache module 104 may at least include the following four implementations:
The buffer module 104 in mode a includes N buffers, and correspondingly, N buffer areas T3 for buffering N paths of buffer data of the same task are respectively located in N buffers.
In this manner a, each buffer is dedicated to one of the N computing tasks, for example, one buffer area T3 in the first buffer only buffers the task data of the first computing task, one buffer area T3 in the second buffer only buffers the task data of the second computing task, and so on.
The cache module 104 includes S caches, where S is a positive integer less than N and greater than 0; accordingly, one of the S caches provides at least two of the cache areas T3, and the distance between the storage positions of the at least two cache areas T3 in the same cache is greater than a predetermined value.
In this mode B, at least one cache is not dedicated to one of the N-way computing tasks. For example, S is equal to 2, n is equal to 3, the buffer module 104 includes 2 buffers, and the buffer 1 includes a buffer area T3 dedicated to the first path of computing task, that is, only buffers task data of the first path of computing task; the cache 2 includes two cache areas T3, specifically, one cache area T3 dedicated to the second computing task and one cache area T3 dedicated to the third computing task, where the two cache areas T3 in the cache 2 are designed to be far apart, and the distance between storage locations in the cache 2 is greater than a predetermined value, for example, the cache 2 has 100 bits in total, the cache area T3 dedicated to the second computing task is the location of bit 0 in the cache 2, and the cache area T3 dedicated to the third computing task is the location of bit 100 in the cache 2, because the distance is far apart, so that physical isolation can be achieved.
The cache module 104 includes N secondary caches and N primary caches, the secondary caches are connected to the core module 101, and the primary caches are connected between the secondary caches and the memory module 105; each core module 101 corresponds to a secondary cache and a primary cache, and accordingly, N secondary caches include N cache areas T3 for caching N-way cache data of the same task, and N primary caches also include N cache areas T3 for caching N-way cache data of the same task.
In this mode C, each core module 101 corresponds to one second level buffer memory and one first level buffer memory which are dedicated to itself, that is, each path of computing task has one first level buffer memory and one second level buffer memory which are dedicated to itself, so that each path of computing task completely realizes physical isolation.
Mode D, the cache module 104 includes N secondary caches and a primary cache, the secondary caches are connected to the core module 101, and the primary cache is connected between the secondary caches and the memory module 105; each core module 101 corresponds to a dedicated secondary cache, one primary cache is a shared cache, and correspondingly, N secondary caches include N cache areas T3 for caching N paths of cache data of the same task, one primary cache also includes N cache areas T3 for caching N paths of cache data of the same task, and distances between two storage positions of the N cache areas T3 in the primary cache are all greater than a predetermined value.
The four approaches described above are just a few of the possible implementations that are listed. Other implementations of the caching module 104 are also possible in practical business applications.
In one embodiment of the present invention, in order to further improve the independence of the computing tasks mapped by the same task, the result of the multi-path selection method is more reliable, and the diversity of hardware can be implemented, that is, the N core modules 101 can be implemented by adopting at least two types of hardware. For example, one core module 101 may be implemented using an ultrawei semiconductor (AMD) processor, another core module 101 may be implemented using an Intel (Intel) processor, etc.
In one embodiment of the present invention, in order to further improve the independence of each path of computing task mapped by the same task, the result of the multi-path selection method is more reliable, and software diversity can be implemented, that is, N core modules 101 can use at least two types of software to implement computing tasks. For example, one core module 101 is implemented using a Linux system, another core module 101 is implemented using a windows system, and so on. Or the same application software can be implemented in the same operating system through a compiler, and synchronously executed in the same operating system (Yun Shili).
In one embodiment of the invention, in order to further improve the independence of each path of calculation task mapped by the same task, the result of the multi-path selection method is more reliable, and the dissimilarity of software can be realized, that is, the instruction set of the cloud host comprises P sets of calculation task instructions compiled for the same task, namely P sets of heterogeneous instruction sets, and each set of calculation task instructions corresponds to one instruction set; wherein P is a positive integer greater than 1 and less than or equal to N; the calculation processes of the P sets of calculation task instructions are different from each other, but the same task can be completed; the N core modules 101 load one set of the P sets of computing task instructions respectively, and each core module 101 executes one path of computing task mapped by the same task according to the set of computing task instructions loaded by itself. For ease of understanding, the description is given by way of a simple example. For example, in the P sets of calculation task instructions, the first set of calculation task instructions is to calculate "a+b" first, and then subtract C from the sum obtained; the second set of calculation task instructions is to calculate "A-C" first and then add B to the calculated difference. It can be seen that the computing processes of the two sets of computing task instructions are different from each other, but the same task is completed. The result of the multi-path selection method is further more reliable through a software dissimilation mode.
It will be seen that in one embodiment of the present description improvements to hardware, software, instruction sets, compilers, etc. are referred to.
In this embodiment of the present disclosure, a compiler needs to be configured to determine whether multiple computations need to be performed, if so, it is determined which multiple computations need to be performed, for example, a 3-way 2 or a 2-way 2 is adopted, and the number of specified multiple ways should not exceed the number of core modules of the cloud host, and meanwhile, the instruction set is differentiated. Both the instruction and the instruction identification are supported by the hardware virtualization technology of the core module, i.e. both the instruction and the instruction identification are supported by the hardware virtualization technology of the CPU. The instructions of the unsafe computing task can be realized by a software virtualization technology or an existing hardware virtualization technology, so that a task type identifier can be added in an instruction compiling stage and an execution stage to distinguish the safe computing task from the unsafe computing task, and a plurality of groups of corresponding dissimilated instruction sets are allowed not to be generated for the unsafe computing task through the identifier so as to improve the system performance.
According to the identification of the security calculation task added by the compiler, the host and the cloud instance trace back the execution of the security calculation task, and the host and the cloud instance set and shorten the average fault detection time through the diagnosis information of related hardware running the security calculation task, so that the reliability of the system is improved.
In the embodiment of the present specification, the CPU needs to be configured, including: an instruction set supporting expansion; identifying an instruction set; the extended instruction set may run with support for hardware virtualization.
In the present description, a computing task actually corresponds to a set of instructions and corresponds to an identification of the computing task. For example, a secure computing task contains a set of CPU instructions specified and generated by a compiler.
According to a second aspect, referring to fig. 3, an embodiment of the present invention provides a method for implementing multiple comparisons based on a cloud host, where the cloud host may adopt the structure and the function of the cloud host set forth in any one of the embodiments of the present invention, and the method includes:
Step 301: the same task is mapped into N paths of computing tasks.
Step 303: triggering each core module in the N core modules to execute one path of calculation task mapped by the same task.
For example, the core module 1 performs the 1 st path of calculation task, and the core module 2 performs the 2 nd path of calculation task until the core module 5 performs the 5 th path of calculation task.
Step 305: for each path of computing task, a corresponding core module utilizes an exclusive external bus channel of the path of computing task to transmit task data of the path of computing task from a memory to an exclusive cache region of the path of computing task.
For example, for the 1 st computing task, the core module 1 uses the external bus channel exclusive to the 1 st computing task to transmit the task data of the 1 st computing task from the memory to the cache region exclusive to the 1 st computing task; for the 2 nd path of computing task, the core module 2 uses the external bus channel exclusive to the 2 nd path of computing task to transmit the task data of the 2 nd path of computing task from the memory to the buffer area exclusive to the 2 nd path of computing task, and so on.
Step 307: for each path of computing task, a core module reads task data from a cache area exclusive to the path of computing task to obtain a task execution result of the path of computing task.
For example, for the 1 st path of computing task, the core module 1 reads task data from a cache area dedicated to the 1 st path of computing task to obtain a task execution result of the 1 st path of computing task; for the 2 nd path of computing task, the core module 2 reads task data from the cache area exclusive to the 2 nd path of computing task to obtain a task execution result of the 2 nd path of computing task, and so on.
Step 309: for each path of computing task, one core module transmits the task execution result of the path of computing task among N core modules by utilizing an internal bus channel exclusive to the path of computing task.
For example, for the 1 st path of computing task, the core module 1 synchronizes the task execution result of the 1 st path of computing task among the 5 core modules by using an internal bus channel dedicated to the 1 st path of computing task; for the 2 nd path of computing task, the core module 2 synchronizes the task execution results of the 2 nd path of computing task among the 5 core modules by utilizing an internal bus channel special for the 2 nd path of computing task, so as to complete the synchronization of the task execution results obtained by all the core modules.
Step 311: voting is carried out according to N task execution results obtained by the N core modules for the same task, and a final task execution result is obtained through N paths of comparison.
In one embodiment of the present invention, a CPU instruction set may be preset, and any one of the above structures and functions of the cloud host may be implemented by matching the CPU instruction set with the structure of the cloud host, that is, the multi-path comparison method is completed. Accordingly, the method further comprises: at the compilation stage, at least one of the CPU instructions shown in table 1 below is compiled by a compiler:
TABLE 1
For each path of computing task, such as a safe computing task, an identifier for distinguishing the safe computing task is added for the core module to identify the same safe computing task, and the core module controls the safe computing task to start, end and synchronize according to the identifier.
The method may further comprise: in the compiling stage, compiling P sets of computing task instructions, namely P sets of heterogeneous instruction sets, aiming at the same task, wherein each set of computing task instructions corresponds to one instruction set; wherein P is a positive integer greater than 1 and less than or equal to N; the calculation processes of the P sets of calculation task instructions are different from each other, but the same task can be completed; setting the N core modules to load the P sets of computing task instructions respectively, and executing one path of computing task mapped by the same task by each core module according to one set of computing task instructions loaded by the core modules.
According to a third aspect, an embodiment of the present description provides a computer-readable storage medium, on which a computer program is stored, which when executed in a computer, causes the computer to perform the method of any of the embodiments of the present description.
It may be appreciated that, for explanation, specific implementation, beneficial effects, examples, etc. of the content in the computer readable medium provided by the embodiment of the present invention, reference may be made to corresponding parts in the method provided in the first aspect, and details are not repeated herein.
According to a fourth aspect, one embodiment of the present specification provides a computing device comprising a memory having executable code stored therein and a processor that, when executing the executable code, performs a method of any one of the embodiments of the specification.
It may be appreciated that, in the explanation, the specific implementation, the beneficial effects, the examples, etc. of the content in the computing device provided by the embodiment of the present invention may refer to the corresponding parts in the method provided in the first aspect, and are not repeated herein.
In this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments in part.
The foregoing embodiments have been provided for the purpose of illustrating the general principles of the present invention in further detail, and are not to be construed as limiting the scope of the invention, but are merely intended to cover any modifications, equivalents, improvements, etc. based on the teachings of the invention.

Claims (10)

1. A cloud host, comprising: m core modules, an internal bus module, an external bus module, a cache module and a memory module;
N core modules in the M core modules all execute the same task, the same task is mapped into N paths of computing tasks, and each core module executes one path of computing task; voting according to N paths of task execution results obtained by the N core modules for the same task, and obtaining a final task execution result through N paths of comparison; wherein M and N are positive integers greater than 1, and M is greater than or equal to N;
The internal bus module is connected with the N core modules, can provide N internal bus channels, and each internal bus channel is special for one of N computing tasks; n internal bus channels transmit N paths of task data of the same task among the N core modules, and different internal bus channels are isolated from each other aiming at the same task;
The external bus module is connected between the cache module and the memory module, and can provide N external bus channels, and each external bus channel is special for one of N computing tasks; n external bus channels transmit N paths of task data of the same task between the cache module and the memory module, and different external bus channels are isolated from each other aiming at the same task;
The cache module can provide N cache areas, and each cache area is special for one of the N core modules; the N cache areas are used for caching N paths of cache data of the same task, and different cache areas are isolated from each other aiming at the same task.
2. The cloud host of claim 1, wherein,
The memory module can provide N memory areas, the N memory areas are used for storing N paths of data of the same task, and different memory areas are isolated from each other aiming at the same task.
3. The cloud host of claim 1, wherein,
The internal bus module includes N internal buses, each of which is used as one of the internal bus channels;
Or alternatively
The internal bus module comprises O internal buses; wherein O is a positive integer smaller than N and larger than 0, and a plurality of data bits of one internal bus of the O internal buses is used as a plurality of the internal bus channels.
4. The cloud host of claim 1, wherein,
The external bus module includes N external buses, each of which is used as an external bus channel;
Or alternatively
The external bus module comprises L external buses; wherein L is a positive integer smaller than N and larger than 0, and a plurality of data bits of one external bus of the L external buses are used as a plurality of the external bus channels.
5. The cloud host of claim 1, wherein,
The buffer memory module comprises N buffer memories, and correspondingly, the N buffer memory areas for buffering the N buffer memory data of the same task are respectively positioned in the N buffer memories;
Or alternatively
The buffer memory module comprises S buffer memories, wherein S is a positive integer smaller than N and larger than 0; correspondingly, one cache in the S caches provides at least two cache areas, and the distance between storage positions of the at least two cache areas in the same cache is larger than a preset value;
Or alternatively
The cache module comprises N secondary caches and N primary caches, the secondary caches are connected to the core module, and the primary caches are connected between the secondary caches and the memory; each core module corresponds to a special secondary cache and a primary cache, and correspondingly, N cache areas for caching N paths of cache data of the same task are included in N secondary caches, and N cache areas for caching N paths of cache data of the same task are included in N primary caches;
Or alternatively
The cache module comprises N secondary caches and a primary cache, the secondary caches are connected to the core module, and the primary cache is connected between the secondary caches and the memory; each core module corresponds to a special secondary cache, one primary cache is a shared cache, correspondingly, N secondary caches comprise N cache areas for caching N paths of cache data of the same task, one primary cache also comprises N cache areas for caching N paths of cache data of the same task, and the distance between every two storage positions of the N cache areas in the primary cache is larger than a preset value.
6. The cloud host of claim 1, wherein said N core modules are implemented using at least two types of hardware.
7. The cloud host of claim 1, wherein an instruction set of said cloud host comprises P sets of computing task instructions compiled for a same task; wherein P is a positive integer greater than 1 and less than or equal to N; the calculation processes of the P sets of calculation task instructions are different from each other, but the same task can be completed;
And the N core modules load one set of calculation task instructions in the P sets of calculation task instructions respectively, and each core module executes one path of calculation task mapped by the same task according to the set of calculation task instructions loaded by the core modules.
8. A method for implementing multiple comparisons based on a cloud host according to any of claims 1 to 7, the method comprising:
mapping the same task into N paths of computing tasks;
Triggering each core module in the N core modules to execute one path of calculation task mapped by the same task;
for each path of computing task, a core module transmits task data of the path of computing task from a memory to a buffering area exclusive to the path of computing task by utilizing an exclusive external bus channel of the path of computing task;
For each path of computing task, a core module reads task data from a cache area exclusive to the path of computing task to obtain a task execution result of the path of computing task;
Aiming at each path of computing task, transmitting task execution results of the path of computing task among N core modules by utilizing an exclusive internal bus channel of the path of computing task;
And voting according to N task execution results obtained by the N core modules for the same task, and obtaining a final task execution result through N paths of comparison.
9. The method of claim 8, wherein the method further comprises: at the compilation stage, at least one of the following CPU instructions is compiled by a compiler:
At least one first type of instruction, wherein the first type of instruction is used for setting an internal bus channel special for each path of computing task;
at least one second type instruction, the second type instruction is used for locking an internal bus channel special for each path of computing task aiming at N paths of computing tasks of the same task according to the first type instruction, and unlocking the internal bus channel special for each path of computing task after the N paths of computing tasks of the same task are completed;
At least one third type of instruction, wherein the third type of instruction is used for setting an external bus channel special for each path of computing task;
The system comprises at least one fourth type instruction, a first control unit and a second control unit, wherein the fourth type instruction is used for locking an external bus channel special for each path of computing task aiming at N paths of computing tasks of the same task according to the third type instruction, and unlocking the external bus channel special for each path of computing task after the N paths of computing tasks of the same task are completed;
At least one fifth type of instruction for synchronizing data of N computing tasks for the same task among the N core modules;
and the sixth type of instruction is used for dividing N cache areas for caching N paths of cache data of the same task in one shared cache, and the distance between every two storage positions of the N cache areas is larger than a preset value.
10. The method of claim 8, wherein the method further comprises:
In the compiling stage, compiling P sets of computing task instructions aiming at the same task; wherein P is a positive integer greater than 1 and less than or equal to N; the calculation processes of the P sets of calculation task instructions are different from each other, but the same task can be completed;
Setting the N core modules to load the P sets of computing task instructions respectively, and executing one path of computing task mapped by the same task by each core module according to one set of computing task instructions loaded by the core modules.
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