CN116667873A - Radio frequency baseband combined fast AGC control system and method - Google Patents
Radio frequency baseband combined fast AGC control system and method Download PDFInfo
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- CN116667873A CN116667873A CN202310893516.2A CN202310893516A CN116667873A CN 116667873 A CN116667873 A CN 116667873A CN 202310893516 A CN202310893516 A CN 202310893516A CN 116667873 A CN116667873 A CN 116667873A
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- 238000004148 unit process Methods 0.000 claims description 3
- 238000010187 selection method Methods 0.000 claims 1
- 230000005540 biological transmission Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000005070 sampling Methods 0.000 description 5
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The application discloses a radio frequency baseband combined quick AGC control system and a method, wherein the system comprises the following steps: VGA, frequency converter, ADC, digital signal processing module, DAC, DVGA, detector, filter, threshold comparison unit, control selection unit, DVGA error processing unit and VGA error processing unit; the differences compared with the prior art digital AGC control structure include: adding a Digital Variable Gain Amplifier (DVGA) after the ADC, increasing the ability of digital domain power control; the error processing module is replaced by a control selection unit, a VGA error processing unit and a DVGA error processing unit, and control selection is performed according to the error. The system provided by the application is matched with the DVGA loop through the VGA loop, so that the VGA control loop does not need to enter a convergence state when working, the dependence of the control process on the delay of a physical device is reduced, meanwhile, the AGC convergence time is reduced, the output digital baseband signal is flatter, the control capability is more flexible, the system is suitable for different burst data structures, and the application range is wider.
Description
Technical Field
The application belongs to the field of wireless network communication, and particularly relates to a radio frequency baseband combined fast AGC control system and a method.
Background
The current automatic gain control of the wireless communication receiving end adopts a digital AGC structure, as shown in fig. 1, a radio frequency input signal is converted into a digital baseband signal after passing through a Variable Gain Amplifier (VGA), a frequency converter and an analog-to-digital converter (ADC) of the digital AGC structure in sequence, VGA control quantity is obtained through digital signal processing processes such as digital detection, filtering, threshold comparison and error processing, and then VGA control quantity is output through a digital-to-analog converter (DAC), so that closed loop automatic gain control is realized. The control process can obtain different control response time and digital baseband signal stability by adjusting VGA control frequency, bandwidth, stepping size and the like.
For burst communication signals, the automatic gain control process must be completed within the preamble sequence period of the burst signal, and signal stability is guaranteed in the subsequent data segment, requiring a fast response time, such as a WIFI signal requiring the gain control process to be completed within 5.6 us. The digital AGC control structure shown in fig. 1 includes analog devices such as VGA, frequency converter, ADC and DAC, and also includes digital processing modules such as detection, filtering and error processing, which are limited by the performance level of each physical device in the gain control loop, such as sampling rate, interface transmission rate, device response time, etc., the overall control delay of the control loop may reach us magnitude or even 10us magnitude, and the control delay determines the upper limit of loop bandwidth, so that the digital AGC loop structure cannot converge in the required time, and the adaptive capacity is greatly reduced. The current method can realize quick AGC response time by improving the performance level of the device, but has higher cost and poor economy.
Disclosure of Invention
In view of this, the application provides a radio frequency baseband combined fast AGC control system and method, which make VGA control loop work without entering into convergence state by matching VGA loop and DVGA loop, reduce the dependence of control process on physical device delay, and reduce AGC convergence time.
To achieve the purpose, the application adopts the following technical scheme: a radio frequency baseband combined fast AGC control system, the system comprising: VGA, frequency converter, ADC, digital signal processing module and DAC;
the digital signal processing module includes: the device comprises a DVGA, a detector, a filter, a threshold comparison unit, a control selection unit, a DVGA error processing unit and a VGA error processing unit;
VGA, frequency converter, ADC, DVGA, detector, filter, threshold comparison unit, control selection unit, DVGA error processing unit and DVGA are connected in turn along signal transmission direction to form DVGA automatic gain control loop;
VGA, a frequency converter, ADC, DVGA, a detector, a filter, a threshold comparison unit, a control selection unit, a VGA error processing unit, DAC and VGA are sequentially connected along the signal transmission direction to form a VGA automatic gain control loop;
the DVGA also provides a digital baseband output.
A method for controlling a radio frequency baseband combined fast AGC, the method being based on the radio frequency baseband combined fast AGC control system of claim 1, comprising:
s1: radio frequency input signal S RF (t) obtaining G after VGA VGA (n)·S RF (t) wherein G VGA (n) represents the amplification amount of VGA at the nth control, n is not less than 1, and t represents time;
s2: signal G VGA (n)·S RF (t) obtaining an ADC sampling digital signal G after the frequency converter and the ADC VGA (n)·S BB (t) the signal is further subjected to DVGA to obtain a digital baseband signal G VGA (n)·G DVGA (n)·S BB (t)，S BB (t) represents a digital baseband signal obtained by the radio frequency signal after passing through a frequency converter and an ADC, G DVGA (n) represents the DVGA amplification amount at the nth control;
s3: the digital baseband signal passes through a detector and a filter to obtain a current signal power estimated value P (n);
s4: the power estimation value P (n) passes through a threshold comparison unit to obtain a current estimation error Err (n), control selection is carried out according to the estimation error Err (n) and the current state, S5 is carried out if a VGA error processing unit is selected, and S6 is carried out if a DVGA error processing unit is selected;
s5: the VGA error processing unit calculates G according to Err (n) VGA (n+1) and output to VGA through DAC, while G is controlled DVGA (n+1) is set to 1, the direct output control DVGA is controlled, and S1 is returned;
s6: the DVGA error processing unit calculates and obtains G according to Err (n) DVGA (n+1) direct output control DVGA, while VGA error processing unit processes G VGA (n+1) has a value of G VGA (n) output to VGA through DAC for control, and return to S1.
In the S4, the method for controlling and selecting according to the estimation error Err (n) and the current state is as follows:
first two threshold parameters are set: entry threshold ETH IN And a trip threshold value ETH OUT And meet ETH IN >ETH OUT ；
Then, judging: if the current state is DVGA error processing state, when |Err (n) |>ETH IN Entering a VGA error processing state when the user is in the VGA error processing state, otherwise, still maintaining the current state; if the current state is VGA error processing state, when |Err (n) |<ETH OUT And when the VGA error processing state is jumped out, entering the DVGA error processing state, and otherwise, still maintaining the current state.
The beneficial effects of the application are as follows: the radio frequency baseband combined quick AGC control system provided by the application provides a brand new quick AGC architecture, and the system is matched with a VGA loop and a DVGA loop, so that the VGA control loop does not need to enter a convergence state when working, the dependence of the control process on the delay of a physical device is reduced, meanwhile, the AGC convergence time is reduced, and secondly, the system can realize a control result with higher precision by adopting the DVGA, so that an output digital baseband signal is more stable; in the method, VGA and DVGA control selection is not judged singly by absolute value of |Err (n) | but ETH is set according to two control states of VGA and DVGA IN And ETH OUT A set of entry and exit thresholds, which not only restrict the control range of the DVGA, but also decreaseThe requirement on the ADC dynamic range is low, unstable states of the two control modes, which are frequently switched back and forth, are prevented, and the stability of the control process is improved.
The system and the method disclosed by the application have more flexible control capability, are suitable for different burst data structures, and have wider application range.
Drawings
Fig. 1 is a schematic diagram of a prior art digital AGC system;
fig. 2 is a schematic structural diagram of a radio frequency baseband combined fast AGC control system according to an embodiment of the present application;
FIG. 3 is a schematic diagram illustrating a state jump of a control selection unit according to an embodiment of the present application;
FIG. 4 is a diagram showing power variation of an original received signal for analog burst transmission according to an embodiment of the present application;
fig. 5 is a diagram showing a power variation of a received signal after analog burst transmission and radio frequency baseband combined AGC according to an embodiment of the present application;
FIG. 6 shows VGA and DVGA control amounts in the analog burst transmission RF baseband combined AGC in accordance with an embodiment of the present application;
Detailed Description
Those of ordinary skill in the art will recognize that the embodiments described herein are for the purpose of aiding the reader in understanding the principles of the present application and should be understood that the scope of the application is not limited to such specific statements and embodiments. Those of ordinary skill in the art can make various other specific modifications and combinations from the teachings of the present disclosure without departing from the spirit thereof, and such modifications and combinations remain within the scope of the present disclosure.
The application will now be described in detail with reference to the drawings and specific examples.
A radio frequency baseband combined fast AGC control system as shown in fig. 2, the system comprising: VGA, frequency converter, ADC, digital signal processing module and DAC; wherein the digital signal processing module further comprises: the device comprises a DVGA, a detector, a filter, a threshold comparison unit, a control selection unit, a DVGA error processing unit and a VGA error processing unit;
the system comprises VGA and DVGA two automatic gain control loops, wherein VGA, a frequency converter, ADC, DVGA, a detector, a filter, a threshold comparison unit, a control selection unit, a DVGA error processing unit and DVGA are sequentially connected in the DVGA automatic gain control loop along the signal transmission direction; VGA, a frequency converter, an ADC, a DVGA, a detector, a filter, a threshold comparison unit, a control selection unit, a VGA error processing unit, a DAC and a VGA are sequentially connected along the signal transmission direction in the VGA automatic gain control loop.
Compared with the prior art, the radio frequency baseband combined AGC control structure provided by the application has the following differences: adding a Digital Variable Gain Amplifier (DVGA) after the ADC, increasing the ability of digital domain power control; the error processing module is replaced by a control selection unit, a VGA error processing unit and a DVGA error processing unit, and control selection is performed according to the error. The VGA error processing unit is influenced by the control delay of the physical device, the DVGA error processing unit is influenced by the digital processing delay only, the response speed is higher, the VGA error processing module and the DVGA error processing module are mutually exclusive, and the control selection module is arranged to determine which error processing module is started currently.
The control process realized by the radio frequency baseband combined fast AGC control system is as follows:
s1: radio frequency input signal S RF (t) obtaining G after VGA VGA (n)·S RF (t) wherein G VGA (n) represents the amplification amount of VGA at the nth control, n is not less than 1, and t represents time;
s2: signal G VGA (n)·S RF (t) obtaining an ADC sampling digital signal G after the frequency converter and the ADC VGA (n)·S BB (t) the signal is further subjected to DVGA to obtain a digital baseband signal G VGA (n)·G DVGA (n)·S BB (t)，S BB (t) represents a signal obtained by passing a radio frequency signal through a frequency converter and an ADC, G DVGA (n) represents the DVGA amplification amount at the nth control;
s3: the digital baseband signal passes through a detector and a filter to obtain a current signal power estimated value P (n);
s4: the power estimation value P (n) is subjected to threshold comparison to obtain a current estimation error Err (n), control selection is carried out according to the estimation error and the current state, S5 is carried out if a VGA error processing unit is selected, and S6 is carried out if a DVGA error processing unit is selected;
as an embodiment, the above-mentioned comprehensive judgment is performed according to two conditions of the current control state and the Err (n) absolute value, and the control process includes two threshold parameters: entry threshold ETH IN And a trip threshold value ETH OUT And meet ETH IN >ETH OUT The method comprises the steps of carrying out a first treatment on the surface of the If the current state is DVGA error processing state, when |Err (n) |>ETH IN Entering a VGA error processing state when the user is in the VGA error processing state, otherwise, still maintaining the current state; if the current state is VGA error processing state, when |Err (n) |<ETH OUT And when the VGA error processing state is jumped out, entering the DVGA error processing state, and otherwise, still maintaining the current state.
S5: the VGA error processing unit calculates G according to Err (n) VGA (n+1) and output to VGA through DAC, while G is controlled DVGA (n+1) is set to be 1, the control DVGA is directly output, if the control process is not finished, the control is returned to S1 to continue the control, if the control process is finished, no operation is performed, and the program is finished;
s6: the DVGA error processing unit calculates and obtains G according to Err (n) DVGA (n+1) direct output control DVGA, while VGA error processing unit processes G VGA (n+1) has a value of G VGA (n) outputting to VGA through DAC to control, if the control process is not finished, returning to S1 to continue the control, if the control process is finished, not performing any operation, and ending the program.
Examples
In this embodiment, the bandwidth of the burst communication signal is set to 10MHz, the adc sampling rate is 40MHz, the single burst transmission time is 1ms, and the AGC convergence time is required to be 10us. The power of the original received signal without power control, which is obtained by taking 1us as a detection window, of the burst transmission signal generated by simulation is shown in fig. 4, and the power of the noise floor is approximately 1000 times different from that of the strongest signal. The VGA and DVGA error processing loops adopt logarithmic adjustment loops, the update coefficients are 1/2 and 1/4 respectively, and the ETH IN And ETH OUT The signal power convergence results are set to 6dB and 2dB respectively, and as shown in FIG. 5, the AGC convergence can be realized by 5 power sampling points, and the AGC convergence time is about 5us. The control amounts of VGA and DVGA in the control process are shown in figure 6, and the signal fluctuation in a small range is [ (]<6 dB) is directly processed by DVGA, and the VGA control quantity is unchanged; the large range of power fluctuations is handled by the combination of VGA and DVGA, which absorbs mainly power fluctuations below 2 dB. VGA and DVGA combined processing shortens the stable time of burst signals on the whole, and ensures reliable receiving of signals.
Claims (3)
1. A radio frequency baseband combined fast AGC control system, the system comprising: VGA, frequency converter, ADC, digital signal processing module and DAC;
the digital signal processing module includes: the device comprises a DVGA, a detector, a filter, a threshold comparison unit, a control selection unit, a DVGA error processing unit and a VGA error processing unit;
VGA, frequency converter, ADC, DVGA, detector, filter, threshold comparison unit, control selection unit, DVGA error processing unit and DVGA are connected in turn along signal transmission direction to form DVGA automatic gain control loop;
VGA, a frequency converter, ADC, DVGA, a detector, a filter, a threshold comparison unit, a control selection unit, a VGA error processing unit, DAC and VGA are sequentially connected along the signal transmission direction to form a VGA automatic gain control loop;
the DVGA also provides a digital baseband output.
2. A method for controlling a radio frequency baseband combined fast AGC, wherein the method is performed based on the radio frequency baseband combined fast AGC control system according to claim 1, and comprises:
s1: radio frequency input signal S RF (t) obtaining G after VGA VGA (n)·S RF (t) wherein G VGA (n) represents the amplification amount of VGA at the nth control, n is not less than 1, and t represents time;
s2: signal G VGA (n)·S RF (t) after the frequency converter and the ADCSampling digital signal G to ADC VGA (n)·S BB (t) the signal is further subjected to DVGA to obtain a digital baseband signal G VGA (n)·G DVGA (n)·S BB (t)，S BB (t) represents a digital baseband signal obtained by the radio frequency signal after passing through a frequency converter and an ADC, G DVGA (n) represents the DVGA amplification amount at the nth control;
s3: the digital baseband signal passes through a detector and a filter to obtain a current signal power estimated value P (n);
s4: the power estimation value P (n) passes through a threshold comparison unit to obtain a current estimation error Err (n), control selection is carried out according to the estimation error Err (n) and the current state, S5 is carried out if a VGA error processing unit is selected, and S6 is carried out if a DVGA error processing unit is selected;
s5: the VGA error processing unit calculates G according to Err (n) VGA (n+1) and output to VGA through DAC, while G is controlled DVGA (n+1) is set to 1, the direct output control DVGA is carried out, and S1 is returned;
s6: the DVGA error processing unit calculates and obtains G according to Err (n) DVGA (n+1) direct output control DVGA, while VGA error processing unit processes G VGA (n+1) has a value of G VGA (n) output to VGA through DAC for control, and return to S1.
3. The radio frequency baseband combined fast AGC control method is characterized in that in S4, the control selection method according to the estimated error Err (n) and the current state is as follows:
first two threshold parameters are set: entry threshold ETH IN And a trip threshold value ETH OUT And meet ETH IN >ETH OUT The method comprises the steps of carrying out a first treatment on the surface of the Then, judging: if the current state is DVGA error processing state, when |Err (n) |>ETH IN Entering a VGA error processing state when the user is in the VGA error processing state, otherwise, still maintaining the current state; if the current state is VGA error processing state, when |Err (n) |<ETH OUT And when the VGA error processing state is jumped out, entering the DVGA error processing state, and otherwise, still maintaining the current state.
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