CN116667275A - Intelligent matrix type medical cleaning system equipment overcurrent protection system - Google Patents
Intelligent matrix type medical cleaning system equipment overcurrent protection system Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H5/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal non-electric working conditions with or without subsequent reconnection
- H02H5/04—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal non-electric working conditions with or without subsequent reconnection responsive to abnormal temperature
- H02H5/041—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal non-electric working conditions with or without subsequent reconnection responsive to abnormal temperature additionally responsive to excess current
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B40/00—Technologies aiming at improving the efficiency of home appliances, e.g. induction cooking or efficient technologies for refrigerators, freezers or dish washers
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Abstract
The application relates to the technical field of medical cleaning equipment, in particular to an overcurrent protection system for intelligent matrix medical cleaning system equipment. The ultrasonic power module is connected with a power supply module; the ultrasonic power module comprises an FPGA, a power amplifying circuit and a sampling unit, wherein the sampling unit, the FPGA, the power amplifying circuit and the ultrasonic transducer form a loop; the FPGA generates an ultrasonic excitation signal, and the ultrasonic transducer is driven to generate ultrasonic waves with specific frequency after the ultrasonic excitation signal passes through the power amplification circuit; the sampling unit is used for sampling the current signal of the transducer and inputting the sampled signal to the FPGA; and an overcurrent protection circuit is respectively arranged between the sampling unit and the FPGA, and is used for determining whether current in the system is overcurrent or not and disconnecting an overcurrent signal.
Description
Technical Field
The application relates to the technical field of medical cleaning equipment, in particular to an overcurrent protection system for intelligent matrix medical cleaning system equipment.
Background
Ultrasonic medical cleaning is a cleaning technique utilizing high-frequency sonic vibrations. In the medical field, ultrasonic medical cleaning is often used for cleaning medical instruments, surgical instruments and the like, dirt, blood, bacteria and the like on the surfaces of the instruments can be effectively removed, and the cleanliness and the disinfection effect of the instruments are improved.
The ultrasonic cleaning technology has the action mechanism that cavitation is carried out, a high-frequency vibrating transducer acts on liquid, a large number of bubbles are generated, the bubbles are continuously expanded until being blasted under the action of ultrasonic waves, and shock waves generated at the moment of blasting continuously impact dirt on the surface of a workpiece in the liquid, so that the purpose of decontamination is achieved, and therefore, the technology is also visually called "brushless cleaning". Through cavitation, the cleaning purpose can be achieved as long as bubbles can enter the space of the object to be cleaned, so that the technology has a very wide application range, and compared with the traditional cleaning method, the technology has the following advantages:
(1) When people carry out manual cleaning, dead angles for storing dirt such as gaps, deep holes and the like are always met, dirt in the dead angles is difficult to clean even if special cleaning tools are used in the dead angles, and the ultrasonic cleaning technology does not need to use special tools, and can thoroughly clean the articles without damaging the articles to be cleaned. (2) The traditional cleaning process mostly needs to use a detergent, and the ultrasonic cleaning technology does not need to use the detergent, so that not only is pollution to water avoided, but also the modern green development concept is met. (3) While the traditional cleaning process requires a great deal of manpower input, the ultrasonic cleaning technology utilizes the automatic cleaning of the machine, and has high working efficiency and low manpower cost.
The core of the ultrasonic technology is that the ultrasonic transducer is aimed at ultrasonic driving related to the operation of the ultrasonic transducer, and the ultrasonic driving is aimed at the ultrasonic driving without strict requirements on the power detection precision in the prior art, but with the continuous expansion of the application field of ultrasonic waves, the requirements on high output, high precision and high stability are provided for an ultrasonic system.
Disclosure of Invention
In order to solve the problems, the application provides the overcurrent protection system for the intelligent matrix type medical cleaning system equipment, which can realize the accurate control of power in the working process of the ultrasonic cleaning equipment and reduce the problems of damage to a main control system and inaccurate power control caused by the overcurrent on the overcurrent protection system of the intelligent matrix type medical cleaning system equipment.
In order to achieve the above purpose, the technical scheme adopted by the embodiment of the application is as follows:
in a first aspect, an intelligent matrix type medical cleaning system equipment overcurrent protection system is provided, which comprises a plurality of cleaning cavities arranged in an array, wherein each cleaning cavity is provided with an ultrasonic generator, each ultrasonic generator comprises an ultrasonic transducer, the ultrasonic transducer outputs ultrasonic waves with specific frequency through an ultrasonic power module, and the ultrasonic power module is connected with a power module; the ultrasonic power module comprises an FPGA, a power amplifying circuit and a sampling unit, wherein the sampling unit, the FPGA, the power amplifying circuit and the ultrasonic transducer form a loop; the FPGA generates an ultrasonic excitation signal, and the ultrasonic transducer is driven to generate ultrasonic waves with specific frequency after the ultrasonic excitation signal passes through the power amplification circuit; the sampling unit is used for sampling the current signal of the transducer and inputting the sampled signal to the FPGA; and an overcurrent protection circuit is respectively arranged between the sampling unit and the FPGA, and is used for determining whether current in the system is overcurrent or not and disconnecting an overcurrent signal.
Further, the overcurrent protection circuit comprises a sampling resistor and a field effect transistor which are connected in series with the sampling unit, and further comprises an operational amplifier which is connected with two ends of the sampling resistor in parallel, wherein the operational amplifier is connected with a comparator, the comparator is connected with the input end of the FPGA, the output end of the FPGA is connected with a level conversion circuit, and the level conversion circuit is connected with the field effect transistor and the power supply module.
Further, the comparator is a 4-way integrated comparator.
Further, the level conversion circuit is also connected with the power amplification circuit.
Further, the drain electrode of the field effect transistor is connected with the power supply module, the source electrode of the field effect transistor is connected with the sampling resistor, and the grid electrode of the field effect transistor is connected with the level conversion circuit.
Further, an A/D conversion circuit is arranged between the overcurrent protection circuit and the FPGA and used for converting the current signal into a digital signal.
Further, the level shift circuit comprises a first threshold transistor and a second threshold transistor, wherein the threshold voltage of the first threshold transistor is smaller than that of the second threshold transistor; the second threshold transistor is grounded, and the first threshold transistor is connected with the output end and the power amplifying circuit.
Further, the power amplification circuit comprises an inverter circuit and a driving circuit, wherein the input end of the driving circuit is connected with the output end of the first threshold transistor, and the output end of the driving circuit is connected with the output end of the inverter circuit.
Further, the inverter circuit comprises a first transistor, a second transistor, a third transistor and a fourth transistor, the first transistor, the second transistor, the third transistor and the fourth transistor are connected in parallel to form a full-bridge inverter circuit, the first transistor, the second transistor, the third transistor and the fourth transistor are arranged at any bridge arm in the circuit, and the triodes on every two diagonal bridge arms are in one group, and the two groups are alternately conducted.
Further, the driving circuit is a full-bridge driving circuit formed by full-bridge driving chips.
According to the technical scheme provided by the embodiment of the application, the overcurrent protection circuit and the power amplification circuit are configured for the ultrasonic transducer in the ultrasonic cleaning equipment, so that the overcurrent protection for the ultrasonic transducer in the ultrasonic cleaning process is realized, and meanwhile, the accurate control of the output power of the ultrasonic transducer is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
The methods, systems, and/or programs in the accompanying drawings will be described further in terms of exemplary embodiments. These exemplary embodiments will be described in detail with reference to the drawings. These exemplary embodiments are non-limiting exemplary embodiments, wherein the exemplary numbers represent like mechanisms throughout the various views of the drawings.
Fig. 1 is a schematic structural diagram of an overcurrent protection system of an intelligent matrix type medical cleaning system device according to an embodiment of the present application;
FIG. 2 is a block diagram of an overcurrent protection circuit according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a level shifter circuit according to an embodiment of the present application;
fig. 4 is a schematic diagram of an inverter circuit according to an embodiment of the present application;
fig. 5 is a schematic flow chart of an overcurrent protection method of an intelligent matrix type medical cleaning system device according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of an overcurrent protection electronic device according to an embodiment of the present application.
Detailed Description
In order to better understand the above technical solutions, the following detailed description of the technical solutions of the present application is made by using the accompanying drawings and specific embodiments, and it should be understood that the specific features of the embodiments and the embodiments of the present application are detailed descriptions of the technical solutions of the present application, and not limiting the technical solutions of the present application, and the technical features of the embodiments and the embodiments of the present application may be combined with each other without conflict.
In the following detailed description, numerous specific details are set forth by way of examples in order to provide a thorough understanding of the relevant teachings. It will be apparent, however, to one skilled in the art that the application can be practiced without these details. In other instances, well known methods, procedures, systems, components, and/or circuits have been described at a relatively high-level, without detail, in order to avoid unnecessarily obscuring aspects of the present application.
The present application uses a flowchart to illustrate the execution of a system according to an embodiment of the present application. It should be clearly understood that the execution of the flowcharts may be performed out of order. Rather, these implementations may be performed in reverse order or concurrently. Additionally, at least one other execution may be added to the flowchart. One or more of the executions may be deleted from the flowchart.
Before describing embodiments of the present application in further detail, the terms and terminology involved in the embodiments of the present application will be described, and the terms and terminology involved in the embodiments of the present application will be used in the following explanation.
(1) In response to a condition or state that is used to represent the condition or state upon which the performed operation depends, the performed operation or operations may be in real-time or with a set delay when the condition or state upon which it depends is satisfied; without being specifically described, there is no limitation in the execution sequence of the plurality of operations performed.
(2) Based on the conditions or states that are used to represent the operations that are being performed, one or more of the operations that are being performed may be in real-time or with a set delay when the conditions or states that are being relied upon are satisfied; without being specifically described, there is no limitation in the execution sequence of the plurality of operations performed.
Ultrasonic technology is a general technology based on the subjects of acoustics, materials, machinery and the like and widely applied in various industries. In national economy, the method has special potential for reducing production cost, ensuring production safety, improving production efficiency and the like, and is widely focused by domestic and foreign experts and scholars. In the current society, the rapid development of ultrasonic technology brings new opportunities to traditional industries such as chemical industry, machinery, metallurgy and the like, and plays an important role in industrial application. Ultrasonic technology can be divided into two categories according to the range of ultrasonic vibration radiation: detection ultrasonic technology and power ultrasonic technology.
The power ultrasonic wave is a technology for changing physiological, chemical and biological characteristics of the inside of an object to be treated by utilizing high-frequency vibration of the ultrasonic wave, and has the greatest characteristic of stronger cavitation. Cavitation refers to the continuous explosion of bubbles generated by liquid under high-intensity vibration, and the energy in the bubbles is released at the moment of expansion explosion, so that strong shock waves are generated, and heat above 5000K and thousands of atmospheric pressure are generated.
The generation of power ultrasonic waves is based on an ultrasonic transducer, which generally comprises an electric energy storage element and a mechanical system, and the working principle is as follows: when the ultrasonic transducer is in a receiving state, external sound waves cause the mechanical system to vibrate, and the magnetic field or the electric field in the energy storage element is changed, so that the ultrasonic transducer generates corresponding output voltage and output current; when the energy storage element is in the transmitting state, the driving signal can change the magnetic field or the electric field in the energy storage element, so that the mechanical system enters a vibration state and emits sound wave energy to the outside. The ultrasonic transducer is widely applied to the fields of industry, medicine, biology and the like due to the excellent characteristics, and has great market prospect. The ultrasonic flaw detection device can be used in the fields of ultrasonic flaw detection, ultrasonic cleaning, underwater positioning, communication and the like; in the medical field, the method can be used for acoustic imaging, extracorporeal lithotripsy, physiotherapy and the like; in the biological field, can be used for shearing macromolecules, bioengineering, seed treatment and the like. At present, ultrasonic cleaning, ultrasonic welding, ultrasonic motors and ultrasonic treatment are more mature fields in ultrasonic transducer application, and in the embodiment of the application, the ultrasonic transducer is mainly applied to the field of medical cleaning and is used for cleaning medical equipment.
The action mechanism of the ultrasonic cleaning technology is cavitation, a high-frequency vibration transducer acts on liquid to generate a large number of bubbles which are continuously expanded until explosion under the action of ultrasonic waves, and the impact waves generated at the moment of explosion continuously impact dirt on the surface of a workpiece in the liquid, so that the purpose of decontamination is achieved.
The ultrasonic cleaning can achieve the aim of cleaning as long as bubbles can enter the space of the object to be cleaned through cavitation, so that the ultrasonic cleaning device has a very wide application range, and compared with the traditional cleaning method, the ultrasonic cleaning device has the following advantages:
(1) When people carry out manual cleaning, dead angles for storing dirt such as gaps, deep holes and the like are always met, dirt in the dead angles is difficult to clean even if special cleaning tools are used in the dead angles, and the ultrasonic cleaning technology does not need to use special tools, and can thoroughly clean the articles without damaging the articles to be cleaned.
(2) The traditional cleaning process mostly needs to use a detergent, and the ultrasonic cleaning technology does not need to use the detergent, so that not only is pollution to water avoided, but also the modern green development concept is met.
(3) While the traditional cleaning process requires a great deal of manpower input, the ultrasonic cleaning technology utilizes the automatic cleaning of the machine, and has high working efficiency and low manpower cost.
When the ultrasonic technology is applied to the industrial field, the power detection precision is not strictly required, but along with the continuous expansion of the ultrasonic application field, the requirements of high output, high precision and high stability are provided for an ultrasonic system. In the prior art, with the development of semiconductor technology, an integrated circuit chip is mainly adopted as a driving device for driving and controlling an ultrasonic transducer. Generally, in the prior art, an integrated circuit chip is an FPGA chip, in order to ensure protection of a cleaning system and the FPGA chip and control accuracy of the FPGA chip in a use process, an embodiment of the present application provides an intelligent matrix type medical cleaning system device overcurrent protection system using the FPGA chip as a driving chip, so as to realize accurate control of system output power and realization of system operation stability.
Referring to fig. 1, an embodiment of the application provides an overcurrent protection system of intelligent matrix medical cleaning system equipment, which is mainly applied to cleaning of medical instruments and comprises a plurality of cleaning cavities arranged in an array, and an ultrasonic generator is arranged in each cleaning cavity.
In the embodiment of the application, the ultrasonic transducer outputs ultrasonic waves with specific frequency through the ultrasonic power module, wherein the ultrasonic frequency module is connected with the power module, and the power module is used for supplying power to the ultrasonic frequency module.
The ultrasonic power module is a main ultrasonic control and generation module and comprises an FPGA, a power amplifying circuit and a sampling unit. In the embodiment of the application, a sampling unit, the FPGA, the power amplifying circuit and the ultrasonic transducer form a loop; the FPGA generates an ultrasonic excitation signal, and the ultrasonic transducer is driven to generate ultrasonic waves with specific frequency after the ultrasonic excitation signal passes through the power amplification circuit; the sampling unit is used for sampling the current signal of the transducer and inputting the sampled signal to the FPGA; and an overcurrent protection circuit is respectively arranged between the sampling unit and the FPGA, and is used for determining whether current in the system is overcurrent or not and disconnecting an overcurrent signal.
Specifically, referring to fig. 2, the overcurrent protection circuit in the embodiment of the application includes a sampling resistor and a field effect transistor connected in series with the sampling unit, and further includes an operational amplifier connected in parallel with two ends of the sampling resistor, where the operational amplifier is connected with a comparator, the comparator is connected with the input end of the FPGA, and the output end of the FPGA is connected with a level conversion circuit, and the level conversion circuit is connected with the field effect transistor and the power module.
Specifically, in the embodiment of the present application, a drain electrode of the field effect transistor is connected to the power module, a source electrode of the field effect transistor is connected to the sampling resistor, and a gate electrode of the field effect transistor is connected to the level conversion circuit.
In the embodiment of the application, the overcurrent protection circuit compares the voltage in the sampled current signal processed by the sampling resistor based on the set reference voltage in the comparator according to the instruction of the upper computer by acquiring the sampled current signal in the current sampling circuit and through the FPGA to determine whether overcurrent is generated or not. Specifically, in the embodiment of the application, the FPGA sends out an enable/close signal according to the instruction of the upper computer, and receives the output of the comparator to obtain the overcurrent state. Level conversion circuit: and converting the interface voltage of the FPGA into the driving voltage of the field effect transistor. A field effect transistor: is responsible for switching on and off the power module circuit. Sampling resistance: for converting the output current of the power supply module into a voltage, in the embodiment of the application, a high-precision resistor of 0.075 Ω is adopted for the sampling resistor, and specifically, a current of 1A is taken as an example, and then the voltage on the resistor is 0.075V. An operational amplifier: the voltage on the sampling resistor is amplified by 20 times, and when the current is normally 1A, the amplified voltage is 1.5V.
In the embodiment of the application, the comparator is a 4-way integrated comparator, wherein four input reference voltages are provided for the 4-way integrated comparator, and the four input reference voltages respectively correspond to different currents. The four input reference voltages are respectively 1.2V,4.5V,7.5V and 12V, wherein the four reference voltages respectively correspond to 0.8 times of current, 3 times of current, 5 times of current and 8 times of current. When the input voltage is greater than the values, the corresponding output in 4 output ports of the comparator is changed from high to low, and the corresponding multiple overcurrent is indicated to the FPGA; wherein the purpose of the sampling of 0.8 times is to monitor whether the power is currently supplied or not, and not to monitor overcurrent.
The flow-through strategy for FPGA is: the FPGA collects 4 paths of output of the comparator with the period of 5 mu s, judges whether heat on the current switch is accumulated, dissipated or balanced according to different states, immediately performs turn-off protection if the accumulated heat is greater than turn-off heat, and continues to perform heat accumulation calculation if the accumulated heat is less than turn-off heat. According to the output of the comparator, the following can be classified as follows:
(1) When the switching power supply of the power supply module is turned off, the output of the comparator 4 paths is high, the FPGA considers that the power supply is not turned on and overcurrent does not occur, the accumulated heat on the switch is considered to be dissipating, and if the heat value is 0 after the heat consumption value is reduced once, the accumulated heat is kept to be 0.
(2) When the power module switching power supply is turned on and works normally, the current of 0.8 times is indicated to be low, the FPGA considers that the power supply is turned on at the moment, the current is not over-current, heat dissipation and accumulation are balanced at the moment, and the total heat is neither increased nor reduced.
(3) When the switching power supply of the power supply module is turned on and 3 times of overcurrent occurs, the 3 times of current is indicated to be low, the 0.8 times of current is indicated to be low, the FPGA considers that 3 times of overcurrent occurs at the moment, the heat value generated by 3 times of overcurrent is accumulated once every 5 mu s, and if the heat value is accumulated to the maximum value, the heat value is kept to be the maximum value; when the heat is added to the maximum value, the FPGA actively turns off the switching power supply of the power supply module.
(4) When the switching power supply of the power supply module is turned on and 5 times of overcurrent occurs, the 5, 3 and 0.8 times of current is indicated to be low, the FPGA considers that 5 times of overcurrent occurs at the moment, the heat value generated by 5 times of overcurrent is accumulated once every 5 mu s, and if the heat value is accumulated to the maximum value, the heat value is kept to be the maximum value; when the heat is added to the maximum value, the FPGA actively turns off the switching power supply of the power supply module.
(5) When the power supply module switch power supply is turned on and 8 times of overcurrent occurs, the 8, 5, 3 and 0.8 times of current is indicated to be low, the FPGA considers that the 8 times of overcurrent occurs at the moment, the heat value generated by the 8 times of overcurrent is accumulated every 5 mu s, and if the heat value is accumulated to the maximum value, the heat value is kept to be the maximum value; when the heat is added to the maximum value, the FPGA actively turns off the switching power supply of the power supply module.
The current protection circuit provided by the embodiment of the application can realize the control of overcurrent and improve the stability of system operation.
In the embodiment of the application, an A/D conversion circuit is arranged between the overcurrent protection circuit and the FPGA, and the current signal is converted into a digital signal through the A/D conversion circuit. Specifically, an ADS7883 chip is used for the a/D conversion circuit, and because the ADS7883 chip is an existing commercially available chip, the specific structure of the chip and the working process thereof are not described in detail in the embodiments of the present application.
The level conversion circuit in the embodiment of the application is further connected with the power amplifier, wherein referring to fig. 3 for the structure of the level conversion circuit, the level conversion circuit comprises a first threshold transistor and a second threshold transistor, and the threshold voltage of the first threshold transistor is smaller than that of the second threshold transistor; the second threshold transistor is grounded, and the first threshold transistor is connected with the output end and the power amplifying circuit. In particular, the method comprises the steps of,wherein N1 is for the first threshold transistor and N2 is for the second threshold transistor. Data interaction between the two voltage domains can be achieved when the input voltage is higher than the threshold voltage of the N1 or N2 pipe. When the input signal changes from a logic low level to a logic high level, the N2 pipe is opened, the N1 pipe is closed, and the node B is pulled down to GND through a path from the N2 pipe to the ground. When the voltage at node B is low to (V ccout -V THP ) In the following, wherein V is aimed at ccout For level-shifting the supply voltage at the output, V THP Is the threshold voltage of the diode; p1 is closed and opened to pull the node A high, and the P2 pipe is closed; when the input signal changes from logic high level to logic low level, the N1 pipe is opened, the N2 pipe is closed, the point A is pulled down to GND, the P2 pipe is opened, a high level signal is output, and the amplitude is close to V ccout 。
The embodiment of the application realizes the conversion of the high voltage of the FPGA into the low voltage suitable for the input of the power amplifier through the level conversion circuit.
The power amplifier according to the embodiment of the application comprises an inverter circuit and a driving circuit, wherein the input end of the driving circuit is connected with the output end of the first threshold transistor, namely, the voltage after being leveled is input into the driving circuit, and the output end of the driving circuit is connected with the output end of the inverter circuit. In an embodiment of the present application, the driving circuit provides the driving voltage for the inverter circuit.
Referring to fig. 4, the inverter circuit includes a first transistor Q1, a second transistor Q2, a third transistor Q3, and a fourth transistor Q4, where the first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 are connected in parallel to form a full-bridge inverter circuit, and the first transistor, the second transistor, the third transistor, and the fourth transistor are disposed at any bridge arm of the circuit, and the transistors on every two diagonal bridge arms are in a group, and the two groups are alternately turned on. MOSFETs are employed for Q1, Q2, Q3 and Q4 in embodiments of the present application.
In the embodiment of the application, in order to ensure the stability of the inverter circuit, a UCC21520 integrated driving chip is adopted as a full-bridge driving chip of the MOSFET aiming at the driving circuit. The chip has the advantages of complete electromagnetic isolator and optical coupler isolation circuit, high speed and small volume, and two paths of mutually independent high-end and low-end input channels are arranged in the chip, so that two bridge arms can be driven simultaneously.
In the embodiment of the application, the power amplification circuit adopts the isolated driving chip UCC21520 to design a full-bridge driving circuit, and meanwhile, the driving transformer is used for carrying out impedance matching and signal isolation, so that the power amplification module circuit has the advantages of small volume and high efficiency.
On the other hand, the driving signal is generated by the FPGA, so that the power amplification module can drive the ultrasonic transducer with 40 kHz-1 MHz to normally work, and the power amplification module has stronger universality.
Aiming at the overcurrent protection system of the intelligent matrix type medical cleaning system equipment, which is provided by the embodiment of the application, the control of the ultrasonic transducer, the identification of the overcurrent state and the switching-on and switching-off control of the circuit under the overcurrent condition are realized by arranging the circuit module.
The embodiment of the application also provides an overcurrent control method which is applied to the FPGA and comprises the following steps of:
and S510, collecting the multipath output of the comparator based on unit collection time to obtain an overcurrent state.
And S520, judging the heat state of the power module switch based on the overcurrent state, and performing turn-off protection according to the heat state.
In the embodiment of the application, the unit acquisition time is 5 mu s. The thermal states include an accumulation state, a dissipation state, and an equilibrium state.
Specifically, when the accumulated heat is greater than the shutdown heat, the shutdown protection is performed; if the calculated heat quantity is smaller than the shut-off heat quantity, the heat quantity accumulation calculation is continued.
Specifically, the acquisition of the overcurrent state is based on comparing the acquired multiple output voltages with the reference voltages in the corresponding comparators, and the overcurrent state is obtained when the multiple output voltages are greater than the reference voltages. The 4-way integrated comparator in the embodiment of the application has four input reference voltages, wherein the four input reference voltages respectively correspond to different currents. The four input reference voltages are respectively 1.2V,4.5V,7.5V and 12V, wherein the four reference voltages respectively correspond to 0.8 times of current, 3 times of current, 5 times of current and 8 times of current. When the input voltage is greater than these values, the corresponding output of the 4 output ports of the comparator will change from high to low, indicating to the FPGA that an overcurrent of a corresponding multiple has occurred.
Whereas the acquisition for the thermal state is determined based on the following:
(1) When the switching power supply of the power supply module is turned off, the output of the comparator 4 paths is high, the FPGA considers that the power supply is not turned on and overcurrent does not occur, the accumulated heat on the switch is considered to be dissipating, and if the heat value is 0 after the heat consumption value is reduced once, the accumulated heat is kept to be 0.
(2) When the power module switching power supply is turned on and works normally, the current of 0.8 times is indicated to be low, the FPGA considers that the power supply is turned on at the moment, the current is not over-current, heat dissipation and accumulation are balanced at the moment, and the total heat is neither increased nor reduced.
(3) When the switching power supply of the power supply module is turned on and 3 times of overcurrent occurs, the 3 times of current is indicated to be low, the 0.8 times of current is indicated to be low, the FPGA considers that 3 times of overcurrent occurs at the moment, the heat value generated by 3 times of overcurrent is accumulated once every 5 mu s, and if the heat value is accumulated to the maximum value, the heat value is kept to be the maximum value; when the heat is added to the maximum value, the FPGA actively turns off the switching power supply of the power supply module.
(4) When the switching power supply of the power supply module is turned on and 5 times of overcurrent occurs, the 5, 3 and 0.8 times of current is indicated to be low, the FPGA considers that 5 times of overcurrent occurs at the moment, the heat value generated by 5 times of overcurrent is accumulated once every 5 mu s, and if the heat value is accumulated to the maximum value, the heat value is kept to be the maximum value; when the heat is added to the maximum value, the FPGA actively turns off the switching power supply of the power supply module.
(5) When the power supply module switch power supply is turned on and 8 times of overcurrent occurs, the 8, 5, 3 and 0.8 times of current is indicated to be low, the FPGA considers that the 8 times of overcurrent occurs at the moment, the heat value generated by the 8 times of overcurrent is accumulated every 5 mu s, and if the heat value is accumulated to the maximum value, the heat value is kept to be the maximum value; when the heat is added to the maximum value, the FPGA actively turns off the switching power supply of the power supply module.
In another embodiment, the implementation main structure for implementing the method about the overcurrent control may be other electronic devices, and may include one or more processors 601 and a memory 602, where the memory 602 may store one or more storage applications or data. Wherein the memory 602 may be transient storage or persistent storage. The application program stored in the memory 602 may include one or more modules (not shown), each of which may include a series of computer executable instructions in the alert schedule management apparatus. Still further, the processor 601 may be arranged to communicate with the memory 602, and execute a series of computer executable instructions in the memory 602 on the flow control device.
In one particular embodiment, an over-current control device includes a memory, and one or more programs, wherein the one or more programs are stored in the memory, and the one or more programs may include one or more modules, and each module may include a series of computer-executable instructions in a photovoltaic power prediction device, and configured to be executed by one or more processors, the one or more programs comprising computer-executable instructions for:
collecting multipath output of the comparator based on unit collection time to obtain an overcurrent state;
and judging the heat state of the power module switch based on the overcurrent state, and performing turn-off protection according to the heat state.
The following describes each component of the processor in detail:
wherein in this embodiment the processor is a specific integrated circuit (application specific integrated circuit, ASIC), or one or more integrated circuits configured to implement embodiments of the present application, such as: one or more microprocessors (digital signal processor, DSP).
Alternatively, the processor may perform various functions, such as performing the method shown in fig. 5 described above, by running or executing a software program stored in memory, and invoking data stored in memory.
In a particular implementation, the processor may include one or more microprocessors, as one embodiment.
The memory is configured to store a software program for executing the scheme of the present application, and the processor is used to control the execution of the software program, and the specific implementation manner may refer to the above method embodiment, which is not described herein again.
Alternatively, the memory may be read-only memory (ROM) or other type of static storage device that can store static information and instructions, random access memory (random access memory, RAM) or other type of dynamic storage device that can store information and instructions, but may also be, without limitation, electrically erasable programmable read-only memory (electrically erasable programmable read-only memory, EEPROM), compact disc read-only memory (compact disc read-only memory) or other optical disk storage, optical disk storage (including compact disc, laser disc, optical disc, digital versatile disc, blu-ray disc, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and that can be accessed by a computer. The memory may be integrated with the processor or may exist separately and be coupled to the processing unit through an interface circuit of the processor, which is not particularly limited by the embodiment of the present application.
It should be noted that the structure of the processor shown in this embodiment is not limited to the apparatus, and an actual apparatus may include more or less components than those shown in the drawings, or may combine some components, or may be different in arrangement of components.
In addition, the technical effects of the processor may refer to the technical effects of the method described in the foregoing method embodiments, which are not described herein.
It should be appreciated that the processor in embodiments of the application may be other general purpose processors, digital signal processors (digital signal processor, DSP), application specific integrated circuits (application specific integrated circuit, ASIC) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
It should also be appreciated that the memory in embodiments of the present application may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The nonvolatile memory may be a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an electrically Erasable EPROM (EEPROM), or a flash memory. The volatile memory may be random access memory (random access memory, RAM) which acts as an external cache. By way of example but not limitation, many forms of random access memory (random access memory, RAM) are available, such as Static RAM (SRAM), dynamic Random Access Memory (DRAM), synchronous Dynamic Random Access Memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced Synchronous Dynamic Random Access Memory (ESDRAM), synchronous Link DRAM (SLDRAM), and direct memory bus RAM (DR RAM).
The above embodiments may be implemented in whole or in part by software, hardware (e.g., circuitry), firmware, or any other combination. When implemented in software, the above-described embodiments may be implemented in whole or in part in the form of a computer program product. The computer program product comprises one or more computer instructions or computer programs. When the computer instructions or computer program are loaded or executed on a computer, the processes or functions described in accordance with embodiments of the present application are produced in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website site, computer, server, or data center to another website site, computer, server, or data center by wired (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains one or more sets of available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. The semiconductor medium may be a solid state disk.
In the present application, "at least one" means one or more, and "a plurality" means two or more. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b, or c may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or plural.
It should be understood that, in various embodiments of the present application, the sequence numbers of the foregoing processes do not mean the order of execution, and the order of execution of the processes should be determined by the functions and internal logic thereof, and should not constitute any limitation on the implementation process of the embodiments of the present application.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the several embodiments provided by the present application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a read-only memory (ROM), a random access memory (random access memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. The overcurrent protection system of the intelligent matrix type medical cleaning system equipment comprises a plurality of cleaning cavities which are arranged in an array, wherein each cleaning cavity is provided with an ultrasonic generator; the ultrasonic power module comprises an FPGA, a power amplifying circuit and a sampling unit, wherein the sampling unit, the FPGA, the power amplifying circuit and the ultrasonic transducer form a loop; the FPGA generates an ultrasonic excitation signal, and the ultrasonic transducer is driven to generate ultrasonic waves with specific frequency after the ultrasonic excitation signal passes through the power amplification circuit; the sampling unit is used for sampling the current signal of the ultrasonic transducer and inputting the sampled signal to the FPGA; and an overcurrent protection circuit is respectively arranged between the sampling unit and the FPGA, and is used for determining whether current in the system is overcurrent or not and disconnecting an overcurrent signal.
2. The intelligent matrix type medical cleaning system equipment overcurrent protection system according to claim 1, wherein the overcurrent protection circuit comprises a sampling resistor and a field effect tube which are connected in series with the sampling unit, and further comprises an operational amplifier which is connected with two ends of the sampling resistor in parallel, wherein the operational amplifier is connected with a comparator, the comparator is connected with the input end of the FPGA, the output end of the FPGA is connected with a level conversion circuit, and the level conversion circuit is connected with the field effect tube and the power supply module.
3. The intelligent matrix medical cleaning system device over-current protection system of claim 2, wherein the comparator is a 4-way integrated comparator.
4. The intelligent matrix medical cleaning system apparatus overcurrent protection system of claim 2, wherein the level shifting circuit is further coupled to the power amplifying circuit.
5. The intelligent matrix type medical cleaning system device overcurrent protection system according to claim 2, wherein a drain electrode of the field effect tube is connected with the power supply module, a source electrode of the field effect tube is connected with the sampling resistor, and a grid electrode of the field effect tube is connected with the level conversion circuit.
6. The intelligent matrix type medical cleaning system equipment overcurrent protection system according to claim 2, wherein an A/D conversion circuit is arranged between the overcurrent protection circuit and the FPGA and used for converting current signals into digital signals.
7. The intelligent matrix medical cleaning system device over-current protection system of claim 2, wherein the level shifting circuit comprises a first threshold transistor and a second threshold transistor, the threshold voltage of the first threshold transistor being less than the threshold voltage of the second threshold transistor; the second threshold transistor is grounded, and the first threshold transistor is connected with the output end and the power amplifying circuit.
8. The intelligent matrix type medical cleaning system equipment overcurrent protection system according to claim 7, wherein the power amplification circuit comprises an inverter circuit and a driving circuit, the input end of the driving circuit is connected with the output end of the first threshold transistor, and the output end of the driving circuit is connected with the output end of the inverter circuit.
9. The intelligent matrix type medical cleaning system equipment overcurrent protection system according to claim 8, wherein the inverter circuit comprises a first transistor, a second transistor, a third transistor and a fourth transistor, the first transistor, the second transistor, the third transistor and the fourth transistor are connected in parallel to form a full-bridge inverter circuit, the first transistor, the second transistor, the third transistor and the fourth transistor are arranged at any bridge arm of the circuit, the transistors on every two diagonal bridge arms are in one group, and the two groups are alternately conducted.
10. The intelligent matrix type medical cleaning system equipment overcurrent protection system according to claim 8, wherein the driving circuit is a full-bridge driving circuit formed by full-bridge driving chips.
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