CN116662233B - Write transmission method and device of AHB interface equipment, electronic equipment and readable storage medium - Google Patents
Write transmission method and device of AHB interface equipment, electronic equipment and readable storage medium Download PDFInfo
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- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
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- G06F13/4027—Coupling between buses using bus bridges
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
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Abstract
The embodiment of the invention provides an AHB interface device write transmission method and device, electronic equipment and a computer readable storage medium. The method comprises the following steps: based on AHB interface, the master device sends write operation command to the monitoring module through write command channel of AHB to AXI protocol bridge; based on the monitoring module, sending the write operation command to a downstream response module, and analyzing and processing the write operation command through the monitoring module to obtain first key information; writing the first key information into a preset writing command information recording queue based on the monitoring module; and under the condition that the downstream response module receives the write operation command and the corresponding write operation data, feeding back write operation completion information to the AHB interface main equipment through a write response channel of the AHB-to-AXI protocol bridge based on the monitoring module. According to the scheme provided by the embodiment of the invention, the data writing transmission performance can be improved, and the delay is reduced.
Description
Technical Field
The present invention relates to the field of data transmission technologies, and in particular, to a write transmission method and apparatus for an AHB interface device, an electronic device, and a computer readable storage medium.
Background
In a System On Chip (SOC) Chip that uses an Advanced High-performance Bus (AXI) Bus as a backbone Bus network, there is also often a host device of an Advanced High-performance Bus (AHB) interface protocol; in the design of the SOC chip, an AHB interface main device needs to be accessed into an AXI bus after being converted from an AHB protocol to an AXI protocol. However, the delay in initiating an access from the AHB interface to the slave via the bus and finally returning a response from the slave may be relatively large. Unlike the latter AXI protocol in the advanced microcontroller bus architecture (Advanced Microcontroller Bus Architecture, AMBA) bus standard, AHB is an AMBA early bus standard that does not have the ability to transfer in a suspended (outtiming) manner, resulting in delays that have a significant impact on the data transfer throughput.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems existing in the prior art.
Therefore, the invention provides a write transmission method of AHB interface equipment, which can improve the data write transmission performance and reduce delay.
The invention also provides a device applying the AHB interface device write transmission method.
The invention also provides an electronic device applying the AHB interface device write transmission method.
The invention also provides a computer readable storage medium applying the AHB interface device write transmission method.
The write transmission method of the AHB interface device according to the embodiment of the first aspect of the invention is applied to a data transmission system, wherein the data transmission system comprises an AHB interface main device, an AHB-to-AXI protocol bridge, a monitoring module and a downstream response module, and the method comprises the following steps:
based on the AHB interface main equipment, sending a write operation command to the monitoring module through a write command channel of the AHB-to-AXI protocol bridge;
based on the monitoring module, sending the write operation command to the downstream response module, and analyzing and processing the write operation command through the monitoring module to obtain first key information;
writing the first key information into a preset writing command information record queue based on the monitoring module;
and under the condition that the downstream response module receives the write operation command and corresponding write operation data, feeding back write operation completion information to the AHB interface main equipment through a write response channel of the AHB-to-AXI protocol bridge based on the monitoring module.
According to some embodiments of the present invention, after the monitoring module feeds back write operation completion information to the AHB interface master device through a write response channel of the AHB-to-AXI protocol bridge, the method further includes:
and receiving write operation response information fed back by the downstream response module through the monitoring module, and performing data response processing according to the write operation response information.
According to some embodiments of the invention, the data response processing according to the write operation response information includes:
under the condition that write operation response information fed back by the downstream response module is received, deleting the first key information corresponding to the write operation command from the write command information record queue based on the monitoring module;
and generating interrupt request information based on the monitoring module and forwarding the interrupt request information to a preset central processing unit under the condition that the received write operation response information is of an error type.
According to some embodiments of the present invention, after the monitoring module feeds back write operation completion information to the AHB interface master device through a write response channel of the AHB-to-AXI protocol bridge, the method further includes:
based on the AHB interface main equipment, sending a read operation command to the monitoring module through a read command channel of the AHB-to-AXI protocol bridge;
analyzing and processing the read operation command based on the monitoring module to obtain second key information;
comparing the second key information with the storage information in the write command information record queue to obtain a comparison result;
and controlling the read operation command through the monitoring module according to the comparison result.
According to some embodiments of the invention, the second key information includes first access address information, the storage information includes second access address information, and the comparing the second key information with the storage information in the write command information record queue includes:
and comparing the first access address information with the second access address information of the storage information.
According to some embodiments of the invention, the controlling the read operation command by the monitoring module according to the comparison result includes:
under the condition that the second access address information which is the same as the first access address information exists in the storage information, the monitoring module blocks the read operation command from being sent to the downstream response module until the monitoring module receives the write operation response information fed back by the downstream response module;
and when the second access address information which is the same as the first access address information does not exist in the storage information, sending the read operation command to the downstream response module through the monitoring module.
According to some embodiments of the invention, the downstream response module includes an AXI interface slave device and an AXI transmission module, the receiving, by the monitoring module, write operation response information fed back by the downstream response module includes:
transmitting the write operation response information fed back by the AXI interface slave device to the monitoring module through the AXI bus under the condition that the AXI transmission module is an AXI bus;
and transmitting the write operation response information fed back by the AXI interface slave device to the monitoring module through the AXI asynchronous bridge under the condition that the AXI transmission module is an AXI asynchronous bridge.
According to a second aspect of the present invention, an apparatus for writing and transmitting an AHB interface device is applied to a data transmission system, where the data transmission system includes an AHB interface master device, an AHB to AXI protocol bridge, a monitoring module, and a downstream response module, and the apparatus includes:
the first processing module is used for sending a write operation command to the monitoring module through a write command channel of the AHB-to-AXI protocol bridge based on the AHB interface main equipment;
the second processing module is used for sending the write operation command to the downstream response module based on the monitoring module and analyzing and processing the write operation command through the monitoring module to obtain first key information;
the third processing module is used for writing the first key information into a preset writing command information record queue based on the monitoring module;
and the fourth processing module is used for feeding back write operation completion information to the AHB interface main equipment through a write response channel of the AHB-to-AXI protocol bridge based on the monitoring module under the condition that the downstream response module receives the write operation command and the corresponding write operation data.
An electronic device according to an embodiment of a third aspect of the present invention includes: memory, a processor and a computer program stored on the memory and executable on the processor, which when executed implements an AHB interface apparatus write transfer method as described above.
A computer-readable storage medium according to an embodiment of the fourth aspect of the present invention stores computer-executable instructions that, when executed by a control processor, implement an AHB interface apparatus write transfer method as described above.
The write transmission method of the AHB interface equipment at least has the following beneficial effects: in the process of write transmission of the AHB interface equipment, firstly, based on the AHB interface main equipment, a write operation command is sent to a monitoring module through a write command channel of an AHB-to-AXI protocol bridge; then, based on the monitoring module, sending the write operation command to a downstream response module, and analyzing and processing the write operation command through the monitoring module, so as to obtain first key information; then, based on the monitoring module, writing the first key information into a preset writing command information record queue; and under the condition that the downstream response module receives the write operation command and corresponding write operation data, feeding back write operation completion information to the AHB interface main equipment through a write response channel of the AHB-to-AXI protocol bridge based on the monitoring module. Through the technical scheme, the data writing transmission performance can be improved, the delay is reduced, and the data transmission throughput capacity is improved.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings are included to provide a further understanding of the disclosed embodiments and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain, without limitation, the disclosed embodiments.
FIG. 1 is a flow chart of an AHB interface device write transfer method provided by an embodiment of the present invention;
FIG. 2 is a schematic diagram of a SOC chip bus configuration according to one embodiment of the present invention;
FIG. 3 is a schematic diagram of a wait-free AHB write transfer waveform according to one embodiment of the present invention;
FIG. 4 is a schematic diagram of an AHB write transmission waveform with wait states according to one embodiment of the present invention;
FIG. 5 is a schematic diagram of a hardware circuit configuration according to an embodiment of the present invention;
FIG. 6 is a flow chart of an AHB interface device write transfer method provided by another embodiment of the present invention;
FIG. 7 is a specific flowchart of S500 provided by one embodiment of the present invention;
FIG. 8 is a flow chart of an AHB interface device write transfer method provided by another embodiment of the present invention;
FIG. 9 is a specific flowchart of S630 provided by one embodiment of the present invention;
FIG. 10 is a specific flowchart of S640 provided by one embodiment of the present invention;
FIG. 11 is a flowchart showing an embodiment of S500 according to the present invention;
FIG. 12 is a schematic diagram of an AHB interface device write transfer apparatus according to an embodiment of the present invention;
fig. 13 is a schematic view of the configuration of an electronic device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
In the description of the present invention, a number means one or more, a number means two or more, and greater than, less than, exceeding, etc. are understood to not include the present number, and above, below, within, etc. are understood to include the present number. The description of the first and second is for the purpose of distinguishing between technical features only and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless explicitly defined otherwise, terms such as arrangement, installation, connection, etc. should be construed broadly and the specific meaning of the terms in the present invention can be reasonably determined by a person skilled in the art in combination with the specific contents of the technical scheme.
The invention provides a write transmission method and device of AHB interface equipment, electronic equipment and a computer readable storage medium, wherein the method comprises the following steps: in the process of write transmission of the AHB interface equipment, firstly, based on the AHB interface main equipment, a write operation command is sent to a monitoring module through a write command channel of an AHB-to-AXI protocol bridge; then, based on the monitoring module, sending the write operation command to a downstream response module, and analyzing and processing the write operation command through the monitoring module, so as to obtain first key information; then, based on the monitoring module, writing the first key information into a preset writing command information record queue; and under the condition that the downstream response module receives the write operation command and corresponding write operation data, feeding back write operation completion information to the AHB interface main equipment through a write response channel of the AHB-to-AXI protocol bridge based on the monitoring module. Through the technical scheme, the data writing transmission performance can be improved, the delay is reduced, and the data transmission throughput capacity is improved.
Embodiments of the present invention will be further described below with reference to the accompanying drawings.
As shown in fig. 1, fig. 1 is a flowchart of an AHB interface apparatus write transmission method according to an embodiment of the present invention. The method is applied to a data transmission system, wherein the data transmission system comprises an AHB interface main device, an AHB-to-AXI protocol bridge, a monitoring module and a downstream response module, and the method comprises the following steps of, but is not limited to, step S100, step S200, step S300 and step S400:
step S100, based on AHB interface main equipment, sending a write operation command to a monitoring module through a write command channel of an AHB-to-AXI protocol bridge;
step S200, a write operation command is sent to a downstream response module based on a monitoring module, and the write operation command is analyzed and processed through the monitoring module to obtain first key information;
step S300, writing first key information into a preset writing command information record queue based on a monitoring module;
step S400, under the condition that the downstream response module receives the write operation command and the corresponding write operation data, the write operation completion information is fed back to the AHB interface main equipment through a write response channel of the AHB-to-AXI protocol bridge based on the monitoring module.
In the process of writing and transmitting the AHB interface equipment, firstly, based on the AHB interface main equipment, a write operation command is sent to a monitoring module through a write command channel of an AHB-to-AXI protocol bridge; then, based on the monitoring module, sending the write operation command to a downstream response module, and analyzing and processing the write operation command through the monitoring module, so as to obtain first key information; then, based on the monitoring module, writing the first key information into a preset writing command information record queue; and under the condition that the downstream response module receives the write operation command and corresponding write operation data, feeding back write operation completion information to the AHB interface main equipment through a write response channel of the AHB-to-AXI protocol bridge based on the monitoring module. Through the technical scheme, the data writing transmission performance can be improved, the delay is reduced, and the data transmission throughput capacity is improved. In some embodiments of the present application, the feedback of the write operation completion information to the AHB master is a pull-up HREADY signal, which characterizes the completion of the entire write transfer operation.
It should be noted that, as shown in fig. 2, in the SOC chip design, the AHB interface master needs to go through the AHB to AXI protocol before being connected to the AXI bus. However, the delay in initiating an access from the AHB interface to the slave via the bus and finally returning the response may be significant, as may the delay imposed by the bus itself, as well as the large delay that may occur within some slaves, such as a DDR controller; unlike the latter AXI protocol in AMBA bus standard, AHB, which is an AMBA early bus standard, does not have the capability of multi-command suspended mode transmission itself, resulting in a delay that has a very large impact on data transmission throughput capability. According to the embodiment of the invention, the monitoring module is added, and under the condition that the downstream response module receives the write operation command and the corresponding write operation data, the write operation completion information is fed back to the AHB interface main equipment through the write response channel of the AHB-to-AXI protocol bridge based on the monitoring module, namely the pull-up HREADY signal, so that the write transmission performance of the AHB interface is improved.
It is noted that, as shown in fig. 3, there is no single write transmission waveform in WAIT state, the first clock period is "Address Phase", the master device transmits the write command Address and other control signals through the AHB interface, the second clock period is "Data Phase", the master device initiates the transmission of write Data, and it can be seen that the HREADY signal is always high, and only one period is required for the transmission of write Data; as shown in FIG. 4, there is a single write transfer case with WAIT state, where the second and third clock cycles HREADY are low until the fourth clock cycle HREADY pull Gao Cai completes the transfer of the write data. The latency of accessing the slave device over the bus in an actual chip may be much greater than in this case, resulting in HREADY being pulled low for a long time, greatly affecting the transmission performance of the AHB.
It should be noted that the read transfer performance improvement for AHB is not a much better solution, since the master has to read data from the slave to end the access. However, for write transfer, there is a idea to pull HREADY high in advance during the Data Phase when the AHB changes to AXI protocol to improve the throughput of write transfer. However, this solution is risky because the AR (read command channel) and AW (write command channel) in the AXI protocol are separate and independent, and the bus and the slave device cannot guarantee that the previously issued write command arrives at the slave device via the bus before the previously issued read command completes the transfer. If there is a conflict in the address ranges of the read command and the write command, the master device may read old data that has not been updated before in the slave device, so that a data consistency problem of write-before-read under the same address causes an application error.
For example, as shown in fig. 5, the embodiment of the present invention provides a hardware circuit description, firstly, the AHB interface protocol of the upstream AHB interface master device is converted into the AXI protocol by the synchronous type protocol bridge for converting the AHB into the AXI protocol, and then, a checking and controlling module and an AW information recording queue are placed between the protocol conversion bridge and the downstream AXI bus or the AXI asynchronous bridge to realize the data transmission function. If the AHB interface master device and the AXI bus clock are not homologous, the AXI asynchronous bridge is needed to complete the process of crossing clock domains and then access the bus. The checking and controlling module is the monitoring module. When the AHB-to-AXI synchronous protocol bridge sends a write command through an AW channel, the check control module sends the write command to the downstream module and simultaneously writes first key information (such as command address, length, size and type of burst) in the command into an AW information record queue, and if the downstream module can receive the write command and corresponding write data, the check and control module immediately returns a write response with the type OKAY to the AHB-to-AXI synchronous protocol bridge in advance through a B channel. Because the AHB-to-AXI protocol bridge is of a synchronous type, only protocol conversion is carried out but clock domain crossing processing is not carried out, delay can be very small or even none in the AHB-to-AXI protocol bridge, and HREADY can be pulled high to an AHB interface master device immediately after a write response is received, so that throughput capacity under write transmission is improved.
In addition, in an embodiment, as shown in fig. 6, step S500 may be included after the above-mentioned step S400 is performed.
S500, receiving write operation response information fed back by the downstream response module through the monitoring module, and performing data response processing according to the write operation response information.
It should be noted that, when the downstream response module receives the write operation command and the corresponding write operation data, the monitoring module feeds back the write operation completion information to the AHB interface master device through the write response channel of the AHB-AXI protocol bridge; the write operation response information fed back by the downstream response module can also be received through the monitoring module, and data response processing is performed according to the write operation response information.
In addition, in an embodiment, as shown in fig. 7, the step S500 may be performed by, but not limited to, the step S510 and the step S520.
Step S510, under the condition that the write operation response information fed back by the downstream response module is received, deleting the first key information corresponding to the write operation command from the write command information record queue based on the monitoring module;
in step S520, in the case that the received write operation response information is of an error type, the interrupt request information is generated based on the monitoring module and forwarded to the preset central processing unit.
In the process of performing data response processing according to the write operation response information, firstly, under the condition that write operation response information fed back by a downstream response module is received, deleting first key information corresponding to a write operation command from a write command information record queue based on a monitoring module; and under the condition that the write operation response information fed back by the downstream response module is of an error type, generating interrupt request information based on the monitoring module and forwarding the interrupt request information to a preset central processing unit to respond to the abnormal processing condition.
Illustratively, after the downstream bus module or AXI asynchronous bridge returns a write response from the slave device, the check and control module deletes the corresponding write command information from the AW information record queue. If the returned write response is of the error type (SLVERR, DECERR), an interrupt may also be generated and sent to the CPU in response to handling the exception condition.
In addition, in an embodiment, as shown in fig. 8, after the step S400 is performed, the method may further include, but is not limited to, step S610, step S620, step S630, and step S640.
Step S610, based on AHB interface main equipment through AHB to AXI protocol bridge read command channel to monitor module send read operation command;
step S620, analyzing and processing the read operation command based on the monitoring module to obtain second key information;
step S630, comparing the second key information with the storage information in the write command information record queue to obtain a comparison result;
step S640, the read operation command is controlled and processed through the monitoring module according to the comparison result.
It should be noted that, based on the AHB interface, the master device sends a read operation command to the monitoring module through a read command channel of the AHB-to-AXI protocol bridge; then, based on the monitoring module, analyzing and processing the read operation command to obtain second key information; then, comparing the second key information with the storage information in the write command information record queue to obtain a comparison result; and finally, controlling and processing the read operation command through the monitoring module according to the comparison result, and preventing the problem of data consistency of writing and reading at the same address from causing application errors.
It should be noted that the read transfer performance improvement for AHB is not a much better solution, since the master has to read data from the slave to end the access. However, for write transfer, there is a idea to pull HREADY high in advance during the Data Phase when the AHB changes to AXI protocol to improve the throughput of write transfer. However, this solution is risky because the AR (read command channel) and AW (write command channel) in the AXI protocol are separate and independent, and the bus and the slave device cannot guarantee that the previously issued write command arrives at the slave device via the bus before the previously issued read command completes the transfer. If there is a conflict in the address ranges of the read command and the write command, the master device may read old data that has not been updated before in the slave device, so that a data consistency problem of write-before-read under the same address causes an application error. The embodiment of the invention can ensure that the data consistency in the scene of writing before reading at the same address is not problematic.
Illustratively, when the AHB-to-AXI protocol bridge issues a read command from the host device via the AR channel, it will first look up whether there is write command information that would block the read command from being issued to the downstream module in the AW information record queue if there is any access address range conflict, until the write response of the corresponding command is returned from the downstream module, thus ensuring that the read command with the address range conflict is not sent onto the AXI bus.
In addition, in an embodiment, as shown in fig. 9, the second key information includes the first access address information, the storage information includes the second access address information, and the step S630 may include, but is not limited to, step S631.
In step S631, the first access address information is compared with the second access address information of the stored information.
It should be noted that, the second key information includes the first access address information, and the storage information in the write command information record queue includes the second access address information, and the comparison result can be obtained by comparing the first access address information with the second access address information of the storage information.
In addition, in an embodiment, as shown in fig. 10, the step S640 may include, but is not limited to, step S641 and step S642.
Step S641, when the second access address information which is the same as the first access address information exists in the storage information, the monitoring module blocks the read operation command to send to the downstream response module until the monitoring module receives the write operation response information fed back by the downstream response module;
in step S642, when the second access address information identical to the first access address information does not exist in the storage information, the monitoring module transmits the read operation command to the downstream response module.
When the second access address information which is the same as the first access address information exists in the storage information, the monitoring module blocks the read operation command from being sent to the downstream response module for processing until the monitoring module receives the write operation response information fed back by the downstream response module; and when the second access address information which is the same as the first access address information does not exist in the storage information, sending the read operation command to a downstream response module through the monitoring module. By the technical scheme, the read command with the conflict of the address range can be prevented from being sent to the AXI bus, and the problem of data consistency in a read-before-write scene under the same address is avoided.
In addition, in an embodiment, as shown in fig. 11, the downstream response module includes an AXI interface slave device and an AXI transmission module, and the step S500 may include, but is not limited to, step S530 and step S540.
Step S530, in the case that the AXI transmission module is an AXI bus, transmitting write operation response information fed back by the AXI interface slave device to the monitoring module through the AXI bus;
step S540, in the case that the AXI transmission module is an AXI asynchronous bridge, the write operation response information fed back by the AXI interface slave device is transmitted to the monitoring module through the AXI asynchronous bridge.
It should be noted that, when the AXI transmission module is an AXI bus, write operation response information fed back by the AXI interface slave device may be transmitted to the monitoring module through the AXI bus; and in the case that the AXI transmission module is an AXI asynchronous bridge, transmitting write operation response information fed back by the AXI interface slave device and returned through an AXI bus to the monitoring module through the AXI asynchronous bridge. It should be noted that if the AHB interface master and AXI bus clocks are not homologous, the bus needs to be accessed after the processing across the clock domains is completed through the AXI asynchronous bridge.
In some embodiments of the present invention, as shown in fig. 12, an embodiment of the present invention further provides an AHB interface device write transmission apparatus 10, applied to a data transmission system, where the data transmission system includes an AHB interface master device, an AHB to AXI protocol bridge, a monitoring module, and a downstream response module, and the apparatus includes:
the first processing module 100 is configured to send a write operation command to the monitoring module through a write command channel of the AHB-to-AXI protocol bridge based on the AHB interface master device;
the second processing module 200 is configured to send the write operation command to the downstream response module based on the monitoring module, and analyze and process the write operation command through the monitoring module to obtain first key information;
the third processing module 300 is configured to write the first key information into a preset write command information record queue based on the monitoring module;
the fourth processing module 400 is configured to, when the downstream response module receives the write operation command and the corresponding write operation data, feed back write operation completion information to the AHB interface master device through the write response channel of the AHB-to-AXI protocol bridge based on the monitoring module.
The specific implementation of the write transmission apparatus 10 of the AHB interface device is substantially the same as the specific embodiment of the write transmission method of the AHB interface device, and will not be described herein.
In some embodiments of the present invention, as shown in fig. 13, an embodiment of the present invention further provides an electronic device 700, including: the memory 720, the processor 710, and the computer program stored on the memory 720 and executable on the processor 710, the processor 710 implements the AHB interface apparatus write transmission method in the above-described embodiment when executing the computer program, for example, performs the method steps S100 to S400 in fig. 1, the method step S500 in fig. 6, the method steps S510 to S520 in fig. 7, the method steps S610 to S640 in fig. 8, the method step S631 in fig. 9, the method steps S641 to S642 in fig. 10, and the method steps S530 to S540 in fig. 11 described above.
In some embodiments of the present invention, an embodiment of the present invention further provides a computer-readable storage medium storing computer-executable instructions that are executed by a processor or controller, for example, by one of the processors in the above-described device embodiments, which may cause the processor to perform the AHB interface device write transmission method in the above-described embodiment, for example, performing the method steps S100 through S400 in fig. 1, the method steps S500 through S520 in fig. 6, the method steps S610 through S640 in fig. 8, the method steps S631 in fig. 9, the method steps S641 through S642 in fig. 10, and the method steps S530 through S540 in fig. 11 described above.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
While the preferred embodiment of the present invention has been described in detail, the present invention is not limited to the above embodiment, and various equivalent modifications and substitutions can be made by those skilled in the art without departing from the spirit of the present invention, and these equivalent modifications and substitutions are intended to be included in the scope of the present invention as defined in the appended claims.
Claims (6)
1. The write transmission method of the AHB interface equipment is characterized by being applied to a data transmission system, wherein the data transmission system comprises an AHB interface main equipment, an AHB-to-AXI protocol bridge, a monitoring module and a downstream response module, and the method comprises the following steps:
based on the AHB interface main equipment, sending a write operation command to the monitoring module through a write command channel of the AHB-to-AXI protocol bridge;
based on the monitoring module, sending the write operation command to the downstream response module, and analyzing and processing the write operation command through the monitoring module to obtain first key information;
writing the first key information into a preset writing command information record queue based on the monitoring module;
under the condition that the downstream response module receives the write operation command and corresponding write operation data, feeding back write operation completion information to the AHB interface main equipment through a write response channel of the AHB-to-AXI protocol bridge based on the monitoring module;
after the monitoring module feeds back the write operation completion information to the AHB interface main equipment through the write response channel of the AHB-to-AXI protocol bridge, the method further comprises the following steps:
receiving write operation response information fed back by the downstream response module through the monitoring module, and performing data response processing according to the write operation response information;
after the monitoring module feeds back the write operation completion information to the AHB interface main equipment through the write response channel of the AHB-to-AXI protocol bridge, the method further comprises the following steps:
based on the AHB interface main equipment, sending a read operation command to the monitoring module through a read command channel of the AHB-to-AXI protocol bridge;
analyzing and processing the read operation command based on the monitoring module to obtain second key information;
comparing the second key information with the storage information in the write command information record queue to obtain a comparison result;
the read operation command is controlled and processed through the monitoring module according to the comparison result;
the second key information includes first access address information, the storage information includes second access address information, and the comparing the second key information with the storage information in the write command information record queue includes:
comparing the first access address information with the second access address information of the storage information;
the control processing of the read operation command through the monitoring module according to the comparison result comprises the following steps:
under the condition that the second access address information which is the same as the first access address information exists in the storage information, the monitoring module blocks the read operation command from being sent to the downstream response module until the monitoring module receives the write operation response information fed back by the downstream response module;
and when the second access address information which is the same as the first access address information does not exist in the storage information, sending the read operation command to the downstream response module through the monitoring module.
2. The AHB interface device write transmission method of claim 1, wherein the performing data response processing according to the write operation response information comprises:
under the condition that write operation response information fed back by the downstream response module is received, deleting the first key information corresponding to the write operation command from the write command information record queue based on the monitoring module;
and generating interrupt request information based on the monitoring module and forwarding the interrupt request information to a preset central processing unit under the condition that the received write operation response information is of an error type.
3. The AHB interface device write transmission method of claim 1, wherein the downstream response module includes an AXI interface slave device and an AXI transmission module, the receiving, by the monitoring module, write operation response information fed back by the downstream response module includes:
transmitting the write operation response information fed back by the AXI interface slave device to the monitoring module through the AXI bus under the condition that the AXI transmission module is an AXI bus;
and transmitting the write operation response information fed back by the AXI interface slave device to the monitoring module through the AXI asynchronous bridge under the condition that the AXI transmission module is an AXI asynchronous bridge.
4. The write transmission device of the AHB interface equipment is characterized by being applied to a data transmission system, wherein the data transmission system comprises an AHB interface main device, an AHB-to-AXI protocol bridge, a monitoring module and a downstream response module, and the device comprises:
the first processing module is used for sending a write operation command to the monitoring module through a write command channel of the AHB-to-AXI protocol bridge based on the AHB interface main equipment;
the second processing module is used for sending the write operation command to the downstream response module based on the monitoring module and analyzing and processing the write operation command through the monitoring module to obtain first key information;
the third processing module is used for writing the first key information into a preset writing command information record queue based on the monitoring module;
the fourth processing module is used for feeding back write operation completion information to the AHB interface main equipment through a write response channel of the AHB-to-AXI protocol bridge based on the monitoring module under the condition that the downstream response module receives the write operation command and corresponding write operation data;
wherein after feeding back the write operation completion information to the AHB interface master device through the write response channel of the AHB-to-AXI protocol bridge based on the monitoring module, the method further comprises:
receiving write operation response information fed back by the downstream response module through the monitoring module, and performing data response processing according to the write operation response information;
after the monitoring module feeds back the write operation completion information to the AHB interface main equipment through the write response channel of the AHB-to-AXI protocol bridge, the method further comprises the following steps:
based on the AHB interface main equipment, sending a read operation command to the monitoring module through a read command channel of the AHB-to-AXI protocol bridge;
analyzing and processing the read operation command based on the monitoring module to obtain second key information;
comparing the second key information with the storage information in the write command information record queue to obtain a comparison result;
the read operation command is controlled and processed through the monitoring module according to the comparison result;
the second key information includes first access address information, the storage information includes second access address information, and the comparing the second key information with the storage information in the write command information record queue includes:
comparing the first access address information with the second access address information of the storage information;
the control processing of the read operation command through the monitoring module according to the comparison result comprises the following steps:
under the condition that the second access address information which is the same as the first access address information exists in the storage information, the monitoring module blocks the read operation command from being sent to the downstream response module until the monitoring module receives the write operation response information fed back by the downstream response module;
and when the second access address information which is the same as the first access address information does not exist in the storage information, sending the read operation command to the downstream response module through the monitoring module.
5. An electronic device, comprising:
a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the AHB interface apparatus write transfer method of any one of claims 1 to 3 when the computer program is executed.
6. A computer readable storage medium storing computer executable instructions which when executed by a control processor implement the AHB interface apparatus write transfer method of any one of claims 1 to 3.
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| US10372646B2 (en) * | 2017-06-30 | 2019-08-06 | Western Digital Technologies, Inc. | Programmable adapter between slow peripherals and network on-chip interfaces |
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