CN116648908A - Intra prediction for asymmetric partitions - Google Patents

Abstract

The present invention proposes a method and apparatus for efficiently encoding or decoding video. For example, encoding or decoding includes determining an intra-prediction mode from a set of regular-angle intra-prediction modes and wide-angle intra-prediction modes, wherein at least one of the angles or reference arrays used by the angular intra-prediction modes in the set is adapted to the width or height of the image block (which is not a power of two). For example, encoding or decoding includes determining an intra-sub-partition mode of an image block, wherein at least one of a size or a number of intra-sub-partitions in the intra-sub-partition mode is adapted to a width or a height of the image block (which is not a power of two). Various implementations are described for the ratio r and p intra sub-partitions used in asymmetric partitioning.

Description

Intra prediction for asymmetric partitions

Technical Field

At least one of the present embodiments relates generally to a method or device for video encoding or decoding, and more particularly to a method or device that adapts intra-prediction to the width or height of an image block (which is not a power of two).

At least one implementation more particularly relates to a method or device that adapts at least one of an angle of an angular intra prediction mode or a reference array used by the angular intra prediction mode to a width or height of an image block (which is not a power of two).

At least one implementation more particularly relates to a method or device that adapts at least one of the size of an intra-sub-partition or the number of intra-sub-partitions to the width or height of an image block (which is not a power of two).

Background

To achieve high compression efficiency, image and video coding schemes typically employ predictions, including motion vector predictions, and transforms to exploit spatial and temporal redundancy in video content. Generally, intra-or inter-prediction is used to exploit intra-or inter-frame correlation, and then transform, quantize, and entropy encode the difference (often denoted as a prediction error or prediction residual) between the original image and the predicted image. To reconstruct video, the compressed data is decoded by an inverse process corresponding to entropy encoding, quantization, transformation, and prediction.

Recent additions to video compression technology include various industry standards, versions of reference software, and/or documents, such as Joint Exploration Model (JEM) developed by the jfet (joint video exploration team) group and subsequent VTM (versatile video coding (VVC) test model). The aim is to further improve the existing HEVC (high efficiency video coding) standard.

Existing methods for encoding and decoding show some limitations for intra prediction in the case of asymmetric partitions that produce rectangular blocks whose width or height is not to the power of two.

More specifically, existing methods for encoding and decoding show some limitations on the size of rectangular blocks in wide-angle intra prediction. Thus, there is a need to improve the prior art by improving wide-angle intra prediction in VVCs so that the prior art can also be used in the case of asymmetric partitions that produce rectangular blocks whose width or height is not a power of two (called non-binary blocks), such as in Asymmetric Binary Trees (ABTs) or asymmetric treelet partitions.

More specifically, existing methods for encoding and decoding show some limitations on the size of the partition in intra sub-partition prediction, assuming that the width and height of the partition should be equal to powers of 2. Thus, there is a need to improve the prior art by modifying the intra-sub-partitions in VVCs so that the prior art can be used in the case of asymmetric partitions that produce rectangular blocks whose width or height is not a power of two (referred to as non-binary blocks), such as in Asymmetric Binary Trees (ABTs) or asymmetric treelet partitions.

Disclosure of Invention

The shortcomings and drawbacks of the prior art are addressed and addressed by the general aspects described herein.

According to a first aspect, a method is provided. The method comprises the following steps: video decoding by determining an intra-prediction mode for an image block, wherein at least one of a width or a height of the image block is not a power of two; and wherein at least one configuration of intra prediction modes is adapted to the width or height of the image block (which is not a power of two); and decoding the block using the determined intra prediction mode.

According to another aspect, a method is provided. The method comprises the following steps: video encoding by determining an intra-prediction mode for an image block, wherein at least one of a width or a height of the image block is not a power of two; and wherein at least one configuration of intra prediction modes is adapted to the width or height of the image block (which is not a power of two); and encoding the block using the determined intra prediction mode.

According to another aspect, a method is provided. The method comprises the following steps: video decoding by determining an intra prediction mode from a set of regular angular intra prediction modes and wide-angle intra prediction modes for an image block, wherein at least one of a width or a height of the image block is not a power of two, wherein at least one of an angle of the angular intra prediction mode in the set or a reference array used by the angular intra prediction mode in the set is adapted to the width or the height of the image block (which is not a power of two); and decoding the block using the determined intra prediction mode.

According to another aspect, another method is provided. The method comprises the following steps: video encoding by determining an intra prediction mode from a set of regular angular intra prediction modes and wide-angle intra prediction modes for an image block, wherein at least one of a width or a height of the image block is not a power of two, wherein at least one of an angle of the angular intra prediction mode in the set or a reference array used by the angular intra prediction mode in the set is adapted to the width or the height of the image block (which is not a power of two); and encoding the block using the determined intra prediction mode.

According to another aspect, an apparatus is provided. The apparatus includes one or more processors, wherein the one or more processors are configured to implement a method for video decoding according to any of its variants. According to another aspect, a device for video decoding includes means for determining an intra-prediction mode from a set of regular angular intra-prediction modes and wide-angle intra-prediction modes for an image block, wherein at least one of a width or a height of the image block is not a power of two, wherein at least one of an angle of the angular intra-prediction modes in the set or a reference array used by the angular intra-prediction modes in the set is adapted to the width or the height of the image block (which is not a power of two); and wherein the apparatus further comprises means for decoding the block using the determined intra prediction mode.

According to another aspect, another apparatus is provided. The apparatus includes one or more processors, wherein the one or more processors are configured to implement a method for video decoding according to any of its variants. According to another aspect, a device for video decoding includes means for determining an intra-prediction mode from a set of regular angular intra-prediction modes and wide-angle intra-prediction modes for an image block, wherein at least one of a width or a height of the image block is not a power of two, wherein at least one of an angle of the angular intra-prediction modes in the set or a reference array used by the angular intra-prediction modes in the set is adapted to the width or the height of the image block (which is not a power of two); and wherein the apparatus further comprises means for encoding the block using the determined intra prediction mode.

According to another general aspect of at least one embodiment, the width W and the height H of the image block are not equal.

According to another general aspect of at least one embodiment, wherein the width of the image block is w=w and the height of the image block is h=rh, or the width of the image block is w=rw and the height of the image block is h=h, wherein H and W are powers of two, and wherein r is a positive rational number less than 1, such that rh or rw is a positive integer different from a power of 2. In different variants, r=3/4 or 3/8, 5/8.

According to another general aspect of at least one embodiment, wherein only regular angle intra prediction modes are allowed, and the reference array used in intra prediction is extended to a size equal to h+w+1.

According to another general aspect of at least one embodiment, wherein only two wide-angle intra prediction modes are allowed, and a reference array used in intra prediction is extended to a size equal to 2h+p or 2w+p, where p=1, 2 or 4, depending on the width W and height H of the image block.

According to another general aspect of at least one embodiment, wherein the angle values of at least one regular angle intra prediction mode are modified, and the reference array used in intra prediction is 2h+1 or 2w+1.

According to another general aspect of at least one embodiment, the variant method applied to wide angle angles is derived from the availability of neighboring reconstructed samples of a reference array for use in intra prediction.

According to another general aspect of at least one embodiment, wherein at least one syntax data element associated with enabling any of the variant methods to be applied to wide-angle angles is signaled in one of a slice, a Picture Parameter Set (PPS), a Sequence Parameter Set (SPS).

According to another aspect, a method is provided. The method includes video decoding by determining intra-sub-partition modes for image blocks of video; wherein one of the width or height of the image block is not a power of two; and wherein at least one of a size of an intra-sub-partition or a number of intra-sub-partitions in the intra-sub-partition mode is adapted to a width or a height of the image block (which is not a power of two); and decoding the block using the determined intra-sub-partition mode.

According to another aspect, another method is provided. The method includes video encoding by determining intra-sub-partition modes for image blocks of video; wherein one of the width or height of the image block is not a power of two; and wherein at least one of a size of an intra-sub-partition or a number of intra-sub-partitions in the intra-sub-partition mode is adapted to a width or a height of the image block (which is not a power of two); and encoding the block using the determined intra-sub-partition mode.

According to another aspect, an apparatus is provided. The apparatus includes one or more processors, wherein the one or more processors are configured to implement a method for video decoding according to any of its variants. According to another aspect, an apparatus for video decoding includes means for determining an intra-sub-partition mode for an image block of a video; wherein one of the width or height of the image block is not a power of two; and wherein at least one of a size of an intra-sub-partition or a number of intra-sub-partitions in the intra-sub-partition mode is adapted to a width or a height of the image block (which is not a power of two); and wherein the means for video decoding further comprises means for decoding the block using the determined intra-sub-partition mode.

According to another aspect, another apparatus is provided. The apparatus includes one or more processors, wherein the one or more processors are configured to implement a method for video decoding according to any of its variants. According to another aspect, a device for video decoding includes means for determining an intra-sub-partition mode for an image block of video, wherein one of a width or a height of the image block is not a power of two, and wherein at least one of a size of an intra-sub-partition in the intra-sub-partition mode or a number of intra-sub-partitions is adapted to the width or the height of the image block (which is not a power of two); and wherein the means for video encoding further comprises means for encoding the block using the determined intra-sub-partition mode.

According to another general aspect of at least one embodiment, the width of the image block is w=w and the height of the image block is h=3h/4, or the width of the image block is w=3w/4 and the height of the image block is h=h, where W and H are powers of two. In a more general embodiment, the width W of the image block is w=w and the height H of the image block is h=rh, or the width of the image block is w= rW and the height of the image block is h=h, where H and W are powers of two, and where r is a positive rational number less than 1, such that rH or rW is a positive integer different from a power of 2. In a more general implementation, the ratio r is selected to produce a transform size supported by the encoding/decoding method or device (i.e., with the implemented video codec design).

According to another general aspect of at least one embodiment, for an image block of size W×3H/4, the horizontal intra sub-partition mode generates three sub-partitions of size W×H/4. In a more general embodiment, for largeImage block of W x rH, and horizontal intra sub-partition mode generation size ofWherein r is a positive rational number smaller than 1 and p is a positive integer such that rH is a positive integer different from a power of 2 and +. >Corresponding to the transform size supported by the video codec under consideration.

According to another general aspect of at least one embodiment, for an image block of size 3W/4 XH, the vertical intra sub-partition mode generates three sub-partitions of size W/4 XH. In a more general implementation, for an image block of size rW ×H, the vertical intra sub-partition mode generates a block of sizeWherein r is a positive rational number less than 1 and p is a positive integer such that rW is a positive integer different from a power of 2 and +.>Corresponding to the transform size supported by the video codec under consideration.

According to another general aspect of at least one embodiment, for an image block of size W×3H/4, a horizontal up-frame intra sub-partition mode generates two sub-partitions comprising an upper intra sub-partition of size W×H/4 and a lower intra sub-partition of size W×H/2, or for an image block of size W×3H/4, a horizontal down-frame intra sub-partition mode generates two sub-partitions comprising an upper intra sub-partition of size W×H/2 and a lower intra sub-partition of size W×3H/4. In a more general implementation, for an image block of size W×rH, the horizontal upward intra sub-partition mode generation includes a block of size Upper intra sub-partition and large of (a)Little->Two sub-partitions of the lower intra sub-partition of (2) such that the transform size +.>And->Supported by the codec design under consideration, i.e. such that the transform size +.>Andboth equal to a power of 2.

According to another general aspect of at least one embodiment, for an image block of size 3W/4 xh, the vertical left intra sub-partition mode generates two sub-partitions including a left intra sub-partition of size W/4 xh and a right intra sub-partition of size W/4 xh, or for an image block of size 3W/4 xh, the vertical right intra sub-partition mode generates two sub-partitions including a left intra sub-partition of size W/2 xh and a right intra sub-partition of size W/4 xh. In a more general implementation, for an image block of size rW ×H, the vertical left intra sub-partition mode generation includes a block of sizeLeft intra sub-partition and size +.>Two sub-partitions of the right-side intra sub-partition of (2) such that the transform size +.>W and->Supported by the codec design under consideration.

According to another general aspect of at least one embodiment, one of a horizontal up-frame intra-sub-partition mode or a horizontal down-frame intra-sub-partition mode is used for image blocks of size w×3h/4, and wherein one of a vertical left-frame intra-sub-partition mode or a vertical right-frame intra-sub-partition mode is used for image blocks of size 3W/4×h. In a more general implementation, one of a horizontal up-frame intra-sub-partition mode or a horizontal down-frame intra-sub-partition mode is used for tiles of size w×rh, and wherein one of a vertical left-frame intra-sub-partition mode or a vertical right-frame intra-sub-partition mode is used for tiles of size rW ×h.

According to another general aspect of at least one embodiment, the intra sub-partition mode is implicitly derived from the size of the image block and the asymmetric partition mode.

According to another general aspect of at least one embodiment, at least one syntax data element related to enabling any of the disclosed intra sub-partitioning methods is signaled in one of a slice, a Picture Parameter Set (PPS), a Sequence Parameter Set (SPS).

According to another general aspect of at least one embodiment, there is provided an apparatus comprising: a device according to any of the decoding implementations; and at least one of the following: (i) An antenna configured to receive a signal, the signal comprising a video block; (ii) A band limiter configured to limit the received signal to a frequency band including the video block; or (iii) a display configured to display an output representing a video block.

According to another general aspect of at least one embodiment, there is provided a non-transitory computer-readable medium comprising data content generated according to any of the described coding embodiments or variants.

According to another general aspect of at least one embodiment, there is provided a signal comprising video data generated according to any of the described coding embodiments or variants.

According to another general aspect of at least one embodiment, the bitstream is formatted to include data content generated according to any of the described coding embodiments or variants.

According to another general aspect of at least one embodiment, there is provided a computer program product comprising instructions which, when the program is executed by a computer, cause the computer to perform any one of the described encoding/decoding embodiments or variants.

These and other aspects, features and advantages of the general aspects will become apparent from the following detailed description of exemplary embodiments, which is to be read in connection with the accompanying drawings.

Drawings

In the accompanying drawings, examples of several embodiments are shown.

Fig. 1 shows an intra prediction mode according to VVC.

Fig. 2a and 2b show wide-angle intra prediction of non-square blocks according to VVC.

Fig. 3 shows a Quadtree (QT), a Binary Tree (BT), and a Trigeminal Tree (TT) used in intra-prediction partitioning according to VVC.

Fig. 4 illustrates an example of an Asymmetric Binary Tree (ABT) used in partitioning in accordance with a general aspect of at least one embodiment.

Fig. 5 illustrates a generic encoding method in accordance with a general aspect of at least one embodiment.

Fig. 6 illustrates a general decoding method in accordance with a general aspect of at least one embodiment.

Fig. 7 illustrates a first variation of a wide angle mode adapted to a non-binary CU in accordance with a general aspect of at least one embodiment.

Fig. 8 illustrates a second variation of wide angle modes adapted to non-binary CUs in accordance with a general aspect of at least one embodiment.

Fig. 9 illustrates a block diagram of an embodiment of a video encoder in which aspects of the embodiments may be implemented.

Fig. 10 illustrates a block diagram of an embodiment of a video decoder in which various aspects of the embodiments may be implemented.

FIG. 11 illustrates a block diagram of an exemplary apparatus in which aspects of the embodiments may be implemented.

Fig. 12 and 13 show examples of intra-sub-partitions according to VVC.

Fig. 14 shows a Quadtree (QT), a Binary Tree (BT), and a Trigeminal Tree (TT) used in intra-prediction partitioning according to VVC.

Fig. 15 illustrates an example of an Asymmetric Binary Tree (ABT) used in partitioning in accordance with a general aspect of at least one embodiment.

Fig. 16 illustrates a generic encoding method in accordance with a general aspect of at least one embodiment.

Fig. 17 illustrates a general decoding method in accordance with a general aspect of at least one embodiment.

Fig. 18 illustrates a first variation of intra sub-partitions adapted to a non-binary CU in accordance with a general aspect of at least one embodiment.

Fig. 19 illustrates a second variation of intra sub-partitions adapted to a non-binary CU in accordance with a general aspect of at least one embodiment.

Fig. 20, 21, 22a and 22b illustrate other variations of intra sub-partitions adapted to non-binary CUs in accordance with a general aspect of at least one embodiment.

Fig. 23 illustrates a generic encoding method in accordance with a general aspect of at least one embodiment.

Fig. 24 illustrates a general decoding method in accordance with a general aspect of at least one embodiment.

Detailed Description

Fig. 1 illustrates an intra prediction mode in a general video coding (VVC). In VVC, intra prediction is applied to all blocks in intra frames and intra blocks in inter frames, where a target block called a Coding Unit (CU) is spatially predicted from causal neighboring blocks in the same frame, i.e., blocks at the top and upper right, blocks at the left and lower left, and blocks at the upper left. Based on the decoded pixel values in these blocks, the encoder constructs different predictions for the target block and selects the prediction that yields the optimal rate-distortion (RD) performance. The predictions were tested for 67 prediction modes, including one planar mode (index mode 0), one DC mode (index mode 1), and the remaining 65 angular modes. The angular modes may include only regular angular prediction modes from mode 2 to mode 66, or some wide angular modes defined outside the angular range from 45 degrees to-135 degrees.

Wide-angle prediction is introduced to improve the prediction efficiency of rectangular CUs (i.e., CUs with unequal width and height). Since VVC supports Binary Tree (BT) and Trigeminal Tree (TT) partitions in addition to Quadtree (QT) partitions, these partitions may produce rectangular CUs, wide-angle prediction is exhibited to improve compression performance at the same level of complexity. The idea is to predict the direction in the longer side of the CU preferentially by checking some wide angle directions on that side for RD performance while avoiding an equal number of regular angle patterns that might result in less accurate predictions. The new wide-angle prediction direction is appropriately designed to accommodate different rectangular block shapes such that the defined prediction direction is always aligned on the next diagonal of the block (the diagonal extending from the lower left corner to the upper right corner).

Fig. 2a and 2b show wide-angle intra prediction of non-square blocks according to VVC. The wide-angle prediction includes adapting the prediction direction according to the rectangular block shape while keeping the total number of prediction modes unchanged. Thus, some prediction directions are added on the larger side of the block, while some prediction directions are removed on the shorter side. Advantageously, this adaptation improves the prediction accuracy, resulting in higher compression efficiency. Since the newly introduced directions are beyond the usual range of 180 degrees from 45 degrees to-135 degrees, they are referred to as wide angle directions. Directions-1 to 14, 67 to 80 (dashed lines) as shown in fig. 1 correspond to the wide angle mode, while the other directions 2 to 66 (straight lines) correspond to the regular angle mode. Table 1 shows values of the angle parameter intrapresangle for the wide angle mode. The values of the intrapresangle for all regular angle modes are given in the VVC specification as follows.

Table 1: an intrapresangle value for wide angle mode in VVC. Each value corresponds to two modes, one of which One is vertical (ver) and the other is horizontal (hor)。

When the target block is square, the wide angle mode is not active and only the regular angle mode is selected for prediction. When the target block is flat (i.e., its width W is greater than its height H), some modes near 45 degrees are removed from the selection, and an equal number of wide angle modes exceeding-135 degrees are selected. The wide angle directions are indexed as prediction modes 67, 68, &. Similarly, when the target block is high, some modes near-135 degrees are removed from the selection, and an equal number of wide angle modes exceeding 45 degrees are selected. The wide angle directions are indexed as prediction modes-1, -2, &.. since prediction modes 0 and 1 are reserved for the planar mode and the DC mode. The selection of the wide angle mode occurs by mapping from the regular angle mode to the wide angle mode as follows:

fig. 2a and 2b show the range of applicable modes for rectangular blocks, for flat block (2 a) and high block (2 b), respectively. The wide angle pattern corresponds to the opposite direction (wide angle direction) of the direction (direction of removal) associated with the regular angle pattern replaced by the wide angle pattern. On fig. 2a, more upper right vertical patterns are added instead of lower left horizontal patterns for flat blocks (W is greater than its height H, W/H > 1). On fig. 2b, more lower left horizontal modes are added instead of upper right vertical modes for high blocks (H greater than their height W, W/H < 1).

Since the direction of the minor diagonal depends on the shape of the block, the total number of applicable wide-angle modes depends on the shape of the block. Table 2 shows the number of regular patterns replaced by wide angle patterns for different block shapes.

Table 2: the number of wide angle modes depending on the block shape。

As shown in tables 1 and 2, the wide angle has been designed to be suitable for rectangular blocks with aspect ratios equal to powers of 2. In table 1, an intraPredAngle equal to k x 32 (k=2, 4, 8, 16) indicates a wide angle mode aligned along the minor diagonal of a CU with its W/H ratio equal to k or 1/k. When a CU is flat (high), other suitable wide angle modes for the CU are between this mode and mode 66 (2). Thus, as given in table 2, for any given CU aspect ratio, the number of wide angle modes can be equivalently deduced from table 1. Those skilled in the art will appreciate that wide-angle intra prediction is performed only in the prediction phase by the mapping process described above. For intra mode coding, the total number of applicable modes is always 67, and they are indexed from 0 to 66.

However, current wide-angle intra prediction is limited by its design. Since BT and TT produce rectangular blocks whose edges are always equal to powers of 2, a wide-angle prediction direction has been selected to correspond to such rectangular blocks, with the ratio of larger edges to smaller edges being always powers of 2. For such CUs, the direction along the minor diagonal is parallel to the wide angle direction, and this direction determines the number of applicable wide angles of any CU size. Thus, where the top reference array length and the left reference array length are equal to twice the size of the top and left sides of the CU, respectively, predictions may be constructed for the applicable regular angle mode and wide angle mode. However, if the rectangular CU does not satisfy the assumption about a rectangular shape having an aspect ratio equal to a power of two (as in the case of asymmetric BT), the wide-angle prediction cannot be applied as it is and some modification is required. VVC supports Quadtree (QT), binary Tree (BT), and Trigeminal Tree (TT) for CU partitions in intra prediction, where the width or height of a partition is a power of two. Thus, the current design of wide-angle prediction over rectangular blocks with aspect ratios equal to powers of 2 is well suited for VVC partitioning. However, it is desirable to adapt the current design for wide-angle prediction of rectangular blocks with aspect ratios that are not equal to powers of two.

Fig. 3 shows QT, BT and TT partitions for CUs. QT and BT partitions are symmetric because either type of partition is in the middle of the CU, producing two identical blocks. The TT partition mode partitions a parent CU into 3 child CUs according to partition orientation, with sizes 1/4, 1/2, and 1/4 relative to the parent CU in width or height, respectively.

Fig. 4 shows an example of asymmetric partitioning for a CU. It has been shown that Asymmetric BT (ABT) can produce higher compression efficiency with symmetric segmentation. Each encoding stage (BT partition signaling, prediction, transform, entropy encoding, deblocking filter) adapts to the new rectangular block size, where one of the width or height of the partition is no longer a power of two. According to a non-limiting example of asymmetric partitioning, these sizes correspond to 3 times the CU width or height, which is generated by partitioning the CU into 2 sub-CUs, with the respective sizes being 1/4 and 3/4 of the size of the parent CU. Although the following description will use an exemplary ratio (1/4, 3/4) for ABT, one skilled in the art will readily derive the present principles for other examples of ratios for ABT, such as 3/8 and 5/8 or any other non-binary ratio. In practice, for the exemplary ratio ABT (1/4, 3/4), this results in a CU width or height that may be equal to 12, 24, 48, or 86. As shown in fig. 4, the 16×16CU may be asymmetrically split into two parts, such as 16×4 and 16×12 (hor_up), or 16×12 and 16×4 (hor_down), or 4×16 and 12×16 (ver_left), or 12×16 and 4×16 (ver_right). Thus, the larger partition does not satisfy the binary attribute because 12 is not a power of 2. Similar cases may be derived for other CU sizes. For these CUs, wide-angle intra prediction as described in the previous section cannot be applied as it is.

This is addressed and handled by the general aspects described herein, which relate to a decoding or encoding method/apparatus that adapts at least one of the angle of the wide-angle intra-prediction mode or the reference array used by the wide-angle intra-prediction to the width or height of the image block (which is not a power of two). In the following section, a general implementation of an encoding method, a general implementation of a decoding method using modified wide-angle prediction are described, and then various implementations of modified wide-angle prediction are described in detail for CUs that do not satisfy the binary partition condition. For ease of reference, we refer to these CUs as non-binary CUs.

Fig. 5 illustrates a generic encoding method 100 in accordance with a general aspect of at least one embodiment. The block diagram of fig. 5 partially represents a module or encoding method of an encoder, such as implemented in the exemplary encoder of fig. 9. The block diagram of fig. 5 also corresponds to the general method of fig. 23.

According to a general embodiment, a method 100 for encoding is disclosed. The method comprises the following steps: for non-dyadic intra CUs generated by ABT partitioning, the intra prediction direction is selected. Thus, determining 11 an intra prediction mode from a set of regular angle intra prediction modes and wide angle intra prediction modes for an image block comprises: at least one of the angles of the angular intra prediction modes in the set or the reference arrays used by the angular intra prediction modes in the set is adapted to the width or height of the image block (which is not a power of two). A top reference array and a left reference array are constructed using any of a variation of the number of decoded pixels each on the top and left of the current block. The determining further includes searching for a prediction mode that gives the optimal RD performance and encoding the mode as specified in the prior art encoding methods. The residual is calculated in the usual way by subtracting the predicted value from the current original pixel value and then the remainder of the processing (transform, quantization, CABAC coding, etc.) is performed as in the prior art coding method in the general coding step 12.

Fig. 6 illustrates a generic decoding method 200 in accordance with general aspects of at least one embodiment. The block diagram of fig. 6 partially represents the modules or decoding method of a decoder, such as implemented in the exemplary decoder of fig. 10. The block diagram of fig. 6 also corresponds to the general method of fig. 24.

According to a general embodiment, a method 200 for decoding is disclosed. The method comprises the following steps: for non-dyadic intra CUs generated by ABT partitioning, the prediction mode is decoded and the corresponding direction is selected according to any of the disclosed variants. Thus, determining 11 an intra prediction mode from a set of regular angle intra prediction modes and wide angle intra prediction modes for an image block comprises: at least one of the angles of the angular intra prediction modes in the set or the reference arrays used by the angular intra prediction modes in the set is adapted to the width or height of the image block (which is not a power of two). Then, a top reference array and a left reference array of pixels are constructed, and then a prediction block for the determined prediction direction is formed. Decoding 22 then further includes: the residual value is decoded by performing CABAC decoding, dequantization of the transform coefficients, and then inverse transform of the decoded coefficients, and the residual value is added to the predicted value to decode the current block.

In the following we will consider that non-binary CUs are rectangular, i.e. their width and height are not equal and their width or height is not a power of 2. Furthermore, we will consider that the number of direction modes applicable to such CUs is still 65, as in VVC. Keeping the total number of prediction modes unchanged assumes intra prediction mode encoding as in VVC. However, one skilled in the art will readily extend the present principles to other implementations of intra prediction modes, such as having a different number of directional modes. Furthermore, for ease of presentation we will consider the non-dyadic block size H W to be 3H/4 Xw or H3W/4, where the values of H and W are powers of two. Although the exemplary embodiment is described for an ABT having a ratio (1/4, 3/4), the present principles are not limited to ABTs nor to ratios. Those skilled in the art will readily extend the present principles to wide intra prediction with non-dyadic CUs resulting from any other asymmetric partitioning.

Fig. 7 illustrates a first variation of a wide angle mode adapted to a non-binary CU in accordance with a general aspect of at least one embodiment. According to a first variant, only regular angle intra prediction modes are allowed and the reference array is extended to the size h+w+1. The simplest way to apply intra prediction to a non-dyadic CU is to consider it to be similar to a square CU. That is, when the CU is non-binary, only the regular 65-angle mode is used for prediction and the wide-angle mode is not used. To this end, as shown in fig. 7, the reference array size is modified to be equal to the size of h+w+1. As shown in fig. 2, VVC designates the top reference array length as 2w+1 and the left reference array length as 2h+1. Unlike in VVC, when CU is non-binary, the reference array length is set equal to h+w+1. Advantageously, prediction modes 2 to 66 are thus supported.

In case that a division ratio different from (1/4, 3/4), for example, (3/8, 5/8) may be used in the asymmetric binary division of the coding unit, then the same method as fig. 7 may be applied.

Fig. 8 illustrates a second variation of wide angle modes adapted to non-binary CUs in accordance with a general aspect of at least one embodiment. According to a second variant, two wide angles are allowed and the reference array is extended to 2h+1, 2h+2 or 2h+4 or 2w+1, 2w+2 or 2w+4 depending on the rectangular block size considered. The first variant does not exploit the availability of wide angle modes, as they can still be applied to non-binary CUs in the same way as they are for binary rectangular CUs. However, since the ratio of long side to short side is not a power of 2, the number of wide angles is reduced to the maximum number of 2. Further, since the direction along the minor diagonal of the non-binary CU is not specified in the VVC, the shorter reference array is extended by several pixels to support the start or end regular orientation mode, as shown in fig. 8. The extension depends on the CU size. For ABT partitioning, possible non-binary CU sizes with a maximum CU size of 64 for luma blocks and a minimum CU size of 2 for chroma blocks are 8 x 6, 6 x 8, 16 x 12, 12 x 16, 32 x 24, 24 x 32, 64 x 48, and 48 x 64. The aspect ratio W/H is 4/3 for horizontal blocks (HOR_UP or HOR_DOWN) and 3/4 for vertical blocks (VER_LEFT or VER_RIGHT). Since 4 x 32/3= 42.667, table 1 shows that only two wide angle modes are supported for these non-binary blocks.

Table 3: angular prediction mode for non-binary CUs generated by ABT in variant 2

According to another variant, if the asymmetric partition supports a different partition ratio than (1/4, 3/4), such as (3/8, 5/8), a further extended set of wide intra prediction modes may be employed. This may take the exemplary form of table 4.

Table 4: angular prediction mode for non-binary CUs generated by ABT in variant 2

It is also noted that with ABT partitioning (1/4, 3/4), additional block shape ratios (e.g., 3/2 (block sizes 12×8, 24×16, and 48×32), 3 (block sizes 12×4, 24×8, and 48×16), 6 (block sizes 24×4 and 48×8), 12 (block size 48×4), 8/3 (block sizes 32×12, 64×24), 16/3 (block sizes 32×6), 32/3 (block sizes 64×6)) are achievable. For these cases, other variants of tables 3 and 4 may be used.

The extension length of the smaller reference array depends on the block size. Table 5 lists the expansion values in number of pixels. This value is derived using the value of the intropredangle for the start (mode 4 for horizontal blocks) or end (mode 64 for vertical blocks) angle mode. In either case, the intraPredAngle value is equal to 26.

Table 5: extension of shorter reference arrays for non-binary CUs derived from ABT

CU size	Extended pixels
		8×6，6×8	1
16×12，12×16	1
		32×24，24×32	2
64×48，48×64	4

According to a third variant, the wide angle value is modified and the reference array is 2h+1 or 2w+1. The second variant proposes an extension of several reference pixels on one side of the shorter reference array. In the case of intra prediction, this extension is not a big disadvantage, however, it is no longer necessary with small adjustments of direction. As shown in table 2, the required expansion is caused by the fact that the direction of the minor diagonal corresponding to the non-binary CU is not included in the VVC specification. The minor diagonal is the diagonal of the lower left corner of the link block and the upper right corner of the CU. That is, the VVC does not define a pattern associated with the direction of the minor diagonal of the non-binary CU. The direction corresponds to an intraPredAngle equal to 3 x 32/4=24 and it has an equal value toIs the opposite wide angle direction of the intrapresangle. Thus, a third variation includes modifying the closest designated angle (which is 23) and the opposite wide angle (which is 45) to correspond to the direction of the minor diagonal (i.e., 24 and 42) of the non-binary CU, as given in the angular direction table 6 below.

Table 6: an angular direction meter. The top line shows the values of the intropredangle as specified in VVC. The bottom line shows Values of intrapresangle in variant 3. The changed values are underlined 。

As shown in table 7, this will change the number of applicable wide angles for the non-binary CU generated by ABT to 3 and does not need to be spread on the smaller reference side.

Table 7: angular prediction mode for non-binary CUs generated by ABT in third variant

Since the angular direction spacing around angles 24 and 42 in table 6 is non-uniform, another angular table may be defined as follows:

table 8: alternative angular direction gauges. The top line shows the values of the intropredangle as specified in VVC. Bottom The line shows the values of the intraPredAngle in variant 3. The changed values are underlined。

In this modification we additionally introduce a new pair of directions (intrapredangle=22 and the opposite wide angle with intrapredangle=46). But we have removed the wide angle (intrapresangle=341) in the direction with intrapresangle equal to 3 and in the opposite direction, while the total number of directions remains 65. Due to the reordering of directions and associated patterns, table 2, which specifies the number of wide angles for BT rectangular blocks, needs to be updated as follows:

table 9: number of BT blocks for wide angle mode as a function of block shape if Table 8 is used as an angle table Measuring amount。

In a third variant, the reference array length remains the same as specified in VVC. Note that the RD performance of the two-way CU may also change as the direction is slightly modified and re-indexed.

Based on these 3 variants, several implementations are disclosed as possible implementations for intra prediction when ABT or any other partition of a non-binary CU is generated, supported by VVC or other future video coding standards.

According to a first embodiment, a two-in intra CU undergoes encoding and decoding as specified in VVC. For non-dyadic intra CUs generated by ABT partitioning, the intra prediction direction is selected as in the first variant. The top and left reference arrays are constructed using w+h+1 decoded pixels each on the top and left sides of the current block. The encoder 100 searches for a prediction mode that gives the optimal RD performance and encodes the mode as specified in VVC. The residual is calculated in the usual way by subtracting the predicted value from the current pixel value and then the remainder of the processing (transform, quantization, CABAC coding, etc.) is performed as in VVC. The decoder decodes the prediction mode and selects a corresponding direction from a set of directions in the first variant. It constructs a top reference array and a left reference array each of length w+h+1 pixels, and then forms a prediction block for the prediction direction. It also decodes the residual values by performing CABAC decoding, dequantization of the transform coefficients, and then inverse transform of the decoded coefficients. Finally, it adds the residual value to the predicted value to decode the current block.

According to a second embodiment, a two-in intra CU undergoes encoding and decoding as specified in VVC. For non-dyadic intra CUs generated by ABT partitioning, the intra prediction direction is selected as in the second variant with wide angle mapping. The top and left reference arrays are constructed with small extensions of the smaller reference arrays as in VVC. The encoder searches for a prediction mode that gives the optimal RD performance and encodes the mode as specified in VVC. The residual is calculated in the usual way by subtracting the predicted value from the current pixel value and then the remainder of the processing (transform, quantization, CABAC coding, etc.) is performed as in VVC. The decoder decodes the prediction mode and selects a corresponding direction from a set of directions in a second variant having a wide angle mapping. It constructs the top reference array and the left reference array with a small extension of the smaller reference array as in VVC, and then forms a prediction block for the prediction direction. It also decodes the residual values by performing CABAC decoding, dequantization of the transform coefficients, and then inverse transform of the decoded coefficients. Finally, it adds the residual value to the predicted value to decode the current block.

According to a third embodiment, a two-in intra CU undergoes encoding and decoding as specified in VVC. For non-dyadic intra CUs generated by ABT partitioning, the intra prediction direction is selected as in the third variant with wide angle mapping. The top reference array and the left reference array are constructed as in VVC. The encoder searches for a prediction mode that gives the optimal RD performance and encodes the mode as specified in VVC. The residual is calculated in the usual way by subtracting the predicted value from the current pixel value and then the remainder of the processing (transform, quantization, CABAC coding, etc.) is performed as in VVC. The decoder decodes the prediction mode and selects a corresponding direction from a set of directions in a third variant having a wide angle mapping. It constructs the top reference array and the left reference array as in VVC, and then forms a prediction block for predicting the direction. It also decodes the residual values by performing CABAC decoding, dequantization of the transform coefficients, and then inverse transform of the decoded coefficients. Finally, it adds the residual value to the predicted value to decode the current block.

According to a fourth embodiment, the intra prediction direction specified in the second variant or the third variant is used for non-dyadic CUs only when relevant reference samples are available. For example, in the case of a flat block, the second variant or the third variant selects 2 or 3 directions after-135 °. However, independent of the current block shape, the upper right neighboring block may not be available. In this case, intra prediction will be performed as in the first variant for the current CU. Since both the encoder and the decoder can easily detect the presence of reconstructed neighboring blocks, they will decide in the same way whether to apply either the second/third variant or the first variant.

According to a fifth embodiment, the encoder selects between the first variant and the second or third variant to use the one-bit flag to decide the intra prediction direction for the non-binary CU. The flag is signaled to the decoder in the slice header.

According to a sixth embodiment, the encoder selects between the first variant and the second or third variant to use the one-bit flag to decide the intra prediction direction for the non-binary CU. The flag is signaled to the decoder in the Picture Parameter Set (PPS) header.

According to a seventh embodiment, the encoder selects between the first variant and the second or third variant to use the one-bit flag to decide the intra prediction direction for the non-binary CU. The flag is signaled to the decoder in a Sequence Parameter Set (SPS) header.

According to an eighth implementation, the encoder selects between the first variant and the second or third variant to decide the intra prediction direction for the non-binary CU based on the block size. Indeed, for some ratios between the width and height of the block being processed, a first variant may be used, while for some other ratios, a second or third variant may be used.

Fig. 12 and 13 show examples of intra sub-partitions according to general video coding (VVC). In VVC, intra prediction is applied to intra blocks in intra frames as well as inter frames, where a target block, referred to as a Coding Unit (CU), is spatially predicted from causal neighboring blocks in the same frame, i.e., blocks at the top and upper right, blocks at the left and lower left, and blocks at the upper left. Based on the decoded pixel values in these blocks, the encoder constructs different predictions for the target block and selects the prediction that yields the optimal rate-distortion (RD) performance. The predictions were tested for 67 prediction modes, including one planar mode (index mode 0), one DC mode (index mode 1), and the remaining 65 angular modes. The target block has the option to choose between intra prediction for the entire CU and intra prediction for sub-partitions (ISPs) with the CU. In the first method, all target pixels are predicted at the same time based on reference samples for the entire CU in a classical manner. In a second method, the target CU is partitioned into two or four equal-sized sub-partitions, which are sequentially decoded using the prediction mode of the CU. That is, each sub-partition is decoded independently, with its own reference samples used to predict its target pixels. Thus, a sub-partition may benefit from the availability of decoded samples from a neighboring sub-partition that is the immediate neighbor of the current sub-partition. In some cases, this may result in better prediction and compression efficiency than the first method.

As shown in fig. 12 and 13, the ISP tool partitions the luma intra prediction block vertically or horizontally into 2 or 4 sub-partitions. The number of partitions depends on the block size, as shown in table 10. The sub-partition must have at least 16 samples. Thus, a block of size 4×4 is not partitioned into sub-partitions, whereas blocks of sizes 4×8 and 8×4 have only two partitions. All other sized blocks have four sub-partitions.

Fig. 10: the number of sub-partitions depending on the block size

Block size	Number of sub-partitions
		4×4	1
4X 8 and 8X 4	2
		All other cases	4

The sub-partitions may be horizontal or vertical. A block of size 4 x 8 may have only two vertical partitions each of size 4 x 4, while a block of size 8 x 4 may have only two horizontal partitions each of size 4 x 4. Similarly, as another example, a block of size 4×16 may have four vertical sub-partitions each of size 4×4 or four horizontal sub-partitions each of size 1×16.

For each of these child partitions, a prediction is constructed using the decoded prediction mode of the parent CU. The prediction signal is added to a decoded residual signal generated by entropy decoding coefficients transmitted by an encoder and then inverse quantizing and inverse transforming the same to reconstruct pixels in the sub-partition. The reconstructed value of each sub-partition, in addition to the first sub-partition, can be used to generate a prediction of the next sub-partition. Regardless of the intra prediction mode and the partition utilized, the sub-partitions are processed in the normal order, i.e., the first sub-partition to be processed is the sub-partition that contains the upper left sample of the CU and then is followed by consecutive downward (horizontal partition) or rightward (vertical partition). The partition type of the CU is transmitted using bit '0' (no_split) or bit '10' or '11' (hor_split and ver_split).

Fig. 14 shows QT, BT, and TT partitions for a CU according to VVC. QT and BT partitions are symmetric because either type of partition is in the middle of the CU, producing two identical blocks. Fig. 15 shows an example of asymmetric partitioning for CUs. It has been shown that Asymmetric BT (ABT) can produce higher compression efficiency with symmetric segmentation. Each encoding stage (BT partition signaling, prediction, transform, entropy encoding, deblocking filter) adapts to the new rectangular block size, where one of the width or height of the partition is no longer a power of two. According to a non-limiting example of asymmetric partitioning, these sizes correspond to 3 times the CU width or height, which is generated by partitioning the CU into 2 sub-CUs, with the respective sizes being 1/4 and 3/4 of the size of the parent CU. Although the following description will use an exemplary ratio (1/4, 3/4) for ABT, one skilled in the art will readily derive the present principles for other examples of ratios for ABT, such as 3/8 and 5/8 or any other non-binary ratio. In practice, for the exemplary ratio ABT (1/4, 3/4), this yields a CU width or height (incompatible in codec design and less restrictive than VVC) that may be equal to 12, 24, 48 or even 96. As shown in fig. 15, the 16×16CU may be asymmetrically divided into two parts, such as 16×4 and 16×12 (hor_up), or 16×12 and 16×4 (hor_down), or 4×16 and 12×16 (ver_left), or 12×16 and 4×16 (ver_right). Thus, the larger partition does not satisfy the binary attribute because 12 is not a power of 2. Similar cases may be derived for other CU sizes. For these CUs, the ISP as described above cannot be applied as it is, because when the CU side has a width or height equal to 12, 24, etc. and is divided into 4 sub-partitions, the ISP will require a transform of size (3, 6, etc.), and these transform sizes may not be supported.

This is addressed and handled by the general aspects described herein, which relate to a decoding or encoding method/apparatus in which at least one of the size of an intra sub-partition or the number of intra sub-partitions is adapted to the width or height of an image block (which is not a power of two). For ease of reference, we refer to these image blocks or CUs as non-binary CUs.

Fig. 16 illustrates a generic encoding method 100 in accordance with a general aspect of at least one embodiment. Fig. 16 is a block diagram partially representing a module or encoding method of an encoder, such as implemented in the exemplary encoder of fig. 12. The block diagram of fig. 16 also corresponds to the general method of fig. 23.

According to a general embodiment, a method 100 for encoding is disclosed. The method comprises the following steps: for non-binary intra CUs generated by ABT partitioning, intra sub-partitions are selected. Thus, determining 11 intra sub-partition modes includes: one of the size of the intra sub-partition or the number of intra sub-partitions used in the intra sub-partition mode is adapted to the width or height of the image block (which is not a power of two). The determining further includes searching for intra-prediction modes and sub-partitions that give optimal RD performance, and encoding the modes as specified in prior art encoding methods. The residual is calculated in the usual way by subtracting the predicted value from the current pixel value and then the remainder of the processing (transform, quantization, CABAC coding, etc.) is performed as in the prior art coding method in the general coding step 12.

Fig. 17 illustrates a generic decoding method 200 in accordance with a general aspect of at least one embodiment. Fig. 17 is a block diagram partially representing a module or decoding method of a decoder, such as implemented in the exemplary decoder of fig. 13. The block diagram of fig. 17 also corresponds to the general method of fig. 24.

According to a general embodiment, a method 200 for decoding is disclosed. The method comprises the following steps: for non-dyadic intra CUs generated by ABT partitioning, the intra prediction mode is decoded and the corresponding intra sub-partition is selected according to any of the disclosed variations. Thus, determining 21 intra sub-partition modes includes: at least one of the size of the intra sub-partition or the number of intra sub-partitions used in the intra sub-partition mode is adapted to the width or height of the image block (which is not a power of two). Decoding 22 then further includes: the residual value is decoded by performing CABAC decoding, dequantization of the transform coefficients, and then inverse transform of the decoded coefficients, and the thus decoded residual value is added to the predicted value to decode the current block.

In the following, 3 variant embodiments for applying an ISP to an asymmetric CU generated by ABT are presented. However, the variants are not limited to ABTs alone, and may be applied to asymmetric CUs generated by any other CU partition. Therefore, we will consider that non-binary CUs are rectangular, i.e. they are not equal in width and height, and their width or height is not a power of 2. For ease of presentation we will consider a non-dyadic block size of W3H/4 or 3W/4H, where the values of W and H are powers of two. In other words, the size w×h is the size of an asymmetric partition resulting from an asymmetric partition of a parent CU of size w×h, where the values of width W and height H are powers of two, and the value of at least one of width w=3w/4 or height h=3h/4 is not a power of two. Furthermore, while the exemplary embodiments are described for ABTs having a ratio (1/4, 3/4), the present principles are not limited to ABTs nor to ratios. Those skilled in the art will extend the present principles to intra-sub-partitions with non-binary CUs generated by asymmetric TTs or any other asymmetric partitioning. For example, (3/8, 5/8), (1/8, 7/8) are also contemplated. According to a further example, for the case where the parent CU size is equal to 16 times the width or height, the partition ratio (5/16, 11/16), (7/16, 9/16) may also be considered. To distinguish partition TYPEs in ISP and CU partitions, we refer to the former as ISP_SPLIT_TYPE and the latter as ABT_SPLIT_TYPE, where ABT_SPLIT_TYPE can be any of the four partition TYPEs (i.e., HOR_UP, HOR_DOWN, VERT_LEFT, VER_RIGHT) shown in FIG. 15. All child partitions use the intra prediction mode of the parent asymmetric CU for intra prediction. The sub-partitions are assumed to be processed in sequential order as in an ISP applied to a binary CU, however this assumption is not a constraint on any of the variants and any other order of processing may be followed. For example, the processing order of the sub-partitions may depend on the directionality of the prediction mode.

Fig. 18 illustrates a first variation of intra sub-partitions adapted to a non-binary CU in accordance with a general aspect of at least one embodiment. According to a first variant, the horizontal intra sub-partition mode is modified and three sub-partitions of size W×H/4 are generated for an image block of size W×3H/4. Further, following the existing VVC ISP partition rules of Table 10, for image blocks of size 3W/4 XH, the horizontal intra sub-partition mode produces four sub-partitions of size 3W/4 XH/4.

Note, however, that for a CU of size 12 x 4, according to the present ISP partitioning method, horizontal ISP partitioning produces 4 intra sub-partitions of size 12 x 1, producing sub-partitions each having 12 luma samples.

In the VVC specification, a sub-partition must include at least 16 luminance samples. Thus, according to another variant, a horizontal ISP partition of a 12×4CU produces 2 sub-partitions of size 12×2, thus each comprising 24 luminance samples.

The vertical intra sub-partition mode generates four sub-partitions of size W/4 x 3H/4 for an image block of size 3W/4 x H, and is modified and generates three sub-partitions of size W/4 x H for an image block of size 3W/4 x H, respectively. The horizontal and vertical partitioning of the non-binary CU is shown in fig. 18. As shown in the upper part of fig. 18, if a CU is of type HOR (generated by hor_up or hor_down ABT division), in horizontal division, the CU is divided into three sub-partitions each having a height H/4 and a width W. Each sub-partition of size W x H/4 has at least 16 pixels and the number of pixels is a multiple of 16.

Note, however, that for a CU of size 4 x 12, according to the present ISP vertical partition method, vertical ISP partitioning produces 4 intra sub-partitions of size 1 x 12, producing sub-partitions each having 12 luminance samples.

In the VVC specification, a sub-partition must include at least 16 luminance samples. Thus, according to another variant, a vertical ISP partition with a CU of size 4×12 results in 2 sub-partitions of size 2×12, thus each comprising 24 luminance samples.

According to a variant of the embodiment of fig. 18, a CU of size 3W/4 xh is vertically split into three sub-partitions only when the VVC splitting rules of the ISP generate sub-partitions with transform sizes that are not supported in the codec design under consideration. For example, in the case of a CU of size 24×8, if transform size 6 is supported in the codec design under consideration, the CU may be partitioned into 4 sub-partitions of size 6×8. If transform size 6 is not supported, the CU is partitioned vertically into 3 sub-partitions of width 8 (which is a power of two).

Similarly, according to this variant, a CU of size w×3h/4 is split horizontally into three sub-partitions only if the VVC splitting rule of the ISP generates a sub-partition with a transform size that is not supported in the codec design under consideration. For example, in the case of a CU of size 8×24, if transform size 6 is supported in the codec design under consideration, the CU may be partitioned into 4 sub-partitions of size 8×6. If transform size 6 is not supported, the CU is split horizontally into 3 sub-partitions of height 8 (which is a power of two).

In vertical partitioning, intra sub-partition partitioning remains unchanged and a block is partitioned into four sub-partitions each having a width W/4 and a height 3H/4. In this case, the sub-partition of size W/4X3H/4 has the number of pixels (which is not a power of two). This variant assumes that transforms of sizes 3H/4 and 3W/4 are supported, i.e. the number of pixels is neither equal to 16 nor a power of two. The transform size is the same as that required for the parent asymmetric CU, i.e., 3H/4 XW or H3H/4, where H and W are powers of 2. Similarly, as shown in the lower part of FIG. 18, if a CU is of type VER (resulting from VER_LEFT or VER_RIGHT partition), then in horizontal partition, the CU is partitioned into four sub-partitions each 3W/4 in width and H/4 in height. In vertical partitioning, it is partitioned into three sub-partitions each having a width W/4 and a height H, and is therefore compatible with a transform size having the number of pixels that is a power of two.

According to a variant of the first variant, for an image block of size w×3H/4, the horizontal intra sub-partition mode generates three sub-partitions of size w×h/4, while for an image block of size 3W/4×h, the horizontal intra sub-partition mode generates 2 sub-partitions of size 3W/4×h/2. Separately, for an image block of size W×3H/4, the vertical intra sub-partition mode generates two sub-partitions of size W/2×3H/4, and for an image block of size W×3H/4, the vertical intra sub-partition mode generates three sub-partitions of size W×H/4. That is, if a CU is a type HOR, in vertical partitioning, the CU is partitioned into two sub-partitions each having a width W/2 and a height 3H/4, instead of four sub-partitions. Similarly, if a CU is of the type VER, in horizontal partitioning, the CU is partitioned into two sub-partitions each 3W/4 in width and H/2 in height, instead of four sub-partitions.

As previously explained, the first variant assumes that transforms of sizes 3H/4 and 3W/4 (i.e., transforms having a number of pixels that are neither equal to 16 nor a power of two) are supported, which are the same transform sizes required by the parent asymmetric CU, i.e., 3H/4 xw or hx3W/4, where H and W are powers of 2. If no non-binary transform is supported at all and only binary transforms are used, in another variant of the first variant, the asymmetric CU is always split in the ISP. If it is a type HOR, it is split horizontally into three sub-partitions. Similarly, if it is a type VER, it is vertically partitioned into three sub-partitions. In this case, since the type of segmentation is implicit, NO ISP mode flag indicating no_split or HOR-SPLIT or ver_split is transmitted.

Fig. 19 illustrates a second variation of intra sub-partitions adapted to a non-binary CU in accordance with a general aspect of at least one embodiment. According to a second variant, for an image block of size w×3h/4, the horizontal up-intra sub-partition mode is modified and two sub-partitions are generated comprising an upper intra sub-partition of size w×h/4 and a lower intra sub-partition of size w×h/2, or for an image block of size w×3h/4, the horizontal down-intra sub-partition mode generates two sub-partitions comprising an upper intra sub-partition of size w×h/2 and a lower intra sub-partition of size w×h/4. Separately, for an image block of size 3W/4 xh, the vertical left intra sub-partition mode is modified and two sub-partitions comprising a left intra sub-partition of size W/4 xh and a right intra sub-partition of size W/2 xh are generated, or for an image block of size 3W/4 xh, the vertical right intra sub-partition mode is modified and two sub-partitions comprising a left intra sub-partition of size W/2 xh and a right intra sub-partition of size W/4 xh are generated. As shown in fig. 19, the asymmetric CU is divided horizontally and vertically. If a CU is of the TYPE HOR (generated by ABT_SPLIT_TYPE of HOR_UP or HOR_DOWN), then the CU has only two horizontal partitions, namely hor_up and hor_down, but does not allow vertical partitioning. In the case of hor_up, a CU is divided into two sub-partitions, with the upper sub-partition having a height H/4 and a width W and the lower sub-partition having a height H/2 and a width W. In the case of hor_down, there are also two sub-partitions, with the upper sub-partition having a height H/2 and a width W and the lower sub-partition having a height H/4 and a width W. If a CU is of the VER TYPE (generated by ABT_SPLIT_TYPE of VER_LEFT or VER_RIGHT), then the CU has only two vertical partitions, namely ver_left and ver_right. In either case, the ISP mode flag is used to signal either one of the two horizontal partitions (hor_up and hor_down for the HOR type asymmetric CU) or either one of the two vertical partitions (ver_left and ver_right for the VER type asymmetric CU).

Advantageously, the segmentation method is compatible with a transform with ISP having a number of pixels equal to a power of two. Thus, if no transform with a number of pixels that is not a multiple of 4 or 16 is allowed, in another variant of the second variant, the asymmetric CU is always partitioned into two sub-partitions according to its abt_split_type. One bit may be used to signal the ISP mode flag to indicate whether to perform up-split or down-split (hor_up and hor_down for HOR type asymmetric CUs) or left-split or right-split (ver_left and ver_right for VER type asymmetric CUs).

According to a further variant, the first variant and the second variant are combined adapted to intra sub-partitions of a non-binary CU. Various combinations are possible.

Fig. 20 illustrates a third variation of intra sub-partitions adapted to a non-binary CU in accordance with a general aspect of at least one embodiment. For example, in one further variant, for abt_split_type of hor_up and hor_down, respectively, the ISP horizontal partition TYPEs are hor_up and hor_down as in the second variant, the CU is horizontally partitioned into 2 sub-partitions of size W/4×h and/or W/2×h, and the vertical partition TYPE is a vertical partition TYPE as in the first variant (i.e., the CU is vertically partitioned into 4 sub-partitions). Similarly, for abt_split_type for ver_left and ver_right, ISP vertical SPLIT TYPEs are ver_left and ver_right, respectively, as in the second variant, and horizontal SPLIT TYPEs are horizontal SPLIT TYPEs as in the first variant.

Fig. 21 illustrates a fourth variation of intra sub-partitions adapted to a non-binary CU in accordance with a general aspect of at least one embodiment. In a fifth variant, if a CU is of TYPE HOR (produced by hor_up or hor_down abt_split_type), the CU is SPLIT into three horizontal partitions of equal size w×h/4, or the CU is SPLIT into two vertical partitions of equal size W/2×3h/4, as shown in fig. 21. Similarly, if a CU is of TYPE VER (produced by VER_LEFT or VER_RIGHT ABT_SPLIT_TYPE), the CU is SPLIT into three vertical partitions of size W/4 XH, or the CU is SPLIT into two vertical partitions of equal size 3W/4 XH/2.

Fig. 22a and 22b illustrate a fifth variation of intra sub-partitions adapted to a non-binary CU in accordance with a general aspect of at least one embodiment. In a fifth variant, if the CU is of TYPE HOR (produced by hor_up or hor_down abt_split_type), the CU is partitioned into two horizontal partitions of sizes w×h/2 and w×h/4, as shown in fig. 22a and 22 b. Similarly, if a CU is of TYPE VER (generated by VER_LEFT or VER_RIGHT ABT_SPLIT_TYPE), the CU is partitioned into two vertical partitions of sizes W/2 XH and W/4 XH (not shown on FIGS. 22a and 22 b). According to an additional feature, the TYPE of ISP SPLIT corresponds to the TYPE of ABT_SPLIT_TYPE. That is, if abt_split_type is hor_up as shown in fig. 22a, isp_split_type is hor_up, and if abt_split_type is hor_down as shown in fig. 22b, isp_split_type is hor_down. Similarly, if abt_split_type is ver_left, isp_split_type is ver_left, and if abt_split_type is ver_right, isp_split_type is ver_right. Advantageously, the fifth variant saves bits in the signaling, since isp_split_type is implicitly derived from abt_split_type.

Thus, according to an exemplary variant embodiment of the above ratio (1/4, 3/4), a general embodiment of the ratio r is now described, where r is a positive rational number smaller than 1, such that rH or rW is a positive integer different from a power of 2. Advantageously, the ratio r is chosen to produce the transform size supported by the video codec under consideration. We now consider that the intra sub-partition mode generates p sub-partitions, p being a positive integer.

According to a first general variant corresponding to the exemplary variant of fig. 18, for an image block of size rW ×h, the vertical intra sub-partition mode generates a block of sizeWherein r is a positive rational number less than 1 and p is a positive integer such that rW is other than 2A positive integer of a power of (2), and->Corresponding to the transform size supported by the video codec under consideration. Similarly, for an image block of size W×rH, the horizontal intra sub-partition mode generates a size +.>Wherein r is a positive rational number smaller than 1 and p is a positive integer such that rH is a positive integer different from a power of 2 and +.>Corresponding to the transform size supported by the video codec under consideration.

According to a second general variant corresponding to the exemplary variant of fig. 19, for an image block of size w×rh, the horizontal upward intra sub-partition mode generation includes a block of size Upper intra sub-partition and size of +.>Two sub-partitions of the lower intra sub-partition of (2) such that the transform size +.>And->Supported by the codec design under consideration. In a modification, the transform size is made +.>And->Both equal to a power of 2. Similarly, for image blocks of size rW ×h, the tile is verticalDirect left intra sub-partition mode generation including size +.>Left intra sub-partition and size of Two sub-partitions of the right-side intra sub-partition of (2) such that the transform size +.>And->Supported by the video codec under consideration. According to another variation, one of a horizontal up intra sub-partition mode or a horizontal down intra sub-partition mode is used for image blocks of size w×rh, and wherein one of a vertical left intra sub-partition mode or a vertical right intra sub-partition mode is used for image blocks of size rW ×h.

According to other general variant embodiments, any of the combinations of variants described for ratio 3/4 are compatible with ratio r.

The present application describes various aspects including tools, features, embodiments, models, methods, and the like. Many of these aspects are described in detail and at least illustrate individual characteristics, often in a manner that may sound limited. However, this is for clarity of description and does not limit the application or scope of these aspects. Indeed, all the different aspects may be combined and interchanged to provide further aspects. Moreover, these aspects may also be combined and interchanged with those described in previous submissions.

Fig. 23 illustrates a generic encoding method 100 in accordance with a general aspect of at least one embodiment. Fig. 23 is a block diagram partially representing a module or encoding method of an encoder, such as implemented in the exemplary encoder of fig. 9. The block diagram of fig. 23 also corresponds to the method of fig. 5 or 16.

According to a general embodiment, a method 100 for encoding is disclosed. The method comprises the following steps: for non-dyadic intra CUs generated by ABT partitioning, intra prediction modes are selected. Thus, determining 11 an intra prediction mode for an image block comprises: at least one of the intra prediction modes in a set of possible configurations for intra prediction is adapted to the width or height of the image block (which is not a power of two). The determination further includes searching for a prediction mode (angular prediction, intra-sub-partition) that gives the optimal RD performance and encoding the mode as specified in the prior art encoding methods. The residual is calculated in the usual way by subtracting the predicted value from the current original pixel value and then the remainder of the processing (quantization, CABAC coding, etc.) is performed as in the prior art coding method in the general coding step 12.

Fig. 24 illustrates a generic decoding method 200 in accordance with a general aspect of at least one embodiment. Fig. 24 is a block diagram partially representing a module or decoding method of a decoder, such as implemented in the exemplary decoder of fig. 10. The block diagram of fig. 6 also corresponds to the method of fig. 6 or 17.

According to a general embodiment, a method 200 for decoding is disclosed. The method comprises the following steps: for non-dyadic intra CUs generated by ABT partitioning, the intra prediction mode is decoded and the corresponding mode is selected according to any of the disclosed variations. Thus, determining 11 an intra prediction mode for an image block comprises: at least one of the intra prediction modes (angular prediction, intra sub-partition) in a set of possible configurations for intra prediction is adapted to the width or height of the image block (which is not a power of two). Decoding 22 then further includes: the residual value is decoded by performing CABAC decoding, dequantization of the transform coefficients, and then inverse transform of the decoded coefficients, and the residual value is added to the predicted value to decode the current block.

The aspects described and contemplated in this patent application may be embodied in many different forms. The following figures 9, 10 and 11 provide some embodiments, but other embodiments are contemplated, and the discussion of figures 9, 10 and 11 does not limit the breadth of the embodiments. At least one of these aspects generally relates to video encoding and decoding, and at least one other aspect generally relates to transmitting a generated or encoded bitstream. These and other aspects may be implemented as a method, an apparatus, a computer-readable storage medium having stored thereon instructions for encoding or decoding video data according to any of the methods, and/or a computer-readable storage medium having stored thereon a bitstream generated according to any of the methods.

In the present application, the terms "reconstruct" and "decode" are used interchangeably, the terms "pixel" and "sample" are used interchangeably, and the terms "image", "picture" and "frame" are used interchangeably.

Various methods are described herein, and each method includes one or more steps or actions for achieving the method. Unless a particular order of steps or actions is required for proper operation of the method, the order and/or use of particular steps and/or actions may be modified or combined. Furthermore, terms such as "first," second, "and the like, may be used in various implementations to modify elements, components, steps, operations, and the like, such as" first decoding "and" second decoding. The use of such terms does not imply a ordering of modified operations unless specifically required. Thus, in this example, the first decoding need not be performed prior to the second decoding, and may occur, for example, prior to, during, or in overlapping time periods.

The various methods and other aspects described in this disclosure may be used to modify modules, such as intra-prediction modules (160, 260) of video encoder 100 and decoder 200, as shown in fig. 9 and 10. Furthermore, aspects of the present application are not limited to VVC or HEVC, and may be applied to, for example, other standards and recommendations (whether pre-existing or developed in the future) and extensions of any such standards and recommendations (including VVC and HEVC). The aspects described in the present application may be used alone or in combination unless otherwise indicated or technically excluded.

Various values are used in the present application, such as the number of angular orientations, block sizes. The particular values are for illustration purposes and the aspects are not limited to these particular values.

Fig. 9 shows an encoder 100. Variations of this encoder 100 are contemplated, but for clarity, the encoder 100 is described below without describing all contemplated variations.

Prior to encoding, the video sequence may undergo a pre-encoding process (101), such as applying a color transform to the input color picture (e.g., converting from RGB 4:4 to YCbCr 4:2: 0), or performing remapping of the input picture components, in order to obtain a signal distribution that is more resilient to compression (e.g., histogram equalization using one of the color components). Metadata may be associated with the preprocessing and appended to the bitstream.

As described below, in encoder 100, pictures are encoded by encoder elements. The pictures to be encoded are partitioned (102) and processed in units such as CUs. For example, each unit is encoded using an intra mode or an inter mode. When a unit is encoded in intra mode, the unit performs intra prediction (160). In inter mode, motion estimation (175) and compensation (170) are performed. The encoder decides (105) which of the intra-mode or inter-mode is used to encode the unit and indicates the intra/inter decision by, for example, a prediction mode flag. For example, the prediction residual is calculated by subtracting (110) the prediction block from the original image block.

The prediction residual is then transformed (125) and quantized (130). The quantized transform coefficients, as well as motion vectors and other syntax elements, are entropy encoded (145) to output a bitstream. The encoder may skip the transform and directly apply quantization to the untransformed residual signal. The encoder may bypass both transformation and quantization, i.e. directly encode the residual without applying a transformation or quantization process.

The encoder decodes the encoded block to provide a reference for further prediction. The quantized transform coefficients are dequantized (140) and inverse transformed (150) to decode the prediction residual. The decoded prediction residual and the prediction block are combined (155) to reconstruct an image block. A loop filter (165) is applied to the reconstructed picture to perform, for example, deblocking/SAO (sample adaptive offset) filtering to reduce coding artifacts. The filtered image is stored at a reference picture buffer (180).

Fig. 10 shows a block diagram of a video decoder 200. In decoder 200, the bit stream is decoded by decoder elements, as described below. The video decoder 200 typically performs a decoding stage that is opposite to the encoding stage as described in fig. 5. Encoder 100 also typically performs video decoding as part of encoding video data.

In particular, the input to the decoder comprises a video bitstream, which may be generated by the video encoder 100. First, the bitstream is entropy decoded (230) to obtain transform coefficients, motion vectors, and other encoded information. The picture partition information indicates how to partition the picture. Thus, the decoder may partition (235) the picture according to the decoded picture partition information. The transform coefficients are dequantized (240) and inverse transformed (250) to decode the prediction residual. The decoded prediction residual and the prediction block are combined (255) to reconstruct an image block. The prediction block may be obtained (270) by intra prediction (260) or motion compensated prediction (i.e., inter prediction) (275). A loop filter (265) is applied to the reconstructed image. The filtered image is stored at a reference picture buffer (280).

The decoded picture may further undergo post-decoding processing (285), such as an inverse color transform (e.g., conversion from YCbCr 4:2:0 to RGB 4:4:4) or performing an inverse remapping of the remapping process performed in the pre-encoding processing (101). The post-decoding process may use metadata derived in the pre-encoding process and signaled in the bitstream.

FIG. 11 illustrates a block diagram of an example of a system in which various aspects and embodiments are implemented. The system 2000 may be embodied as a device including various components described below and configured to perform one or more of the aspects described in this document. Examples of such devices include, but are not limited to, various electronic devices such as personal computers, laptops, smartphones, tablets, digital multimedia set-top boxes, digital television receivers, personal video recording systems, connected home appliances, and servers. The elements of system 2000 may be embodied in a single Integrated Circuit (IC), a plurality of ICs, and/or discrete components, alone or in combination. For example, in at least one embodiment, the processing and encoder/decoder elements of system 2000 are distributed across multiple ICs and/or discrete components. In various embodiments, system 2000 is communicatively coupled to one or more other systems or other electronic devices via, for example, a communication bus or through dedicated input and/or output ports. In various embodiments, the system 2000 is configured to implement one or more of the aspects described in this document.

The system 2000 includes at least one processor 2010 configured to execute instructions loaded therein for implementing various aspects such as those described in this document. Processor 2010 may include embedded memory, an input-output interface, and various other circuitry known in the art. The system 2000 includes at least one memory 2020 (e.g., a volatile memory device and/or a non-volatile memory device). The system 2000 includes a storage device 2040, which may include non-volatile memory and/or volatile memory, including, but not limited to, electrically erasable programmable read-only memory (EEPROM), read-only memory (ROM), programmable read-only memory (PROM), random Access Memory (RAM), dynamic Random Access Memory (DRAM), static Random Access Memory (SRAM), flash memory, a magnetic disk drive, and/or an optical disk drive. By way of non-limiting example, the storage devices 2040 may include internal storage devices, attached storage devices (including removable and non-removable storage devices), and/or network-accessible storage devices.

The system 2000 includes an encoder/decoder module 2030 configured to process data to provide encoded video or decoded video, for example, and the encoder/decoder module 2030 may include its own processor and memory. The encoder/decoder module 2030 represents one or more modules that may be included in a device to perform encoding and/or decoding functions. As is well known, an apparatus may include one or both of an encoding module and a decoding module. Additionally, the encoder/decoder module 2030 may be implemented as a separate element of the system 2000 or may be incorporated within the processor 2010 as a combination of hardware and software as known to those skilled in the art.

Program code to be loaded onto the processor 2010 or the encoder/decoder 2030 to perform various aspects described in this document may be stored in the storage device 2040 and subsequently loaded onto the memory 2020 for execution by the processor 2010. According to various embodiments, one or more of the processor 2010, memory 2020, storage 2040 and encoder/decoder module 2030 may store one or more of various items during execution of the process described in this document. Such storage items may include, but are not limited to, input video, decoded video or partially decoded video, bitstreams, matrices, variables, and intermediate or final results of processing equations, formulas, operations, and arithmetic logic.

In some embodiments, memory within the processor 2010 and/or encoder/decoder module 2030 is used to store instructions and provide working memory for processing required during encoding or decoding. However, in other embodiments, memory external to the processing device (e.g., the processing device may be the processor 2010 or the encoder/decoder module 2030) is used for one or more of these functions. The external memory may be memory 2020 and/or storage 2040, such as dynamic volatile memory and/or nonvolatile flash memory. In several embodiments, external non-volatile flash memory is used to store an operating system such as a television. In at least one embodiment, a fast external dynamic volatile memory such as RAM is used as a working memory for video encoding and decoding operations, such as MPEG-2 (MPEG refers to moving picture experts group, MPEG-2 is also known as ISO/IEC 13818, and 13818-1 is also known as h.222, 13818-2 is also known as h.262), HEVC (HEVC refers to high efficiency video encoding, also known as h.265 and MPEG-H part 2), or VVC (universal video encoding, a new standard developed by the joint video experts group (jfet)).

Input to the elements of system 2000 may be provided through a variety of input devices as shown in block 2005. Such input devices include, but are not limited to: (i) A Radio Frequency (RF) section that receives an RF signal transmitted over the air, for example, by a broadcaster; (ii) A Component (COMP) input terminal (or set of COMP input terminals); (iii) a Universal Serial Bus (USB) input terminal; and/or (iv) a High Definition Multimedia Interface (HDMI) input terminal. Other examples not shown in fig. 11 include composite video.

In various embodiments, the input devices of block 2005 have associated respective input processing elements known in the art. For example, the RF section may be associated with elements suitable for: (i) select the desired frequency (also referred to as a select signal, or band limit the signal to one frequency band), (ii) down-convert the selected signal, (iii) band limit again to a narrower frequency band to select a signal band that may be referred to as a channel in some embodiments, for example, (iv) demodulate the down-converted and band limited signal, (v) perform error correction, and (vi) de-multiplex to select the desired data packet stream. The RF portion of the various embodiments includes one or more elements for performing these functions, such as a frequency selector, a signal selector, a band limiter, a channel selector, a filter, a down-converter, a demodulator, an error corrector, and a demultiplexer. The RF section may include a tuner that performs various of these functions including, for example, down-converting the received signal to a lower frequency (e.g., intermediate or near baseband frequency) or to baseband. In one set-top box embodiment, the RF section and its associated input processing elements receive RF signals transmitted over a wired (e.g., cable) medium and perform frequency selection by filtering, down-converting and re-filtering to a desired frequency band. Various embodiments rearrange the order of the above (and other) elements, remove some of these elements, and/or add other elements that perform similar or different functions. Adding components may include inserting components between existing components, such as an insertion amplifier and an analog-to-digital converter. In various embodiments, the RF section includes an antenna.

Additionally, the USB and/or HDMI terminals may include respective interface processors for connecting the system 2000 to other electronic devices across a USB and/or HDMI connection. It should be appreciated that various aspects of the input processing (e.g., reed-Solomon (Reed-Solomon) error correction) may be implemented, for example, within a separate input processing IC or within the processor 2010, as desired. Similarly, aspects of the USB or HDMI interface processing may be implemented within a separate interface IC or within the processor 2010, as desired. The demodulated, error corrected, and demultiplexed streams are provided to various processing elements including, for example, a processor 2010 and an encoder/decoder 2030, which operate in conjunction with memory and storage elements to process the data streams as needed for presentation on an output device.

The various elements of system 2000 may be disposed within an integrated housing in which they may be interconnected using a suitable connection arrangement 2015 and data transferred therebetween, e.g., internal buses as known in the art, including inter-IC (I2C) buses, wiring, and printed circuit boards.

The system 2000 includes a communication interface 2050 that enables communication with other devices via a communication channel 2090. The communication interface 2050 may include, but is not limited to, a transceiver configured to transmit and receive data over a communication channel 2090. The communication interface 2050 may include, but is not limited to, a modem or a network card, and the communication channel 2090 may be implemented within a wired and/or wireless medium, for example.

In various embodiments, data is streamed or otherwise provided to system 2000 using a wireless network, such as a Wi-Fi network, e.g., IEEE 802.11 (IEEE refers to institute of electrical and electronics engineers). Wi-Fi signals in these embodiments are received through communication channel 2090 and communication interface 2050, which are suitable for Wi-Fi communication. The communication channel 2090 of these embodiments is typically connected to an access point or router that provides access to external networks, including the internet, for allowing streaming applications and other communications across operators. Other embodiments provide streaming data to the system 2000 using a set top box that delivers the data over the HDMI connection of input box 2005. Other embodiments provide streaming data to the system 2000 using the RF connection of input box 2005. As described above, various embodiments provide data in a non-streaming manner. In addition, various embodiments use wireless networks other than Wi-Fi, such as cellular networks or bluetooth networks.

The system 2000 may provide output signals to various output devices including a display 2065, speakers 2075, and other peripheral devices 2085. The display 2065 of various embodiments includes, for example, one or more of a touch screen display, an Organic Light Emitting Diode (OLED) display, a curved display, and/or a collapsible display. The display 2065 may be used in a television, a tablet, a laptop, a cellular phone (mobile phone), or other device. The display 2065 may also be integrated with other components (e.g., as in a smart phone), or with a separate component (e.g., an external monitor of a laptop). In various examples of embodiments, the other peripheral devices 2085 include one or more of a single digital video disc (or digital versatile disc) (DVR, which may be referred to by both terms), a disc player, a stereo system, and/or a lighting system. Various embodiments use one or more peripheral devices 2085 to provide functionality based on the output of the system 2000. For example, the disc player performs the function of playing the output of the system 2000.

In various embodiments, control signals are communicated between the system 2000 and the display 2065, speaker 2075, or other peripheral device 2085 using signaling, such as av.link, consumer Electronics Control (CEC), or other communication protocol that enables device-to-device control with or without user intervention. The output devices may be communicatively coupled to the system 2000 via dedicated connections through respective interfaces 2065, 2075, and 2085. Alternatively, the output device may be connected to the system 2000 via the communication interface 2050 using a communication channel 2090. The display 2065 and the speaker 2075 may be integrated in a single unit with other components of the system 2000 in an electronic device (such as, for example, a television). In various embodiments, the display interface 2065 includes a display driver, such as, for example, a timing controller (tcon) chip.

If the RF portion of input 2005 is part of a separate set top box, display 2065 and speaker 2075 may alternatively be separate from one or more of the other components. In various embodiments where the display 2065 and the speaker 2075 are external components, the output signals may be provided via dedicated output connections (including, for example, an HDMI port, a USB port, or a COMP output).

These embodiments may be implemented by computer software implemented by the processor 2010, or by hardware, or by a combination of hardware and software. As a non-limiting example, these embodiments may be implemented by one or more integrated circuits. The memory 2020 may be of any type suitable to the technical environment and may be implemented using any suitable data storage technology, such as optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory and removable memory as non-limiting examples. The processor 2010 may be of any type suitable to the technical environment and may encompass one or more of microprocessors, general purpose computers, special purpose computers, and processors based on a multi-core architecture, as non-limiting examples.

Various implementations participate in decoding. As used in this disclosure, "decoding" may encompass all or part of a process performed on a received encoded sequence, for example, in order to produce a final output suitable for display. In various implementations, such processes include one or more processes typically performed by a decoder, such as entropy decoding, inverse quantization, inverse transformation, and differential decoding. In various implementations, such processes also or alternatively include processes performed by decoders of various implementations described in this disclosure, e.g., including determining intra-prediction modes with wide-angle prediction that are adapted to non-dyadic blocks and decoding the non-dyadic blocks using the intra-prediction modes.

As a further example, in an embodiment, "decoding" refers only to entropy decoding, in another embodiment "decoding" refers only to differential decoding, and in yet another embodiment "decoding" refers to a combination of entropy decoding and differential decoding. The phrase "decoding process" is intended to refer specifically to a subset of operations or broadly to a broader decoding process, as will be clear based on the context of the specific description, and is believed to be well understood by those skilled in the art.

Various implementations participate in the encoding. In a similar manner to the discussion above regarding "decoding," as used in this disclosure, may encompass, for example, all or part of a process performed on an input video sequence to produce an encoded bitstream. In various implementations, such processes include one or more processes typically performed by an encoder, such as partitioning, differential encoding, transformation, quantization, and entropy encoding. In various implementations, such processes also or alternatively include processes performed by the encoder of the various implementations described in this disclosure, e.g., determining intra-prediction modes with wide-angle prediction that are adapted to non-dyadic blocks and encoding the non-dyadic blocks using the intra-prediction modes.

As a further example, in an embodiment, "encoding" refers only to entropy encoding, in another embodiment, "encoding" refers only to differential encoding, and in yet another embodiment, "encoding" refers to a combination of differential encoding and entropy encoding. Whether the phrase "encoding process" refers specifically to a subset of operations or broadly refers to a broader encoding process will be apparent based on the context of the specific description and is believed to be well understood by those skilled in the art.

Note that syntax elements (e.g., intraPredAngle) as used herein are descriptive terms. Thus, they do not exclude the use of other syntax element names.

When the figures are presented as flow charts, it should be understood that they also provide block diagrams of corresponding devices. Similarly, when the figures are presented as block diagrams, it should be understood that they also provide a flow chart of the corresponding method/process.

Various embodiments are directed to rate distortion optimization. In particular, during the encoding process, a balance or trade-off between rate and distortion is typically considered, often taking into account constraints of computational complexity. Rate distortion optimization is typically expressed as minimizing a rate distortion function, which is a weighted sum of rate and distortion. There are different approaches to solving the rate distortion optimization problem. For example, these methods may be based on extensive testing of all coding options (including all considered modes or coding parameter values) and evaluating their coding costs and the associated distortion of the reconstructed signal after encoding and decoding completely. Faster methods may also be used to reduce coding complexity, in particular the calculation of approximate distortion based on prediction or prediction residual signals instead of reconstructed residual signals. A mix of the two methods may also be used, such as by using approximate distortion for only some of the possible coding options, and full distortion for other coding options. Other methods evaluate only a subset of the possible coding options. More generally, many methods employ any of a variety of techniques to perform the optimization, but the optimization is not necessarily a complete assessment of both coding cost and associated distortion.

The specific implementations and aspects described herein may be implemented in, for example, a method or process, an apparatus, a software program, a data stream, or a signal. Even if only discussed in the context of a single form of implementation (e.g., discussed only as a method), the implementation of the features discussed may also be implemented in other forms (e.g., an apparatus or program). The apparatus may be implemented in, for example, suitable hardware, software and firmware. The method may be implemented in a processor such as that commonly referred to as a processing device,

the processing device includes, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. Processors also include communication devices such as, for example, computers, cell phones, portable/personal digital assistants ("PDAs"), and other devices that facilitate communication of information between end users.

Reference to "one embodiment" or "an embodiment" or "one embodiment" or "an embodiment" and other variations thereof means that a particular feature, structure, characteristic, etc., described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrase "in one embodiment" or "in an embodiment" or "in one embodiment" or "in an embodiment" and any other variations that occur throughout this application are not necessarily all referring to the same embodiment.

In addition, the present application may be directed to "determining" various information. The determination information may include, for example, one or more of estimation information, calculation information, prediction information, or retrieval information from memory.

Furthermore, the present application may be directed to "accessing" various information. The access information may include, for example, one or more of receiving information, retrieving information (e.g., from memory), storing information, moving information, copying information, computing information, determining information, predicting information, or estimating information.

In addition, the present application may be directed to "receiving" various information. As with "access," receipt is intended to be a broad term. Receiving information may include, for example, one or more of accessing information or retrieving information (e.g., from memory). Further, during operations such as, for example, storing information, processing information, transmitting information, moving information, copying information, erasing information, computing information, determining information, predicting information, or estimating information, the "receiving" is typically engaged in one way or another.

It should be understood that, for example, in the case of "a/B", "a and/or B", and "at least one of a and B", use of any of the following "/", "and/or" and "at least one" is intended to cover selection of only the first listed option (a), or selection of only the second listed option (B), or selection of both options (a and B). As a further example, in the case of "A, B and/or C" and "at least one of A, B and C", such phrases are intended to cover selection of only the first listed option (a), or only the second listed option (B), or only the third listed option (C), or only the first and second listed options (a and B), or only the first and third listed options (a and C), or only the second and third listed options (B and C), or all three options (a and B and C). As will be apparent to one of ordinary skill in the art and related arts, this extends to as many items as are listed.

Also, as used herein, the word "signaling" refers to (among other things) indicating something to the corresponding decoder. For example, in some embodiments, an encoder encodes a particular one of a plurality of parameters for transformation. Thus, in one embodiment, the same parameters are used on both the encoder side and the decoder side. Thus, for example, an encoder may transmit (explicit signaling) certain parameters to a decoder so that the decoder may use the same certain parameters. Conversely, if the decoder already has specific parameters, among others, signaling can be used without transmitting (implicit signaling) to simply allow the decoder to know and select the specific parameters. By avoiding transmission of any actual functions, bit savings are achieved in various embodiments. It should be appreciated that the signaling may be implemented in various ways. For example, in various implementations, information is signaled to a corresponding decoder using one or more syntax elements, flags, and the like. Although the foregoing relates to the verb form of the word "signal," the word "signal" may also be used herein as a noun.

It will be apparent to one of ordinary skill in the art that implementations may produce various signals formatted to carry, for example, storable or transmittable information. The information may include, for example, instructions for performing a method or data resulting from one of the implementations. For example, the signal may be formatted to carry the bit stream of the described embodiments. Such signals may be formatted, for example, as electromagnetic waves (e.g., using the radio frequency portion of the spectrum) or baseband signals. Formatting may include, for example, encoding the data stream and modulating the carrier with the encoded data stream. The information carried by the signal may be, for example, analog or digital information. It is known that signals may be transmitted over a variety of different wired or wireless links. The signal may be stored on a processor readable medium.

We describe a number of embodiments. The features of these embodiments may be provided separately or in any combination in the various claim categories and types. Further, embodiments may include one or more of the following features, devices, or aspects, alone or in any combination, across the various claim categories and types:

in the decoder and/or encoder, the intra prediction mode is adapted to the width or height (not a power of two) of the block (called non-dyadic block).

A non-dyadic block of height h=rh and width w=w is obtained, where H and W are powers of two, and where r is not a power of two.

A non-dyadic block of height h=h and width w=rw is obtained, where H and W are powers of two, and where r is not a power of two.

Obtain a non-dyadic block of height h=h and width w=3w/4, where H and W are powers of two.

Obtain a non-dyadic block of height h=h/3 and width w=w, where H and W are powers of two.

Adapting intra prediction modes, wherein only regular angle intra prediction modes are allowed, and the reference array used in intra prediction is extended to a size equal to h+w+1.

Adapting the intra prediction mode, wherein only two wide angle intra prediction modes are allowed, and expanding the reference array used in intra prediction to a size equal to 2h+p or 2w+p, where p=1, 2 or 4, depending on the width W and height H of the image block.

Adapting the intra prediction mode, wherein the angle values of at least one regular angle intra prediction mode are modified, and the reference array used in intra prediction is 2h+1 or 2w+1.

In the decoder and/or encoder, intra sub-partition modes are adapted to the width or height (not a power of two) of the block (called non-binary block).

A non-dyadic block of height h=rh and width w=w is obtained, where H and W are powers of two, and where r is a rational number different from the powers of two.

A non-dyadic block of height h=h and width w= rW is obtained, where H and W are powers of two, and where r is a rational number different from the powers of two.

Obtaining a non-dyadic block of height h=rh and width w=w, where H and W are powers of two, and where r is a rational number less than 1 and of the formWherein k is _r And n _r Is a strictly positive integer such that +.>And k _r Not multiples of 2.

Obtaining a non-dyadic block of height h=h and width w= rW, where H and W are powers of two, and where r is a rational number less than 1 and of the formWherein k is _r And n _r Is a strictly positive integer such that +.>And k _r Not multiples of 2. A non-dyadic block is obtained with a height h=h and a width w=3W/4, where H and W are powers of two.

Obtain a non-dyadic block of height h=3h/4 and width w=w, where H and W are powers of two.

Adapting the intra sub-partition mode, wherein for an image block of size W x 3H/4 the horizontal intra sub-partition mode generates three sub-partitions of size W x H/4 or wherein for an image block of size 3W/4 x H the horizontal intra sub-partition mode generates four sub-partitions of size 3W/4 x H/4.

Adapting the intra sub-partition mode, wherein for an image block of size W x 3H/4, the vertical intra sub-partition mode generates four sub-partitions of size W/4 x 3H/4, or wherein for an image block of size 3W/4 x H, the vertical intra sub-partition mode generates three sub-partitions of size W/4 x H.

Adapting intra sub-partition modes, wherein for image blocks of size W x rH (where r is a rational number), horizontal intra sub-partition modes result of sizeSuch that r% p=0 and supports transform size p, or wherein for image blocks of size rW ×h, horizontal intra sub-partition mode yields a size rW ×h/4Four sub-partitions.

Adapting intra sub-partition modes, where for sizeIs a horizontal intra sub-partition mode generation size +. >K of (2) _r A sub-partition, or wherein +.>Is a horizontal intra sub-partition mode generation size +.>Is divided into four sub-partitions.

Adapting intra sub-partition modes, wherein for image blocks of size rW ×h (where r is a rational number), vertical intra sub-partition modes result of sizeWith r% p=0 and support transform size p, or for image blocks of size w×rh, the vertical intra sub-partition mode produces four sub-partitions of size W/4×rh.

Adapting intra sub-partition modes, where for sizeIs generated with a size of +.>K of (2) _r A sub-partition, or wherein +.>Is generated with a size of +.>Is divided into four sub-partitions.

Adapting an intra sub-partition mode, wherein for an image block of size W x 3H/4 a horizontal up intra sub-partition mode generates two sub-partitions comprising an upper intra sub-partition of size W x H/4 and a lower intra sub-partition of size W x H/2, or for an image block of size W x 3H/4 a horizontal down intra sub-partition mode generates two sub-partitions comprising an upper intra sub-partition of size W x H/2 and a lower intra sub-partition of size W x 3H/4.

Adapt intra sub-partition modes, where one of the following modes is always used for image blocks of size W x 3H/4: a horizontal up intra sub-partition mode is generated that includes an upper intra sub-partition of size W x H/4 and two sub-partitions of a lower intra sub-partition of size W x H/2 and a horizontal down intra sub-partition mode is generated that includes an upper intra sub-partition of size W x H/2 and two sub-partitions of a lower intra sub-partition of size W x 3H/4.

Adapting an intra sub-partition mode, wherein for an image block of size 3W/4 xh, a vertical left intra sub-partition mode generates two sub-partitions comprising a left intra sub-partition of size W/4 xh and a right intra sub-partition of size W/4 xh, or for an image block of size 3W/4 xh, a vertical right intra sub-partition mode generates two sub-partitions comprising a left intra sub-partition of size W/2 xh and a right intra sub-partition of size W/4 xh.

Adapt intra sub-partition modes, where one of the following modes is always used for image blocks of 3W/4 xh size: a vertical left intra sub-partition mode including a left intra sub-partition of size W/4 xh and two sub-partitions of a right intra sub-partition of size W/4 xh is generated and a vertical right intra sub-partition mode including a left intra sub-partition of size W/2 xh and two sub-partitions of a right intra sub-partition of size W/4 xh is generated.

A variant for adapting the intra prediction mode to a non-dyadic block is selected for application in a decoder and/or encoder.

Signaling information related to a variant of the adaptation process of the intra prediction mode to the non-binary block for application in the decoder.

Information about the variation of the adaptation process of the intra prediction mode of the non-dyadic block to be applied is derived from the availability of neighboring pixels, which derivation is applied in the decoder and/or encoder.

Inserting in the signalling a syntax element that enables the decoder to identify the adaptation process to be used, such as intra prediction modes for non-dyadic blocks.

Select the at least one adaptation process to be applied at the decoder based on the syntax elements.

A bitstream or signal comprising one or more of the described syntax elements or variants thereof.

A bitstream or signal comprising a syntax conveying information generated according to any of the embodiments.

Inserting in the signalling a syntax element that enables the decoder to enable the intra prediction mode to be applied to the non-dyadic blocks in a manner corresponding to that used by the encoder.

Creating and/or transmitting and/or receiving and/or decoding a bitstream or signal comprising one or more of the described syntax elements or variants thereof.

Creation and/or transmission and/or reception and/or decoding according to any of the embodiments.

A method, process, apparatus, medium storing instructions, medium storing data, or signal according to any one of the embodiments.

A television, set-top box, cellular telephone, tablet computer or other electronic device that performs an intra prediction mode adapted to non-dyadic blocks according to any of the described embodiments.

A television, set-top box, cellular telephone, tablet computer, or other electronic device that performs an intra-prediction process adapted to non-dyadic blocks and displays the resulting image (e.g., using a monitor, screen, or other type of display) according to any of the described embodiments.

Select (e.g., using a tuner) a channel to receive a signal comprising an encoded image and perform an intra-prediction process adapted to non-dyadic blocks according to any of the described implementations, a television, a set-top box, a cellular telephone, a tablet computer, or other electronic device.

A television, set-top box, cellular telephone, tablet computer or other electronic device that receives a signal comprising an encoded image over the air (e.g., using an antenna) and performs an intra-prediction process adapted to non-dyadic blocks according to any of the described embodiments.

Claims (58)

1. A method comprising decoding an image block, the decoding further comprising:

-determining an intra prediction mode for the image block, wherein at least one of a width or a height of the image block is not a power of two; and wherein at least one configuration of the determined intra prediction modes is adapted to the width or height of the image block (which is not a power of two); and

-decoding the image block using the determined intra prediction mode.

2. An apparatus comprising a memory and one or more processors, wherein the one or more processors are configured to:

-determining an intra prediction mode for an image block, wherein at least one of a width or a height of the image block is not a power of two; and wherein at least one configuration of intra prediction modes is adapted to the width or height of the image block (which is not a power of two); and

-decoding the block using the determined intra prediction mode.

3. The method of claim 1 or the device of claim 2, wherein determining an intra prediction mode for the image block further comprises:

-determining an intra prediction mode from a set of regular-angle intra prediction modes and wide-angle intra prediction modes for the image block, wherein at least one of the width or height of the image block is not a power of two; and wherein at least one of an angle of an angular intra prediction mode in the set or a reference array used by the angular intra prediction modes in the set is adapted to a width or a height of the image block (which is not a power of two).

4. The method of claim 3 or the device of claim 3, wherein the image blocks are not equal in width or height.

5. The method of claim 3 or the apparatus of claim 3, wherein the width of the image block is w=w and the height of the image block is h=rh, or the width of the image block is w=rw and the height of the image block is h=h, wherein H and W are powers of two, and wherein r is a positive rational number less than 1, such that rH or rW is a positive integer different from a power of 2.

6. A method according to claim 3 or an apparatus according to claim 3, wherein the width of the image block is w=w and the height of the image block is h=3h/4, or the width of the image block is w=3w/4 and the height of the image block is h=h, where H and W are powers of two.

7. The method of any of claims 4 to 6 or the apparatus of any of claims 4 to 6, wherein only regular angle intra prediction modes are allowed and a reference array used in intra prediction is extended to a size equal to h+w+1.

8. The method of any of claims 4 to 6 or the apparatus of any of claims 4 to 6, wherein only two wide-angle intra prediction modes are allowed and a reference array used in intra prediction is extended to a size equal to 2h+p or 2w+p, where p = 1, 2 or 4, depending on the width W and height H of the image block.

9. The method according to any of claims 4 to 6 or the apparatus according to any of claims 4 to 6, wherein the angle values of at least one regular angle intra prediction mode are modified and the reference array used in intra prediction is 2h+1 or 2w+1.

10. The method of claim 7 and one of claims 8 or 9 or the apparatus of claim 7 and one of claims 8 or 9, wherein enabling the method of claim 7 or the method of claim 8 or 9 is derived from availability of neighboring reconstructed samples of the reference array for use in intra prediction.

11. The method of claim 7 and one of claims 8 or 9 or the apparatus of claim 7 and one of claims 8 or 9, wherein at least one syntax data element related to enabling the method of claim 7 or the method of claim 8 or the method of claim 9 is signaled in one of a slice, a Picture Parameter Set (PPS), a Sequence Parameter Set (SPS).

12. The method of claim 1 or the device of claim 2, wherein determining an intra prediction mode for the image block further comprises:

-determining an intra-sub-partition mode for the image block, wherein one of the width or the height of the image block is not a power of two, and wherein at least one of the size of the intra-sub-partition or the number of intra-sub-partitions in the intra-sub-partition mode is adapted to the width or the height of the image block (which is not a power of two).

13. The method of claim 12 or the apparatus of claim 12, wherein the width of the image block is w=w and the height of the image block is h=rh, or the width of the image block is w= rW and the height of the image block is h=h, wherein H and W are powers of two, and wherein the ratio r is a positive rational number less than 1 such that rH or rW is a positive integer different from a power of 2.

14. The method of claim 13 or device of claim 13, wherein the ratio r is selected to produce a transform size supported by the decoding method or device.

15. The method of claim 12 or the apparatus of claim 12, wherein the width of the image block is w=w and the height of the image block is h=3h/4, or the width of the image block is w=3w/4 and the height of the image block is h=h, where W and H are powers of two.

16. The method of claim 15 or the apparatus of claim 15, wherein for an image block of size W x 3H/4, a horizontal intra sub-partition mode generates three sub-partitions of size W x H/4.

17. The method of claim 15 or the apparatus of claim 15, wherein for an image block of size 3W/4 x H, a vertical intra sub-partition mode generates three sub-partitions of size W/4 x H.

18. The method of claim 15 or the apparatus of claim 15, wherein a horizontal intra sub-partition mode of three sub-partitions of size W x H/4 is generated for image blocks of size W x 3H/4 and a vertical intra sub-partition mode of three sub-partitions of size W/4 x H is generated for image blocks of size 3W/4 x H.

19. According to claim13 or the device of claim 13, wherein for an image block of size rW x H, a vertical intra sub-partition mode generates a block of sizeWherein r is a positive rational number less than 1 and p is a positive integer such that rW is a positive integer different from a power of 2 and +.>Corresponding to a transform size supported by the decoding method or the decoding apparatus.

20. The method of claim 13 or the device of claim 13, wherein for an image block of size W x rH, a horizontal intra sub-partition mode generates a size ofWherein r is a positive rational number smaller than 1 and p is a positive integer such that rH is a positive integer different from a power of 2 and +.>Corresponding to a transform size supported by the decoding method or the decoding apparatus.

21. The method of claim 15 or the apparatus of claim 15, wherein for an image block of size W x 3H/4, a horizontal up-frame intra sub-partition mode generates two sub-partitions comprising an upper intra sub-partition of size W x H/4 and a lower intra sub-partition of size W x H/2, or for an image block of size W x 3H/4, a horizontal down-frame intra sub-partition mode generates two sub-partitions comprising an upper intra sub-partition of size W x H/2 and a lower intra sub-partition of size W x 3H/4.

22. A method according to claim 13Or the device of claim 13, wherein for an image block of size W x rH, the horizontal upward intra sub-partition mode generation comprises a block of sizeUpper intra sub-partition and size of (a)Two sub-partitions of the lower intra sub-partition of (2) such that the transform size +.>And->Supported by the decoding method or apparatus.

23. The method of claim 15 or the apparatus of claim 15, wherein for an image block of size 3W/4 xh, the vertical left intra sub-partition mode generates two sub-partitions comprising a left intra sub-partition of size W/4 xh and a right intra sub-partition of size W/4 xh, or for an image block of size 3W/4 xh, the vertical right intra sub-partition mode generates two sub-partitions comprising a left intra sub-partition of size W/2 xh and a right intra sub-partition of size W/4 xh.

24. The method of claim 13 or the device of claim 13, wherein for an image block of size rW x H, the vertically left intra sub-partition mode generation comprises a size ofIs of the left intra sub-partition and size +.>Is divided into right side intra-sub-partitionsTwo sub-partitions such that the transform size +.>Andsupported by the decoding method or apparatus.

25. The method of claims 21 and 23 or the device of claims 21 and 23, wherein one of a horizontal up-frame intra-sub-partition mode or a horizontal down-frame intra-sub-partition mode is used for image blocks of size W x 3H/4, and wherein one of a vertical left-frame intra-sub-partition mode or a vertical right-frame intra-sub-partition mode is used for image blocks of size 3W/4 x H.

26. The method of claims 22 and 24 or the device of claims 22 and 24, wherein one of a horizontal up-frame intra-sub-partition mode or a horizontal down-frame intra-sub-partition mode is used for image blocks of size W x rH, and wherein one of a vertical left-frame intra-sub-partition mode or a vertical right-frame intra-sub-partition mode is used for image blocks of size rW x H.

27. The method of claim 18 or claim 25 or the device of claim 18 or claim 25, wherein the intra-sub-partition mode is implicitly derived from a size of the image block and an asymmetric partition mode.

28. The method of any of claims 16 to 27 or the device of any of claims 16 to 27, wherein at least one syntax data element related to enabling the method of any of claims 16 to 27 is signaled in one of a slice, a Picture Parameter Set (PPS), a Sequence Parameter Set (SPS).

29. A method comprising encoding an image block, the encoding further comprising:

-determining an intra prediction mode for the image block, wherein at least one of a width or a height of the image block is not a power of two; and wherein at least one configuration of intra prediction modes is adapted to the width or height of the image block (which is not a power of two); and

-encoding the block using the determined intra prediction mode.

30. An apparatus comprising a memory and one or more processors, wherein the one or more processors are configured to:

-determining an intra prediction mode for the image block, wherein at least one of a width or a height of the image block is not a power of two; and wherein at least one configuration of intra prediction modes is adapted to the width or height of the image block (which is not a power of two); and

-encoding the block using the determined intra prediction mode.

31. The method of claim 29 or the device of claim 30, wherein determining an intra prediction mode for the image block further comprises:

determining an intra-prediction mode from a set of regular-angle intra-prediction modes and wide-angle intra-prediction modes for the image block, wherein at least one of a width or a height of the image block is not a power of two; and wherein at least one of an angle of an angular intra prediction mode in the set or a reference array used by the angular intra prediction modes in the set is adapted to a width or a height of the image block (which is not a power of two).

32. The method of claim 31 or the device of claim 31, wherein the widths W or heights H of the image blocks are not equal.

33. The method of claim 31 or the apparatus of claim 31, wherein the width of the image block is w=w and the height of the image block is h=rh, or the width of the image block is w=rw and the height of the image block is h=h, wherein H and W are powers of two, and wherein r is a positive rational number less than 1, such that rH or rW is a positive integer different from a power of 2.

34. The method of claim 31 or the apparatus of claim 31, wherein the width of the image block is w=w and the height of the image block is h=3h/4, or the width of the image block is w=3w/4 and the height of the image block is h=h, where H and W are powers of two.

35. The method of any of claims 32 to 34 or the apparatus of any of claims 32 to 34, wherein only regular angle intra prediction modes are allowed and a reference array used in intra prediction is extended to a size equal to h+w+1.

36. The method of any of claims 32 to 34 or the apparatus of any of claims 32 to 34, wherein only two wide-angle intra prediction modes are allowed, and a reference array used in intra prediction is extended to a size equal to 2h+p or 2w+p, where p = 1, 2 or 4, depending on the width W and height H of the image block.

37. The method of any of claims 32 to 34 or the apparatus of any of claims 32 to 34, wherein the angle values of at least one regular angle intra prediction mode are modified and the reference array used in intra prediction is 2h+1 or 2w+1.

38. The method of claim 35 and one of claims 36 or 37 or the apparatus of claim 35 and one of claims 36 or 3735 or the method of claim 36 or 37, derived from availability of neighboring reconstructed samples of the reference array for use in intra prediction.

39. The method of claim 35 and one of claims 36 or 37 or the device of claim 35 and one of claims 36 or 37, wherein at least one syntax data element related to enabling the method of claim 35 or the method of claim 36 or 37 is signaled in one of a slice, a Picture Parameter Set (PPS), a Sequence Parameter Set (SPS).

40. The method of claim 29 or the device of claim 30, wherein determining an intra prediction mode for the image block further comprises:

-determining an intra-sub-partition mode for the image block, wherein one of the width or the height of the image block is not a power of two, and wherein at least one of the size of the intra-sub-partition or the number of intra-sub-partitions in the intra-sub-partition mode is adapted to the width or the height of the image block (which is not a power of two).

41. The method of claim 40 or the apparatus of claim 40, wherein the width W of the image block is w=w and the height H of the image block is h=rh, or the width of the image block is w= rW and the height H of the image block is h=h, wherein H and W are powers of two, and wherein r is a positive rational number less than 1, such that rH or rW is a positive integer different from a power of 2.

42. The method of claim 41 or the device of claim 41, wherein the ratio r is selected to produce a transform size supported by the decoding method or device.

43. The method of claim 41 or the apparatus of claim 41, wherein the width of the image block is w=w and the height of the image block is h=3h/4, or the width of the image block is w=3w/4 and the height of the image block is h=h, wherein W and H are powers of two.

44. The method of claim 43 or the apparatus of claim 43, wherein for an image block of size W x 3H/4, the horizontal intra sub-partition mode generates three sub-partitions of size W x H/4.

45. The method of claim 43 or the apparatus of claim 43, wherein for an image block of size 3W/4 XH, the vertical intra sub-partition mode generates three sub-partitions of size W/4 XH.

46. The method of claim 43 or the apparatus of claim 43, wherein a horizontal intra sub-partition mode of three sub-partitions of size W x H/4 is generated for image blocks of size W x 3H/4 and a vertical intra sub-partition mode of three sub-partitions of size W/4 x H is generated for image blocks of size 3W/4 x H.

47. The method of claim 41 or the device of claim 41, wherein for an image block of size rW x H, a vertical intra sub-partition mode generates a block of sizeWherein r is a positive rational number less than 1 and p is a positive integer such that rW is a positive integer different from a power of 2 and +.>Corresponding to the transform size supported by the decoding method or apparatus.

48. The method of claim 41 or the apparatus of claim 41, wherein for an image block of size W x rH, a horizontal intra sub-partition mode generates a block of sizeWherein r is a positive rational number smaller than 1 and p is a positive integer such that rH is a positive integer different from a power of 2 and +.>Corresponding to the transform size supported by the decoding method or apparatus.

49. The method of claim 43 or the apparatus of claim 43, wherein for an image block of size W×3H/4, a horizontal up-frame intra-sub-partition mode generates two sub-partitions comprising the upper intra-sub-partition of size W×H/4 and the lower intra-sub-partition of size W×H/2, or for an image block of size W×3H/4, a horizontal down-frame intra-sub-partition mode generates two sub-partitions comprising the upper intra-sub-partition of size W×H/2 and the lower intra-sub-partition of size W×3H/4.

50. The method of claim 41 or the apparatus of claim 41, wherein for an image block of size W x rH, the horizontal up intra sub-partition mode generation comprises a size ofIs equal to +.>Is arranged such that the transform size +.>Andsupported by the decoding method or apparatus.

51. The method of claim 43 or the apparatus of claim 43, wherein for an image block of size 3W/4 XH, a vertical left intra sub-partition mode generates two sub-partitions comprising the left intra sub-partition of size W/4 XH and the right intra sub-partition of size W/4 XH, or for an image block of size 3W/4 XH, a vertical right intra sub-partition mode generates two sub-partitions comprising the left intra sub-partition of size W/2 XH and the right intra sub-partition of size W/4 XH.

52. The method of claim 41 or the apparatus of claim 41, wherein for an image block of size rW x H, the vertically left intra sub-partition mode generation comprises a size ofIs of the left intra sub-partition and size +. >Is arranged such that the transform size +.>Andsupported by the decoding method or apparatus.

53. The method of claims 49 and 51 or the apparatus of claims 49 and 51, wherein one of a horizontal up-frame intra-sub-partition mode or a horizontal down-frame intra-sub-partition mode is used for tiles of size W x 3H/4, and wherein one of a vertical left-frame intra-sub-partition mode or a vertical right-frame intra-sub-partition mode is used for tiles of size 3W/4 x H.

54. The method of claims 50 and 52 or the apparatus of claims 50 and 52, wherein one of a horizontal up-frame intra-sub-partition mode or a horizontal down-frame intra-sub-partition mode is used for image blocks of size W x rH, and wherein one of a vertical left-frame intra-sub-partition mode or a vertical right-frame intra-sub-partition mode is used for image blocks of size rW x H.

55. The method of claim 46 or claim 53 or the apparatus of claim 46 or claim 53, wherein the intra-sub-partition mode is implicitly derived from a size of the image block and the asymmetric partition mode.

56. The method of any of claims 42 to 54 or the device of any of claims 42 to 54, wherein at least one syntax data element related to enabling the method of any of claims 42 to 54 is signaled in one of a slice, a Picture Parameter Set (PPS), a Sequence Parameter Set (SPS).

57. A non-transitory program storage device having encoded data representing image blocks generated according to the method of one of claims 29, 31 to 56.

58. A computer readable non-transitory program storage device tangibly embodying a program of instructions executable by the computer for performing the method of any one of claims 1, 3 to 28, 29, 31 to 56.