CN116646260A - System-in-package method and package structure for double-sided plastic package - Google Patents

System-in-package method and package structure for double-sided plastic package Download PDF

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Publication number
CN116646260A
CN116646260A CN202310659473.1A CN202310659473A CN116646260A CN 116646260 A CN116646260 A CN 116646260A CN 202310659473 A CN202310659473 A CN 202310659473A CN 116646260 A CN116646260 A CN 116646260A
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CN
China
Prior art keywords
substrate
metal frame
forming
package
chip
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Pending
Application number
CN202310659473.1A
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Chinese (zh)
Inventor
高雄
陶玉娟
姜艳
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Tongfu Microelectronics Co Ltd
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Tongfu Microelectronics Co Ltd
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Priority to CN202310659473.1A priority Critical patent/CN116646260A/en
Publication of CN116646260A publication Critical patent/CN116646260A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames

Abstract

The embodiment of the disclosure provides a system-in-package method and a package structure for double-sided plastic package, wherein the method comprises the following steps: providing a substrate and fixing a plurality of first chips on a first surface of the substrate; providing a patterned metal frame, forming a plurality of second chips which are stacked in sequence in the central area of the metal frame, and forming a plurality of conductive support structures in the edge area of the metal frame; the second surface of the substrate is respectively fixed on one side, away from the metal frame, of the second chip and the metal frame, and the substrate is electrically connected with the metal frame through a plurality of conductive supporting structures; and forming plastic package bodies on the first surface and the second surface of the substrate respectively through a one-time plastic package process. When a second chip is attached to the second surface of the substrate, the metal frame and the conductive supporting structure play a bearing role on the substrate, so that the chip attachment of the second surface of the substrate is realized; when cutting is carried out after the double-sided mounting of the substrate is finished, the metal frame and the conductive supporting structure have bearing effect on the substrate, so that the cutting difficulty is reduced, and the chip is not damaged.

Description

System-in-package method and package structure for double-sided plastic package
Technical Field
The embodiment of the disclosure belongs to the technical field of semiconductor packaging, and particularly relates to a system-in-package method and a package structure for double-sided plastic packaging.
Background
At present, in the packaging process of a semiconductor, two-sided plastic packaging is generally adopted, the front surface of a substrate is firstly subjected to plastic packaging, and the back surface of the substrate is subjected to plastic packaging, wherein the two-sided plastic packaging can lead to serious warping of a packaging structure; meanwhile, the strip-shaped adapter plate/plastic sealing layer is attached to the back surface of the substrate, so that the overall heat dissipation effect of the packaging structure is poor. In the existing double-sided one-step plastic packaging process, when the chips are subjected to double-sided mounting, no load is carried when the back mounting is carried out due to different heights of the front chips, mounting is difficult, and no load is carried when the back mounting of the substrate and the cutting is carried out after the double-sided mounting of the substrate are finished, so that the chips are difficult to cut and easy to damage due to no load.
In view of the above, it is necessary to provide a system-in-package method and a package structure for double-sided plastic packaging, which are reasonable in design and effectively solve the above problems.
Disclosure of Invention
The embodiment of the disclosure aims to at least solve one of the technical problems in the prior art and provides a system-in-package method and a package structure for double-sided plastic package.
An aspect of an embodiment of the present disclosure provides a system-in-package method of double-sided plastic packaging, the method including:
providing a substrate, and fixing a plurality of first chips on a first surface of the substrate;
providing a patterned metal frame, forming a plurality of second chips which are stacked in sequence in the central area of the metal frame, and forming a plurality of conductive support structures in the edge area of the metal frame;
fixing the second surface of the substrate on one side of the second chip, which is away from the metal frame, and the metal frame respectively, wherein the substrate is electrically connected with the metal frame through the plurality of conductive support structures;
and forming plastic package bodies on the first surface and the second surface of the substrate respectively through a one-time plastic package process, wherein the plastic package bodies wrap the first chip and the metal frame respectively.
Optionally, the forming a plurality of conductive support structures at the edge area of the metal frame includes:
forming a plurality of fixing plates at an edge region of the metal frame;
forming a groove on the fixing plate;
the conductive support structure corresponding to the groove is formed in the groove.
Optionally, the fixing the second surface of the substrate on a side of the second chip facing away from the metal frame includes:
and fixing the second surface of the substrate on one side of the second chip, which is away from the metal frame, through the conductive bump.
Optionally, the fixing the second surface of the substrate to the metal frame includes:
and fixing the conductive support structure on the second surface of the substrate through a hot-pressing reflow process so as to fix the second surface of the substrate on the metal frame.
Optionally, after forming the plastic package body on the first surface and the second surface of the substrate through a one-time plastic package process, the method further includes:
and if the edge area of the patterned metal frame is the metal frame, forming a shielding layer on the periphery of the first chip.
Optionally, after forming the plastic package body on the first surface and the second surface of the substrate through a one-time plastic package process, the method further includes:
and if the edge area of the patterned metal frame is the plastic package body, forming a shielding layer on the periphery of the plastic package body.
Optionally, after forming the plastic package body on the first surface and the second surface of the substrate through a one-time plastic package process, the method further includes:
and forming a signal output layer on one side of the metal frame, which is away from the substrate.
Optionally, the conductive support structure is a metal conductive post or a solder ball.
Optionally, the metal frame is made of a metal copper material.
Another aspect of the embodiments of the present disclosure provides a system-in-package structure with two-sided plastic package, which is formed by using the above-mentioned packaging method.
According to the system-in-package method and the package structure for the double-sided plastic package, in the package method, a plurality of first chips are fixed on the first surface of a substrate, a plurality of second chips which are stacked in sequence are formed in the central area of a metal frame, then the second surface of the substrate is respectively fixed on one side, which is away from the metal frame, of the second chips and the metal frame, wherein the substrate is electrically connected with the metal frame through a plurality of conductive supporting structures, the second chips are fixed on the metal frame firstly, then the second chips are attached to the second surface of the substrate, and therefore, when the plurality of second chips are attached to the second surface of the substrate, the metal frame and the plurality of conductive supporting structures play a good bearing role on the substrate, and chip attachment of the second surface of the substrate can be achieved well.
In addition, when cutting is carried out after the double-sided mounting of the substrate is completed, the metal frame and the plurality of conductive supporting structures play a good bearing role on the substrate, so that the cutting difficulty is reduced, and the chip cannot be damaged.
According to the packaging method disclosed by the embodiment of the disclosure, the plastic package body is formed on the first surface and the second surface of the substrate respectively by adopting a one-time plastic package process, so that the warpage of the packaging structure is reduced, and the yield of the packaging structure is increased.
In addition, in the plastic packaging process, the metal frame and the plurality of conductive supporting structures play a bearing role on the substrate, so that the stability of the substrate in the plastic packaging process is ensured, wherein the plurality of conductive supporting structures strengthen the connection firmness of the substrate and the metal frame, and further, the first chip and the second chip can be prevented from being damaged due to the impact of plastic packaging materials, and the yield of plastic packaging finished products is improved.
According to the packaging method, the plurality of second chips which are stacked in sequence are formed in the central area of the metal frame, and the metal frame can play a role in heat dissipation of the plurality of second chips.
Drawings
Fig. 1 is a flow chart of a system-in-package method of a double-sided plastic package according to an embodiment of the disclosure;
fig. 2 to 9 are schematic views of a packaging process of a system-in-package with two-sided plastic package according to another embodiment of the disclosure;
fig. 10 is a schematic structural diagram of a system-in-package structure of a double-sided plastic package according to another embodiment of the disclosure;
fig. 11 is a schematic structural diagram of a system-in-package structure of a double-sided plastic package according to another embodiment of the disclosure.
Detailed Description
In order to enable those skilled in the art to better understand the technical solutions of the embodiments of the present disclosure, the embodiments of the present disclosure are described in further detail below with reference to the accompanying drawings and detailed description.
As shown in fig. 1, an aspect of an embodiment of the present disclosure provides a system-in-package method S100 for double-sided plastic packaging, where the method S100 includes:
s110, providing a substrate, and fixing a plurality of first chips on the first surface of the substrate.
As shown in fig. 1 to 3, a substrate 110 is provided, and a plurality of first chips 120 are fixed to a first surface of the substrate 110.
Note that, the height and the size of the first chip 120 are not specifically limited in this embodiment, and may be limited according to actual needs.
It should be understood that the first surface of the substrate 110 may be the front surface of the substrate 110 or the back surface of the substrate 110, which may be specifically selected according to practical needs. In this embodiment, the first surface of the substrate 110 is taken as the front surface of the substrate 110, and the second surface of the substrate 110 is taken as the back surface of the substrate 110. That is, the plurality of first chips 120 are fixed to the front surface of the substrate 110.
And S120, providing a patterned metal frame, forming a plurality of second chips which are stacked in sequence in the central area of the metal frame, and forming a plurality of conductive support structures in the edge area of the metal frame.
As shown in fig. 4, a patterned metal frame 130 is provided, a plurality of second chips 140 are formed in a central region of the metal frame 130 and stacked in sequence, and a plurality of conductive support structures 150 are formed in an edge region of the metal frame 130. The number of the second chips 140 is not particularly limited in this embodiment, and may be selected according to actual needs.
It should be noted that, the patterned metal frame 130 is formed by etching the metal plate in advance through an etching process, and the shape of the patterned metal frame 130 is not specifically limited in this embodiment, and may be selected according to actual needs. For example, the metal frame 130 may have a shape as shown in fig. 10 or a shape as shown in fig. 11.
In this embodiment, the metal frame 130 is preferably made of copper, but other metal materials may be used, and the embodiment is not particularly limited.
It should be further noted that, the conductive support structure 150 may be a metal copper pillar or a solder ball, and preferably, the conductive support structure 150 may be a copper pillar or a solder ball. In this embodiment, as shown in fig. 4, the conductive support structure 150 is preferably a solder ball.
Illustratively, forming a plurality of conductive support structures at an edge region of the metal frame includes:
as shown in fig. 5, first, a plurality of fixing plates 131 are formed at an edge region of the metal frame 130.
Grooves (not shown) are formed in the fixing plate 131.
A conductive support structure 150 is formed in the recess in correspondence thereto. In the present embodiment, that is, solder balls corresponding thereto are formed in the recesses.
In the above embodiment, the conductive support structures 150 corresponding to the grooves are formed in the grooves, so that the conductive support structures 150 can be better fixed and positioned, so that the conductive support structures 150 are more firmly fixed to the metal frame 130.
S130, fixing the second surface of the substrate on one side, away from the metal frame, of the second chip and the metal frame respectively, wherein the substrate is electrically connected with the metal frame through the conductive support structures.
As shown in fig. 6, the back surface of the substrate 110 is fixed to a side of the second chip 140 facing away from the metal frame 130 and the back surface of the substrate 110 is fixed to the metal frame 130, respectively. Wherein the substrate 110 is electrically connected to the metal frame 130 through a plurality of conductive support structures 150.
Specifically, fixing the second surface of the substrate 110 to the side of the second chip 140 facing away from the metal frame 130 includes:
the back surface of the substrate 110 is fixed to the side of the second chip 140 facing away from the metal frame 130 by the conductive bump 141. That is, the second chip 140 is mounted on the back surface of the substrate 110 by flip-chip mounting. Of course, the manner in which the second chip 140 is mounted and fixed on the back surface of the substrate 110 is not particularly limited in this embodiment, and the chip mounting may be performed in a manner other than the flip-chip manner.
Further specifically, fixing the second surface of the substrate 110 to the metal frame 130 includes:
the conductive support structure 150 is fixed to the rear surface of the substrate 110 through a thermal compression reflow process to fix the rear surface of the substrate 110 to the metal frame 130. The plurality of conductive support structures 150 may function as a support on the one hand and may function as an electrical connection between the metal frame 130 and the substrate 110 on the other hand.
In the above embodiment, the plurality of first chips are fixed on the first surface of the substrate, the plurality of second chips stacked in turn are formed in the central area of the metal frame, then the second surface of the substrate is respectively fixed on one side of the second chips away from the metal frame and the metal frame, that is, the second chips are fixed on the metal frame first, and then the second chips are mounted on the second surface of the substrate, so that when the plurality of second chips are mounted on the second surface of the substrate, the metal frame and the plurality of conductive support structures have good bearing effect on the substrate, and the chip mounting of the second surface of the substrate can be well realized,
and S140, forming plastic package bodies on the first surface and the second surface of the substrate respectively through a one-time plastic package process, wherein the plastic package bodies wrap the first chip and the metal frame respectively.
As shown in fig. 7, after the mounting of the two sides of the substrate 110 is completed, a plastic package body 160 is formed on the first surface and the second surface of the substrate 110 by a single plastic package process, and the plastic package body 160 wraps the first chip 120 and the metal frame 130, respectively.
Specifically, the body to be molded after the chip is mounted is placed in a plastic mold, that is, the metal frame 130 is placed as the bottom in the plastic mold, the plastic molding material is injected, and the plastic body 160 is formed on the back and the front of the substrate 110 through one-time plastic molding process, and the plastic body 160 wraps the first chip 120 and the metal frame 130 respectively. The plastic package 160 protects the substrate 110, the first chip 120, the second chip 140, the metal frame 130, and the plurality of conductive support structures 150.
Only one side of the metal frame 130 facing the substrate 110 and the openings formed after patterning are formed with the molding body 160, and one side of the metal frame 130 facing away from the substrate 110 is not provided with the molding body 160.
After the to-be-molded body is molded to form the molded body 160, the whole substrate 110 is cut to form an independent package structure.
In the above embodiment, the metal frame 130 and the plurality of conductive supporting structures 150 can perform a good bearing function on the substrate 110 in the cutting process after the double-sided mounting of the substrate 110 and the plastic packaging, so that the cutting difficulty can be reduced and the chip is not damaged.
In the above embodiment, the plastic package body 160 is formed on the first surface and the second surface of the substrate 110 by using a one-time plastic package process, so that the warpage of the package structure can be reduced, and the yield of the package structure can be increased. In addition, in the plastic packaging process, the substrate 110 needs to bear the impact of the plastic packaging material, the metal frame 130 and the plurality of conductive supporting structures 150 play a bearing role on the substrate 110, so as to ensure the stability of the substrate 110 in the plastic packaging process, wherein the plurality of conductive supporting structures 150 strengthen the connection firmness between the substrate 110 and the metal frame 130, so that the first chip 120 and the second chip 140 can be prevented from being damaged due to the impact of the plastic packaging material, and the yield of the plastic packaging finished product is improved.
Illustratively, after forming the plastic package body on the first surface and the second surface of the substrate through a one-time plastic package process, the method further includes:
as shown in fig. 8, if the edge area of the patterned metal frame 130 is the metal frame 130, a shielding layer 170 is formed on the periphery of the first chip 120. The shielding layer 170 may prevent the first chip 120 from electromagnetic interference.
Since the bottom edge of the package structure is the metal frame 130, that is, the bottom edge of the package structure is the metal layer, if the shielding layer 170 is formed at the periphery of the entire package structure, the contact of the shielding layer 170 with the metal frame 130 of the bottom edge of the package structure may cause a short circuit, so that the shielding layer 170 is selectively formed at the periphery of each first chip 120.
The step of forming the shielding layer 170 by the system-in-package structure may be:
a through groove surrounding the periphery of the first chip 120 is formed on the plastic package body 160 at the periphery of the first chip 120 by adopting a plastic package material perforation process, and a metal layer is deposited in the through groove by adopting a sputtering process and the like, so that a shielding layer 170 surrounding the periphery of the first chip 120 is formed.
Illustratively, after forming the plastic package body on the first surface and the second surface of the substrate through a one-time plastic package process, the method further includes:
as shown in fig. 9, if the edge region of the patterned metal frame 130 is the molding body 160, a shielding layer 170 is formed on the periphery of the molding body. Only the side with the patterned metal frame 130 is left for signal output. The shielding layer 170 can prevent the whole system-in-package structure from electromagnetic interference.
Because the bottom edge of the package structure is the plastic package body 160, that is, the bottom edge of the package structure is the plastic package material and not the metal material, the shielding layer 170 is formed on the periphery of the plastic package body 160, and the contact between the shielding layer 170 and the bottom edge of the package structure is the plastic package body 160, so that the short circuit is not caused.
The specific steps of forming the shielding layer 170 at the periphery of the system-in-package structure may be:
a through groove surrounding the periphery of the plastic package body 160 is formed at the periphery of the plastic package body 160 by adopting a plastic package material perforation process, a metal layer is deposited in the through groove by adopting a sputtering process and the like, so that a shielding layer 170 surrounding the periphery of the plastic package body 160 is formed, namely, the shielding layer 170 surrounding the periphery of the whole package structure is formed, and only one side with the patterned metal frame 130 is reserved for signal output.
Illustratively, after forming the plastic package body on the first surface and the second surface of the substrate through a one-time plastic package process, the method further includes:
a signal output layer (not shown) is formed on a side of the metal frame 130 facing away from the substrate 110.
A signal output layer (not shown) is formed on a side of the metal frame 130 facing away from the substrate 110 to draw out signals of the system-in-package structure. Specifically, in the present embodiment, a tin layer may be coated on a side of the metal frame 130 facing away from the substrate 110 to draw out signals of the system-in-package structure. The specific structure of the signal output layer is not particularly limited, and the signal output layer may be selected according to practical situations, for example, the signal output layer may be a solder ball disposed on the metal frame 130, or the like.
In this embodiment, after the signal output layer is formed on the metal frame 130, the whole system-in-package structure may be mounted on the square flat leadless package or on the PCB, and the signal of the system-in-package structure may be led out through the signal output layer.
In the above embodiment, since the plastic package 160 is formed in the plurality of openings of the patterned metal frame 130, when the signal output layer is formed on the side of the metal frame 130 facing away from the substrate 110, the metal frames 130 on both sides of the openings can be prevented from being shorted due to the connection of the signal output layer, and the performance of the package structure is ensured.
According to the system-in-package method for the double-sided plastic package, the plurality of first chips are fixed on the first surface of the substrate, the plurality of second chips which are stacked in sequence are formed in the central area of the metal frame, then the second surface of the substrate is respectively fixed on one side, away from the metal frame, of the second chips and the metal frame, wherein the substrate is electrically connected with the metal frame through the plurality of conductive supporting structures, the second chips are fixed on the metal frame firstly, then the second chips are attached to the second surface of the substrate, so that when the plurality of second chips are attached to the second surface of the substrate, the metal frame and the plurality of conductive supporting structures have good bearing effect on the substrate, and in addition, when cutting is carried out after the double-sided attachment of the substrate, the metal frame and the plurality of conductive supporting structures have good bearing effect on the substrate, so that cutting difficulty is reduced, and the chips cannot be damaged; according to the packaging method, a plastic package body is formed on the first surface and the second surface of the substrate respectively by adopting a one-time plastic package process, so that the warping of the packaging structure is reduced, and the yield of the packaging structure is increased; and a plurality of second chips which are stacked in sequence are formed in the central area of the metal frame, and the metal frame can play a role in heat dissipation on the plurality of second chips.
As shown in fig. 10 and 11, another aspect of the embodiments of the present disclosure provides a system-in-package structure 100 with double-sided plastic package, and the packaging method S100 is used for packaging and forming. Specific steps of the packaging method S100 are described in detail above, and will not be repeated here.
As shown in fig. 10 and 11, the system-in-package structure 100 of the double-sided plastic package includes a substrate 110, a first chip 120 disposed on a first surface of the substrate 110, a second chip 140 disposed on a second surface of the substrate 110, and a patterned metal frame 130 disposed on a side of the second chip 140 facing away from the substrate 110, wherein a plurality of conductive support structures 150 are disposed on an edge region of the metal frame 130. The plurality of conductive support structures 150 may function as supports on the one hand and may also function as electrical connections on the other hand.
Note that, the shape of the patterned metal frame 130 is not particularly limited in this embodiment, and may be selected according to actual needs. For example, the metal frame 130 may be shaped as shown in the figures, or may be shaped as shown in the figures.
In this embodiment, the metal frame 130 is preferably made of copper, but other metal materials may be used, and the embodiment is not particularly limited.
It should be further noted that, the conductive support structure 150 may be a metal copper pillar or a solder ball, and preferably, the conductive support structure 150 may be a copper pillar or a solder ball. As shown, in this embodiment, the conductive support structure 150 is preferably a solder ball.
It should be understood that the first surface of the substrate 110 may be the front surface of the substrate 110 or the back surface of the substrate 110, which may be specifically selected according to practical needs. In this embodiment, the first surface of the substrate 110 is taken as the front surface of the substrate 110, and the second surface of the substrate 110 is taken as the back surface of the substrate 110. That is, the plurality of first chips 120 are fixed to the front surface of the substrate 110.
As shown in fig. 10 and 11, a plastic package 160 is disposed on the first surface and the second surface of the substrate 110, and the plastic package 160 encapsulates the first chip 120 and the metal frame 130. The plastic package 160 encapsulates the first chip 120 and the metal frame 130, respectively. The plastic package 160 protects the substrate 110, the first chip 120, the second chip 140, the metal frame 130, and the plurality of conductive support structures 150.
Only one side of the metal frame 130 facing the substrate 110 and the openings formed after patterning are formed with the molding body 160, and one side of the metal frame 130 facing away from the substrate 110 is not provided with the molding body 160.
The plastic package body 160 is formed on the first surface and the second surface of the substrate 110 by adopting a one-time plastic package process, so that the warpage of the package structure 100 is reduced, and the yield of the package structure 100 is increased.
In the present embodiment, the second chip 140 is flip-chip mounted on the second surface of the substrate 110 by the conductive bumps 141, as shown in fig. 10 and 11. Of course, the manner in which the second chip 140 is mounted and fixed on the back surface of the substrate 110 is not particularly limited in this embodiment, and the chip mounting may be performed in a manner other than the flip-chip manner.
As shown in fig. 10 and 11, the package structure 100 further includes a shielding layer 170, and as shown in fig. 10, if the edge area of the patterned metal frame 130 is the metal frame 130, the shielding layer 170 is enclosed on the periphery of the first chip 120. The shielding layer 170 may prevent the first chip 120 from electromagnetic interference.
As shown in fig. 11, if the edge area of the patterned metal frame 130 is the molding body 160, the shielding layer 170 is formed around the periphery of the molding body 160. Leaving only one side of the patterned metal frame 130 for signal output. The shielding layer 170 can prevent the whole system-in-package structure from electromagnetic interference.
In the system-in-package structure for double-sided plastic packaging, when the second chip is attached to the second surface of the substrate, the patterned metal frame and the plurality of conductive supporting structures have good bearing effect on the substrate, so that the chip attachment on the second surface of the substrate can be well realized, in addition, when the double-sided attachment of the substrate is completed and then cutting is carried out, the metal supporting plate and the plurality of conductive supporting pieces have good bearing effect on the substrate, so that the cutting difficulty is reduced, and the chip cannot be damaged; the plastic package body is formed on the first surface and the second surface of the substrate respectively by adopting a one-time plastic package process, so that the warping of the package structure is reduced, and the yield of the package structure is increased; the metal frame is arranged on one side of the second chip, which is away from the substrate, and the heat dissipation effect can be achieved on a plurality of second chips.
It is to be understood that the above implementations are merely exemplary implementations employed to illustrate the principles of the disclosed embodiments, which are not limited thereto. Various modifications and improvements may be made by those skilled in the art without departing from the spirit and substance of the embodiments of the disclosure, and these modifications and improvements are also considered to be within the scope of the embodiments of the disclosure.

Claims (10)

1. A system-in-package method for double-sided plastic packaging, the method comprising:
providing a substrate, and fixing a plurality of first chips on a first surface of the substrate;
providing a patterned metal frame, forming a plurality of second chips which are stacked in sequence in the central area of the metal frame, and forming a plurality of conductive support structures in the edge area of the metal frame;
fixing the second surface of the substrate on one side of the second chip, which is away from the metal frame, and the metal frame respectively, wherein the substrate is electrically connected with the metal frame through the plurality of conductive support structures;
and forming plastic package bodies on the first surface and the second surface of the substrate respectively through a one-time plastic package process, wherein the plastic package bodies wrap the first chip and the metal frame respectively.
2. The method of claim 1, wherein forming a plurality of conductive support structures at an edge region of the metal frame comprises:
forming a plurality of fixing plates at an edge region of the metal frame;
forming a groove on the fixing plate;
the conductive support structure corresponding to the groove is formed in the groove.
3. The method of claim 1, wherein the securing the second surface of the substrate to the side of the second chip facing away from the metal frame comprises:
and fixing the second surface of the substrate on one side of the second chip, which is away from the metal frame, through the conductive bump.
4. A method according to any one of claims 1 to 3, wherein said fixing the second surface of the substrate to the metal frame comprises:
and fixing the conductive support structure on the second surface of the substrate through a hot-pressing reflow process so as to fix the second surface of the substrate on the metal frame.
5. A method according to any one of claims 1 to 3, wherein after forming the plastic packages on the first surface and the second surface of the substrate, respectively, by a single plastic packaging process, the method further comprises:
and if the edge area of the patterned metal frame is the metal frame, forming a shielding layer on the periphery of the first chip.
6. A method according to any one of claims 1 to 3, wherein after forming the plastic packages on the first surface and the second surface of the substrate, respectively, by a single plastic packaging process, the method further comprises:
and if the edge area of the patterned metal frame is the plastic package body, forming a shielding layer on the periphery of the plastic package body.
7. A method according to any one of claims 1 to 3, wherein after forming the plastic packages on the first surface and the second surface of the substrate, respectively, by a single plastic packaging process, the method further comprises:
and forming a signal output layer on one side of the metal frame, which is away from the substrate.
8. A method according to any one of claims 1 to 3, wherein the conductive support structure is a metallic conductive post or a solder ball.
9. A method according to any one of claims 1 to 3, wherein the metal frame is formed from a metallic copper material.
10. A system-in-package structure of a double-sided plastic package, which is formed by packaging by the packaging method of any one of claims 1 to 9.
CN202310659473.1A 2023-06-06 2023-06-06 System-in-package method and package structure for double-sided plastic package Pending CN116646260A (en)

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Applications Claiming Priority (1)

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CN202310659473.1A CN116646260A (en) 2023-06-06 2023-06-06 System-in-package method and package structure for double-sided plastic package

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CN116646260A true CN116646260A (en) 2023-08-25

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