CN116643912A - Flash memory and power-down protection method and device - Google Patents

Flash memory and power-down protection method and device Download PDF

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Publication number
CN116643912A
CN116643912A CN202210137042.4A CN202210137042A CN116643912A CN 116643912 A CN116643912 A CN 116643912A CN 202210137042 A CN202210137042 A CN 202210137042A CN 116643912 A CN116643912 A CN 116643912A
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Prior art keywords
data
backup
transaction
address
transaction backup
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陈双普
柳耀勇
孙东昱
肖青
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XINSHENG TECHNOLOGY CO LTD
China Mobile Communications Group Co Ltd
China Mobile IoT Co Ltd
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XINSHENG TECHNOLOGY CO LTD
China Mobile Communications Group Co Ltd
China Mobile IoT Co Ltd
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Priority to CN202210137042.4A priority Critical patent/CN116643912A/en
Publication of CN116643912A publication Critical patent/CN116643912A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1446—Point-in-time backing up or restoration of persistent data
    • G06F11/1458—Management of the backup or restore process
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Software Systems (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The invention provides a flash memory and a power-down protection method and device, and relates to the technical field of flash memories. The storage space of the flash memory comprises a data storage area and a transaction backup area, wherein the transaction backup area comprises: a transaction backup mark area; transaction backup address and data area; wherein the transaction backup flag area includes at least one block, each block including: a transaction backup start flag, a transaction backup address, a data area index number, and a transaction backup end flag; and the transaction backup start mark and the transaction backup end mark are used for judging whether a target block which is powered down in the data updating process exists before the current power-on of the flash memory when the power-on reset is initialized. The scheme of the invention can realize power-down protection in the data updating of the flash memory.

Description

Flash memory and power-down protection method and device
Technical Field
The present invention relates to the field of flash memory technologies, and in particular, to a flash memory and a power-down protection method and apparatus.
Background
Flash memory is a non-volatile memory (NVM) having the characteristics of a nonvolatile memory, and generally the memory space of flash memory is composed of a certain number of blocks (blocks), each of which is divided into pages (pages) of a fixed size. In order to ensure the reliability of the stored data and the atomicity of the data updating operation, a transaction backup area with a proper size is usually opened up in the flash memory, and the data to be written in is subjected to power-down protection, namely, the data to be written in or the rewritten data is written in the transaction backup area, then the rewritten data or the data to be written in is written in a target storage area, and the backup data of the transaction backup area is discarded after the writing is successful. However, there is a possibility of power failure during the data update process, and how to perform power failure protection during the data update process is still a problem to be solved.
Disclosure of Invention
The invention aims to provide a flash memory and a power-down protection method and device, which are used for solving the problem of how to carry out power-down protection on the flash memory in the data updating process in the prior art.
In order to solve the technical problems, the embodiment of the invention provides the following technical scheme:
a flash memory, a memory space of the flash memory comprising a data storage area and a transaction backup area, the transaction backup area comprising:
a transaction backup mark area;
transaction backup address and data area;
wherein the transaction backup flag area includes at least one block, each block including: a transaction backup start flag, a transaction backup address, a data area index number, and a transaction backup end flag;
and the transaction backup start mark and the transaction backup end mark are used for judging whether a target block which is powered down in the data updating process exists before the current power-on of the flash memory when the power-on reset is initialized.
Optionally, the flash memory, wherein the transaction backup address and the data area index number correspond to pages in the transaction backup address and the data area.
Optionally, the flash memory, wherein the transaction backup address and data area includes:
A transaction backup address area and a transaction backup data area.
Optionally, the flash memory, wherein the transaction backup address area includes at least one block, and each block includes: offset address and check code.
Optionally, the flash memory, wherein the offset address is used to indicate a destination address of the target backup data write-back in the transaction backup data area.
Optionally, in the flash memory, the check code is used to determine whether the offset address corresponding to the check code is correct.
A power-down protection method of a flash memory, applied to an electronic device, the electronic device comprising the flash memory according to any one of the above, the method comprising:
when the power-on reset is initialized, checking a transaction backup start mark and a transaction backup end mark of each block in the transaction backup mark area, and judging whether a target block with power failure occurs in the data updating process before the current power-on of the flash memory;
under the condition that the target block exists before the current power-on of the flash memory is judged, the target backup data is written back to the target address according to the transaction backup address and the data area index number in the target block;
Wherein, the target backup data is backup data corresponding to the transaction backup address and the data area index number in the transaction backup data area; and the destination address is an offset address corresponding to the transaction backup address and the index number of the data area in the transaction backup address area.
Optionally, in the method for protecting a flash memory against power failure, when the power-on reset is initialized, checking a transaction backup start flag and a transaction backup end flag of each block in the transaction backup flag area, and determining whether a target block in which power failure occurs in a data update process before the flash memory is powered on this time includes:
checking whether the transaction backup start mark and the transaction backup end mark meet preset conditions;
when the transaction backup start mark and the transaction backup end mark do not meet the preset conditions, judging that the target block exists before the flash memory is electrified this time;
the preset condition is that the transaction backup start mark is a first preset value and the transaction backup end mark is a second preset value.
Optionally, in the method for protecting a flash memory from power failure, when it is determined that the target block exists before the flash memory is powered up this time, writing back target backup data to a target address according to a transaction backup address and a data area index number in the target block, including:
Judging whether offset addresses corresponding to the transaction backup address and the data area index number are correct or not according to check codes corresponding to the transaction backup address and the data area index number in the transaction backup address area;
and under the condition that the offset address is correct, the target backup data is written back to the offset address corresponding to the transaction backup address and the data area index number.
Optionally, the power-down protection method of the flash memory further includes:
and under the condition that the first data needs to be updated, the first data or the second data is used as the backup data, is written into the transaction backup data area, and is written into the page where the first data is located, wherein the second data is updated data.
Optionally, the method for protecting the flash memory from power failure, wherein the writing the first data or the second data as the backup data into the transaction backup data area, and writing the second data into the page where the first data is located, further includes:
determining idle blocks in the transaction backup mark area;
and writing the transaction backup start mark into a first preset value in the idle block, and updating the transaction backup address and the data area index number.
Optionally, the method for protecting the flash memory from power failure, wherein the writing the first data or the second data as the backup data into the transaction backup data area includes:
and writing the first data or the second data serving as the backup data into the transaction backup data area according to the transaction backup address and the data area index number.
Optionally, the method for protecting the flash memory from power failure, wherein after the first data is written into the transaction backup data area, the method further includes:
and writing the offset address and the check code of the page where the first data are located into the transaction backup address area.
Optionally, the method for protecting the flash memory from power failure, wherein after the first data or the second data is used as the backup data, written into the transaction backup data area, and the second data is written into the page where the first data is located, the method further includes:
and writing the transaction backup ending mark into a second preset value in the idle block.
An electronic device comprising a processor and a transceiver, wherein:
the processor is used for checking a transaction backup start mark and a transaction backup end mark of each block in the transaction backup mark area when the power-on reset is initialized, and judging whether a target block with power failure occurs in the data updating process before the power-on of the flash memory;
The processor is further configured to write back target backup data to a destination address according to a transaction backup address and a data area index number in the target block when it is determined that the target block exists before the current power-up of the flash memory;
the target backup data is backup data corresponding to the transaction backup address and the data area index number in the transaction backup data area; the destination address is an offset address corresponding to the transaction backup address and the index number of the data area in the transaction backup address area.
Optionally, the electronic device, wherein the processor is specifically configured to check whether the transaction backup start flag and the transaction backup end flag meet a preset condition;
when the transaction backup start mark and the transaction backup end mark do not meet the preset conditions, judging that the target block exists before the flash memory is electrified this time;
the preset condition is that the transaction backup start mark is a first preset value and the transaction backup end mark is a second preset value.
Optionally, the electronic device, wherein the processor is specifically configured to determine whether an offset address corresponding to the transaction backup address and the data area index number is correct according to a check code corresponding to the transaction backup address and the data area index number in the transaction backup address area;
And under the condition that the offset address is correct, the target backup data is written back to the offset address corresponding to the transaction backup address and the data area index number.
Optionally, the electronic device further includes a processor, configured to, when the first data needs to be updated, write the first data or the second data as the backup data into the transaction backup data area, and write the second data into a page where the first data is located, where the second data is updated data.
Optionally, the electronic device, wherein the processor is further configured to determine a free block in the transaction backup flag area;
and writing the transaction backup start mark into a first preset value in the idle block, and updating the transaction backup address and the data area index number.
Optionally, in the electronic device, the processor is specifically configured to write the first data or the second data as the backup data into the transaction backup data area according to the transaction backup address and the data area index number.
Optionally, the electronic device further includes the processor writing an offset address and a check code of a page where the first data is located into the transaction backup address area.
Optionally, the electronic device, wherein the processor is further configured to write, in the idle block, the transaction backup end flag to a second preset value.
A power-down protection device for a flash memory, comprising:
the first judging module is used for checking a transaction backup start mark and a transaction backup end mark of each block in the transaction backup mark area when the power-on reset is initialized, and judging whether a target block with power failure occurs in the data updating process before the current power-on of the flash memory;
the first write-back module is used for writing back target backup data to a target address according to a transaction backup address and a data area index number in the target block under the condition that the target block exists before the current power-on of the flash memory;
the target backup data is backup data corresponding to the transaction backup address and the data area index number in the transaction backup data area; the destination address is an offset address corresponding to the transaction backup address and the index number of the data area in the transaction backup address area.
Optionally, the power-down protection device of a flash memory, wherein the first judging module is specifically configured to:
Checking whether the transaction backup start mark and the transaction backup end mark meet preset conditions;
when the transaction backup start mark and the transaction backup end mark do not meet the preset conditions, judging that the target block exists before the flash memory is electrified this time;
the preset condition is that the transaction backup start mark is a first preset value and the transaction backup end mark is a second preset value.
Optionally, the power-down protection device of a flash memory, wherein the first write-back module is specifically configured to:
judging whether offset addresses corresponding to the transaction backup address and the data area index number are correct or not according to check codes corresponding to the transaction backup address and the data area index number in the transaction backup address area;
and under the condition that the offset address is correct, the target backup data is written back to the offset address corresponding to the transaction backup address and the data area index number.
Optionally, the power-down protection device of the flash memory further includes:
the first writing module is used for writing the first data or the second data serving as the backup data into the transaction backup data area and writing the second data into the page where the first data is located when the first data needs to be updated, wherein the second data is updated data.
Optionally, the power-down protection device of the flash memory further includes:
a determining module, configured to determine an idle block in the transaction backup flag area;
and the second writing module is used for writing the transaction backup start mark into the first preset value in the idle block and updating the transaction backup address and the data area index number.
Optionally, the power-down protection device of the flash memory, the first writing module is specifically configured to:
and writing the first data or the second data serving as the backup data into the transaction backup data area according to the transaction backup address and the data area index number.
Optionally, the power-down protection device of the flash memory further includes:
and the third writing module is used for writing the offset address and the check code of the page where the first data are located into the transaction backup address area.
Optionally, the power-down protection device of the flash memory further includes:
and the fourth writing module is used for writing the transaction backup ending mark into a second preset value in the idle block.
An electronic device, comprising: a transceiver, a processor, a memory, and a program or instructions stored on the memory and executable on the processor; the processor, when executing the program or instructions, implements the method for protecting flash memory from power failure as described in any one of the above.
A readable storage medium having stored thereon a program or instructions which when executed by a processor implements a method of power-down protection for a flash memory as claimed in any one of the preceding claims.
The technical scheme of the invention has the following beneficial effects:
in the scheme of the invention, the storage space of the flash memory comprises a data storage area and a transaction backup area, and the transaction backup area comprises: a transaction backup mark area; transaction backup address and data area; wherein the transaction backup flag area includes at least one block, each block including: a transaction backup start flag, a transaction backup address, a data area index number, and a transaction backup end flag; the transaction backup start mark and the transaction backup end mark are used for judging whether a target block which is powered down in the data updating process exists before the flash memory is powered up this time or not when the power-on reset is initialized, solving the problem of power down protection in the data updating process of the flash memory, and effectively prolonging the service life of a transaction backup area, thereby prolonging the service life of the flash memory.
Drawings
FIG. 1 is a schematic diagram illustrating steps of a power-down protection method for a flash memory according to an embodiment of the present invention;
FIG. 2 is a flowchart of a power-down protection method of a flash memory according to an embodiment of the present invention;
FIG. 3 is a flowchart of a power-down protection method of a flash memory according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a power-down protection device of a flash memory according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present invention;
fig. 6 is a second schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the technical problems, technical solutions and advantages to be solved more apparent, the following detailed description will be given with reference to the accompanying drawings and specific embodiments.
It should be appreciated that reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
In various embodiments of the present invention, it should be understood that the sequence numbers of the following processes do not mean the order of execution, and the order of execution of the processes should be determined by the functions and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.
In addition, the terms "system" and "network" are often used interchangeably herein.
In the embodiments provided herein, it should be understood that "B corresponding to a" means that B is associated with a from which B may be determined. It should also be understood that determining B from a does not mean determining B from a alone, but may also determine B from a and/or other information.
In order to solve the problem of how to perform power-down protection on a flash memory in a data updating process, embodiments of the present application provide a flash memory, and a power-down protection method and apparatus.
The embodiment of the application provides a flash memory, wherein a storage space of the flash memory comprises a data storage area and a transaction backup area, and the transaction backup area comprises:
a transaction backup mark area;
transaction backup address and data area;
wherein the transaction backup flag area includes at least one block, each block including: a transaction backup start flag, a transaction backup address, a data area index number, and a transaction backup end flag;
and the transaction backup start mark and the transaction backup end mark are used for judging whether a target block which is powered down in the data updating process exists before the current power-on of the flash memory when the power-on reset is initialized.
In an embodiment of the present invention, a storage space of the flash memory includes a data storage area and a transaction backup area, where the transaction backup area includes: the transaction backup mark area comprises at least one block, and each block comprises: the method comprises the steps of starting a transaction backup, starting a transaction backup address, a data area index number and a transaction backup ending mark, wherein the transaction backup starting mark and the transaction backup ending mark are used for judging whether a target block which is powered down in the process of updating data exists before the current power-on of the flash memory when the power-on reset is initialized. The flash memory has the advantages of simple structure, small extra burden of the system and high execution speed, solves the problem of power-down protection in the process of transaction update and transaction processing, and effectively prolongs the service life of the transaction backup area, thereby prolonging the service life of the flash memory.
Optionally, the flash memory, wherein the transaction backup address and the data area index number correspond to pages in the transaction backup address and the data area.
Optionally, the flash memory, wherein the transaction backup address and data area includes:
A transaction backup address area and a transaction backup data area.
It should be noted that, the transaction backup data area is used for storing backup data, and the transaction backup address area is used for storing a destination address of write-back of the backup data.
Optionally, the flash memory, wherein the transaction backup address area includes at least one block, and each block includes: offset address and check code.
It should be noted that the offset address of each block corresponds to the check code.
Optionally, the flash memory, wherein the offset address is used to indicate a destination address of the target backup data write-back in the transaction backup data area.
Optionally, in the flash memory, the check code is used to determine whether the offset address corresponding to the check code is correct.
It should be noted that, when the offset address is correct, the target backup data write-back can be performed.
As shown in fig. 1, an embodiment of the present invention further provides a power-down protection method of a flash memory, which is characterized in that the method is applied to an electronic device, where the electronic device includes the flash memory as described in any one of the above, and the method includes:
step S101: when the power-on reset is initialized, checking a transaction backup start mark and a transaction backup end mark of each block in the transaction backup mark area, and judging whether a target block with power failure occurs in the data updating process before the current power-on of the flash memory;
In the embodiment of the invention, whether the transaction backup start mark and the transaction backup end mark meet preset conditions or not is checked;
when the transaction backup start mark and the transaction backup end mark do not meet the preset conditions, judging that the target block exists before the flash memory is powered up this time, and judging that unexpected power failure occurs;
the preset condition is that the transaction backup start mark is a first preset value and the transaction backup end mark is a second preset value.
Specifically, if 256 bytes are included in each page of the flash memory, the transaction backup area is 13 pages, the transaction backup flag area occupies 1 page, the transaction backup address and the data area occupy 12 pages, the first preset value is 0xA5, and the second preset value is 0x00.
It should be noted that, when the transaction backup start flag and the transaction backup end flag meet the preset conditions, it is determined that the target block does not exist before the current power-up of the flash memory, and it is determined that unexpected power-down does not occur.
Step S102: under the condition that the target block exists before the current power-on of the flash memory is judged, the target backup data is written back to the target address according to the transaction backup address and the data area index number in the target block;
Wherein, the target backup data is backup data corresponding to the transaction backup address and the data area index number in the transaction backup data area; and the destination address is an offset address corresponding to the transaction backup address and the index number of the data area in the transaction backup address area.
In the embodiment of the invention, whether the offset addresses corresponding to the transaction backup address and the data area index number are correct or not is judged according to the check codes corresponding to the transaction backup address and the data area index number in the transaction backup address area;
and under the condition that the offset address is correct, the target backup data is written back to the offset address corresponding to the transaction backup address and the data area index number.
It should be noted that, the offset address and the check code of each block in the transaction backup address area correspond to each other.
It should be further noted that, under the condition that the target block exists before the current power-up of the flash memory, the target backup data is written back to the target address for data recovery, so as to realize the power-down protection of the data, and after the transaction writing flow is finished, the transaction backup finishing standard in the target block is written into the second preset value.
In the embodiment of the invention, by checking the transaction backup start mark and the transaction backup end mark of each block in the transaction backup mark area during power-on reset initialization, judging whether a target block with power failure occurs in the process of data updating before the current power-on of the flash memory, and writing back target backup data to a target address according to the transaction backup address and the data area index number in the target block under the condition that the target block exists before the current power-on of the flash memory is judged, the service life of the transaction backup area is effectively prolonged, and thus the service life of the flash memory is prolonged.
The following specifically describes the data power-down protection flow with reference to fig. 2.
Step S201: and when the power-on reset is initialized, checking whether a transaction backup start mark and a transaction backup end mark of each block in the transaction backup mark area meet preset conditions, and judging whether a target block which is powered down in the data updating process exists before the power-on of the flash memory, namely judging whether unexpected power down occurs or whether an unfinished transaction backup flow exists.
When the transaction backup start flag and the transaction backup end flag do not meet the preset conditions, determining that the target block exists before the current power-up of the flash memory, and entering step S202: and checking the check code of the corresponding page in the transaction backup address area according to the transaction backup address and the index number of the data area in the target block, and judging whether the offset address of the corresponding page in the transaction backup address area is correct.
If the offset address is correct, the process proceeds to step S203: writing back the target backup data to the target address according to the transaction backup address and the data area index number in the target block; the target backup data is backup data of pages corresponding to the transaction backup address and the data area index number in the transaction backup data area; and the destination address is an offset address of a page corresponding to the transaction backup address and the index number of the data area in the transaction backup address area.
Step S204: after the transaction writing process is finished, the transaction backup finishing address in the target block is written into a second preset value, and the data power-down protection process is finished.
It should be noted that, when the transaction backup start flag and the transaction backup end flag meet the preset conditions, it is determined that the target block does not exist before the current power-up of the flash memory, or the power-down protection flow of the data is directly ended when the offset address is incorrect.
Optionally, the power-down protection method of the flash memory further includes:
and under the condition that the first data needs to be updated, writing the first data or the second data serving as the backup data into the transaction backup data area, and writing the second data into a page where the first data is located, wherein the second data is updated data.
In the embodiment of the present invention, the first data is data to be updated, i.e. old data; the second data is updated data, i.e. new data. When the first data needs to be updated, that is, when a data update request is received, the first data or the second data can be backed up, and after the backup, the data is updated.
When a data update request is received, a transaction backup process is performed first, and then a transaction update process is performed.
Optionally, the method for protecting the flash memory from power failure, wherein the writing the first data or the second data as the backup data into the transaction backup data area, and writing the second data into the page where the first data is located, further includes:
Determining idle blocks in the transaction backup mark area;
and writing the transaction backup start mark into a first preset value in the idle block, and updating the transaction backup address and the data area index number.
It should be noted that, under the condition of receiving a data update request, searching for an idle block in the transaction backup flag area according to a transaction backup start flag; writing the transaction backup start flag into a first preset value in the idle block, wherein the first preset value is 0xA5; updating the transaction backup address and the data area index number of the idle block, specifically, the interval of the transaction backup address and the data area index number is 0x0000 to 0x000B, and if the current transaction backup address and the data area index number of the idle block are any value in the interval, the update operation is to add 1 to the current transaction backup address and the data area index number; and if the current transaction backup address and the data area index number of the idle block are null values, updating the transaction backup address and the data area index number to be 0x0000 in the updating operation.
Table 1 below lists the data cases of the transactional backup area after updating the 10 bytes of data starting at addresses 0x201, and 0x 404:
TABLE 1
Table 2 below lists the data cases of the transactional backup area after updating the 10 bytes of data starting at addresses 0x401, 0x502, and 0x 604:
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TABLE 2
Tables 1 and 2 shown above are only examples, and in practical applications, any size of transaction backup area may be used by those skilled in the art, and other values may be used as the transaction backup start flag and the transaction backup end flag, and are not limited and compared herein.
Optionally, the method for protecting the flash memory from power failure, wherein the writing the first data or the second data as the backup data into the transaction backup data area includes:
and writing the first data or the second data serving as the backup data into the transaction backup data area according to the transaction backup address and the data area index number.
In the embodiment of the invention, according to the updated transaction backup address and the updated data area index number, writing the page where the first data or the second data is located into the page corresponding to the transaction backup address and the data area index number in the transaction backup data area.
Optionally, the method for protecting the flash memory from power failure, wherein after the first data is written into the transaction backup data area, the method further includes:
And writing the offset address and the check code of the page where the first data are located into the transaction backup address area.
It should be noted that, the offset address and the check code of the page where the first data, i.e. the old data, is located are written into the block corresponding to the transaction backup and the data area index number updated as above in the transaction backup address area.
Optionally, the method for protecting the flash memory from power failure, wherein after the writing of the first data or the second data as the backup data into the transaction backup data area and the writing of the second data into the page of the first data, the method further includes:
and writing the transaction backup ending mark into a second preset value in the idle block.
It should be noted that, after the transaction backup process, that is, the transaction writing process, is finished, the transaction backup end flag is written into a second preset value in the idle block, where the second preset value is 0x00, so as to finish the data update, and finish the transaction update process.
The power-down protection method for the flash memory has the advantages of simple algorithm, small extra burden of a system and high execution speed, solves the problem of power-down protection in the processes of flash memory data updating and transaction processing, and effectively prolongs the service life of a transaction backup area, thereby prolonging the service life of the flash memory.
The data update flow is specifically described below with reference to fig. 3.
Step S301: and under the condition that a data updating request is received, searching for idle blocks in the transaction backup mark area according to the transaction backup start mark.
Step S302: and writing a transaction backup start mark into a first preset value in the idle block, and updating a transaction backup address and a data area index number.
Step S303: and (3) a transaction backup flow, namely writing the first data (old data) or the second data (new data) into pages corresponding to the updated transaction backup address and the data area index number in the transaction backup data area.
Step S304: and writing the offset address and the check code of the page where the first data (old data) is located into a block corresponding to the updated transaction backup address and the data area index number in the transaction backup address area in the step S302.
Step S305: the second data (new data) is written to the page where the first data is located.
Step S306: and judging whether to end the transaction backup flow.
If it is determined that the transaction backup flow has ended, the flow advances to step S307: writing the transaction backup end mark of the idle block into a second preset value, and ending the data updating flow.
If it is determined that the transaction backup flow is not ended, the flow returns to step S303.
As shown in fig. 4, an embodiment of the present invention further provides an electronic device 400, including a processor 401 and a transceiver 402, wherein:
the processor 401 is configured to check, during power-on reset initialization, a transaction backup start flag and a transaction backup end flag of each block in the transaction backup flag area, and determine whether a target block that is powered down in a data update process exists before the current power-on of the flash memory;
the processor 401 is further configured to, when it is determined that the target block exists before the current power-up of the flash memory, write back target backup data to a destination address according to a transaction backup address and a data area index number in the target block;
the target backup data is backup data corresponding to the transaction backup address and the data area index number in the transaction backup data area; the destination address is an offset address corresponding to the transaction backup address and the index number of the data area in the transaction backup address area.
In the embodiment of the invention, by checking the transaction backup start mark and the transaction backup end mark of each block in the transaction backup mark area during power-on reset initialization, judging whether a target block with power failure occurs in the process of data updating before the current power-on of the flash memory, and writing back target backup data to a target address according to the transaction backup address and the data area index number in the target block under the condition that the target block exists before the current power-on of the flash memory is judged, the service life of the transaction backup area is effectively prolonged, and thus the service life of the flash memory is prolonged.
Optionally, the electronic device 400, wherein the processor 401 is specifically configured to check whether the transaction backup start flag and the transaction backup end flag meet a preset condition;
when the transaction backup start mark and the transaction backup end mark do not meet the preset conditions, judging that the target block exists before the flash memory is electrified this time;
the preset condition is that the transaction backup start mark is a first preset value and the transaction backup end mark is a second preset value.
Optionally, in the electronic device 400, the processor 401 is specifically configured to determine whether an offset address corresponding to the transaction backup address and the data area index number is correct according to a check code corresponding to the transaction backup address and the data area index number in the transaction backup address area;
and under the condition that the offset address is correct, the target backup data is written back to the offset address corresponding to the transaction backup address and the data area index number.
Optionally, in the electronic device 400, the processor 401 is further configured to, when the first data needs to be updated, write the first data or the second data as the backup data into the transaction backup data area, and write the second data into a page where the first data is located, where the second data is updated data.
Optionally, the electronic device 400, wherein the processor 401 is further configured to determine a free block in the transaction backup flag area;
and writing the transaction backup start mark into a first preset value in the idle block, and updating the transaction backup address and the data area index number.
Optionally, in the electronic device 400, the processor 401 is specifically configured to write the first data or the second data as the backup data into the transaction backup data area according to the transaction backup address and the data area index number.
Optionally, in the electronic device 400, the processor 401 is further configured to write an offset address and a check code of a page where the first data is located into the transaction backup address area.
Optionally, the electronic device, wherein the processor 401 is further configured to write, in the idle block, the transaction backup end flag to a second preset value.
As shown in fig. 5, an embodiment of the present invention further provides a power-down protection device for a flash memory, including:
a first judging module 501, configured to check, during power-on reset initialization, a transaction backup start flag and a transaction backup end flag of each block in the transaction backup flag area, and judge whether a target block that is powered down in a data update process exists before the current power-on of the flash memory;
The first write-back module 502 is configured to write back target backup data to a destination address according to a transaction backup address and a data area index number in the target block when it is determined that the target block exists before the current power-up of the flash memory;
the target backup data is backup data corresponding to the transaction backup address and the data area index number in the transaction backup data area; the destination address is an offset address corresponding to the transaction backup address and the index number of the data area in the transaction backup address area.
In the embodiment of the invention, by checking the transaction backup start mark and the transaction backup end mark of each block in the transaction backup mark area during power-on reset initialization, judging whether a target block with power failure occurs in the process of data updating before the current power-on of the flash memory, and writing back target backup data to a target address according to the transaction backup address and the data area index number in the target block under the condition that the target block exists before the current power-on of the flash memory is judged, the service life of the transaction backup area is effectively prolonged, and thus the service life of the flash memory is prolonged.
Optionally, in the power-down protection device of a flash memory, the first determining module 501 is specifically configured to:
checking whether the transaction backup start mark and the transaction backup end mark meet preset conditions;
when the transaction backup start mark and the transaction backup end mark do not meet the preset conditions, judging that the target block exists before the flash memory is electrified this time;
the preset condition is that the transaction backup start mark is a first preset value and the transaction backup end mark is a second preset value.
Optionally, the power-down protection device of the flash memory, where the first write-back module 502 is specifically configured to:
judging whether offset addresses corresponding to the transaction backup address and the data area index number are correct or not according to check codes corresponding to the transaction backup address and the data area index number in the transaction backup address area;
and under the condition that the offset address is correct, the target backup data is written back to the offset address corresponding to the transaction backup address and the data area index number.
Optionally, the power-down protection device of the flash memory further includes:
The first writing module is used for writing the first data or the second data serving as the backup data into the transaction backup data area and writing the second data into the page where the first data is located when the first data needs to be updated, wherein the second data is updated data.
Optionally, the power-down protection device of the flash memory further includes:
a determining module, configured to determine an idle block in the transaction backup flag area;
and the second writing module is used for writing the transaction backup start mark into the first preset value in the idle block and updating the transaction backup address and the data area index number.
Optionally, the power-down protection device of the flash memory, the first writing module is specifically configured to:
and writing the first data or the second data serving as the backup data into the transaction backup data area according to the transaction backup address and the data area index number.
Optionally, the power-down protection device of the flash memory further includes:
and the third writing module is used for writing the offset address and the check code of the page where the first data are located into the transaction backup address area.
Optionally, the power-down protection device of the flash memory further includes:
and the fourth writing module is used for writing the transaction backup ending mark into a second preset value in the idle block.
It should be noted that, the device provided by the embodiment of the present invention can implement all the method steps implemented by the embodiment of the power-down protection method of the flash memory, and can achieve the same technical effects, and the same parts and beneficial effects as those of the embodiment of the method in the embodiment are not described in detail herein.
The embodiment of the invention also provides an electronic device, as shown in fig. 6, including: a processor 601; and a memory 603 connected to the processor 601 through a bus interface 602, the memory 603 storing programs and data used by the processor 601 when executing operations, the processor 601 calling and executing the programs and data stored in the memory 603.
Wherein a transceiver 604 is coupled to the bus interface 602 for receiving and transmitting data under the control of the processor 601.
Wherein in fig. 6, a bus architecture may comprise any number of interconnected buses and bridges, and in particular one or more processors represented by processor 601 and various circuits of memory represented by memory 603, linked together. The bus architecture may also link together various other circuits such as peripheral devices, voltage regulators, power management circuits, etc., which are well known in the art and, therefore, will not be described further herein. The bus interface provides a user interface 605. The transceiver 604 may be a number of elements, i.e. include a transmitter and a receiver, providing a means for communicating with various other apparatus over a transmission medium. The processor 601 is responsible for managing the bus architecture and general processing, and the memory 603 may store data used by the processor 601 in performing operations.
Those skilled in the art will appreciate that all or part of the steps implementing the above embodiments may be implemented by hardware, or may be implemented by a program including instructions for performing some or all of the steps of the above methods; and the program may be stored in a readable storage medium, which may be any form of storage medium.
The embodiment of the application also provides a readable storage medium, on which a program or an instruction is stored, which when executed by a processor, implements the power-down protection method of a flash memory according to any one of the above.
In the several embodiments provided in the present application, it should be understood that the disclosed methods and apparatus may be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may be physically included separately, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in hardware plus software functional units.
The integrated units implemented in the form of software functional units described above may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium, and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform part of the steps of the transceiving method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that various modifications and changes can be made without departing from the principles of the present invention, and such modifications and changes are intended to be within the scope of the present invention.

Claims (18)

1. A flash memory, wherein a memory space of the flash memory comprises a data storage area and a transaction backup area, the transaction backup area comprising:
a transaction backup mark area;
transaction backup address and data area;
wherein the transaction backup flag area includes at least one block, each block including: a transaction backup start flag, a transaction backup address, a data area index number, and a transaction backup end flag;
and the transaction backup start mark and the transaction backup end mark are used for judging whether a target block which is powered down in the data updating process exists before the current power-on of the flash memory when the power-on reset is initialized.
2. The flash memory of claim 1, wherein the transaction backup address and data area index number corresponds to a page in the transaction backup address and data area.
3. The flash memory of claim 1, wherein the transaction backup address and data area comprises:
a transaction backup address area and a transaction backup data area.
4. The flash memory of claim 3 wherein the transactional backup address area comprises at least one block, each block comprising: offset address and check code.
5. The flash memory of claim 4, wherein the offset address is used to indicate a destination address for a target backup data write back in the transactional backup data area.
6. The flash memory of claim 4, wherein the check code is used to determine whether the offset address corresponding to the check code is correct.
7. A power-down protection method of a flash memory, applied to an electronic device, the electronic device comprising the flash memory according to any one of claims 1 to 6, the method comprising:
when the power-on reset is initialized, checking a transaction backup start mark and a transaction backup end mark of each block in the transaction backup mark area, and judging whether a target block with power failure occurs in the data updating process before the current power-on of the flash memory;
under the condition that the target block exists before the current power-on of the flash memory is judged, the target backup data is written back to the target address according to the transaction backup address and the data area index number in the target block;
wherein, the target backup data is backup data corresponding to the transaction backup address and the data area index number in the transaction backup data area; and the destination address is an offset address corresponding to the transaction backup address and the index number of the data area in the transaction backup address area.
8. The method for protecting a flash memory from power-down according to claim 7, wherein the step of checking a transaction backup start flag and a transaction backup end flag of each block in the transaction backup flag area at the time of power-on reset initialization to determine whether a target block for which power-down occurs in a data update process before the current power-on of the flash memory includes:
checking whether the transaction backup start mark and the transaction backup end mark meet preset conditions;
when the transaction backup start mark and the transaction backup end mark do not meet the preset conditions, judging that the target block exists before the flash memory is electrified this time;
the preset condition is that the transaction backup start mark is a first preset value and the transaction backup end mark is a second preset value.
9. The method for protecting a flash memory from power failure according to claim 7, wherein, if it is determined that the target block exists before the flash memory is powered up this time, writing back the target backup data to the destination address according to the transaction backup address and the data area index number in the target block, comprising:
Judging whether offset addresses corresponding to the transaction backup address and the data area index number are correct or not according to check codes corresponding to the transaction backup address and the data area index number in the transaction backup address area;
and under the condition that the offset address is correct, the target backup data is written back to the offset address corresponding to the transaction backup address and the data area index number.
10. The method for power-down protection of a flash memory of claim 7, further comprising:
and under the condition that the first data needs to be updated, the first data or the second data is used as the backup data, is written into the transaction backup data area, and is written into the page where the first data is located, wherein the second data is updated data.
11. The method of claim 10, wherein the writing of the first data or the second data as the backup data to the transactional backup data area and the writing of the second data to the page of the first data are preceded by:
determining idle blocks in the transaction backup mark area;
And writing the transaction backup start mark into a first preset value in the idle block, and updating the transaction backup address and the data area index number.
12. The method for power-down protection of a flash memory according to claim 10, wherein writing the first data or the second data as the backup data into the transaction backup data area comprises:
and writing the first data or the second data serving as the backup data into the transaction backup data area according to the transaction backup address and the data area index number.
13. The method of claim 10, wherein after the writing the first data to the transactional backup data area, the method further comprises:
and writing the offset address and the check code of the page where the first data are located into the transaction backup address area.
14. The method of claim 11, wherein after writing the first data or the second data as the backup data to the transaction backup data area and writing the second data to the page of the first data, the method further comprises:
And writing the transaction backup ending mark into a second preset value in the idle block.
15. An electronic device comprising a processor and a transceiver, characterized in that:
the processor is used for checking a transaction backup start mark and a transaction backup end mark of each block in the transaction backup mark area when the power-on reset is initialized, and judging whether a target block with power failure occurs in the data updating process before the power-on of the flash memory;
the processor is further configured to write back target backup data to a destination address according to a transaction backup address and a data area index number in the target block when it is determined that the target block exists before the current power-up of the flash memory;
the target backup data is backup data corresponding to the transaction backup address and the data area index number in the transaction backup data area; the destination address is an offset address corresponding to the transaction backup address and the index number of the data area in the transaction backup address area.
16. A power-down protection device for a flash memory, comprising:
the first judging module is used for checking a transaction backup start mark and a transaction backup end mark of each block in the transaction backup mark area when the power-on reset is initialized, and judging whether a target block with power failure occurs in the data updating process before the current power-on of the flash memory;
The first write-back module is used for writing back target backup data to a target address according to a transaction backup address and a data area index number in the target block under the condition that the target block exists before the current power-on of the flash memory;
the target backup data is backup data corresponding to the transaction backup address and the data area index number in the transaction backup data area; the destination address is an offset address corresponding to the transaction backup address and the index number of the data area in the transaction backup address area.
17. An electronic device, comprising: a transceiver, a processor, a memory, and a program or instructions stored on the memory and executable on the processor; a method for power-down protection of a flash memory according to any one of claims 7 to 14, characterized in that the processor implements the method when executing the program or instructions.
18. A readable storage medium having stored thereon a program or instructions, which when executed by a processor, implements a power-down protection method for a flash memory according to any of claims 7 to 14.
CN202210137042.4A 2022-02-15 2022-02-15 Flash memory and power-down protection method and device Pending CN116643912A (en)

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CN202210137042.4A CN116643912A (en) 2022-02-15 2022-02-15 Flash memory and power-down protection method and device

Applications Claiming Priority (1)

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