CN116643081A - High-reliability relay protection device sampling system and method - Google Patents
High-reliability relay protection device sampling system and method Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/26—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
- G01R19/2506—Arrangements for conditioning or analysing measured signals, e.g. for indicating peak values ; Details concerning sampling, digitizing or waveform capturing
- G01R19/2509—Details concerning sampling, digitizing or waveform capturing
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Abstract
The application discloses a high-reliability relay protection device sampling system and a high-reliability relay protection device sampling method, wherein the high-reliability relay protection device sampling system comprises the following steps: the analog sampling signals output by the alternating current module of the target relay protection device are converted into the same two signals, and the same two signals are respectively output to different analog-to-digital conversion modules through a plurality of operational amplifiers to obtain a main sampling signal and a complex sampling signal; the FPGA chip is used for respectively executing independent interpolation and error detection logic on the main sampling signal and the complex sampling signal and organizing the main sampling signal and the complex sampling signal into sampling value messages according to a proprietary protocol format; and the central processing unit module is used for processing the sampling value message, establishing an abnormal processing mechanism and monitoring the working condition of components and the self-checking result of software and hardware of the relay protection device sampling system in real time. The application relieves the technical problem of incorrect action of the relay protection device caused by error of sampling data of the relay protection device due to abnormal working states of components such as single event upset effect and the like in the prior art.
Description
Technical Field
The application relates to the technical field of power system automation, in particular to a high-reliability relay protection device sampling system and a high-reliability relay protection device sampling method.
Background
With the development of electronic technology, integrated circuit components in a modern microcomputer relay protection device are applied in a large quantity, the device performance is greatly improved, but at the same time, sampling links caused by unstable component performance, single event upset and the like frequently appear, so that misoperation and refusal of the protection device occur in actual operation, and great threat is brought to stable and safe operation of a power grid. Particularly, when the critical processing chip is subjected to particle radiation caused by high-energy particles (protons, electrons, heavy ions, etc.) in the atmosphere, the integrated circuit component therein is bombarded by the high-energy particles, and the state of the integrated circuit component is possibly reversed, which is called a single-particle inversion effect. If the state of the component is turned over by mistake, the unstable work of the chip and even fatal error are caused, and when the sampling data is destroyed or tampered, the influence on the relay protection device is serious.
Disclosure of Invention
The application aims to solve at least one technical problem and provide a high-reliability relay protection device sampling system and method.
In a first aspect, an embodiment of the present application provides a high-reliability sampling system for a relay protection device, which is disposed in a target relay protection device; comprising the following steps: the system comprises a plurality of operational amplifiers, a plurality of analog-to-digital conversion modules, an FPGA chip and a central processing unit module; the analog sampling signals output by the alternating current module of the target relay protection device are converted into the same two signals, and the same two signals are respectively output to different analog-to-digital conversion modules through the plurality of operational amplifiers to obtain a main sampling signal and a complex sampling signal; the FPGA chip is used for respectively executing independent interpolation and error detection logic on the main sampling signal and the complex sampling signal, and organizing the main sampling signal and the complex sampling signal into sampling value messages according to a proprietary protocol format; the sampling value messages comprise a main sampling value message and a repeated sampling value message; the tail of the sampling value message comprises a whole section of message check code; the central processing unit module is used for processing the sampling value message; the processing operation comprises data processing, data correctness checking and consistency checking and data quality processing; the central processing unit module is also used for establishing an exception handling mechanism and monitoring the working condition of components and the self-checking result of software and hardware of the relay protection device sampling system in real time.
Further, the plurality of operational amplifiers and the plurality of analog-to-digital conversion modules are powered by independent power supplies.
Further, the FPGA chip is further configured to: reading the main sampling signal and the complex sampling signal from the plurality of analog-to-digital conversion modules at a preset frequency; interpolation processing is respectively carried out on the main sampling signal and the complex sampling signal based on sampling frequency required by a protection algorithm of the target relay protection device; and simultaneously calculating and checking a check code generated by the data before and after interpolation of the main sampling signal and the complex sampling signal.
Further, the interpolation processing logic of the FPGA chip on the main sampling signal and the interpolation processing logic of the complex sampling signal are mutually independent, and the FPGA chip is provided with a probe monitoring function in the interpolation processing logic of the main sampling signal and the complex sampling signal.
Further, the central processing unit module is further configured to: if the data correctness check is not carried out on the sampling value message, discarding the sampling value message and sending an alarm signal; if the data correctness check is passed on the sampling value message, checking whether the quality of each sampling channel in the sampling value message has an abnormal mark bit or not; if yes, the sampling channel with the abnormal flag bit is subjected to invalid processing.
Further, the central processing unit module is further configured to: acquiring working conditions of a sampling element of the relay protection device sampling system, and judging whether the working conditions of the relay protection device sampling system are abnormal or not based on the working conditions of the sampling element; the sampling element working conditions comprise: the working voltage and reference voltage of the plurality of operational amplifiers, the working voltage and temperature of the plurality of analog-to-digital conversion modules, the working voltage and temperature of the FPGA chip and the temperature of the central processing unit module; and if the working condition abnormality does not exist in the relay protection device sampling system and the consistency check of the main sampling signal sampling value message and the repeated sampling signal sampling value message is passed, the sampling value message is sent to a protection algorithm module of the target relay protection device.
Further, the central processing unit module is further configured to: and if the working condition of the relay protection device sampling system is abnormal, or the consistency check of the main sampling signal sampling value message and the repeated sampling signal sampling value message is not passed, locking the protection function of the target relay protection device.
In a second aspect, the embodiment of the application also provides a high-reliability relay protection device sampling method, which is applied to a relay protection device sampling system; the relay protection device sampling system is arranged in the target relay protection device; comprising the following steps: converting analog sampling signals output by an alternating current module of the target relay protection device into two identical signals, and respectively outputting the two identical signals to different analog-to-digital conversion modules through a plurality of operational amplifiers to obtain a main sampling signal and a complex sampling signal; independent interpolation and error detection logic is respectively executed on the main sampling signal and the complex sampling signal, and the main sampling signal and the complex sampling signal are organized into sampling value messages according to a proprietary protocol format; the sampling value messages comprise a main sampling value message and a repeated sampling value message; the tail of the sampling value message comprises a whole section of message check code; processing the sampling value message; the processing operation comprises data processing, data correctness checking and consistency checking and data quality processing; and establishing an exception handling mechanism, and monitoring the working conditions of components and the self-checking results of software and hardware of the relay protection device sampling system in real time.
Further, the method further comprises the following steps: if the data correctness check is not carried out on the sampling value message, discarding the sampling value message and sending an alarm signal; if the data correctness check is passed on the sampling value message, checking whether the quality of each sampling channel in the sampling value message has an abnormal mark bit or not; if yes, the sampling channel with the abnormal flag bit is subjected to invalid processing.
Further, the method further comprises the following steps: acquiring working conditions of a sampling element of the relay protection device sampling system, and judging whether the working conditions of the relay protection device sampling system are abnormal or not based on the working conditions of the sampling element; if the working condition abnormality does not exist in the relay protection device sampling system and the consistency check of the main sampling signal sampling value message and the repeated sampling signal sampling value message is passed, the sampling value message is sent to a protection algorithm module of the target relay protection device; and if the working condition of the relay protection device sampling system is abnormal, or the consistency check of the main sampling signal sampling value message and the repeated sampling signal sampling value message is not passed, locking the protection function of the target relay protection device.
The application provides a high-reliability relay protection device sampling system and a high-reliability relay protection device sampling method, which are based on double configuration, wherein the sampling system greatly enriches the information quantity of sampling data and software and hardware self-inspection, and the problems of sampling links are exposed at the source, so that the validity of electric quantity data applied by a protection algorithm is ensured, the reliability of the relay protection device is improved, the stable operation of a power system is better ensured, and the technical problems of incorrect actions of the relay protection device caused by error sampling data of the relay protection device due to abnormal working states of components such as single event upset effect and the like in the prior art are solved.
Drawings
In order to more clearly illustrate the embodiments of the application or the technical solutions in the prior art, the drawings that are needed in the detailed description of the embodiments and the prior art will be briefly described below, it being obvious that the drawings in the following description are some embodiments of the application and that other drawings may be obtained from these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a high-reliability sampling system for a relay protection device according to an embodiment of the present application;
fig. 2 is a flowchart of a high-reliability sampling method for a relay protection device according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Example 1
Fig. 1 is a schematic diagram of a high-reliability sampling system for a relay protection device according to an embodiment of the present application. The relay protection device sampling system is arranged in the target relay protection device. As shown in fig. 1, a sampling system for a relay protection device provided by an embodiment of the present application includes: a plurality of operational amplifiers 10, a plurality of analog-to-digital conversion modules 20, an FPGA chip 30, and a central processor module 40.
In the embodiment of the application, the hardware part of the relay protection device sampling system adopts a highly independent double design to realize decoupling of the electric quantity main mining and the repeated mining electric loop. Specifically, analog sampling signals output by the ac module of the target relay protection device are converted into the same two signals, and the same two signals are respectively output to different analog-to-digital conversion modules 20 through a plurality of operational amplifiers 10 to obtain a main sampling signal and a complex sampling signal.
The alternating current module acquires a voltage sampling signal through a voltage transformer; the operational amplifier 10 converts the voltage sampling signal to a signal within the sampling range of the analog-to-digital conversion module 20 (AD module).
Optionally, in the embodiment of the present application, the relay protection device sampling system is divided into a main sampling loop and a repeated sampling loop according to the processing units of the main sampling signal and the repeated sampling signal. The components of the main sampling loop and the repeated sampling loop are arranged in a highly independent mode, and the plurality of operational amplifiers 10 and the plurality of analog-digital conversion modules 20 are powered by independent power supplies. Preferably, at most four analog-to-digital conversion modules 20 are configured per module, and at most sixteen sampling channels are supported per analog-to-digital conversion module 20. Alternatively, the operational amplifier 10 is powered by a dual power supply and uses a separate reference voltage.
Specifically, the FPGA chip 30 is configured to perform independent interpolation and error detection logic on the main sampling signal and the complex sampling signal, and organize the main sampling signal and the complex sampling signal into sampling value messages according to a proprietary protocol format; the sampling value messages comprise a main sampling value message and a repeated sampling value message; the tail of the sampling value message comprises the whole section of message check code.
In the embodiment of the present application, the FPGA chip 30 organizes the main sampling signal and the complex sampling signal into an internal sampling value message according to a proprietary protocol format, transmits the internal sampling value message to the central processing unit module 40 through the data bus, and adds the 32-bit check code calculated from the whole segment of the message to the end of the sampling value message.
Specifically, the central processing unit 40 is configured to perform a processing operation on the sample value packet. The processing operation comprises data processing, data correctness checking and consistency checking and data quality processing so as to confirm the validity of the sampling value message.
Specifically, the central processing unit module 40 is further configured to establish an exception handling mechanism, and monitor the component working condition and the software and hardware self-checking result of the relay protection device sampling system in real time.
Specifically, in the embodiment of the present application, the FPGA chip 30 is further configured to:
reading main sampling signals and complex sampling signals from a plurality of analog-to-digital conversion modules at a preset frequency;
interpolation processing is respectively carried out on the main sampling signal and the complex sampling signal based on sampling frequency required by a protection algorithm of the target relay protection device;
and simultaneously calculating and checking check codes generated by the data before and after interpolation of the main sampling signal and the complex sampling signal.
As shown in fig. 1, in the embodiment of the present application, the interpolation processing logic of the FPGA chip 30 for the main sampling signal and the interpolation processing logic for the complex sampling signal are set independently from each other, and the FPGA chip 30 sets a probe monitoring function in the interpolation processing logic for the main sampling signal and the complex sampling signal.
Specifically, the FPGA chip 30 is configured in the relay protection device sampling system to process the main sampling signal and the repeated sampling signal, and support the functions of hardware loop self-checking and data checking. Specifically, the FPGA chip 30 is responsible for reading the main sampling signal and the complex sampling signal from each analog-to-digital conversion module 20 at a higher frequency, and further performing interpolation processing on the data according to the sampling frequency required by the protection algorithm set in the configuration register of the FPGA chip 30.
In the embodiment of the application, the main sampling signal, the complex sampling signal and the respective interpolation processing logic are completely independent in the FPGA chip 30, a probe monitoring function is added in the respective interpolation circuit, meanwhile, 8-bit check codes generated by data before and after interpolation are calculated and checked, and then the discrimination result is stored in a result register. Preferably, the frequency of the FPGA chip 30 reading data from the analog-to-digital conversion module 20 should be set to be relatively high, not lower than 10kHz; the sampling frequency required by the protection module is typically 1200Hz to 4800Hz.
Optionally, the content in the private protocol packet organized by the FPGA chip 30 includes: message type, sampling frequency, sampling data quality, message content 32-bit check code, as shown in table 1 below:
TABLE 1 sample value message
Optionally, the message type in the private protocol message occupies one byte, and the FPGA and the CPU should agree on values other than other protocol types, so as to identify that the transmitted message is an internal sampling value message. For example, the original 5 internal protocols have a protocol type of 0x01-0x05, and the message type of the internal sampling value message can be appointed as 0x06.
The data quality of a single sampling channel in the proprietary protocol message occupies one byte and is used for transmitting error information of a sampling link, as shown in the following table 2:
TABLE 2
| Bit position | Meaning of data |
| 0 | AD read failure |
| 1 | Internal error of FPGA |
| 2 | Interpolation logic error |
| 3 | Message self-checking error |
| 4 | Reservation of |
| 5 | Reservation of |
| 6 | Reservation of |
| 7 | Reservation of |
Optionally, in an embodiment of the present application, the central processing module 40 is further configured to: if the data correctness check is not carried out on the sampling value message, discarding the sampling value message and sending an alarm signal;
if the data correctness of the sampling value message passes, checking whether the quality of each sampling channel in the sampling value message has an abnormal flag bit or not; if yes, the sampling channel with the abnormal flag bit is subjected to invalid processing.
Optionally, the central processing module 40 is further configured to:
acquiring the working condition of a sampling element of the sampling system of the relay protection device, and judging whether the working condition of the sampling system of the relay protection device is abnormal or not based on the working condition of the sampling element; the sampling element operating mode includes: the working voltage and reference voltage of a plurality of operational amplifiers, the working voltage and temperature of a plurality of analog-digital conversion modules, the working voltage and temperature of an FPGA chip and the temperature of a central processing unit module;
if the working condition abnormality does not exist in the relay protection device sampling system and the consistency check of the main sampling signal sampling value message and the complex sampling signal sampling value message is passed, the sampling value message is sent to a protection algorithm module of the target relay protection device.
If the working condition of the relay protection device sampling system is abnormal, or the consistency check of the main sampling signal sampling value message and the repeated sampling signal sampling value message is not passed, the protection function of the target relay protection device is blocked.
Specifically, after the CPU (and the central processing unit module 40) receives the internal sampling value message transmitted by the FPGA chip 30, the check code generated by the whole message content except the check code is calculated, and when the check code is consistent with the check code at the end of the message, the sampling value message is considered to be not destroyed and tampered in the transmission process. If the internal message check is not passed, discarding the message, and simultaneously sending an alarm signal and locking the protection function; if the internal message passes the verification, the CPU checks whether the quality of each sampling channel has an abnormal bit, if the quality of all the sampling channels is not abnormal, the sampling value message is effectively processed, otherwise, the sampling channels with abnormal bit are invalid processed.
Optionally, in the embodiment of the application, an exception handling mechanism is established in the whole sampling system to realize the monitoring of the working condition of related components in the sampling link and the self-checking of software and hardware, and meanwhile, the CPU performs consistency check on the sampling value data of the main sampling signal and the complex sampling signal, and when the whole system is not abnormal, the CPU provides the sampling value data to the protection algorithm module.
Specifically, the online monitoring and sampling link related component working conditions of the target relay protection device comprise: and when each monitored quantity exceeds a preset threshold value, an alarm signal is sent out, and a protection function is locked. The alarm threshold value of each component working condition monitored on line is specifically that the threshold value range of the voltage is 97.5% -102.5% of rated voltage; the threshold range of temperature is taken to be the working temperature range of each chip specification.
Specifically, the CPU performs consistency check on the sampling value data of the main sampling signal and the repeated sampling signal, specifically, the CPU compares the sampling values of the main sampling signal and the repeated sampling signal at fixed time, the difference between the two should meet the condition that the relative error is less than 2.5% or the absolute error is less than 0.1% of the full range, otherwise, the main and repeated sampling is inconsistent, and the protection function is blocked.
As can be seen from the above description, the application provides a high-reliability relay protection device sampling system, which is aimed at the current situation that the sampling link problems caused by unstable performance, single event upset and the like of the components of the modern microcomputer relay protection device frequently cause misoperation and refusal of the protection device in actual operation, and greatly enriches the information quantity of sampling data and software and hardware self-inspection based on double configuration, ensures the validity of the electric quantity data applied by a protection algorithm at the source, improves the reliability of the relay protection device, better ensures the stable operation of a power system, and has wide application prospect. The application relieves the technical problem of incorrect action of the relay protection device caused by error of sampling data of the relay protection device due to abnormal working states of components such as single event upset effect and the like in the prior art.
Embodiment two:
fig. 2 is a flowchart of a high-reliability sampling method for a relay protection device according to an embodiment of the present application, where the method is applied to the sampling system for a relay protection device in the first embodiment; the relay protection device sampling system is arranged in the target relay protection device. As shown in fig. 2, the sampling method specifically includes the following steps:
step S202, converting analog sampling signals output by an alternating current module of a target relay protection device into two identical signals, and respectively outputting the two identical signals to different analog-digital conversion modules through a plurality of operational amplifiers to obtain a main sampling signal and a complex sampling signal.
Step S204, respectively executing independent interpolation and error detection logic on the main sampling signal and the complex sampling signal, and organizing the main sampling signal and the complex sampling signal into sampling value messages according to a proprietary protocol format; the sampling value message comprises a main sampling value message and a repeated sampling value message; the tail of the sampling value message comprises the whole section of message check code.
Step S206, processing the sampling value message; the processing operations include data processing, data correctness checking, and consistency checking and data quality processing.
Step S208, an exception handling mechanism is established, and the working conditions of components and the self-checking results of software and hardware of the relay protection device sampling system are monitored in real time.
The application provides a high-reliability relay protection device sampling method, which is based on double configuration, greatly enriches the information quantity of sampling data and software and hardware self-inspection, and exposes the problems existing in the sampling link at the source, thereby ensuring the validity of the electric quantity data applied by a protection algorithm, improving the reliability of the relay protection device, better ensuring the stable operation of a power system and relieving the technical problems of error sampling data and incorrect action of the relay protection device caused by abnormal working states of components such as single event upset effect in the prior art.
Specifically, step S204 further includes the steps of:
step S2041, reading the main sampling signal and the complex sampling signal from the plurality of analog-to-digital conversion modules at a preset frequency;
step S2042, respectively performing interpolation processing on the main sampling signal and the complex sampling signal based on the sampling frequency required by the protection algorithm of the target relay protection device;
and step S2043, calculating and checking check codes generated by the data before and after interpolation of the main sampling signal and the complex sampling signal.
Optionally, the method provided by the embodiment of the application further comprises the following steps:
if the data correctness check is not carried out on the sampling value message, discarding the sampling value message and sending an alarm signal;
if the data correctness of the sampling value message passes, checking whether the quality of each sampling channel in the sampling value message has an abnormal flag bit or not; if yes, the sampling channel with the abnormal flag bit is subjected to invalid processing.
Optionally, the method provided by the embodiment of the application further comprises the following steps:
acquiring the working condition of a sampling element of the sampling system of the relay protection device, and judging whether the working condition of the sampling system of the relay protection device is abnormal or not based on the working condition of the sampling element;
if the working condition abnormality does not exist in the relay protection device sampling system and the consistency check of the main sampling signal sampling value message and the complex sampling signal sampling value message is passed, the sampling value message is sent to a protection algorithm module of the target relay protection device;
if the working condition of the relay protection device sampling system is abnormal, or the consistency check of the main sampling signal sampling value message and the repeated sampling signal sampling value message is not passed, the protection function of the target relay protection device is blocked.
It will be evident to those skilled in the art that the application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present disclosure describes embodiments, not every embodiment is provided with a separate embodiment, and that this description is provided for clarity only, and that the disclosure is not limited to the embodiments described in detail below, and that the embodiments described in the examples may be combined as appropriate to form other embodiments that will be apparent to those skilled in the art.
Claims (10)
1. The high-reliability relay protection device sampling system is characterized by being arranged in a target relay protection device; comprising the following steps: the system comprises a plurality of operational amplifiers, a plurality of analog-to-digital conversion modules, an FPGA chip and a central processing unit module;
the analog sampling signals output by the alternating current module of the target relay protection device are converted into the same two signals, and the same two signals are respectively output to different analog-to-digital conversion modules through the plurality of operational amplifiers to obtain a main sampling signal and a complex sampling signal;
the FPGA chip is used for respectively executing independent interpolation and error detection logic on the main sampling signal and the complex sampling signal, and organizing the main sampling signal and the complex sampling signal into sampling value messages according to a proprietary protocol format; the sampling value messages comprise a main sampling value message and a repeated sampling value message; the tail of the sampling value message comprises a whole section of message check code;
the central processing unit module is used for processing the sampling value message; the processing operation comprises data processing, data correctness checking and consistency checking and data quality processing;
the central processing unit module is also used for establishing an exception handling mechanism and monitoring the working condition of components and the self-checking result of software and hardware of the relay protection device sampling system in real time.
2. The relay protection device sampling system of claim 1, wherein: the plurality of operational amplifiers and the plurality of analog-to-digital conversion modules are powered by independent power supplies.
3. The relay protection device sampling system of claim 1, wherein: the FPGA chip is further configured to:
reading the main sampling signal and the complex sampling signal from the plurality of analog-to-digital conversion modules at a preset frequency;
interpolation processing is respectively carried out on the main sampling signal and the complex sampling signal based on sampling frequency required by a protection algorithm of the target relay protection device;
and simultaneously calculating and checking a check code generated by the data before and after interpolation of the main sampling signal and the complex sampling signal.
4. The overload protection device sampling system of claim 3, wherein: the FPGA chip is mutually independent of the interpolation processing logic of the main sampling signal and the interpolation processing logic of the complex sampling signal, and is provided with a probe monitoring function in the interpolation processing logic of the main sampling signal and the complex sampling signal.
5. The relay protection device sampling system of claim 1, wherein: the central processing unit module is further configured to: if the data correctness check is not carried out on the sampling value message, discarding the sampling value message and sending an alarm signal;
if the data correctness check is passed on the sampling value message, checking whether the quality of each sampling channel in the sampling value message has an abnormal mark bit or not; if yes, the sampling channel with the abnormal flag bit is subjected to invalid processing.
6. The relay protection device sampling system of claim 1, wherein: the central processing unit module is further configured to:
acquiring working conditions of a sampling element of the relay protection device sampling system, and judging whether the working conditions of the relay protection device sampling system are abnormal or not based on the working conditions of the sampling element; the sampling element working conditions comprise: the working voltage and reference voltage of the plurality of operational amplifiers, the working voltage and temperature of the plurality of analog-to-digital conversion modules, the working voltage and temperature of the FPGA chip and the temperature of the central processing unit module;
and if the working condition abnormality does not exist in the relay protection device sampling system and the consistency check of the main sampling signal sampling value message and the repeated sampling signal sampling value message is passed, the sampling value message is sent to a protection algorithm module of the target relay protection device.
7. The overload protection device sampling system of claim 6, wherein: the central processing unit module is further configured to: and if the working condition of the relay protection device sampling system is abnormal, or the consistency check of the main sampling signal sampling value message and the repeated sampling signal sampling value message is not passed, locking the protection function of the target relay protection device.
8. The high-reliability relay protection device sampling method is characterized by being applied to a relay protection device sampling system; the relay protection device sampling system is arranged in the target relay protection device; comprising the following steps:
converting analog sampling signals output by an alternating current module of the target relay protection device into two identical signals, and respectively outputting the two identical signals to different analog-to-digital conversion modules through a plurality of operational amplifiers to obtain a main sampling signal and a complex sampling signal;
independent interpolation and error detection logic is respectively executed on the main sampling signal and the complex sampling signal, and the main sampling signal and the complex sampling signal are organized into sampling value messages according to a proprietary protocol format; the sampling value messages comprise a main sampling value message and a repeated sampling value message; the tail of the sampling value message comprises a whole section of message check code;
processing the sampling value message; the processing operation comprises data processing, data correctness checking and consistency checking and data quality processing;
and establishing an exception handling mechanism, and monitoring the working conditions of components and the self-checking results of software and hardware of the relay protection device sampling system in real time.
9. The method according to claim 8, wherein: further comprises:
if the data correctness check is not carried out on the sampling value message, discarding the sampling value message and sending an alarm signal;
if the data correctness check is passed on the sampling value message, checking whether the quality of each sampling channel in the sampling value message has an abnormal mark bit or not; if yes, the sampling channel with the abnormal flag bit is subjected to invalid processing.
10. The method according to claim 8, wherein: further comprises:
acquiring working conditions of a sampling element of the relay protection device sampling system, and judging whether the working conditions of the relay protection device sampling system are abnormal or not based on the working conditions of the sampling element;
if the working condition abnormality does not exist in the relay protection device sampling system and the consistency check of the main sampling signal sampling value message and the repeated sampling signal sampling value message is passed, the sampling value message is sent to a protection algorithm module of the target relay protection device;
and if the working condition of the relay protection device sampling system is abnormal, or the consistency check of the main sampling signal sampling value message and the repeated sampling signal sampling value message is not passed, locking the protection function of the target relay protection device.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202310589188.7A CN116643081B (en) | 2023-05-23 | 2023-05-23 | High-reliability relay protection device sampling system and method |
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