CN116633149A - Digital loop control-based resonant converter conversion method, chip and power supply - Google Patents
Digital loop control-based resonant converter conversion method, chip and power supply Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
- H02M3/33571—Half-bridge at primary side of an isolation transformer
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/01—Resonant DC/DC converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
- H02M3/33515—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with digital control
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
- H02M3/33573—Full-bridge at primary side of an isolation transformer
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
A method for transforming a resonant converter based on digital loop control, a chip and a power supply, wherein the method comprises the following steps: if the full-bridge circuit works in the half-bridge mode, the loop output value u is judged out Greater than loop maximum u max_half At the time, u out Forced to a preset low value u out_Full Updating a driving Period, waiting for a preset sampling Period, and configuring a wave-generating register according to a full-bridge mode; if the full-bridge circuit works in the full-bridge mode, u is determined out Less than the loop minimum u min_Full At the time, u out Forced to a preset high value u out_Half Updating Period, and configuring a wave-generating register according to a half-bridge mode; the application does not increase a hardware circuit, realizes the half-bridge and full-bridge mode switching only depending on the control loop and register configuration of the original control chip, ensures the stable switching of gain in the switching process and effectively reduces the harmonics in the switching processThe method is simple and easy to realize, has low interrupt occupancy rate to the control chip, and is not influenced by parasitic parameters of the transformer and the like.
Description
Technical Field
The application relates to the field of resonant LLC circuits, in particular to a conversion method of a resonant converter based on digital loop control, a chip and a power supply.
Background
Resonant LLC circuits are widely used in high-power supplies with excellent performance such as low cost, high efficiency, and high reliability. Because the resonant LLC is limited by the limitations of switching loss, chip resources, device parameters and the like, the resonant LLC has a limited gain adjustment range and a narrow output range, and particularly, the output voltage is easy to be high and difficult to be low in light load, so the resonant LLC is not suitable for occasions where the output voltage changes from zero volt to hundreds of volts. The mode of mixing the duty ratio and the frequency can widen the output voltage range of the resonance type LLC, but the efficiency below half load is lower, which is extremely unfavorable for high-power sources such as heating power sources.
Under the same working condition, the gain of the half-bridge LLC is only half of that of the full-bridge LLC, so that the scheme is proposed that the half-bridge LLC is adopted below the half load, and the full-bridge LLC is adopted above the half load so as to improve the output range and the light load efficiency of the power supply. However, for a heating power supply with low voltage and large current, the output voltage, the output current and the load impedance are small, so that the problems of intermittent output current, large resonant cavity current and the like easily occur when the half-bridge LLC and the full-bridge LLC are switched, and the reliable operation of the power supply is affected.
At present, the main method for realizing the switching between the half-bridge LLC and the full-bridge LLC comprises the following steps:
1) The switching of the half-bridge LLC and the full-bridge LLC is realized by means of a switching tube: by introducing a group of anti-parallel switching tubes as hinges for switching the full bridge and the half bridge of the resonant converter, the switching tubes can be switched between the half bridge LLC and the full bridge LLC in a working mode by controlling the switching tubes to be turned on and off, but the introduced switching tubes increase the cost and the loss undoubtedly, and meanwhile, the required driving of the switching tubes also increases the control and circuit complexity, so that the stable switching with load is difficult to realize when the output current is larger;
2) Switching of the half-bridge LLC and the full-bridge LLC is realized based on control chip register configuration: the full-bridge LLC circuit is adopted, the switching between the full-bridge LLC and the half-bridge LLC can be realized by controlling the on and off of a switching tube, for example, CN115224944A discloses a control method of a variable topology resonant converter with a smooth switching function, but the switching process is complex, the track control calculation amount is large, and high requirements are put on a control chip.
Disclosure of Invention
The application aims to solve the technical problem that the circuit or the calculation is complex in the prior art, and provides a resonant converter conversion method based on digital loop control, a chip and a power supply.
The technical scheme adopted for solving the technical problems is as follows:
in one aspect, a method for transforming a resonant converter based on digital loop control is configured to be executed by a control chip, the method comprising:
sample period processing step: when a sampling period arrives, reading sampling information at the front end of a load, calculating a loop output value and a driving period of a full-bridge circuit, if the full-bridge circuit works in a half-bridge mode, executing a half-bridge mode processing step, otherwise, executing the full-bridge mode processing step;
half-bridge mode processing steps: judging whether the loop output value is larger than the maximum loop value, if so, forcibly placing the loop output value at a preset low value and updating the driving period, and after waiting for a preset sampling period, configuring a wave generating register according to a full-bridge mode;
full-bridge mode processing steps: judging whether the loop output value is smaller than the minimum loop value, if so, forcibly placing the loop output value at a preset high value and updating the driving period, and configuring a wave-generating register according to a half-bridge mode;
wherein the preset low value and the preset high value satisfy the following conditions: the full-bridge modal gain corresponding to the preset low value is not lower than the half-bridge modal gain corresponding to the maximum loop value, and the half-bridge modal gain corresponding to the preset high value is not higher than the full-bridge modal gain corresponding to the minimum loop value.
Further, in the digital loop control-based resonant converter conversion method of the present application, the preset low value and the preset high value further satisfy the following conditions: the full-bridge modal gain corresponding to the preset low value is not lower than the full-bridge modal gain corresponding to the minimum loop value, and the half-bridge modal gain corresponding to the preset high value is not higher than the half-bridge modal gain corresponding to the maximum loop value.
Further, in the method for transforming a resonant converter based on digital loop control of the present application, the configuring a wave generating register according to a full bridge mode includes: all the wave generating registers corresponding to all pins for providing driving signals for the full-bridge circuit by the control chip are configured to not execute any output constraint behavior;
the wave generating register configured according to the half-bridge mode comprises: according to the characteristics of the half-bridge mode, the wave-generating register corresponding to the pin of the PWM signal, which is provided by the control chip to the full-bridge circuit, is configured not to execute any output constraint action, and the wave-generating register corresponding to the pin of the low level or high level, which is provided by the control chip to the full-bridge circuit, is configured to output constraint as low level or high level.
Further, in the method for converting a resonant converter based on digital loop control according to the present application, in the half-bridge mode processing step, when it is determined that the loop output value is greater than the maximum loop value, a mode flag is set to a first preset value;
in the full-bridge mode processing step, when the loop output value is judged to be smaller than the minimum loop value, a mode flag is set to a second preset value;
in the sampling period processing step, after the driving period is calculated, a mode flag is read, if the mode flag is set to a second preset value, the half-bridge mode processing step is executed after the wave-generating register is configured according to the half-bridge mode, and if the mode flag is set to a first preset value, the full-bridge mode processing step is executed after the wave-generating register is configured according to the full-bridge mode.
Further, in the digital loop control-based resonant converter conversion method of the present application, the sampling period processing step and the half-bridge mode processing step each calculate or update the driving period by: substituting a specific value of the loop output value into the periodic curve period=k×u out And in +b, calculating to obtain a specific value of the driving period.
Further, in the digital loop control-based resonant converter conversion method according to the present application, the method further includes:
a period curve establishment step: presetting a maximum switching period corresponding to the maximum value of the loop output value, and setting a minimum switching period corresponding to the minimum value of the loop output value; performing curve fitting according to the maximum switching period corresponding to the maximum value and the minimum switching period corresponding to the minimum value to obtain a period curve: period=k×u out +b, where k, b is any real number.
Further, in the digital loop control-based resonant converter conversion method of the present application, the gain corresponding to the specific value of the loop output value is related to the driving period.
Further, in the digital loop control-based resonant converter conversion method according to the present application, the loop output value is calculated in the sampling period processing step by: reading current information of the front end of a load, which is acquired by a current Hall and is input to a control chip after being modulated by an operational amplifier, converting the current information into an actual load output current value according to sampling information, calculating a difference value between an output current given value and the actual load output current value, and calculating a loop output value u based on the difference value out ＝I out_err *K p +K i ∫I out_err dt, where, K p ，K i Are all arbitrary real numbers.
In both aspects, a control chip is constructed comprising a processor and a memory, the memory storing a computer program which, when executed by the processor, implements the steps of the method as claimed in any one of the preceding claims.
The power supply comprises an input rectifying circuit, a full-bridge circuit, a resonant circuit, an output rectifying circuit, a sampling circuit and a control chip as described above, wherein the input of the sampling circuit is connected with the load side of the output rectifying circuit, and the control chip is connected with the output of the sampling circuit and the control end of the full-bridge circuit.
The digital loop control-based resonant converter conversion method, the chip and the power supply have the following beneficial effects: the application does not increase a hardware circuit on the basis of the original control chip, realizes the switching of the half-bridge LLC and the full-bridge LLC only by depending on the control loop and the register configuration in the original control chip, ensures the stable switching of the gain in the switching process, effectively reduces the overshoot of the resonant cavity current in the switching process, avoids the protection of a power supply and the damage of devices, has simple and easy realization, has lower interrupt occupancy rate to the control chip, is not influenced by parasitic parameters of a transformer and the like, and effectively improves the reliability of a high-power supply and the efficiency below half load.
Drawings
For a clearer description of an embodiment of the application or of a technical solution in the prior art, the drawings that are needed in the description of the embodiment or of the prior art will be briefly described, it being obvious that the drawings in the description below are only embodiments of the application, and that other drawings can be obtained, without inventive effort, by a person skilled in the art from the drawings provided:
FIG. 1 is a schematic diagram of the structure of a power supply of the present application;
FIG. 2 is a schematic diagram of a full bridge circuit;
FIG. 3 is a flow chart of a method of transforming a resonant converter based on digital loop control in accordance with the present application;
fig. 4 is a flow diagram of an embodiment of a digital loop control based resonant converter conversion method of the present application.
Detailed Description
Aiming at the defect of complex circuit or complex calculation in the prior art, the application provides a digital loop control-based resonant converter conversion method, a chip and a power supply, wherein the main thought is as follows: calculating loop output value u in sampling period processing step by using control loop of original control chip out And the drive Period of the full-bridge circuit, the switching between the full-bridge and the half-bridge is realized by configuring a wave-generating register without adding any hardware structure; and in the half-bridge mode processing step, the loop output value u is determined out Greater than the maximum loop value u max_half In this case, instead of switching directly to full-bridge mode, the loop output value u is set out Forced to a preset low value u out_Full Updating the driving Period, waiting for a preset sampling Period, and then configuring a wave-generating register according to a full-bridge mode, and judging a loop output value u in the full-bridge mode processing step out Less than the minimum loop value u min_Full Then the loop output value u is calculated out Forced to a preset high value u out_Half And updating the driving Period, configuring a wave generating register according to a half-bridge mode, and defining a preset low value u out_Full Corresponding full-bridge modal Gain out_Full Not lower than the maximum loop value u max_half Corresponding half-bridge modal Gain max_half Preset high value u out_Half Corresponding half-bridge modal Gain out_Half Not higher than the minimum loop value u min_Full Corresponding full-bridge modal Gain min_Full The method is simple and easy to realize, has low interrupt occupancy rate to the control chip, is not influenced by parasitic parameters of the transformer and the like, and effectively improves the reliability of a high-power supply and the efficiency below half load.
In order that the application may be readily understood, a more complete description of the application will be rendered by reference to the appended drawings. Exemplary embodiments of the present application are illustrated in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete. It should be understood that the embodiments of the present application and the specific features in the embodiments are detailed descriptions of the technical solutions of the present application, and not limited to the technical solutions of the present application, and the embodiments of the present application and the technical features in the embodiments may be combined with each other without conflict.
Referring to fig. 1, the power supply includes an input rectifying circuit 201, a full-bridge circuit 202, a resonant circuit 203, and an output rectifying circuit 204, which are sequentially connected, the resonant circuit 203 includes a resonant cavity and a transformer, an ac input voltage is changed into a dc voltage by the input rectifying circuit 201, and electric energy is isolated and transferred through the full-bridge circuit 202, the resonant cavity and the transformer, and then power is supplied to a load through the output rectifying circuit 204 and a filter capacitor.
The half-bridge mode and the full-bridge mode are explained below in combination with the structure of the full-bridge circuit, as shown in fig. 2, the driving signals PWM1A and PWM1B complement each other to generate waves and have dead zones, PWM2B continues to be high level, PWM2A continues to be low level, and the full-bridge circuit works in the half-bridge mode at this time; when the driving signals PWM1A and PWM1B complementarily generate waves and have dead zones, the PWM2A and PWM2B complementarily generate waves and have dead zones, and the full-bridge circuit works in a full-bridge mode. In this embodiment, PWM1A, PWM1B, PWM2A, PWM B occupies one PWM pin of the control chip, i.e. the control chip provides four pins PWM1A, PWM1B, PWM2A, PWM B to drive the full bridge circuit. It can be understood that the control chip can also only provide two paths of driving signals by two pins, two paths of inverting circuits can be designed outside the control chip to additionally develop two paths of driving signals for obtaining four paths of driving signals, for example, PWM1A and PWM1B only occupy one PWM pin of the control chip, the PWM signals output by the PWM pin can be divided into two paths, one path is used as PWM1A, the other path is used as PWM1B through inverting processing, similarly, PWM2A and PWM2B only occupy the other PWM pin of the control chip, the PWM signals output by the PWM pin can be divided into two paths, one path is used as PWM2A, and the other path is used as PWM2B through inverting processing, which is a simple modification of the embodiment and is within the scope of the application.
With continued reference to fig. 1, the power supply further includes a sampling circuit 205 and a control chip 206, where an input of the sampling circuit 205 is connected to a load side of the output rectifying circuit 204, and the control chip 206 is connected to an output of the sampling circuit 205 and a control terminal of the full bridge circuit 202. The control chip 206 is provided with a digital loop controller, and the digital loop controller controls the switches in the full-bridge circuit according to sampling information, specifically reads sampling information (current/voltage) at the front end of the load and calculates to obtain information of a switching state, a switching frequency and a duty ratio of the switching tube of the full-bridge circuit, so that the output current, the voltage or the power supply power at the front end of the load tracks given current, voltage and power. Because the LLC resonant circuit which relies on the frequency to adjust the gain is limited by factors such as switching loss, chip resources, device parameters and the like, the switching frequency cannot be increased without limit, and therefore the requirement that the output voltage of a power supply is adjustable from zero volt to hundred volts cannot be met. In view of this, in the prior art, a hybrid control strategy of frequency modulation, width modulation and phase shifting is generally adopted to reduce the gain of the resonant circuit, so as to realize wide-range output. However, this method increases switching loss below half load, and is low in efficiency, which is very disadvantageous for a high-power supply with adjustable output power. In order to widen the output range of the LLC resonant circuit and improve the efficiency of the LLC resonant circuit under light load, the application constructs a resonant converter conversion method based on digital loop control, which is executed by the control chip 206 in FIG. 1.
Referring to fig. 3, the method of the present application mainly includes:
sample period processing step S101: when a sampling period arrives, the sampling information at the front end of the load is read, and the loop output value u is calculated out And a driving Period of the full-bridge circuit, if the full-bridge circuit works in the half-bridge mode, executing the half-bridge mode processing step S102, otherwise executing the full-bridge mode processing step S103;
in this step, the control target may be current, voltage, or power. The following description will be made taking an output current as an example, similarly to the present embodiment when the control target is changed to voltage, power.
1) Loop output value u out Is calculated by (1):
the current Hall in the sampling circuit collects current, and the current is used as current information of the front end of a load to be input to the control chip after being modulated by the operational amplifier. The control chip converts the sampling information (such as amplification ratio) into an actual load output current value I out Calculating the given value I of output current out_ref And the actual load output current value I out Is the difference I of (2) out_err Current difference I out_err As input of the digital loop controller, the loop output value u is obtained after calculation by the digital loop controller out ：
I out_err ＝I out_ref -I out (1)；
u out ＝I out_err *K p +K i ∫I out_err dt (2)；
Wherein K is p ，K i Are all real numbers
2) Calculation of the drive Period:
the driving Period is defined by the loop output value u out Calculated, in particular, by loop output value u out Substituting the specific value of the driving Period into the following periodic curve, and calculating to obtain the specific value of the driving Period:
Period＝k×u out +b (3)；
where k, b is a real number.
The above-mentioned periodic curve, that is, the formula (3), is previously established before S101 is performed, and the establishment procedure is:
a) Presetting the loop output value u out Maximum value u of (2) out_max Corresponding maximum switching Period max A data point D1 (u) out_max ，Period max )；
b) Setting loop output value u out The minimum value u of (2) out_min Corresponding minimum switching Period min A data point D2 (u) out_min ，Period min )；
c) And performing curve fitting according to the data points D1 and D2 to obtain a periodic curve.
There is an EPwm Module in the control chip, which contains a Time-Base Module (TB Module) that can set the PWM period. Therefore, the control chip assigns the Period to the TB module after obtaining the driving Period, so that the driving waveform required by the full-bridge circuit can be generated. Taking TMS32028X series control chip as an example, after the Period is calculated, four square waves in the upper right corner in fig. 4 can be generated by the following assignment statement:
EPwm 1.TB＝period；
EPwm2.TB＝period；
after the square wave is generated, if the full-bridge mode is adopted, four square waves are not required to be changed, and if the half-bridge mode is adopted, the other two square waves are forcedly fixed at a high level or a low level, and the forcedly fixed method is realized by configuring a wave generating register. Specifically, in this embodiment, the control chip is configured with a mode flag HalfFlag to assist in determining whether the current state of the full-bridge circuit is a full-bridge or a half-bridge mode, where setting the mode flag HalfFlag to a first preset value represents the full-bridge mode and setting to a second preset value represents the half-bridge mode, and the control chip sets the mode flag HalfFlag to the second preset value during initialization. Referring to fig. 4, in this embodiment, after calculating the driving Period, the first preset value is 0, the second preset value is 1, and accordingly, in this step, the mode flag HalfFlag is read, if the mode flag halfflag=1, the half-bridge mode processing step S102 is executed after configuring the wave-generating register according to the half-bridge mode, and if the mode flag halfflag=0, the full-bridge mode processing step S103 is executed after configuring the wave-generating register according to the full-bridge mode.
As can be seen from the explanation of fig. 2, the half-bridge mode means that PWM2B is kept at a high level and PWM2A is kept at a low level, that is, PWM2 is fixed at a low level, and the signal of one PWM pin is fixed at a low level, which can be achieved by controlling the AQ module in the chip. Similarly, the half-bridge mode also means that PWM1A, PWM B is a PWM signal, and the full-bridge mode means that PWM1A, PWM1B, PWM2A, PWM B is a PWM signal, which can be implemented by the AQ module in the control chip.
Therefore, the configuring the wave generating register according to the full-bridge mode includes: all the wave generating registers corresponding to all pins for providing driving signals for the full-bridge circuit by the control chip are configured to not execute any output constraint behavior through the AQ module.
Therefore, the configuring the wave generating register according to the half-bridge mode includes: according to the characteristics of the half-bridge mode, the AQ module configures the wave-generating register corresponding to the pin of the PWM signal as the driving signal provided by the control chip to the full-bridge circuit to not execute any output constraint action, and configures the wave-generating register corresponding to the pin of the low level or high level as the driving signal provided by the control chip to the full-bridge circuit to output constraint to be low level or high level.
As shown in fig. 2, the driving signals PWM1A and PWM1B complement each other and have a dead zone, PWM2B continues to be high, PWM2A continues to be low, and at this time, the full-bridge circuit operates in a half-bridge mode, and as an example, a TMS32028X series control chip is configured as follows:
EPWM1.AQCSFRC.all＝0x0000；
EPWM2.AQCSFRC.all＝0x000A；
when the driving signals PWM1A and PWM1B complement each other and have dead zones, PWM2A and PWM2B complement each other and have dead zones, the full-bridge circuit operates in a full-bridge mode and is configured as follows:
EPWM1.AQCSFRC.all＝0x0000；
EPWM2.AQCSFRC.all＝0x0000；
above, 0x0000 represents that no output constraint behavior is performed, 0x000A represents that the output constraint is PWM2A at a forced low level and PWM2B at a forced high level.
It will be appreciated that the above is merely an example of a TMS32028X series control chip, and that the remaining control chips may be configured with reference to their specifications.
The specific procedure of mode switching is described below by steps S102, S103.
Half-bridge modality processing step S102: judging loop output value u out Whether or not it is greater than the loop maximum u max_half If not, directly jumping to the next sampling period of the sampling period processing step S101 and the like to arrive; if so, the loop output value u out Forced to a preset low value u out_Full And updating the driving Period, waiting for a preset sampling Period, configuring a wave-generating register according to a full-bridge mode, and then jumping to a sampling Period processing step S101 and the like to arrive at the next sampling Period.
In this step, the loop output value u is determined out Greater than loop maximum u max_half The mode flag HalfFlag is then first set to a first preset value. It will be appreciated, of course, that the mode flag HalfFlag only requires that the loop output value u be determined in this step out Greater than loop maximum u max_half Then, enter a sampling periodThe processing step S101 may be performed before, and is not limited to be performed prior to the loop output value u out And (5) assigning values.
In this step, if u out Greater than u max_half The half-bridge mode cannot meet the requirement and needs to be cut off, but the embodiment does not stand up to Ma Qiequan bridge mode, but outputs the loop output value u out Forced to a preset low value u out_Full Based on the above-mentioned cycle curve, that is, equation 3, the driving Period is updated, after the driving Period is updated, it means that the square wave is also changed, but the wave-generating register is still configured according to the half-bridge mode, and is not actually switched to the full-bridge mode, but waits for x sampling periods, then configures the wave-generating register according to the full-bridge mode, and jumps to the next sampling Period, such as the sampling Period processing step S101, after the configuration is completed. Wherein x is a positive integer, which can be specifically set according to practical experience. Waiting for x sample periods may be implemented in particular by a counter, which is cleared when x is reached, as shown in fig. 4.
In this step, the loop output value u out Forced to a preset low value u out_Full The consideration of ensuring stable switching of the Gain during mode switching is taken into account. First introducing the loop output value u out And Gain. The loop output value u was described above out The driving Period can be calculated based on the formula (3), and the Gain is related to the driving Period, namely gain=f (Period), and the formula (4) is a Gain expression in the full-bridge mode, and only needs to multiply by 0.5 in the half-bridge mode.
Wherein L is m 、L r 、C r 、f o The resonance parameter is related to a fixed value, V o To output voltage, I o To output the current, a Period is substituted into equation (4) to obtain a Gain.
At the time of explaining the loop output value u out After the relation with Gain, the loop output value u is described as follows out The conditions to be met when half-bridge switching full-bridge, i.e. in practice the loop output value u out The corresponding Gain needs to satisfy the conditions:
t1) introduction of u out Greater than u max_half Cut-to-full bridge, i.e. u max_half Is the maximum value allowed by the loop in the half-bridge mode, and the maximum loop value u max_half The corresponding half-bridge Gain is Gain max_half ；
T2) u when half bridge is switched to full bridge out Is a preset low value u out_Full ，u out_Full The corresponding Gain is Gain out_Full 。
Because switching from T1) to T2) is a process of current increase, therefore:
Gain out_Full ≥Gain max_half (5)；
full-bridge mode processing step S103: judging loop output value u out Whether or not it is smaller than the loop minimum u min_Full If not, directly jumping to the next sampling period of the sampling period processing step S101 and the like to arrive; if so, the loop output value u out Forced to a preset high value u out_Half Updating the driving Period, and configuring a wave-generating register according to a half-bridge mode; then jumps to the next sampling period of the sampling period processing step S101 etc.
Loop output value u out Less than the loop minimum u min_Full It means that the half-bridge mode can be switched at this time, and the loop output value u is first set out Forced to a preset high value u out_Half . The driving Period is updated immediately after synchronization, i.e. the square wave is changed synchronously, and then the process goes to step S101.
In this step, the loop output value u out Forced to a preset high value u out_Half Also, the consideration of ensuring smooth switching of the Gain during mode switching is taken into account. The loop output value u is described below out From the condition that the full bridge and the half bridge are required to meet, i.e. in practice the loop output value u out Corresponding gain GaThe conditions that in needs to satisfy:
t3) introduction of u out Greater than u min_Full Cut half-bridge, i.e. u min_Full Is the minimum value allowed by the loop in the full bridge mode, and the minimum loop value u min_Full The corresponding full bridge Gain is Gain min_Full ；
T4) u when the full bridge is switched to the half bridge out Is a preset high value u out_Half ，u out_Half The corresponding Gain is Gain out_Half 。
Because switching from T3) to T4) is a current reduction process, therefore:
Gain min_Full ≥Gain out_Half (6)；
the preset low value u is analyzed in the above steps S102 and S103 out_Full And a preset high value u out_Half The necessary conditions to be met, preferably, the future avoidance of half-bridge and full-bridge failing to meet condition T3) when switching repeatedly, i.e. to T2), is:
Gain out_Full ≥Gain min_Full (7)；
similarly, the condition T1) cannot be satisfied after switching to T4), and therefore:
Gain max_half ≥Gain out_Half (8)；
in summary, the method for converting the resonant converter based on the digital loop control does not increase a hardware circuit on the basis of the original control chip, realizes the switching between the half-bridge LLC and the full-bridge LLC only by depending on the control loop and the register configuration in the original control chip, ensures the stable switching of the gain in the switching process, effectively reduces the overshoot of the resonant cavity current in the switching process, avoids the protection of the power supply and the damage of devices, is simple and easy to realize, has lower interrupt occupancy rate to the control chip, is not influenced by parasitic parameters of a transformer and the like, and effectively improves the reliability of the high-power supply and the efficiency below half load.
Based on the same inventive concept, the application also claims a control chip comprising a processor and a memory, said memory storing a computer program which, when executed by the processor, implements the steps of the method as described in the above embodiments.
Based on the same inventive concept, the application also claims a power supply, which comprises an input rectifying circuit 201, a full-bridge circuit 202, a resonant circuit 203, an output rectifying circuit 204, a sampling circuit 205 and the control chip 206, wherein the input of the sampling circuit 205 is connected with the load side of the output rectifying circuit 204, and the control chip 206 is connected with the output of the sampling circuit 205 and the control end of the full-bridge circuit 202. Specific embodiments may refer to the description of fig. 1 in the method embodiment, and will not be repeated here.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
The terms including ordinal numbers such as "first", "second", and the like used in the present specification may be used to describe various constituent elements, but these constituent elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, a first component may be termed a second component, and, similarly, a second component may be termed a first component, without departing from the scope of the present application.
The embodiments of the present application have been described above with reference to the accompanying drawings, but the present application is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those having ordinary skill in the art without departing from the spirit of the present application and the scope of the claims, which are to be protected by the present application.
Claims (10)
1. A method of transforming a resonant converter based on digital loop control, performed by a control chip, the method comprising:
sampling periodThe processing steps are as follows: when one sampling period arrives, the load front end sampling information is read, and the loop output value (u out ) And a drive Period (Period) of the full-bridge circuit, if the full-bridge circuit works in the half-bridge mode, executing the half-bridge mode processing step, otherwise executing the full-bridge mode processing step;
half-bridge mode processing steps: determining the loop output value (u) out ) Whether or not it is greater than the loop maximum (u max_half ) If so, the loop output value (u out ) Forced to a preset low value (u out_Full ) Updating the driving Period (Period), and after waiting for a preset sampling Period, configuring a wave-generating register according to a full-bridge mode;
full-bridge mode processing steps: determining the loop output value (u) out ) Whether or not it is smaller than the loop minimum value (u min_Full ) If so, the loop output value (u out ) Forced to a preset high value (u out_Half ) Updating the driving Period (Period), and configuring a wave-generating register according to a half-bridge mode;
wherein the preset low value (u out_Full ) And a preset high value (u out_Half ) The following conditions are satisfied: preset low value (u) out_Full ) Corresponding full-bridge modal Gain (Gain out_Full ) Not lower than the maximum loop value (u max_half ) Corresponding half-bridge modal Gain (Gain max_half ) Preset a high value (u out_Half ) Corresponding half-bridge modal Gain (Gain out_Half ) Not higher than the minimum loop value (u min_Full ) Corresponding full-bridge modal Gain (Gain min_Full )。
2. The digital loop control based resonant converter transformation method according to claim 1, characterized in that the preset low value (u out_Full ) And a preset high value (u out_Half ) The following conditions are also satisfied: preset low value (u) out_Full ) Corresponding full-bridge modal Gain (Gain out_Full ) Not lower than the minimum loop value (u min_Full ) Corresponding full-bridge modal Gain (Gain min_Full ) Preset a high value (u out_Half ) Corresponding half-bridge modal Gain (Gain out_Half ) Not higher than the maximum loop value (u max_half ) Corresponding half-bridge modal Gain (Gain max_half )。
3. The method of transforming a resonant converter based on digital loop control as recited in claim 1,
the wave generating register configured according to the full-bridge mode comprises: all the wave generating registers corresponding to all pins for providing driving signals for the full-bridge circuit by the control chip are configured to not execute any output constraint behavior;
the wave generating register configured according to the half-bridge mode comprises: according to the characteristics of the half-bridge mode, the wave-generating register corresponding to the pin of the PWM signal, which is provided by the control chip to the full-bridge circuit, is configured not to execute any output constraint action, and the wave-generating register corresponding to the pin of the low level or high level, which is provided by the control chip to the full-bridge circuit, is configured to output constraint as low level or high level.
4. The method of transforming a resonant converter based on digital loop control as recited in claim 1,
in the half-bridge mode processing step, when a loop output value (u out ) Is greater than the loop maximum (u max_half ) Setting a mode flag (HalfFlag) to a first preset value;
in the full-bridge mode processing step, when the loop output value (u out ) Less than the loop minimum (u min_Full ) Setting a mode flag (HalfFlag) to a second preset value;
in the sampling Period processing step, after calculating the driving Period (Period), a mode flag (HalfFlag) is read, if the mode flag (HalfFlag) is set to a second preset value, the half-bridge mode processing step is executed after the wave-generating register is configured according to the half-bridge mode, and if the mode flag (HalfFlag) is set to a first preset value, the full-bridge mode processing step is executed after the wave-generating register is configured according to the full-bridge mode.
5. The method of claim 1, wherein the sampling Period processing step and the half-bridge mode processing step each calculate or update the driving Period (Period) by: output value of loop (u out ) Specific values of the substitution Period curves period=k×u out In +b, a specific value of the driving Period (Period) is calculated.
6. The digital loop control based resonant converter conversion method of claim 5, further comprising:
a period curve establishment step: the loop output value (u out ) Maximum value (u) out_max ) Corresponding maximum switching Period (Period) max ) Setting the loop output value (u out ) Minimum value (u) out_min ) Corresponding minimum switching Period (Period) min ) The method comprises the steps of carrying out a first treatment on the surface of the According to the maximum value (u out_max ) Corresponding maximum switching Period (Period) max ) Minimum value (u) out_min ) Corresponding minimum switching Period (Period) min ) Performing curve fitting to obtain a periodic curve: period=k×u out +b, where k, b is any real number.
7. A digital loop control based resonant converter transformation method according to claim 5, characterized in that the loop output value (u out ) The gain corresponding to a specific value of (c) is related to the driving Period (Period).
8. A digital loop control based resonant converter transformation method according to claim 1, characterized in that the sampling period processing step calculates the loop output value (u out ): reading current information of the front end of the load, which is acquired by the current Hall and is input to the control chip after being modulated by the operational amplifier, and converting the current information into an actual load output current value (I out ) Calculating the output current set point (I out_ref ) And the actual load output current value (I out ) Is the difference (I) out_err ) Based on the difference (I out_err ) Calculate the loop output value (u out ):u out ＝I out_err *K p +K i ∫I out_err dt, where, K p ，K i Are all arbitrary real numbers.
9. A control chip comprising a processor and a memory, the memory storing a computer program which, when executed by the processor, implements the steps of the method according to any one of claims 1-8.
10. The power supply is characterized by comprising an input rectifying circuit (201), a full-bridge circuit (202), a resonant circuit (203) and an output rectifying circuit (204) which are sequentially connected, and further comprising a sampling circuit (205) and the control chip (206) according to claim 9, wherein the input of the sampling circuit (205) is connected with the load side of the output rectifying circuit (204), and the control chip (206) is connected with the output of the sampling circuit (205) and the control end of the full-bridge circuit (202).
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