CN116613628B - Edge-emitting semiconductor light-emitting structure with side wall grating structure and preparation method thereof - Google Patents
Edge-emitting semiconductor light-emitting structure with side wall grating structure and preparation method thereof Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 128
- 238000002360 preparation method Methods 0.000 title abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 85
- 229920002120 photoresistant polymer Polymers 0.000 claims description 150
- 238000005530 etching Methods 0.000 claims description 46
- 238000000034 method Methods 0.000 claims description 32
- 238000004519 manufacturing process Methods 0.000 claims description 13
- 230000007850 degeneration Effects 0.000 claims description 5
- 238000004925 denaturation Methods 0.000 claims description 3
- 238000010894 electron beam technology Methods 0.000 claims description 3
- 230000036425 denaturation Effects 0.000 claims description 2
- 230000007423 decrease Effects 0.000 claims 2
- 238000006243 chemical reaction Methods 0.000 abstract description 7
- 238000002161 passivation Methods 0.000 description 24
- 239000000463 material Substances 0.000 description 20
- 230000008878 coupling Effects 0.000 description 10
- 238000010168 coupling process Methods 0.000 description 10
- 238000005859 coupling reaction Methods 0.000 description 10
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
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- H—ELECTRICITY
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- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/12—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region the resonator having a periodic structure, e.g. in distributed feedback [DFB] lasers
- H01S5/1237—Lateral grating, i.e. grating only adjacent ridge or mesa
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- H—ELECTRICITY
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- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/185—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only horizontal cavities, e.g. horizontal cavity surface-emitting lasers [HCSEL]
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- H—ELECTRICITY
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Abstract
The invention discloses an edge-emitting semiconductor light-emitting structure with a side wall grating structure and a preparation method thereof, wherein the edge-emitting semiconductor light-emitting structure with the side wall grating structure comprises the following components: a semiconductor substrate layer; a ridge structure on the semiconductor substrate layer, the ridge structure including a lower confinement layer, a lower waveguide layer, an active layer, an upper waveguide layer, and an upper confinement layer stacked in this order on the semiconductor substrate layer; the width of the ridge structure in the slow axis direction increases gradually from top to bottom, the two sides of the ridge structure in the slow axis direction are provided with characteristic side walls, and the characteristic side walls are side walls of the upper waveguide layer, the active layer and the lower waveguide layer in the slow axis direction; the plurality of spaced areas of the feature sidewall are recessed into the ridge structure to form a plurality of grating grooves, and the ridge structure between the grating grooves forms a sidewall grating structure. The side-emitting semiconductor light-emitting structure having the sidewall grating structure can improve the electro-optical conversion efficiency and the light-emitting power.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a side-emitting semiconductor light-emitting structure with a side-wall grating structure and a preparation method thereof.
Background
The single longitudinal mode quantum cascade laser has important application in gas sensing, trace gas detection, medical treatment and other aspects. A common single longitudinal mode quantum cascade laser is to add a grating structure into a FP (Fabry-perot) fundamental transverse mode quantum cascade laser. Common grating structures include buried gratings distributed on the upper surface of the active layer, surface gratings on the surface of the ridge waveguide, and sidewall gratings distributed on both sides of the ridge waveguide that are subjected to deep etching.
The buried grating is distributed on the upper surface of the active layer, is close to the quantum well, and is easy to obtain a high grating coupling coefficient, but because the manufacturing process involves epitaxy of multiple processes, the etching of the buried grating can introduce a defect layer into the upper waveguide layer, so that the problems of high electro-optical conversion efficiency loss, low luminous power and the like of the quantum cascade laser are easily caused, and the manufacturing process is complex.
The gratings on the surface of the ridge waveguide are distributed in the upper limiting layer, and multiple epitaxy is not needed, but the coupling coefficient is lower due to the fact that the distance from the quantum well is far, deep etching is needed, or the thickness of the upper limiting layer is reduced. The deep etching process is difficult to manufacture the nano-scale grating, and the thickness of the upper limiting layer is reduced, so that the optical field loss of the quantum cascade laser can be increased, and the loss of the quantum cascade laser is improved, the electro-optical conversion efficiency is reduced and the luminous power is reduced.
The manufacturing process of the side wall grating comprises the following steps: and a grating mask pattern of a thick mask is generally manufactured on the surface of the InP contact layer, and then a limiting layer is etched through dry etching to form a side wall grating with a certain coupling coefficient. However, since the mask with a thickness much larger than the grating period is used to manufacture the grating mask pattern, it is difficult to manufacture the first-order grating, and the manufactured sidewall grating is mainly a high-order grating, so that the grating coupling coefficient is limited, and part of laser light is scattered by the high-order grating and does not completely participate in the generation of the longitudinal (light-emitting direction) mode, which often results in the reduction of the electro-optical conversion efficiency and the luminous power of the quantum cascade laser. In addition, the etching with high depth-to-width ratio in the formation process of the side wall grating makes the process complex and difficult to realize.
Disclosure of Invention
Therefore, the technical problem to be solved by the invention is to solve the problems of the reduction of the electro-optical conversion efficiency and the luminous power of the side-emitting semiconductor luminous structure, thereby providing the side-emitting semiconductor luminous structure with the side-wall grating structure and the preparation method thereof.
The invention provides an edge-emitting semiconductor light emitting structure with a sidewall grating structure, comprising: a semiconductor substrate layer; a ridge structure on the semiconductor substrate layer, the ridge structure including a lower confinement layer, a lower waveguide layer, an active layer, an upper waveguide layer, and an upper confinement layer stacked in this order on the semiconductor substrate layer; the width of the ridge structure in the slow axis direction increases gradually from top to bottom, the two sides of the ridge structure in the slow axis direction are provided with characteristic side walls, and the characteristic side walls are side walls of the upper waveguide layer, the active layer and the lower waveguide layer in the slow axis direction; the plurality of spaced areas of the feature sidewall are recessed into the ridge structure to form a plurality of grating grooves, and the ridge structure between the grating grooves forms a sidewall grating structure.
Optionally, the feature side walls include a first feature side wall, a second feature side wall and a third feature side wall, the first feature side wall is a side wall of the upper waveguide layer on the side part in the slow axis direction, the second feature side wall is a side wall of the active layer on the side part in the slow axis direction, and the third feature side wall is a side wall of the lower waveguide layer on the side part in the slow axis direction; only a plurality of spaced areas of the first feature sidewall are recessed toward the upper waveguide layer to form a plurality of grating grooves; or, only a plurality of spaced areas of the second feature sidewall are recessed toward the active layer to form a plurality of grating grooves; alternatively, only the spaced apart regions of the third feature sidewall are recessed toward the lower waveguide layer to form a plurality of grating grooves; alternatively, the first feature sidewall, the second feature sidewall, and the third feature sidewall have a plurality of spaced apart regions recessed toward the ridge structure to form a plurality of grating grooves; alternatively, only the spaced areas of the first feature sidewall and the second feature sidewall are recessed toward the ridge structure to form a plurality of grating grooves; alternatively, only the spaced apart regions of the second and third feature sidewalls are recessed toward the ridge structure to form the grating grooves.
Optionally, the plurality of grating grooves are periodically arranged along a light emitting direction of the side-emitting semiconductor light emitting structure having a sidewall grating structure.
Optionally, the ridge structure between adjacent grating grooves has a dimension of 40 nm-900 nm in the light emitting direction, and the grating grooves have a dimension of 160 nm-800 nm in the light emitting direction.
Optionally, the depth of the grating groove is 20 nm-300 nm.
Optionally, the sidewall grating structure is a first-order sidewall grating structure.
Optionally, the included angle between the side walls of the two sides of the upper waveguide layer in the slow axis direction and the bottom surface of the upper waveguide layer is reduced from a third angle to a fourth angle; the included angle between the side walls of the two sides of the active layer in the slow axis direction and the bottom surface of the active layer is reduced from a fifth angle to a sixth angle; the included angle between the side walls of the two sides of the lower waveguide layer in the slow axis direction and the bottom surface of the lower waveguide layer is reduced from a seventh angle to an eighth angle; the third angle is 45-65 degrees; the fourth angle is 25-40 degrees; the fifth angle is 25-40 degrees; the sixth angle is 15-25 degrees; the seventh angle is 15-25 degrees; the eighth angle is 5-15 degrees.
Optionally, the included angle between the side walls of the two sides of the upper limiting layer in the slow axis direction and the bottom surface of the upper limiting layer is reduced from a first angle to a second angle; the included angle between the side walls of the two sides of the lower limiting layer in the slow axis direction and the bottom surface of the lower limiting layer is reduced from a ninth angle to a tenth angle; the first angle is 65-80 degrees; the second angle is 45-65 degrees; the ninth angle is 5-15 degrees; the tenth angle is 0 degrees to 5 degrees.
Optionally, the ridge structure further includes: the contact layer is positioned on one side surface of the upper limiting layer, which is away from the semiconductor substrate layer; the side-emitting semiconductor light emitting structure having a sidewall grating structure further includes: and a front electrode on the upper surface of the contact layer.
The invention also provides a preparation method of the side-emitting semiconductor light-emitting structure with the side-wall grating structure, which comprises the following steps: providing a semiconductor substrate layer; forming a ridge structure on the semiconductor substrate layer, wherein the ridge structure comprises a lower limiting layer, a lower waveguide layer, an active layer, an upper waveguide layer and an upper limiting layer which are sequentially laminated on the semiconductor substrate layer; the width of the ridge structure in the slow axis direction increases gradually from top to bottom, the two sides of the ridge structure in the slow axis direction are provided with characteristic side walls, and the characteristic side walls are side walls of the upper waveguide layer, the active layer and the lower waveguide layer in the slow axis direction; and forming a plurality of grating grooves in the ridge-shaped structures exposed by the side walls of the features, wherein the grating grooves and the ridge-shaped structures between the grating grooves form side wall grating structures.
Optionally, the method for forming the ridge structure on the semiconductor substrate layer includes: forming an initial lower limit layer, an initial lower waveguide layer, an initial active layer, an initial upper waveguide layer and an initial upper limit layer on the semiconductor substrate layer in sequence; forming a first mask layer on one side of a part of the initial upper limiting layer, which is away from the semiconductor substrate layer; performing first anisotropic etching on the initial upper limit layer by taking the first mask layer as a mask until the initial upper waveguide layer is exposed, and forming an upper limit layer on the initial upper limit layer; after the first anisotropic etching, performing second isotropic etching on the initial upper waveguide layer, the initial active layer, the initial lower waveguide layer and the initial lower limiting layer by using the first mask layer as a mask, so that the initial upper waveguide layer forms an upper waveguide layer, the initial active layer forms an active layer, the initial lower waveguide layer forms a lower waveguide layer and the initial lower limiting layer forms a lower limiting layer; after the second isotropic etching, the first mask layer is removed.
Optionally, the method for forming a ridge structure on the semiconductor substrate layer further includes: before the first anisotropic etching, forming an initial contact layer on the surface of one side of the initial upper limiting layer, which faces away from the semiconductor substrate layer; the first anisotropic etch also etches the initial contact layer, forming the initial contact layer into a contact layer.
Optionally, the method further comprises: in the process of forming the ridge structure, a sacrificial layer is also formed, and the sacrificial layer is positioned on the top surface of the ridge structure; before forming a plurality of grating grooves in the ridge structure with the exposed feature side walls, forming a second mask layer on the side wall surfaces of the ridge structure at two sides in the slow axis direction and the surface of the semiconductor substrate layer at the side part of the ridge structure, wherein a first mask gate opening is formed in the second mask layer, and the feature side walls are exposed by the first mask gate opening; the step of forming a plurality of grating grooves in the ridge structure with the exposed side walls of the features comprises the following steps: etching the ridge-shaped structure exposed from the gate opening of the first mask by taking the second mask layer as a mask to form a plurality of grating grooves; etching to remove the sacrificial layer in the process of etching the ridge structure exposed by the first mask gate by taking the second mask layer as a mask; and removing the second mask layer after the ridge structure exposed by the first mask gate opening is etched by taking the second mask layer as a mask.
Optionally, the step of forming a second mask layer on the surface of the side wall of the ridge structure on both sides in the slow axis direction and the surface of the semiconductor substrate layer on the side of the ridge structure includes: forming second initial photoresist films on the side wall surfaces of the ridge structure on two sides of the slow axis direction and the surfaces of the semiconductor substrate layer on the side of the ridge structure, as well as the top surface of the sacrificial layer and the side wall surfaces, wherein the thickness of the second initial photoresist film on the surface of the semiconductor substrate layer on the side of the ridge structure is larger than that of the second initial photoresist film on the side wall surface of the ridge structure on any side of the slow axis direction, the thickness of the second initial photoresist film on the side wall surface of the ridge structure on any side of the slow axis direction is larger than that of the second initial photoresist film on the top surface of the sacrificial layer, and the thickness of the second initial photoresist film on the side wall surface of the ridge structure on two sides of the slow axis direction increases from top to bottom; holographic exposure is carried out on the second initial photoresist film, so that all the second initial photoresist film on the top surface of the sacrificial layer and part of the second initial photoresist film on the side wall of the feature are subjected to photosensitive degeneration; and after carrying out holographic exposure on the second initial photoresist film, developing the second initial photoresist film to remove the second initial photoresist film on the top surface of the sacrificial layer and part of the second initial photoresist film with photosensitive denaturation of the side wall of the feature, so that the second initial photoresist film forms a second mask layer.
Optionally, the step of forming a second mask layer on the surface of the side wall of the ridge structure on both sides in the slow axis direction and the surface of the semiconductor substrate layer on the side of the ridge structure includes: forming an initial hard mask layer on the side wall surfaces of the ridge structure on two sides of the slow axis direction, the surfaces of the semiconductor substrate layers on the side parts of the ridge structure, and the top surfaces of the sacrificial layers and the side wall surfaces; forming a third initial photoresist film on the surface of the initial hard mask layer, wherein the thickness of the third initial photoresist film on the semiconductor substrate layer at the side part of the ridge structure is larger than that of the third initial photoresist film covering the side wall of the ridge structure, the thickness of the third initial photoresist film covering the side wall of the ridge structure is larger than that of the third initial photoresist film covering the top surface of the sacrificial layer, and the thickness of the third initial photoresist film covering the side wall of the ridge structure increases from top to bottom; holographic exposure is carried out on the third initial photoresist film, so that all the third initial photoresist film covering the top surface of the sacrificial layer and part of the third initial photoresist film covering the characteristic side wall are photosensitive modified; after holographic exposure is carried out on the third initial photoresist film, developing is carried out on the third initial photoresist film so as to remove the third initial photoresist film covering the top surface of the sacrificial layer and part of the third initial photoresist film covering the photosensitive degeneration of the characteristic side wall, so that the third initial photoresist film forms a third photoresist layer; etching the initial hard mask layer by taking the third photoresist layer as a mask to remove the initial hard mask layer on the top surface of the sacrificial layer and part of the initial hard mask layer on the side wall of the feature, so that the initial hard mask layer forms a second mask layer; and after the initial hard mask layer is etched by taking the third photoresist layer as a mask, removing the third photoresist layer.
Optionally, the method further comprises: forming a third initial photoresist film on the side wall surfaces of the ridge structure at two sides of the slow axis direction and the surface of the semiconductor substrate layer at the side part of the ridge structure and the top surface of the ridge structure before forming a plurality of grating grooves in the ridge structure with the exposed characteristic side wall; sequentially performing electron beam exposure and development on the third initial photoresist film on the side wall of the feature to form a third photoresist layer, wherein a second mask gate opening is formed in the third photoresist layer, and the second mask gate opening exposes the side wall of the feature; the step of forming a plurality of grating grooves in the ridge structure with the exposed side walls of the features comprises the following steps: etching the ridge-shaped structure exposed from the gate opening of the second mask by taking the third photoresist layer as a mask to form a plurality of grating grooves; and removing the third photoresist layer after etching the ridge structure exposed by the second mask gate opening by taking the third photoresist layer as a mask.
The technical scheme of the invention has the following beneficial effects:
according to the side-emitting semiconductor light-emitting structure with the side-wall grating structure, the plurality of spaced areas of the characteristic side wall are recessed towards the ridge structure to form the plurality of grating grooves, the ridge structure between the grating grooves and the grating grooves forms the side-wall grating structure, so that the grating grooves are closer to the active layer, the coupling coefficient of the side-wall grating structure is higher, a first-order side-wall grating structure is easy to form at the position of the characteristic side wall, laser is more involved in the generation of a longitudinal (light-emitting direction) mode, and the electro-optic conversion efficiency and the light-emitting power of the side-emitting semiconductor light-emitting structure with the side-wall grating structure are improved on the premise of ensuring the quality of a single longitudinal mode.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an edge-emitting semiconductor light emitting structure with a sidewall grating structure according to an embodiment of the present invention;
fig. 2 to 12 are schematic views illustrating a process for manufacturing a side-emitting semiconductor light emitting structure having a sidewall grating structure according to an embodiment of the invention.
Detailed Description
The following description of the embodiments of the present invention will be made apparent and fully in view of the accompanying drawings, in which some, but not all embodiments of the invention are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the description of the present invention, it should be noted that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
In addition, the technical features of the different embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
Example 1
The present embodiment provides an edge-emitting semiconductor light emitting structure having a sidewall grating structure, referring to fig. 1, including:
a semiconductor substrate layer 100;
a ridge structure on the semiconductor substrate layer 100, the ridge structure including a lower confinement layer 110, a lower waveguide layer 120, an active layer 130, an upper waveguide layer 140, and an upper confinement layer 150 sequentially stacked on the semiconductor substrate layer 100; the width of the ridge structure in the slow axis direction increases gradually from top to bottom, and the ridge structure is provided with characteristic side walls on two sides in the slow axis direction, wherein the characteristic side walls are side walls of the upper waveguide layer 140, the active layer 130 and the lower waveguide layer 120 in the slow axis direction;
The spaced apart regions of the feature sidewall are recessed into the ridge structure to form a plurality of grating grooves 200, the ridge structure between grating grooves 200 and grating grooves 200 forming a sidewall grating structure.
In this embodiment, the plurality of spaced areas of the feature sidewall are recessed toward the ridge structure to form a plurality of grating grooves, the ridge structure between the grating groove 200 and the grating groove 200 forms a sidewall grating structure, so that the grating groove 200 is closer to the active layer 130, the coupling coefficient of the sidewall grating structure is higher, and a first-order sidewall grating structure is easily formed at the position of the feature sidewall, so that the laser is more involved in the generation of a longitudinal (light emitting direction) mode, and the electro-optical conversion efficiency and the light emitting power of the edge emitting semiconductor light emitting structure with the sidewall grating structure are improved on the premise of ensuring the quality of a single longitudinal mode.
In one embodiment, the edge-emitting semiconductor light emitting structure is a quantum cascade laser.
In this embodiment, the semiconductor substrate layer 100 is an InP substrate layer. It should be noted that, in other embodiments, the semiconductor substrate layer may also be other materials.
In this embodiment, the ridge structure further includes: and a contact layer 160 located on a surface of the upper confinement layer 150 facing away from the semiconductor substrate layer 100.
In this embodiment, the material of the contact layer 160 includes an InP contact layer, and the material of the upper confinement layer 150 includes an InP upper confinement layer. The material of the upper waveguide layer 140 comprises InGaAs. The material of the lower waveguide layer 120 comprises InGaAs. The lower confinement layer 110 comprises an InP lower confinement layer.
In some embodiments, the material of the lower confinement layer 110 and the upper confinement layer 150 is InP doped with conductive ions; the material of the lower waveguide layer 120 is In doped with conductive ions z Ga (1-z) As; the material of the upper waveguide layer 140 is In doped with conductive ions z Ga (1-z) As。
In one embodiment, the active layer 130 is a superlattice structure, the active layer 130 includes a plurality of stacked sub-active layer groups, the sub-active layer groups include a first sub-active layer unit to an Mth sub-active layer unit stacked sequentially from bottom to top, M is an integer greater than or equal to 2, and any Mth sub-active layer unit includes an Mth lower sub-active layer and an Mth upper sub-active layer stacked from bottom to top, M is greater thanOr an integer of 1 and less than or equal to M, the material of the mth lower sub-active layer is In x Ga (1-x) As, the material of the m-th sub-active layer is In y Al (1-y) As。
The verticality of the side walls of the ridge structure at two sides in the slow axis direction is reduced from top to bottom.
The feature sidewalls include a first feature sidewall, which is a sidewall of the upper waveguide layer 140 at the side of the slow axis direction, a second feature sidewall, which is a sidewall of the active layer 130 at the side of the slow axis direction, and a third feature sidewall, which is a sidewall of the lower waveguide layer 120 at the side of the slow axis direction.
In this embodiment, only the spaced apart regions of the first and second feature sidewalls are recessed toward the ridge structure to form the grating grooves 200.
In other embodiments, only the spaced apart regions of the first feature sidewall are recessed toward the upper waveguide layer to form grating grooves. In other embodiments, only the spaced apart regions of the second feature sidewall are recessed toward the active layer to form grating grooves; in other embodiments, only the spaced apart regions of the third feature sidewall are recessed toward the lower waveguide layer to form grating grooves; in other embodiments, the plurality of spaced apart regions of the first, second, and third feature sidewalls are recessed toward the ridge structure to form a plurality of grating grooves; in other embodiments, only the spaced apart regions of the second feature sidewall and the third feature sidewall are recessed toward the ridge structure to form the grating grooves.
The plurality of grating grooves 200 are periodically arranged along the light emitting direction of the edge emitting semiconductor light emitting structure.
In one embodiment, the ridge structure between adjacent grating grooves 200 has a dimension in the light emitting direction of 40nm to 900nm, for example 40nm, 100nm, 150nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm or 900nm; the size of the grating groove 200 in the light-emitting direction is 160nm to 800nm, for example 160nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm or 800nm.
In one embodiment, the sidewall grating structure has a grating period of 200nm-1000nm. The grating period refers to: the dimensions of one grating groove 200 and the ridge structure between two adjacent grating grooves 200 in the light exit direction.
In one embodiment, the ridge structures between adjacent grating grooves 200 have a dimension in the light-emitting direction of 20% -90%, such as 20%, 30%, 40%, 50%, 60%, 70%, 80% or 50% of the grating period.
The side wall grating structure is a first-order side wall grating structure.
In one embodiment, the depth of the grating grooves 200 is 20nm to 300nm. If the depth of the grating groove 200 is less than 20nm, the degree of improving the grating coupling coefficient is low; if the depth of the grating groove 200 is greater than 300nm, some light field loss is generated in the active layer, and the light emitting power of the side emitting semiconductor light emitting structure with the sidewall grating structure is improved to a low degree.
The included angle between the side walls of the two sides of the upper limiting layer 150 in the slow axis direction and the bottom surface of the upper limiting layer 150 is reduced from a first angle to a second angle; the included angle between the side walls of the two sides of the upper waveguide layer in the slow axis direction and the bottom surface of the upper waveguide layer is reduced from a third angle to a fourth angle; the included angle between the two side walls of the active layer 130 in the slow axis direction and the bottom surface of the active layer 130 is reduced from the fifth angle to the sixth angle; the included angle between the side walls of the two sides of the lower waveguide layer in the slow axis direction and the bottom surface of the lower waveguide layer is reduced from a seventh angle to an eighth angle; the included angle between the side walls of the two sides of the lower limiting layer 110 in the slow axis direction and the bottom surface of the lower limiting layer 110 is reduced from the ninth angle to the tenth angle.
In one embodiment, the third angle is 45 degrees to 65 degrees; the fourth angle is 25-40 degrees; the fifth angle is 25-40 degrees; the sixth angle is 15-25 degrees; the seventh angle is 15-25 degrees; the eighth angle is 5-15 degrees. This facilitates the formation of grating grooves 200 in the ridge structure corresponding to the sidewalls of the features, and the coupling coefficient of the sidewall grating structure is improved.
In one embodiment, the first angle is 65 degrees to 80 degrees; the second angle is 45-65 degrees; the ninth angle is 5-15 degrees; the tenth angle is 0 degrees to 5 degrees. Such that sidewall grating structures are not formed in the upper confinement layer 150, the contact layer 160 and the lower confinement layer 110.
The side-emitting semiconductor light emitting structure having a sidewall grating structure further includes: a front electrode 210 located on an upper surface of the contact layer 160; a back electrode (not shown) located on a surface of the semiconductor substrate layer 100 on a side facing away from the active layer 130.
In this embodiment, the side-emitting semiconductor light emitting structure having the sidewall grating structure further includes: a passivation layer located on the side wall surface of the ridge structure, the surface of the semiconductor substrate layer and part of the top surface of the ridge structure, wherein the passivation layer is provided with an electrode opening located on the part of the top surface of the ridge structure; the front electrode 210 is located in the electrode opening.
The material of the passivation layer comprises silicon oxide or silicon nitride.
In one embodiment, the passivation layer has a thickness of 30 nm to 500 nm.
The passivation layer covers both side wall surfaces of the ridge structure in the slow axis direction and the inner wall surface of the grating groove 200.
The passivation layer conformally covers the inner wall of the grating groove, and the thickness of the passivation layer is smaller than 1/2 of the width of the grating groove. Alternatively, the passivation layer fills the grating grooves and has grooves in the passivation layer in the areas corresponding to the grating grooves.
In another embodiment, the front electrode is located on the upper surface of the contact layer 160 and the entire surface of the passivation layer. When the passivation layer fills the grating groove and the passivation layer in the corresponding area of the grating groove is provided with a groove, the front electrode conformally covers the groove, and the thickness of the front electrode is smaller than 1/2 of the width of the groove.
Example 2
The invention also provides a preparation method of the side-emitting semiconductor light-emitting structure with the side-wall grating structure, which comprises the following steps: providing a semiconductor substrate layer; forming a ridge structure on the semiconductor substrate layer, wherein the ridge structure comprises a lower limiting layer, a lower waveguide layer, an active layer, an upper waveguide layer and an upper limiting layer which are sequentially laminated on the semiconductor substrate layer; the width of the ridge structure in the slow axis direction increases gradually from top to bottom, the two sides of the ridge structure in the slow axis direction are provided with characteristic side walls, and the characteristic side walls are side walls of the upper waveguide layer, the active layer and the lower waveguide layer in the slow axis direction; and forming a plurality of grating grooves in the ridge-shaped structures exposed by the side walls of the features, wherein the grating grooves and the ridge-shaped structures between the grating grooves form side wall grating structures.
In this embodiment, the method further includes: in the process of forming the ridge structure, a sacrificial layer is also formed, and the sacrificial layer is positioned on the top surface of the ridge structure; before forming a plurality of grating grooves in the ridge structure with the exposed feature side walls, forming a second mask layer on the side wall surfaces of the ridge structure at two sides in the slow axis direction and the surface of the semiconductor substrate layer at the side part of the ridge structure, wherein a first mask gate opening is formed in the second mask layer, and the feature side walls are exposed by the first mask gate opening; the step of forming a plurality of grating grooves in the ridge structure with the exposed side walls of the features comprises the following steps: etching the ridge-shaped structure exposed from the gate opening of the first mask by taking the second mask layer as a mask to form a plurality of grating grooves; etching to remove the sacrificial layer in the process of etching the ridge structure exposed by the first mask gate by taking the second mask layer as a mask; and removing the second mask layer after the ridge structure exposed by the first mask gate opening is etched by taking the second mask layer as a mask.
The process of fabricating the side-emitting semiconductor light emitting structure having the sidewall grating structure is described in detail below with reference to fig. 2 to 12.
Referring to fig. 2 through 4, a semiconductor substrate layer 100 is provided; a ridge structure is formed on the semiconductor substrate layer 100.
Referring to fig. 2, a semiconductor substrate layer 100 is provided; forming an initial lower confinement layer 110a, an initial lower waveguide layer 120a, an initial active layer 130a, an initial upper waveguide layer 140a, and an initial upper confinement layer 150a in this order on the semiconductor substrate layer 100; a first mask layer 180 is formed on a side of a portion of the initial upper confinement layer 150a facing away from the semiconductor substrate layer 100.
In this embodiment, the method further includes: forming an initial contact layer 160a on a surface of the initial upper confinement layer 150a facing away from the semiconductor substrate layer 100 before forming the first mask layer 180; after forming the first mask layer 180, the first mask layer 180 is located on a surface of a portion of the initial contact layer 160a facing away from the semiconductor substrate layer 100.
In this embodiment, the method further includes: an initial sacrificial layer 170a is formed on a side of the initial upper confinement layer 150a facing away from the semiconductor substrate layer 100 before the first mask layer 180 is formed.
When the initial contact layer 160a is formed, the initial sacrificial layer 170a is located at a side surface of the initial contact layer 160a facing away from the semiconductor substrate layer 100.
It should be noted that, in other embodiments, the initial contact layer may not be formed, and accordingly, the initial sacrificial layer is located on a surface of the initial upper confinement layer facing away from the semiconductor substrate layer.
The material of the first mask layer 180 includes silicon oxide or silicon nitride.
In one embodiment, the width of the first mask layer 180 is 5 μm to 25 μm.
The initial lower confinement layer 110a, the initial lower waveguide layer 120a, the initial active layer 130a, the initial upper waveguide layer 140a, the initial upper confinement layer 150a, the initial contact layer 160a, and the initial sacrificial layer 170a can be continuously formed in the same process without introducing epitaxial defects.
Referring to fig. 3, the initial upper confinement layer 150a is first anisotropically etched using the first mask layer 180 as a mask until the initial upper waveguide layer 140a is exposed, and the initial upper confinement layer 150a is formed into the upper confinement layer 150.
In this embodiment, the first anisotropic etching also etches the initial contact layer 160a, so that the initial contact layer 160a forms the contact layer 160.
In this embodiment, the first anisotropic etching also etches the initial sacrificial layer 170a, so that the initial sacrificial layer 170a forms the sacrificial layer 170.
The material of the sacrificial layer 170 is different from the material of the subsequent second mask layer 190, and the material of the sacrificial layer 170 is different from the material of the contact layer 160 and the material of the upper confinement layer 150. In one embodiment, the material of the sacrificial layer 170 includes: inP, inGaAs or InGaAsP.
In one embodiment, the sacrificial layer 170 has a thickness of 20nm-300nm, such as 20nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 200nm, or 300nm.
In this embodiment, the initial sacrificial layer 170a, the initial contact layer 160a and the initial upper confinement layer 150a are etched by using a first anisotropic etching, so that verticality of sidewalls of the sacrificial layer 170, the contact layer 160 and the upper confinement layer 150 is better.
Referring to fig. 4, after the first anisotropic etching, the initial upper waveguide layer 140a, the initial active layer 130a, the initial lower waveguide layer 120a, and the initial lower confinement layer 110a are subjected to a second isotropic etching using the first mask layer 180 as a mask, such that the initial upper waveguide layer 140a forms the upper waveguide layer 140, the initial active layer 130a forms the active layer 130, the initial lower waveguide layer 120a forms the lower waveguide layer 120, and the initial lower confinement layer 110a forms the lower confinement layer 110.
In this embodiment, the lower confinement layer 110, the lower waveguide layer 120, the active layer 130, the upper waveguide layer 140, the upper confinement layer 150, and the contact layer 160 form a ridge structure. The sacrificial layer 170 is located on the top surface of the ridge structure, and the sacrificial layer 170 is located on a side surface of the contact layer 160 facing away from the semiconductor substrate layer 100.
In other embodiments, the lower confinement layer, the lower waveguide layer, the active layer, the upper waveguide layer, and the upper confinement layer form a ridge structure when the contact layer is not formed. The sacrificial layer is positioned on the top surface of the ridge structure, and the sacrificial layer is positioned on the surface of one side of the upper limiting layer, which faces away from the semiconductor substrate layer.
In the second isotropic etching, since there is a certain lateral etching phenomenon, the width of the ridge structure becomes wider with an increase in etching depth, and thus the width of the ridge structure tends to be narrower at the top and wider at the bottom.
The width of the ridge structure in the slow axis direction increases from top to bottom, and the ridge structure has characteristic sidewalls on both sides in the slow axis direction, wherein the characteristic sidewalls are sidewalls of the upper waveguide layer 140, the active layer 130 and the lower waveguide layer 120 on the sides in the slow axis direction.
The included angle between the side walls of the two sides of the upper limiting layer 150 in the slow axis direction and the bottom surface of the upper limiting layer 150 is reduced from a first angle to a second angle; the included angle between the side walls of the two sides of the upper waveguide layer in the slow axis direction and the bottom surface of the upper waveguide layer is reduced from a third angle to a fourth angle; the included angle between the two side walls of the active layer 130 in the slow axis direction and the bottom surface of the active layer 130 is reduced from the fifth angle to the sixth angle; the included angle between the side walls of the two sides of the lower waveguide layer in the slow axis direction and the bottom surface of the lower waveguide layer is reduced from a seventh angle to an eighth angle; the included angle between the side walls of the two sides of the lower limiting layer 110 in the slow axis direction and the bottom surface of the lower limiting layer 110 is reduced from the ninth angle to the tenth angle.
In one embodiment, the third angle is 45 degrees to 65 degrees; the fourth angle is 25-40 degrees; the fifth angle is 25-40 degrees; the sixth angle is 15-25 degrees; the seventh angle is 15-25 degrees; the eighth angle is 5-15 degrees. This facilitates the formation of grating grooves 200 in the ridge structure corresponding to the sidewalls of the features, and the coupling coefficient of the sidewall grating structure is improved.
In one embodiment, the first angle is 65 degrees to 80 degrees; the second angle is 45-65 degrees; the ninth angle is 5-15 degrees; the tenth angle is 0 degrees to 5 degrees. Such that sidewall grating structures are not formed in the upper confinement layer 150, the contact layer 160 and the lower confinement layer 110.
Referring to fig. 5, after the second isotropic etching is performed, the first mask layer 180 is removed.
Referring to fig. 6 to 8, a second mask layer 190 is formed on the surface of the sidewall of the ridge structure and the surface of the semiconductor substrate layer 100 at the side of the ridge structure, and the second mask layer 190 has a first mask gate 191 therein, and the first mask gate 191 exposes the feature sidewall.
Referring to fig. 6, a second initial photoresist film 190a is formed on the surface of the semiconductor substrate layer 100 on both sides of the ridge structure in the slow axis direction and the surface of the semiconductor substrate layer 100 on both sides of the ridge structure, and the top surface and the sidewall surface of the sacrificial layer 170, the thickness of the second initial photoresist film 190a on the surface of the semiconductor substrate layer 100 on both sides of the ridge structure is greater than the thickness of the second initial photoresist film 190a on either side of the ridge structure in the slow axis direction, the thickness of the second initial photoresist film 190a on either side of the sidewall surface of the ridge structure in the slow axis direction is greater than the thickness of the second initial photoresist film 190a on the top surface of the sacrificial layer 170, and the thickness of the second initial photoresist film 190a on either side of the sidewall surface of the ridge structure in the slow axis direction increases from top to bottom.
The process of forming the second initial photoresist film 190a is a spin-coating process.
In one embodiment, the thickness of the second initial photoresist film 190a is 50nm to 300nm, such as 50nm, 100nm, 120nm, 150nm, 180nm, or 300nm.
Referring to fig. 7, the second initial photoresist film 190a is holographically exposed to photosensitize the entire second initial photoresist film 190a on the top surface of the sacrificial layer 170 and portions of the second initial photoresist film 190a located on the sidewalls of the features.
Since the second initial photoresist film 190a of the top surface of the sacrificial layer 170 is thin, the second initial photoresist film 190a of the region is sufficiently exposed, and the second initial photoresist film 190a of the region is easily photo-denatured. The second initial photoresist film 190a of the surface of the semiconductor substrate layer 100 is thicker, and thus the second initial photoresist film 190a of the region is underexposed. The perpendicularity of the sidewalls of the sacrificial layer 170, the sidewalls of the contact layer 160 and the sidewalls of the upper confinement layer 150 on both sides in the slow axis direction is relatively high with respect to the perpendicularity of the sidewalls of the upper waveguide layer, the active layer, the lower waveguide layer and the lower confinement layer on both sides in the slow axis direction, so that the second initial photoresist film 190a of the sidewalls of the sacrificial layer 170, the sidewalls of the contact layer 160 and the sidewalls of the upper confinement layer 150 on both sides in the slow axis direction is less sensitive, so that the exposure degree of the second initial photoresist film 190a of the region is very small with respect to the sidewalls of the sacrificial layer 170, the sidewalls of the contact layer 160 and the sidewalls of the upper confinement layer 150 on both sides in the slow axis direction, and thus the second initial photoresist film 190a of the region is not substantially sensitive to photo-denaturation. The second initial photoresist film 190 of the feature sidewall is subjected to the interference light emitted by the exposure light source in the exposure process, the photosensitive amount of a partial region of the second initial photoresist film 190 of the feature sidewall is larger, the photosensitive amount of a partial region of the second initial photoresist film 190 of the feature sidewall is smaller, and the region with larger photosensitive amount and the region with smaller photosensitive amount in the second initial photoresist film 190 of the feature sidewall are periodically arranged in the light emitting direction of the side-emitting semiconductor light emitting structure. The thickness of the second initial photoresist film 190 of the lower limiting layer 110 at both side walls in the slow axis direction is also thicker, and thus the second initial photoresist film 190a of the region is not sufficiently exposed.
In the holographic exposure, a double beam with a certain angle difference is used to form an interference light plane wave, and the interference light plane wave is projected to the second initial photoresist film 190a in a direction perpendicular to the top surface of the ridge structure.
Referring to fig. 8 and 9, fig. 8 is a schematic view based on fig. 7, and fig. 9 is a perspective view corresponding to fig. 8, after the second initial photoresist film 190a is subjected to holographic exposure, the second initial photoresist film 190a is developed to remove the second initial photoresist film 190a on the top surface of the sacrificial layer 170 and a portion of the second initial photoresist film 190a having the sidewalls of the features photo-denatured, so that the second initial photoresist film 190a forms a second mask layer 190.
Since the second initial photoresist film 190a of the top surface of the sacrificial layer 170 is thin, the second initial photoresist film 190a of the region is sufficiently exposed, and thus the second initial photoresist film 190a of the top surface of the sacrificial layer 170 is developed and removed. Since the second initial photoresist film 190a on the surface of the semiconductor substrate layer 100 is not sufficiently exposed, the second initial photoresist film 190a on the surface of the semiconductor substrate layer 100 may have a residual photoresist during the developing process, that is, the surface of the semiconductor substrate layer 100 may be further covered with the second initial photoresist film 190a after the developing step. Since the second initial photoresist films 190a of the sidewalls of the sacrificial layer 170, the contact layer 160, and the upper confinement layer 150 on both sides in the slow axis direction are less exposed, the sidewalls of the sacrificial layer 170, the contact layer 160, and the upper confinement layer 150 on both sides in the slow axis direction remain during the development process. Since the thickness of the second initial photoresist film 190 of the sidewall of the lower limiting layer 110 on both sides in the slow axis direction is also thick, the second initial photoresist film 190a of the region is underexposed, and thus the second initial photoresist film 190 of the sidewall surface of the lower limiting layer 110 remains during the developing process. The region of the second initial photoresist film 190 of the feature sidewall where the amount of light is smaller remains and the region of the second initial photoresist film 190 of the feature sidewall where the amount of light is larger is developed and removed, thereby forming a first mask gate 191.
Since the thickness of the second initial photoresist film 190a of the feature sidewall is relatively thin with respect to the related art, the width of the first mask gate 191 and the width dimension between adjacent first mask gates 191 are both made small.
And the second initial photoresist film is subjected to holographic exposure to form a second mask layer 190, so that a mask is not needed, and the process is simple and efficient.
The step of forming the second mask layer on the surface of the side wall of the ridge structure on both sides in the slow axis direction and the surface of the semiconductor substrate layer on the side of the ridge structure includes: forming an initial hard mask layer on the side wall surfaces of the ridge structure on two sides of the slow axis direction, the surfaces of the semiconductor substrate layers on the side parts of the ridge structure, and the top surfaces of the sacrificial layers and the side wall surfaces; forming a third initial photoresist film on the surface of the initial hard mask layer, wherein the thickness of the third initial photoresist film on the semiconductor substrate layer at the side part of the ridge structure is larger than that of the third initial photoresist film covering the side wall of the ridge structure, the thickness of the third initial photoresist film covering the side wall of the ridge structure is larger than that of the third initial photoresist film covering the top surface of the sacrificial layer, and the thickness of the third initial photoresist film covering the side wall of the ridge structure increases from top to bottom; holographic exposure is carried out on the third initial photoresist film, so that all the third initial photoresist film covering the top surface of the sacrificial layer and part of the third initial photoresist film covering the characteristic side wall are photosensitive modified; after holographic exposure is carried out on the third initial photoresist film, developing is carried out on the third initial photoresist film so as to remove the third initial photoresist film covering the top surface of the sacrificial layer and part of the third initial photoresist film covering the photosensitive degeneration of the characteristic side wall, so that the third initial photoresist film forms a third photoresist layer; etching the initial hard mask layer by taking the third photoresist layer as a mask to remove the initial hard mask layer on the top surface of the sacrificial layer and part of the initial hard mask layer on the side wall of the feature, so that the initial hard mask layer forms a second mask layer; and after the initial hard mask layer is etched by taking the third photoresist layer as a mask, removing the third photoresist layer.
The material of the initial hard mask layer is silicon nitride or silicon oxide.
Note that, the first mask gate 191 in fig. 9 refers to an opening penetrating the second mask layer 190, and an opening that does not penetrate the second mask layer 190 is not illustrated.
Referring to fig. 10 and 11, fig. 10 is a schematic diagram based on fig. 8, fig. 11 is a schematic diagram based on fig. 9, fig. 11 is a schematic perspective diagram corresponding to fig. 10, a plurality of grating grooves 200 are formed in the ridge structure exposed by the side wall of the feature, specifically, the ridge structure exposed by the first mask gate 191 is etched by using the second mask layer 190 as a mask, so as to form a plurality of grating grooves 200.
And etching to remove the sacrificial layer 170 by taking the second mask layer 190 as a mask in the process of etching the ridge structure exposed by the first mask gate 191, wherein the sacrificial layer 170 protects the film layer below the sacrificial layer 170 from etching loss. Theoretically, in other embodiments, no sacrificial layer may be provided.
By using the different thicknesses of the second initial photoresist film 190a in different regions, holographic self-alignment is achieved to form grating grooves 200 in localized areas of the feature sidewalls.
Because the width of the first mask gate 191 and the width between the adjacent first mask gate 191 are smaller, the width of the grating groove 200 and the width between the adjacent grating grooves 200 are smaller, so that the period of the sidewall grating structure is smaller, and the sidewall grating structure can be easily made to be a first-order sidewall grating structure.
Referring to fig. 11, after the ridge structure exposed by the first mask gate 191 is etched using the second mask layer 190 as a mask, the second mask layer 190 is removed.
Referring to fig. 12, a front electrode 210 is formed on a side surface of the contact layer 160 facing away from the semiconductor substrate layer 100; a back electrode (not shown) is formed on a surface of the semiconductor substrate layer 100 on a side facing away from the active layer 130.
In this embodiment, the method further includes: forming a passivation layer having an electrode opening therein exposing a portion of the top surface of the ridge structure, on the sidewall surface of the ridge structure, the surface of the semiconductor substrate layer, and a portion of the top surface of the ridge structure, before forming the front electrode 210; the step of forming the front electrode 210 on the surface of the side of the contact layer 160 facing away from the semiconductor substrate layer 100 includes: a front electrode 210 is formed in the electrode opening.
The material of the passivation layer comprises silicon oxide or silicon nitride.
In one embodiment, the passivation layer has a thickness of 30 nm to 500 nm.
The passivation layer covers both side wall surfaces of the ridge structure in the slow axis direction and the inner wall surface of the grating groove 200.
The passivation layer conformally covers the inner wall of the grating groove, and the thickness of the passivation layer is smaller than 1/2 of the width of the grating groove. Alternatively, the passivation layer fills the grating grooves and has grooves in the passivation layer in the areas corresponding to the grating grooves.
In another embodiment, the front electrode is located on the upper surface of the contact layer 160 and the entire surface of the passivation layer. When the passivation layer fills the grating groove and the passivation layer in the corresponding area of the grating groove is provided with a groove, the front electrode conformally covers the groove, and the thickness of the front electrode is smaller than 1/2 of the width of the groove. The surface of the area of the front electrode covered with the grating groove is fluctuated to form a metal grating structure, and the total coupling coefficient of the side wall grating structure and the metal grating structure is improved based on the metal grating structure and a plasmon mode formed by light at the interface of the front electrode and the passivation layer, so that single-mode lasing can be realized under the condition that the etching depth of the grating groove is shallower or the total length of the side wall grating structure in the cavity length direction of the side-emitting semiconductor light-emitting structure is shorter.
In one embodiment, the semiconductor substrate layer 100 is thinned after the front electrode 210 is formed, and before the back electrode is formed.
In one embodiment, the back electrode is a GeAuNiAu alloy or a GeAuCrAu alloy.
Example 3
This embodiment differs from embodiment 2 in that: forming a third initial photoresist film on the side wall surfaces of the ridge structure at two sides of the slow axis direction and the surface of the semiconductor substrate layer at the side part of the ridge structure and the top surface of the ridge structure before forming a plurality of grating grooves in the ridge structure with the exposed characteristic side wall; sequentially performing electron beam exposure and development on the third initial photoresist film on the side wall of the feature to form a third photoresist layer, wherein a second mask gate opening is formed in the third photoresist layer, and the second mask gate opening exposes the side wall of the feature; the step of forming a plurality of grating grooves in the ridge structure with the exposed side walls of the features comprises the following steps: etching the ridge-shaped structure exposed from the gate opening of the second mask by taking the third photoresist layer as a mask to form a plurality of grating grooves; and removing the third photoresist layer after etching the ridge structure exposed by the second mask gate opening by taking the third photoresist layer as a mask.
It is apparent that the above examples are given by way of illustration only and are not limiting of the embodiments. Other variations or modifications of the above teachings will be apparent to those of ordinary skill in the art. It is not necessary here nor is it exhaustive of all embodiments. While still being apparent from variations or modifications that may be made by those skilled in the art are within the scope of the invention.
Claims (14)
1. An edge-emitting semiconductor light emitting structure having a sidewall grating structure, comprising:
a semiconductor substrate layer;
a ridge structure on the semiconductor substrate layer, the ridge structure including a lower confinement layer, a lower waveguide layer, an active layer, an upper waveguide layer, and an upper confinement layer stacked in this order on the semiconductor substrate layer; the width of the ridge structure in the slow axis direction increases gradually from top to bottom, the two sides of the ridge structure in the slow axis direction are provided with characteristic side walls, and the characteristic side walls are side walls of the upper waveguide layer, the active layer and the lower waveguide layer in the slow axis direction;
the plurality of spaced areas of the side wall of the feature are recessed towards the ridge structure to form a plurality of grating grooves, and the ridge structure between the grating grooves forms a side wall grating structure; the side wall grating structure is a first-order side wall grating structure;
The size of the ridge structure between the adjacent grating grooves in the light-emitting direction is 40-900 nm, and the size of the grating grooves in the light-emitting direction is 160-800 nm; the depth of the grating groove is 20 nm-300 nm.
2. The edge-emitting semiconductor light emitting structure with sidewall grating structure of claim 1, wherein the feature sidewalls comprise a first feature sidewall, a second feature sidewall and a third feature sidewall, the first feature sidewall being a sidewall of the upper waveguide layer on a side of the slow axis direction, the second feature sidewall being a sidewall of the active layer on a side of the slow axis direction, the third feature sidewall being a sidewall of the lower waveguide layer on a side of the slow axis direction;
only a plurality of spaced areas of the first feature sidewall are recessed toward the upper waveguide layer to form a plurality of grating grooves; or, only a plurality of spaced areas of the second feature sidewall are recessed toward the active layer to form a plurality of grating grooves; alternatively, only the spaced apart regions of the third feature sidewall are recessed toward the lower waveguide layer to form a plurality of grating grooves; alternatively, the first feature sidewall, the second feature sidewall, and the third feature sidewall have a plurality of spaced apart regions recessed toward the ridge structure to form a plurality of grating grooves; alternatively, only the spaced areas of the first feature sidewall and the second feature sidewall are recessed toward the ridge structure to form a plurality of grating grooves; alternatively, only the spaced apart regions of the second and third feature sidewalls are recessed toward the ridge structure to form the grating grooves.
3. The edge-emitting semiconductor light emitting structure with sidewall grating structure of claim 1, wherein the plurality of grating grooves are periodically arranged along a light emitting direction of the edge-emitting semiconductor light emitting structure with sidewall grating structure.
4. A side-emitting semiconductor light emitting structure having a side-wall grating structure according to any one of claims 1 to 3, wherein the side-wall grating structure is a first-order side-wall grating structure.
5. The edge-emitting semiconductor light emitting structure with sidewall grating structure of claim 1, wherein the angle between the sidewalls of the upper waveguide layer on both sides in the slow axis direction and the bottom surface of the upper waveguide layer decreases from a third angle to a fourth angle; the included angle between the side walls of the two sides of the active layer in the slow axis direction and the bottom surface of the active layer is reduced from a fifth angle to a sixth angle; the included angle between the side walls of the two sides of the lower waveguide layer in the slow axis direction and the bottom surface of the lower waveguide layer is reduced from a seventh angle to an eighth angle; the third angle is 45-65 degrees; the fourth angle is 25-40 degrees; the fifth angle is 25-40 degrees; the sixth angle is 15-25 degrees; the seventh angle is 15-25 degrees; the eighth angle is 5-15 degrees.
6. The edge-emitting semiconductor light emitting structure with sidewall grating structure of claim 1 or 5, wherein the angle between the sidewalls of the upper confinement layer on both sides in the slow axis direction and the bottom surface of the upper confinement layer decreases from a first angle to a second angle; the included angle between the side walls of the two sides of the lower limiting layer in the slow axis direction and the bottom surface of the lower limiting layer is reduced from a ninth angle to a tenth angle; the first angle is 65-80 degrees; the second angle is 45-65 degrees; the ninth angle is 5-15 degrees; the tenth angle is 0 degrees to 5 degrees.
7. The edge-emitting semiconductor light emitting structure with sidewall grating structure of claim 1, wherein the ridge structure further comprises: the contact layer is positioned on one side surface of the upper limiting layer, which is away from the semiconductor substrate layer; the side-emitting semiconductor light emitting structure having a sidewall grating structure further includes: and a front electrode on the upper surface of the contact layer.
8. A method for fabricating an edge-emitting semiconductor light emitting structure having a sidewall grating structure, comprising:
providing a semiconductor substrate layer;
forming a ridge structure on the semiconductor substrate layer, wherein the ridge structure comprises a lower limiting layer, a lower waveguide layer, an active layer, an upper waveguide layer and an upper limiting layer which are sequentially laminated on the semiconductor substrate layer; the width of the ridge structure in the slow axis direction increases gradually from top to bottom, the two sides of the ridge structure in the slow axis direction are provided with characteristic side walls, and the characteristic side walls are side walls of the upper waveguide layer, the active layer and the lower waveguide layer in the slow axis direction;
Forming a plurality of grating grooves in the ridge-shaped structures exposed out of the side walls of the features, wherein the grating grooves and the ridge-shaped structures between the grating grooves form side wall grating structures; the side wall grating structure is a first-order side wall grating structure;
the size of the ridge structure between the adjacent grating grooves in the light-emitting direction is 40-900 nm, and the size of the grating grooves in the light-emitting direction is 160-800 nm; the depth of the grating groove is 20 nm-300 nm.
9. The method of fabricating a side-emitting semiconductor light emitting structure with sidewall grating structure of claim 8, wherein the method of forming ridge structures on the semiconductor substrate layer comprises: forming an initial lower limit layer, an initial lower waveguide layer, an initial active layer, an initial upper waveguide layer and an initial upper limit layer on the semiconductor substrate layer in sequence; forming a first mask layer on one side of a part of the initial upper limiting layer, which is away from the semiconductor substrate layer; performing first anisotropic etching on the initial upper limit layer by taking the first mask layer as a mask until the initial upper waveguide layer is exposed, and forming an upper limit layer on the initial upper limit layer; after the first anisotropic etching, performing second isotropic etching on the initial upper waveguide layer, the initial active layer, the initial lower waveguide layer and the initial lower limiting layer by using the first mask layer as a mask, so that the initial upper waveguide layer forms an upper waveguide layer, the initial active layer forms an active layer, the initial lower waveguide layer forms a lower waveguide layer and the initial lower limiting layer forms a lower limiting layer; after the second isotropic etching, the first mask layer is removed.
10. The method of fabricating a side-emitting semiconductor light emitting structure with sidewall grating structure of claim 9, wherein the method of forming a ridge structure on the semiconductor substrate layer further comprises: before the first anisotropic etching, forming an initial contact layer on the surface of one side of the initial upper limiting layer, which faces away from the semiconductor substrate layer; the first anisotropic etch also etches the initial contact layer, forming the initial contact layer into a contact layer.
11. The method of fabricating a side-emitting semiconductor light emitting structure having a sidewall grating structure of claim 8, further comprising: in the process of forming the ridge structure, a sacrificial layer is also formed, and the sacrificial layer is positioned on the top surface of the ridge structure;
before forming a plurality of grating grooves in the ridge structure with the exposed feature side walls, forming a second mask layer on the side wall surfaces of the ridge structure at two sides in the slow axis direction and the surface of the semiconductor substrate layer at the side part of the ridge structure, wherein a first mask gate opening is formed in the second mask layer, and the feature side walls are exposed by the first mask gate opening;
the step of forming a plurality of grating grooves in the ridge structure with the exposed side walls of the features comprises the following steps: etching the ridge-shaped structure exposed from the gate opening of the first mask by taking the second mask layer as a mask to form a plurality of grating grooves;
Etching to remove the sacrificial layer in the process of etching the ridge structure exposed by the first mask gate by taking the second mask layer as a mask;
and removing the second mask layer after the ridge structure exposed by the first mask gate opening is etched by taking the second mask layer as a mask.
12. The method of fabricating a side-emitting semiconductor light emitting structure having a sidewall grating structure according to claim 11, wherein the step of forming a second mask layer on the surface of the sidewall of the ridge structure on both sides in the slow axis direction and the surface of the semiconductor substrate layer on the side of the ridge structure comprises: forming second initial photoresist films on the side wall surfaces of the ridge structure on two sides of the slow axis direction and the surfaces of the semiconductor substrate layer on the side of the ridge structure, as well as the top surface of the sacrificial layer and the side wall surfaces, wherein the thickness of the second initial photoresist film on the surface of the semiconductor substrate layer on the side of the ridge structure is larger than that of the second initial photoresist film on the side wall surface of the ridge structure on any side of the slow axis direction, the thickness of the second initial photoresist film on the side wall surface of the ridge structure on any side of the slow axis direction is larger than that of the second initial photoresist film on the top surface of the sacrificial layer, and the thickness of the second initial photoresist film on the side wall surface of the ridge structure on two sides of the slow axis direction increases from top to bottom; holographic exposure is carried out on the second initial photoresist film, so that all the second initial photoresist film on the top surface of the sacrificial layer and part of the second initial photoresist film on the side wall of the feature are subjected to photosensitive degeneration; and after carrying out holographic exposure on the second initial photoresist film, developing the second initial photoresist film to remove the second initial photoresist film on the top surface of the sacrificial layer and part of the second initial photoresist film with photosensitive denaturation of the side wall of the feature, so that the second initial photoresist film forms a second mask layer.
13. The method of fabricating a side-emitting semiconductor light emitting structure having a sidewall grating structure according to claim 11, wherein the step of forming a second mask layer on the surface of the sidewall of the ridge structure on both sides in the slow axis direction and the surface of the semiconductor substrate layer on the side of the ridge structure comprises: forming an initial hard mask layer on the side wall surfaces of the ridge structure on two sides of the slow axis direction, the surfaces of the semiconductor substrate layers on the side parts of the ridge structure, and the top surfaces of the sacrificial layers and the side wall surfaces; forming a third initial photoresist film on the surface of the initial hard mask layer, wherein the thickness of the third initial photoresist film on the semiconductor substrate layer at the side part of the ridge structure is larger than that of the third initial photoresist film covering the side wall of the ridge structure, the thickness of the third initial photoresist film covering the side wall of the ridge structure is larger than that of the third initial photoresist film covering the top surface of the sacrificial layer, and the thickness of the third initial photoresist film covering the side wall of the ridge structure increases from top to bottom; holographic exposure is carried out on the third initial photoresist film, so that all the third initial photoresist film covering the top surface of the sacrificial layer and part of the third initial photoresist film covering the characteristic side wall are photosensitive modified; after holographic exposure is carried out on the third initial photoresist film, developing is carried out on the third initial photoresist film so as to remove the third initial photoresist film covering the top surface of the sacrificial layer and part of the third initial photoresist film covering the photosensitive degeneration of the characteristic side wall, so that the third initial photoresist film forms a third photoresist layer; etching the initial hard mask layer by taking the third photoresist layer as a mask to remove the initial hard mask layer on the top surface of the sacrificial layer and part of the initial hard mask layer on the side wall of the feature, so that the initial hard mask layer forms a second mask layer; and after the initial hard mask layer is etched by taking the third photoresist layer as a mask, removing the third photoresist layer.
14. The method of fabricating a side-emitting semiconductor light emitting structure having a sidewall grating structure of claim 8, further comprising: forming a third initial photoresist film on the side wall surfaces of the ridge structure at two sides of the slow axis direction and the surface of the semiconductor substrate layer at the side part of the ridge structure and the top surface of the ridge structure before forming a plurality of grating grooves in the ridge structure with the exposed characteristic side wall; sequentially performing electron beam exposure and development on the third initial photoresist film on the side wall of the feature to form a third photoresist layer, wherein a second mask gate opening is formed in the third photoresist layer, and the second mask gate opening exposes the side wall of the feature;
the step of forming a plurality of grating grooves in the ridge structure with the exposed side walls of the features comprises the following steps: etching the ridge-shaped structure exposed from the gate opening of the second mask by taking the third photoresist layer as a mask to form a plurality of grating grooves;
and removing the third photoresist layer after etching the ridge structure exposed by the second mask gate opening by taking the third photoresist layer as a mask.
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CN1979241A (en) * | 2005-12-09 | 2007-06-13 | 富士通株式会社 | Optical device coupling light propagating in optical waveguide with diffraction grating |
CN110880675A (en) * | 2019-11-25 | 2020-03-13 | 江苏华兴激光科技有限公司 | Single longitudinal mode edge-emitting laser with lateral photogate oxidation limiting structure and preparation method thereof |
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