CN116610596B - Memory device and data processing method thereof - Google Patents
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- 238000012545 processing Methods 0.000 claims abstract description 36
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0253—Garbage collection, i.e. reclamation of unreferenced memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7205—Cleaning, compaction, garbage collection, erase control
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The present invention relates to the field of memory devices, and in particular, to a memory device and a data processing method thereof. A memory device, comprising: the flash memory comprises a plurality of blocks for storing storage data; and the controller is electrically connected with the flash memory, and is used for receiving the storage data of the host, selecting partial blocks of the flash memory to be in a usable state, setting the starting time of garbage recycling treatment, and the starting time meets the following conditions: start time = initial time partial block number/total block number; when the initial time represents the time of garbage collection processing on the flash memory when all the blocks are in the available state, the total number of the blocks represents the number of all the blocks of the flash memory. The invention ensures the service performance and firmware logic after the garbage collection is started, and saves the data transmission time and firmware resources.
Description
Technical Field
The present invention relates to the field of memory devices, and in particular, to a memory device and a data processing method thereof.
Background
In the use process of the flash memory, the data can be written on the same logic address for multiple times, and then the stored data on the old physical address can become invalid data. After long-term use, some blocks have valid data and invalid data at the same time, and the storage space of the flash memory is gradually used up. The garbage collection module is used for collecting the effective data, so that only invalid data are stored in some blocks. The block storing invalid data can be subjected to erasing data processing, and new data can be continuously written into the block after the erasing data processing. When verifying the problems associated with flash memory garbage collection, a significant drain is made on the product life and performance of the memory device. There is therefore a need for improvement.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a memory device and a data processing method thereof, so as to improve the problem of large consumption of the product lifetime and the service performance of the existing memory device.
To achieve the above and other related objects, the present invention provides a memory device comprising:
the flash memory comprises a plurality of blocks for storing storage data; and
the controller is electrically connected to the flash memory, and is used for receiving the storage data of the host, selecting partial blocks of the flash memory to be in an available state, and setting starting time of garbage recycling treatment, wherein the starting time meets the following conditions:
start time = initial time partial block number/total block number;
and when the initial time represents the time of garbage collection processing of the flash memory when all the blocks are in the available state, the total number of the blocks represents the number of all the blocks in the flash memory.
In one embodiment of the present invention, the partial blocks include idle blocks and usage blocks, and the controller adjusts a speed value of one garbage collection process every time an activation number is consumed, the activation number satisfying:
start number = initial number partial block number/total block number;
and when all the blocks of the flash memory are in the available state, the number of the idle blocks consumed by adjusting the speed value of garbage collection processing is recorded as the initial number.
In one embodiment of the present invention, the controller sets a speed of garbage collection processing of the flash memory, the speed of garbage collection processing satisfying:
garbage collection speed gear= (total number of blocks-total number of blocks×garbage collection ratio threshold)/initial number;
and when the ratio of the number of the used blocks to the number of all the blocks reaches an upper limit value, characterizing the upper limit value as the garbage collection proportion threshold value.
In one embodiment of the invention, the controller controls the start-up time of the waste reclamation process, the start-up time satisfying:
start time = full capacity × garbage collection ratio threshold × (number of partial blocks/number of full blocks)/write speed;
the full capacity characterizes a storage capacity of the flash memory when the full block is in an available state, and the write speed characterizes a speed at which the controller writes the stored data to the flash memory.
In one embodiment of the present invention, the controller sets a usage capacity of the flash memory, the usage capacity satisfying: capacity=total capacity partial block number/total block number.
The invention also provides a data processing method of the memory device, which comprises the following steps:
storing the storage data through a plurality of blocks on the flash memory;
the flash memory is electrically connected with the controller;
receiving, by the controller, the stored data written by the host; and
selecting partial blocks of the flash memory to be in an available state through the controller, and setting starting time of garbage recycling treatment;
the start time satisfies: start time = initial time partial block number/total block number;
and when the initial time represents the time of garbage collection processing of the flash memory when all the blocks are in the available state, the total number of the blocks represents the number of all the blocks in the flash memory.
In one embodiment of the present invention, after the step of selecting, by the controller, that a part of the blocks are in a usable state, the method includes:
acquiring the number of idle blocks and the number of used blocks in the partial blocks through the controller;
the controller is used for setting the speed value of garbage recycling treatment once when the idle blocks of the starting quantity are consumed;
the number of starts satisfies: start number = initial number partial block number/total block number;
and when all the blocks of the flash memory are in the available state, the number of the idle blocks consumed by adjusting the speed value of garbage collection processing is recorded as the initial number.
In one embodiment of the present invention, after the step of adjusting the speed value of the garbage collection process once when the controller sets the idle blocks of each consumption start number, the method includes:
setting a speed gear of garbage collection treatment of the flash memory through the controller;
the speed gear of the garbage recycling treatment meets the following conditions: garbage collection speed gear= (total number of blocks-total number of blocks×garbage collection ratio threshold)/initial number;
and when the ratio of the number of the used blocks to the number of all the blocks reaches an upper limit value, the upper limit value is characterized as the garbage collection proportion threshold value.
In one embodiment of the present invention, after the step of setting, by the controller, a speed gear of garbage collection processing of the flash memory, the method includes:
controlling the starting time of garbage recycling treatment through the controller;
the start time satisfies: start time = full capacity × garbage collection ratio threshold × (number of partial blocks/number of full blocks)/write speed;
wherein the full capacity characterizes a storage capacity of the flash memory when the full block is in an available state, and the writing speed characterizes a speed of the controller writing the storage data to the flash memory.
In one embodiment of the present invention, after the step of selecting, by the controller, that a part of the blocks are in an available state and setting a start time of the garbage collection process, the method includes:
setting the use capacity of the flash memory through the controller;
the usage capacity satisfies: capacity=total capacity partial block number/total block number.
As described above, the memory device and the data processing method thereof of the present invention have the following advantageous effects: the invention ensures the service performance and firmware logic after the garbage collection is started, and saves the data transmission time and firmware resources.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram showing a structure of a memory device according to the present invention.
Fig. 2 is a schematic diagram showing a logic unit structure in a memory device according to the present invention.
FIG. 3 is a schematic diagram showing steps of a data processing method of a memory device according to the present invention.
Fig. 4 is a schematic diagram illustrating a step of step S50 in fig. 3 according to the present invention.
Fig. 5 shows a further step of step S50 of fig. 3 according to the present invention.
Description of element reference numerals
100. A host; 200. a memory device; 300. a controller; 400. a flash memory;
310. a bus interface; 320. a processing unit; 330. an instruction buffer unit; 340. a static random access memory unit; 350. a flash memory interface; 360. a buffer storage unit; 370. a dynamic random access memory unit;
410. a chip; 420. a logic unit; 430. a noodle; 440. a block; 450. a page; 460. a page register; 470. a cache register.
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict. It is also to be understood that the terminology used in the examples of the invention is for the purpose of describing particular embodiments only, and is not intended to limit the scope of the invention. The test methods in the following examples, in which specific conditions are not noted, are generally conducted under conventional conditions or under conditions recommended by the respective manufacturers.
It should be understood that the structures, proportions, sizes, etc. shown in the drawings are for illustration purposes only and should not be construed as limiting the invention to the extent that it can be practiced, since modifications, changes in the proportions, or otherwise, used in the practice of the invention, are not intended to be critical to the essential characteristics of the invention, but are intended to fall within the spirit and scope of the invention. Also, the terms such as "upper," "lower," "left," "right," "middle," and "a" and the like recited in the present specification are merely for descriptive purposes and are not intended to limit the scope of the invention, but are intended to provide relative positional changes or modifications without materially altering the technical context in which the invention may be practiced.
Referring to fig. 1 to 5, in some embodiments, the present invention provides a memory device 200 and a data processing method thereof, which can be applied to the SSD (Solid State Disk or Solid State Drive) field. For example, the method can be applied to NAND flash (flash memory) of a solid state disk to control garbage collection of a plurality of blocks (blocks) 440 in the flash memory 400. The invention can make the garbage collection of the flash memory 400 earlier. The invention completely restores the firmware logic behavior of the storage device products such as the original solid state disk and the like on the premise of not influencing the service performance and the firmware logic after the garbage collection is started, thereby saving a large amount of data transmission time and firmware resources. The following is a detailed description of specific embodiments.
Referring to fig. 1 and 2, in some embodiments of the present invention, a memory device 200 is provided, which may include a controller 300 and a flash memory 400. The controller 300 is electrically connected to the host 100, and the controller 300 is configured to receive the storage data written by the host 100. The controller 300 is electrically connected to the flash memory 400, and the controller 300 is used for transmitting the stored data to the flash memory 400. The flash memory 400 may include a plurality of blocks 440 thereon, and the plurality of blocks 440 may be used to store data. One block 440 may include a plurality of pages 450 thereon. The block 440 requires an erase data (erase) process before writing data (program), the write data operation is in minimum units of pages 450, and the erase data operation is in minimum units of the block 440. When valid data exists in the block 440, the block 440 cannot be erased, i.e., the physical address where the invalid data is located cannot be used to write new storage data. The plurality of blocks 440 may include a usage block (data block) and an idle block (free block). When the total number of blocks 440 occupied by the number of used blocks reaches the garbage collection processing condition, the garbage collection processing operation of the flash memory 400 is triggered. In the garbage collection operation of the flash memory 400, the ratio of the number of blocks to the number of all blocks is used to reach an upper limit value, which is characterized as a garbage collection ratio threshold.
Referring to fig. 1 and 2, in some embodiments of the present invention, the controller 300 may select a part of the blocks to be in an available state and the rest of the blocks to be in an unavailable state. The controller 300 may set a start time of the garbage collection process, where the start time satisfies: start time = initial time partial block number/total block number. Wherein, the initial time represents the time of garbage collection processing on the flash memory 400 when all the blocks are in the available state. The total number of blocks characterizes the number of all blocks in flash memory 400. That is, after the setting by the controller 300, the ratio of the starting time to the initial time of the garbage collection process of the flash memory 400 is the partial block number/the total block number, so that the garbage collection process is performed in advance. The method can save a large amount of data transmission time and firmware resources in terms of speed verification, service life verification and the like of the flash memory 400 after garbage collection is started.
Referring to fig. 1 and 2, in some embodiments of the present invention, the partial blocks may include an idle block (free block) and a use block (data block). The idle block represents a block with zero valid data, and the block can be subjected to data erasure processing. A block is used to represent a block where valid data is not zero, i.e., where stored data has been written. The controller 300 can set the speed value of garbage collection and disposal once every time the starting number of idle blocks is consumed. The starting quantity is as follows: start number = initial number partial block number/total block number. When all the blocks of the flash memory 400 are in the available state, the number of idle blocks consumed by the garbage collection process is adjusted according to the speed value, and the number is recorded as the initial number.
Referring to fig. 1 and 2, in some embodiments of the present invention, the controller 300 may further set a speed of garbage collection in the flash memory 400, where the speed of garbage collection is defined as: regarding the number of times the speed value of the flash memory 400 regarding garbage collection processing is adjusted. The speed gear of garbage recycling treatment meets the following conditions: garbage collection speed gear= (total number of blocks-total number of blocks×garbage collection ratio threshold)/initial number. And when the ratio of the number of the used blocks to the number of all the blocks reaches an upper limit value, the upper limit value is characterized as a garbage recycling ratio threshold value. Under the condition that part of the blocks are in the available state and all the blocks are in the available state, the corresponding speed gear of garbage collection and treatment is the same under the two conditions. The invention does not influence the service performance and the firmware logic after the garbage collection and the starting, completely restores the firmware logic behavior of the storage device products such as the original solid state disk, and the like, thereby saving a large amount of data transmission time and firmware resources.
Referring to fig. 1 and 2, in some embodiments of the present invention, the writing speed is used to indicate the speed at which the controller 300 writes the stored data to the flash memory 400. The controller 300 may control the start time of the garbage collection process, where the start time satisfies: start time = full capacity × garbage collection ratio threshold × (number of partial blocks/number of full blocks)/write speed. Wherein the full capacity characterizes the storage capacity of the flash memory 400 when all blocks are in an available state.
Referring to fig. 1 and 2, in some embodiments of the present invention, the controller 300 may set the usage capacity of the flash memory 400, where the usage capacity satisfies: capacity=total capacity partial block number/total block number. The usage capacity of the flash memory 400 should also be determined on the premise that a part of the blocks are in the available state and the remaining blocks are in the unavailable state. The invention can lead the garbage collection of the flash memory 400 to be carried out in advance, and reduces the research and development consumption and the test consumption of the flash memory 400. The invention also reduces the hardware burden and prolongs the service life of the memory device.
Referring to fig. 1 and 2, in some embodiments of the present invention, the controller 300 may include a bus interface 310, a processing unit 320, an instruction buffer unit 330, a static random access memory unit 340, a flash memory interface 350, a buffer memory unit 350, and a dynamic random access memory unit 360. The bus interface 310 is electrically connected between the host 100 and the controller 300. The processing unit 320 is an operation and control core of the controller 300, and is a final execution unit for information processing and program running. The static random access memory unit 340, the buffer memory unit 360, and the dynamic random access memory unit 370 are memory units for data in the controller 300. The flash memory interface 350 enables electrical connection between the controller 300 and the flash memory 400.
Referring to fig. 1 and 2, in some embodiments of the invention, the flash memory 400 may be a packaged NAND flash memory (package). One flash memory 400 may include a plurality of chips (targets) 410, and one chip 410 may include a plurality of logic units (luns or die) 420. One or more logic units 420 in one chip 410 share a set of data signals. Each chip 410 is controlled by a ce (chip enable) pin, i.e., a plurality of logic units 420 on one chip 410 share a chip select signal. The logic unit 420 is the smallest unit that performs read and write commands, and different logic units 420 may perform different command sequences. One logic unit 420 may include multiple planes (planes) 430, each plane 430 having independent page registers (page registers) 460 and cache registers (cache registers) 470 to optimize the access speed of the flash memory 400. The page register 460 is used to transfer data with the array of flash memory 400. Cache register 470 is used to transfer data with host 100. One plane 430 may include a plurality of blocks (blocks) 440, the blocks 440 being the minimum units of erase data. One block 440 may include a plurality of pages (pages) 450, the pages 450 being the minimum units of write data.
Referring to fig. 3, in some embodiments of the present invention, a method for processing data of a memory device is further provided, which may include the following steps.
Step S10, storing the storage data through a plurality of blocks on the flash memory.
Step S20, electrically connecting to the flash memory through the controller.
Step S30, the storage data written by the host is received through the controller.
Step S40, selecting partial blocks of the flash memory to be in a usable state by the controller.
Step S50, setting starting time of garbage recycling treatment through a controller. The starting time is as follows: start time = initial time partial block number/total block number. When all blocks are in the available state, the initial time represents the garbage collection processing time of the flash memory, and the total number of the blocks represents the number of all the blocks in the flash memory.
Step S10, storing the storage data through a plurality of blocks on the flash memory.
In some embodiments, the flash memory 400 may include a plurality of blocks 440 thereon, and the plurality of blocks 440 may be used to store storage data. One block 440 may include a plurality of pages 450 thereon. The block 440 requires an erase data (erase) process before writing data (program), the write data operation is in minimum units of pages 450, and the erase data operation is in minimum units of the block 440.
Step S20, electrically connecting to the flash memory through the controller.
In some embodiments, the controller 300 may be electrically connected to the flash memory 400, and the controller 300 is used to transmit the stored data to the flash memory 400. When valid data exists in the block 440, the block 440 cannot be erased, i.e., the physical address where the invalid data is located cannot be used to write new storage data. The plurality of blocks 440 may include a usage block (data block) and an idle block (free block). When the total number of blocks 440 occupied by the number of used blocks reaches the garbage collection processing condition, the garbage collection processing operation of the flash memory 400 is triggered. In the garbage collection operation of the flash memory 400, the ratio of the number of blocks to the number of all blocks is used to reach an upper limit value, which is characterized as a garbage collection ratio threshold.
Step S30, the storage data written by the host is received through the controller.
In some embodiments, the controller 300 may be electrically connected to the host 100, and the controller 300 is configured to receive the storage data written by the host 100.
Step S40, selecting partial blocks of the flash memory to be in a usable state by the controller.
In some embodiments, the controller 300 may select a portion of the blocks to be in an available state and the remaining blocks to be in an unavailable state. The usage capacity of the flash memory 400 is also determined on the premise that a part of the blocks are in the available state and the remaining blocks are in the unavailable state.
Step S50, setting starting time of garbage recycling treatment through a controller. The starting time is as follows: start time = initial time partial block number/total block number. When all blocks are in a usable state, the initial time represents the garbage collection processing time of the flash memory, and the total number of the blocks represents the number of all the blocks in the flash memory.
In some embodiments, the controller 300 may set a start-up time for the garbage collection process, the start-up time satisfying: start time = initial time partial block number/total block number. Wherein, the initial time represents the time of garbage collection processing on the flash memory 400 when all the blocks are in the available state. That is, after the setting by the controller 300, the ratio of the starting time to the initial time of the garbage collection process of the flash memory 400 is the partial block number/the total block number, so that the garbage collection process is performed in advance. The method can save a large amount of data transmission time and firmware resources in terms of speed verification, service life verification and the like of the flash memory 400 after garbage collection is started.
Referring to fig. 4, in some embodiments of the present invention, the step S50 may include a step S510, a step S520, and a step S530. Step S510 may be expressed as obtaining, by the controller 300, the number of idle blocks and the number of used blocks in the partial blocks. Step S520 may be represented by adjusting the speed of garbage collection process once every time the controller 300 sets the starting number of idle blocks. The starting quantity is as follows: start number = initial number partial block number/total block number. When all blocks of the flash memory are in the available state, the number of idle blocks consumed by adjusting the speed value of garbage collection processing is recorded as the initial number. Step S530 may be represented by setting, by the controller 300, a speed of garbage collection processing of the flash memory 400. The speed gear of garbage recycling treatment meets the following conditions: garbage collection speed gear= (total number of blocks-total number of blocks×garbage collection ratio threshold)/initial number. And when the ratio of the number of the used blocks to the number of all the blocks reaches an upper limit value, the upper limit value is characterized as a garbage recycling ratio threshold value.
Referring to fig. 5, in some embodiments of the present invention, step S50 may further include step S540 and step S550. Step S540 may be expressed as controlling, by the controller 300, a start time of the garbage collection process, the start time satisfying: start time = full capacity × garbage collection ratio threshold × (number of partial blocks/number of full blocks)/write speed. The full capacity characterizes the storage capacity of the flash memory 400 when all blocks are in the available state. The write speed characterizes the speed at which the controller 300 writes stored data to the flash memory 400. Step S550 may be represented as setting, by the controller 300, a usage capacity of the flash memory 400, the usage capacity satisfying: capacity=total capacity partial block number/total block number.
Referring to fig. 1, fig. 2, fig. 3, fig. 4, and fig. 5, in some embodiments of the present invention, for example, the storage device 200 is an SSD (solid state disk), and the storage space is an a TB (terabyte) corresponding to B blocks (blocks) 440. When all blocks are in the available state, the controller 300 sets the garbage collection process to start when the used block (data block) reaches the B/M blocks 440, i.e., the garbage collection process starts when the memory device 200 writes into the memory space of the a/M TB. When the ratio of the number of used blocks to the number of all blocks reaches an upper limit value, the upper limit value is characterized as a garbage collection proportion threshold value of 1/M. Namely triggering garbage recycling treatment when the ratio of the number of the used blocks to the number of all the blocks reaches a garbage recycling proportion threshold value of 1/M. The controller 300 can set the speed of garbage collection and disposal once every time X idle blocks (free blocks) are consumed, namely every time X usage blocks are increased correspondingly. Thus, there are (B-B/M)/X speed steps after the garbage collection process is started. Assuming that the writing speed of the memory device 200 is Y TB/s, the memory device 200 is writing A/M TB memory space, and the garbage collection process requires A/M/Y seconds.
Referring to fig. 1, fig. 2, fig. 3, fig. 4, and fig. 5, in some embodiments of the present invention, a product capacity of the storage device 200, which is an SSD (solid state disk), is set to be 1/N of an original capacity, i.e., a/N TB of a storage capacity. And selecting 1/N of all blocks from all blocks to be recorded as partial blocks, namely B/N blocks 440 are used, and the rest blocks can not be used. The start time of the garbage collection process is set so that the number of used blocks reaches B/N/M starts, i.e., the garbage collection process starts when the memory device 200 writes into the memory space of the a/N/M TB. And the speed of garbage recycling is adjusted once when X/N idle blocks are consumed, namely, when X/N using blocks are increased correspondingly. Thus, the waste recycling treatment still has (B-B/M)/X speed steps. Assuming that the writing speed of the memory device 200 is Y TB/s, the start time of garbage collection processing is A/N/M/Y, and is reduced to 1/N when all blocks are in a usable state.
Referring to fig. 1, 2, 3, 4 and 5, in some embodiments of the present invention, for example, the storage device 200 is an SSD (solid state disk), and the storage space is 8TB (terabyte) corresponding to 4000 blocks (blocks) 440. When all blocks are in the available state, the controller 300 sets the garbage collection process to start when the usage block (data block) reaches 1000 blocks 440, i.e., the garbage collection process starts when the memory device 200 writes into the 2TB memory space. When the ratio of the number of used blocks to the number of all blocks reaches an upper limit value, the upper limit value is characterized as a garbage collection ratio threshold value of 1/4. Namely triggering garbage recycling treatment when the ratio of the number of the used blocks to the number of all the blocks reaches 1/4 of the garbage recycling ratio threshold. The controller 300 can set the speed of garbage collection and disposal once every 100 free blocks (free blocks) are consumed, namely every 100 usage blocks are increased correspondingly. Thus, there are (4000-1000)/100=30 speed steps after the start of the waste reclamation process. Assuming that the writing speed of the memory device 200 is 200MB/s, the memory device 200 requires 10000 seconds for garbage collection processing when writing a memory space of 2 TB.
Referring to fig. 1, 2, 3, 4 and 5, in some embodiments of the present invention, the product capacity of the storage device 200, which is an SSD (solid state disk), is set to be 1/100 of the original capacity, i.e. 80GB of storage capacity. And from 4000 blocks, 1/100 of all blocks are selected and marked as partial blocks, namely 40 blocks 440 are used, and the rest blocks can not be used. The start time of the garbage collection process is set to 10 start using blocks, that is, the garbage collection process starts when the memory device 200 writes into the memory space of 20 GB. And the speed of garbage recycling treatment is adjusted once when 1 idle block is consumed, namely, when 1 using block is increased correspondingly. Thus, the waste recovery treatment is still (40-10)/1=30 speed steps. Assuming a writing speed of 200MB/s for the memory device 200, the start-up time for garbage collection is 100s, shrinking to 1/100 of the time when all blocks are available.
In summary, the invention provides a storage device and a data processing method thereof, which saves data transmission time and firmware resources on the basis of ensuring the service performance and firmware logic after garbage collection and starting. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (6)
1. A memory device, comprising:
the flash memory comprises a plurality of blocks for storing storage data; and
the controller is electrically connected to the flash memory, and is used for receiving the storage data of the host, selecting partial blocks of the flash memory to be in an available state, and setting starting time of garbage recycling treatment, wherein the starting time meets the following conditions:
start time = initial time partial block number/total block number;
the initial time represents the time of garbage collection processing on the flash memory when all the blocks are in the available state, and the total number of the blocks represents the number of all the blocks in the flash memory;
the part of blocks comprise idle blocks and using blocks, the controller adjusts the speed value of garbage recycling once when setting the idle blocks with the starting quantity per consumption, and the starting quantity meets the following conditions:
starting number = initial number × partial block number/total block number, when the total blocks of the flash memory are in a usable state, adjusting the speed value of garbage collection processing to consume the number of idle blocks, and recording the number as the initial number;
the controller sets a speed gear of garbage collection treatment of the flash memory, and the speed gear of garbage collection treatment meets the following conditions:
a speed gear of garbage collection treatment= (total number of blocks-total number of blocks×garbage collection proportion threshold)/an initial number, wherein when a ratio of the number of used blocks to the number of total blocks reaches an upper limit value, the upper limit value is represented as the garbage collection proportion threshold;
after the garbage collection is started, the garbage collection and the writing of the host computer need to share the writing total bandwidth of the flash memory, and the writing speed of the host computer at the moment is defined as a speed value;
the total writing bandwidth of the flash memory is shared by garbage collection and host writing, different ratios of the host writing speed and the garbage collection speed are changed to adjust the garbage collection speed, and each speed value is defined as a speed gear.
2. The memory device of claim 1, wherein the controller controls a start-up time of the garbage collection process, the start-up time satisfying:
start time = full capacity × garbage collection ratio threshold × (number of partial blocks/number of full blocks)/write speed;
the full capacity characterizes a storage capacity of the flash memory when the full block is in an available state, and the write speed characterizes a speed at which the controller writes the stored data to the flash memory.
3. The memory device of claim 1, wherein the controller sets a usage capacity of the flash memory, the usage capacity satisfying: capacity=total capacity partial block number/total block number.
4. A method of data processing in a memory device, comprising:
storing the storage data through a plurality of blocks on the flash memory;
the flash memory is electrically connected with the controller;
receiving, by the controller, the stored data written by the host; and
selecting partial blocks of the flash memory to be in an available state through the controller, and setting starting time of garbage recycling treatment;
the start time satisfies: start time = initial time partial block number/total block number;
the initial time represents the time of garbage collection processing on the flash memory when all the blocks are in an available state, and the total number of the blocks represents the number of all the blocks in the flash memory;
after the step of selecting, by the controller, that a part of the blocks are in a usable state, the method includes:
acquiring the number of idle blocks and the number of used blocks in the partial blocks through the controller;
the controller is used for setting the speed value of garbage recycling treatment once when the idle blocks of the starting quantity are consumed;
the number of starts satisfies: start number = initial number partial block number/total block number;
when all the blocks of the flash memory are in an available state, the quantity of the idle blocks consumed by the speed value of garbage collection treatment is adjusted and recorded as the initial quantity;
wherein, after the step of adjusting the speed value of garbage collection processing once when the controller sets the idle blocks with the starting quantity per consumption, the method comprises the following steps:
setting a speed gear of garbage collection treatment of the flash memory through the controller;
the speed gear of the garbage recycling treatment meets the following conditions: garbage collection speed gear= (total number of blocks-total number of blocks×garbage collection ratio threshold)/initial number;
wherein, when the ratio of the number of the used blocks to the number of all the blocks reaches an upper limit value, the upper limit value is characterized as the garbage recycling ratio threshold value;
after the garbage collection is started, the garbage collection and the writing of the host computer need to share the writing total bandwidth of the flash memory, and the writing speed of the host computer at the moment is defined as a speed value;
the total writing bandwidth of the flash memory is shared by garbage collection and host writing, different ratios of the host writing speed and the garbage collection speed are changed to adjust the garbage collection speed, and each speed value is defined as a speed gear.
5. The method of claim 4, wherein after the step of setting a speed of garbage collection processing of the flash memory by the controller, comprising:
controlling the starting time of garbage recycling treatment through the controller;
the start time satisfies: start time = full capacity × garbage collection ratio threshold × (number of partial blocks/number of full blocks)/write speed;
wherein the full capacity characterizes a storage capacity of the flash memory when the full block is in an available state, and the writing speed characterizes a speed of the controller writing the storage data to the flash memory.
6. The method for processing data of a memory device according to claim 4, wherein after the step of selecting, by the controller, that a part of the blocks are in a usable state and setting a start time of garbage collection processing, the method comprises:
setting the use capacity of the flash memory through the controller;
the usage capacity satisfies: capacity=total capacity partial block number/total block number.
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