CN116610325B - Binary translation method, binary translation device, electronic equipment and storage medium - Google Patents

Binary translation method, binary translation device, electronic equipment and storage medium Download PDF

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CN116610325B
CN116610325B CN202310898019.1A CN202310898019A CN116610325B CN 116610325 B CN116610325 B CN 116610325B CN 202310898019 A CN202310898019 A CN 202310898019A CN 116610325 B CN116610325 B CN 116610325B
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instruction
optimized
instruction sequence
dependency
dependency chain
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CN116610325A (en
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胡起
兰彦志
曾露
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Loongson Technology Corp Ltd
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Loongson Technology Corp Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformation of program code
    • G06F8/52Binary to binary
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017Runtime instruction translation, e.g. macros
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Executing Special Programs (AREA)

Abstract

The embodiment of the invention provides a binary translation method, a binary translation device, electronic equipment and a storage medium, wherein the binary translation method comprises the following steps: for a basic block to be translated, constructing a dependency chain according to the dependency relationship among instructions in the basic block; each of the dependency chains comprises at least two instructions having a dependency relationship; determining an instruction sequence to be optimized contained in the basic block based on the dependency chain and a translation template in a translation template library; the instruction sequence to be optimized is from an instruction sequence with a matched translation template in the dependency chain; and translating the instruction sequence to be optimized based on a translation template corresponding to the instruction sequence to be optimized to obtain an optimized instruction sequence. The embodiment of the invention can reduce the generation of redundant instructions and improve the efficiency of the translated program.

Description

Binary translation method, binary translation device, electronic equipment and storage medium
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a binary translation method, a binary translation device, an electronic device, and a storage medium.
Background
Binary translation may convert a source program running on one architecture platform to a target program running on another architecture platform to solve the problem of application running across instruction set architectures at the binary level. Binary translation is one of the research hotspots in the field of computer technology in recent years.
In the binary translation process, due to the difference of two architecture instruction sets, the semantic expression level of the instruction sets is different, and if the corresponding instructions are translated one by one, more redundant instructions can be generated, so that the efficiency of a translated program is affected.
Disclosure of Invention
In view of the foregoing, embodiments of the present invention are directed to a binary translation method that overcomes or at least partially solves the foregoing problems, and reduces the generation of redundant instructions and improves the efficiency of post-translation programs.
Correspondingly, the embodiment of the invention also provides a binary translation device, electronic equipment and a storage medium, which are used for ensuring the realization and application of the method.
In a first aspect, an embodiment of the present invention discloses a binary translation method, where the method includes:
for a basic block to be translated, constructing a dependency chain according to the dependency relationship among instructions in the basic block; each of the dependency chains comprises at least two instructions having a dependency relationship;
Determining an instruction sequence to be optimized contained in the basic block based on the dependency chain and a translation template in a translation template library; the instruction sequence to be optimized is from an instruction sequence with a matched translation template in the dependency chain;
and translating the instruction sequence to be optimized based on a translation template corresponding to the instruction sequence to be optimized to obtain an optimized instruction sequence.
In a second aspect, an embodiment of the present invention discloses a binary translation apparatus, the apparatus including:
the dependency analysis module is used for constructing a dependency chain for the basic block to be translated according to the dependency relationship among the instructions in the basic block; each of the dependency chains comprises at least two instructions having a dependency relationship;
the optimization determining module is used for determining an instruction sequence to be optimized contained in the basic block based on the dependency chain and translation templates in the translation template library; the instruction sequence to be optimized is from an instruction sequence with a matched translation template in the dependency chain;
and the optimizing and translating module is used for translating the instruction sequence to be optimized based on a translating template corresponding to the instruction sequence to be optimized to obtain the optimized instruction sequence.
In a third aspect, an embodiment of the present invention discloses an electronic device, including: the device comprises a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface complete communication with each other through the communication bus; the memory is configured to store at least one executable instruction that causes the processor to perform the steps of the binary translation method as described in any one of the preceding claims.
In a fourth aspect, an embodiment of the present invention discloses a readable storage medium, where a program or an instruction is stored, where the program or the instruction can implement the binary translation method according to any one of the embodiments of the present invention when executed by a processor.
The binary translation method, the binary translation device, the electronic equipment and the storage medium provided by the embodiment of the invention have the following advantages:
in the binary translation process, the embodiment of the invention analyzes the dependency relationship of each instruction in the basic block to be translated, and identifies the instruction sequence to be optimized by constructing the dependency relationship chain among the instructions. The instruction sequence to be optimized is from an instruction sequence with a matched translation template in the dependency chain. Therefore, the translation template can be utilized to translate a plurality of instructions (instruction sequences to be optimized) with dependency relationships in an integral way instead of translating the instructions one by one, so that translation according to semantics is realized, multi-instruction to multi-instruction translation is realized, the purpose of reducing redundant instruction generation is achieved, and the efficiency of a program after translation can be improved. Further, the embodiment of the invention identifies the instruction sequence to be optimized by identifying the dependency relationship among the instructions, can also increase the identification strength of the instruction sequence to be optimized, and avoids the condition of missing the instruction sequence which can be optimized originally caused by scheduling.
Drawings
FIG. 1 is a flow chart of steps of an embodiment of a binary translation method of the present invention;
FIG. 2 is a schematic diagram of an architecture of a binary translation method of the present invention;
FIG. 3 is a block diagram of a binary translation apparatus embodiment of the present invention;
fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.
The terms first, second and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged, as appropriate, such that embodiments of the present invention may be implemented in sequences other than those illustrated or described herein, and that the objects identified by "first," "second," etc. are generally of a type, and are not limited to the number of objects, such as the first object may be one or more. Furthermore, the term "and/or" as used in the specification and claims to describe an association of associated objects means that there may be three relationships, e.g., a and/or B, may mean: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship. The term "plurality" in embodiments of the present invention means two or more, and other adjectives are similar.
Binary translation may be used to solve the problem of binary-level applications running across instruction set architectures (Instruction Set Architecture, ISA). In particular, binary translation techniques may translate sequences of instructions in one instruction set architecture into sequences of instructions in another instruction set architecture. For example, binary translation may translate instruction sequences in an x86 instruction set architecture into instruction sequences in an arm instruction set architecture (e.g., arm 64), and vice versa. Binary translation includes both static translation and dynamic translation. Static translation is the translation of binary A on the source platform to translate the binary A into binary file B on the target platform prior to its execution. Based on the static translation technology, the translation result obtained by one translation can be used for a plurality of times. Dynamic translation is the translation of fragments that are executed when a binary is run. The binary translation method of the embodiment of the invention can be applied to static translation or dynamic translation, and the translation is performed by taking basic blocks (Translation Block, TB) as units. A basic block typically ends with control flow change instructions (e.g., jumps, function calls, etc.).
In the embodiment of the present invention, the source program refers to a program to be binary translated, and the source program may be any type of application program. A source platform refers to a machine platform that can run a source program. In some embodiments, the source platform may also be referred to as a client. The processor of the source platform may be a processor based on a first instruction set architecture. The first instruction set architecture may be, for example, an x86 instruction set architecture or an arm instruction set architecture (e.g., arm 64). The source program is a program developed based on the first instruction set architecture, and thus, the source program can be normally run on the source platform. The target platform is a machine platform where migration of source programs is desired. In some embodiments, the target platform may also be referred to as a host. The processor of the target platform may be a processor based on a second instruction set architecture. The second instruction set architecture is a different instruction set architecture than the first instruction set architecture. For example, the first instruction set architecture is the x86 instruction set architecture and the second instruction set architecture is the arm instruction set architecture. As another example, the first instruction set architecture is an arm instruction set architecture and the second instruction set architecture is an x86 instruction set architecture. For another example, the first instruction set architecture is the x86 instruction set architecture and the second instruction set architecture is the LoongArch architecture. The source program may run on the source platform using source binary code. The source binary code is code based on a first instruction set architecture. If it is desired to run the source program on the target platform, the source binary needs to be translated into target binary. The target binary is code based on the second instruction set architecture such that the target binary can be run on the target platform.
FIG. 1 shows a flow chart of steps of an embodiment of a binary translation method of the present invention, which may include the steps of:
step 101, for a basic block to be translated, constructing a dependency chain according to the dependency relationship among instructions in the basic block; each of the dependency chains comprises at least two instructions having a dependency relationship;
step 102, determining an instruction sequence to be optimized contained in the basic block based on the dependency chain and a translation template in a translation template library; the instruction sequence to be optimized is from an instruction sequence with a matched translation template in the dependency chain;
step 103, translating the instruction sequence to be optimized based on a translation template corresponding to the instruction sequence to be optimized to obtain an optimized instruction sequence.
The binary translation method provided by the embodiment of the invention can be applied to the static translation or dynamic translation scene, and the instructions are optimized in the translation process, so that the generation of redundant instructions is reduced as much as possible, and the running efficiency of the translated program is further improved.
Referring to fig. 2, a schematic diagram of an operation architecture of a binary translation method according to an embodiment of the present invention is shown. As shown in FIG. 2, the binary translation architecture of an embodiment of the present invention includes a disassembler, an optimizer, a translator, and an assembler. Firstly, inputting a source program into a disassembler for disassembly, cutting the source program into basic blocks, and acquiring information of each instruction in each basic block; the optimizer analyzes the disassembled information, finds out possible instruction sequences to be optimized, and marks the possible instruction sequences; the translator translates each instruction correspondingly according to the disassembled information, and optimizes the translation process with the help of the marking information provided by the optimizer; the final optimized translated instructions are fed into an assembler for assembly.
Wherein steps 101 and 102 are performed by the optimizer and step 103 is performed by the translator.
In the binary translation process, due to the difference of two architecture instruction sets, the difference of the semantic expression levels of the instruction sets is caused, and if the corresponding instructions are translated one by one, more redundant instructions can be generated, so that the efficiency of a translated program is influenced. According to the embodiment of the invention, the semantic level optimization is carried out on the instructions in the binary translation process, and for the basic block to be translated, a dependency relationship chain is constructed according to the dependency relationship among the instructions in the basic block; each dependency chain comprises at least two instructions with a dependency relationship. And determining an instruction sequence to be optimized contained in the basic block by analyzing the dependency relationship among the instructions, wherein the instruction sequence to be optimized refers to a plurality of (at least two) instructions with the dependency relationship, and the instruction sequence to be optimized has a matched translation template. The translation template is a preset instruction sequence conforming to a specific rule. Specifically, the translation template may translate the instruction sequence of the first instruction set architecture into the instruction sequence corresponding to the second instruction set architecture, where the operands in the translation template are abstract operands (e.g., a and B in table 1) and do not represent real values. That is, the translation template is a translation rule, and the instruction sequence conforming to the translation template can be translated according to the rule of template translation.
In the embodiment of the present invention, the execution of one instruction (e.g., called a first instruction) needs to depend on the execution result of another instruction (e.g., called a second instruction), and the two instructions are said to have a dependency relationship, and the first instruction depends on the second instruction.
After determining the instruction sequence to be optimized contained in the basic block, the instruction sequence to be optimized can be translated integrally according to a translation template matched with the instruction sequence to be optimized, instead of translating the instructions one by one. The instruction sequence to be optimized and the matched translation template contain instruction sequences with the same semantic expression.
In one example, a translation template is shown in Table 1:
TABLE 1
The rule of the translation template is to translate the two instructions of XOR A, A and ADD B, A into the instruction of MOVE B, A, and the semantics of the translation are the same. The pre-translated instructions may be instructions of a first instruction set architecture and the post-translated instructions may be instructions of a second instruction set architecture.
The basic block is assumed to include the following instruction sequences:
XOR eax, eax// eax and eax are exclusive-ored, resulting in eax being discharged
ADD ebx, eax// ebx and eax are added to result in eax
The instruction sequence comprises two instructions. If the eax corresponds to a in the translation template and the ebx corresponds to B in the translation template, that is, if the instruction sequence is matched with the translation template shown in table 1, the instruction sequence can be translated as a whole according to the translation template shown in table 1, and the instruction sequence originally comprising two instructions is translated into one instruction "MOVE ebx, eax". The "XOR eax, eax" instruction is configured to perform an XOR operation on an operand in the register eax and the operand itself, where the result is 0, and store the result in the register eax, and the result stored in eax is 0. The "ADD ebx, eax" instruction is used to perform an addition operation on operands in registers ebx and eax, storing the resulting result in register eax. Since the result stored in the register eax is 0 after the "XOR eax, eax" instruction is executed, the result is stored in eax after ebx and eax are added, which is equivalent to overlaying the operand in ebx into eax, that is, to executing the instruction "MOVE ebx, eax". The translation template is utilized to translate the instruction sequence, so that the integral translation of the instruction sequence can be realized, the optimization of the instruction on the semantic level is realized in the translation process, and redundant instructions are reduced on the premise of keeping the semantics unchanged.
It should be understood that the foregoing translation templates and optimization methods are merely illustrative, and the embodiments of the present invention are not limited to the specific content and optimization methods of the translation templates.
In the binary translation process, the embodiment of the invention analyzes each instruction in the basic block to be translated to determine the instruction sequence to be optimized (or called the instruction fragment to be optimized), and can integrally translate a plurality of instructions (the instruction sequence to be optimized) with dependency relations by utilizing the translation template, thereby realizing translation according to semantics, further realizing the translation of multiple instructions to multiple instructions, achieving the purpose of reducing redundant instruction generation and improving the efficiency of the translated program.
Further, if the translation templates are simply matched according to the order of the instruction streams, the instruction sequences which can be optimized originally due to scheduling may be omitted. Instruction stream refers to a stream of instructions generated by sequential execution of instructions.
For example one, assume that the basic block includes the following instruction sequence:
MOV A,C
CMP A,B
Jcc LABEL
the instruction sequence includes three instructions, and the instructions have not yet been dispatched. If the translation templates are matched according to the order of the instruction streams at the moment, the matched translation templates, such as a CMP+JCC template, of the instruction sequence consisting of the second instruction and the third instruction can be identified. However, after instruction scheduling by the compiler, the instruction stream order of the above instruction sequence becomes:
CMP A,B
MOV A,C
Jcc LABEL
If the matching of translation templates is still performed in instruction stream order at this time, the "CMP+JCC templates" will not be matched due to the discontinuity between the CMP instructions and the JCC instructions, resulting in missing optimizable instruction sequences.
When determining the instruction sequence to be optimized, the embodiment of the invention is based on the dependency relationship among the instructions instead of the instruction flow sequence, so that the problems can be solved, and the condition that the instruction sequence which can be optimized originally caused by scheduling is not missed.
In the first example, the embodiment of the present invention constructs a dependency chain according to the dependency between the instructions in the basic block. That is, a dependency relationship between the Jcc instruction and the CMP instruction is analyzed, and matching of the translation templates is performed based on the dependency relationship, so that a matching "cmp+jcc template" can be identified. That is, the MOV instruction does not affect the matching result of the CMP+JCC template at any place, so that the recognition strength of the instruction sequence to be optimized can be increased, and the condition that the instruction sequence which can be optimized originally caused by scheduling is omitted is avoided.
In the binary translation process, the embodiment of the invention constructs the dependency relationship chain among the instructions by identifying the dependency relationship among the instructions, groups the instructions with the dependency relationship according to the constructed dependency relationship chain, performs semantic analysis on the instructions in the group, and finds out the instruction fragments to be optimized which can be replaced by using the translation templates with the same semantic. According to the embodiment of the invention, the dependency relationship among the instructions is identified, so that the generation of redundant instructions (semantics) in the binary translation process can be reduced, the running efficiency of a translated program can be improved, the identification strength of an instruction sequence to be optimized can be increased, and the instruction sequence which can be optimized originally caused by scheduling can not be omitted.
In an optional embodiment of the present invention, the building a dependency chain according to the dependency relationship between the instructions in the basic block may include:
step S11, scanning the instructions in the basic block according to the instruction stream sequence, and recording the use resources and the result storage resources of each instruction in the basic block;
step S12, if a first instruction and a second instruction exist in the basic block, determining that the first instruction and the second instruction have a dependency relationship if the use resource of the first instruction is the same as the result storage resource of the second instruction;
and step S13, adding the first instruction into a dependency chain of the second instruction.
The use resource of one instruction is the source operand of the instruction, and the result storage resource of one instruction is the target operand of the instruction.
Specifically, the optimizer is derived from the first instruction I of the basic block 0 Initially, the whole basic block is scanned according to the order of the instruction stream, and the resource information of the used resource S (such as a register, a memory and the like) of each instruction, the result storage resource D and the like is recorded. At the time of scanning each instruction I c At the time, from I 0 To I c-1 (I c The previous instruction of (a) result storage resource information D of all instruction records 0 To D c-1 In searching for this instruction I c Is to use resource S c Whether the same resource exists, i.e. whether p exists, such that D p =S c . If so, then instruction I is described c (first instruction) uses the preamble instruction I p Result store resource D of (second instruction) p Then the two instructions (I c And I p ) With a dependency relationship, the first instruction I c Recorded in the second instruction I p In a dependency chain of (1) to indicate instruction I c Dependent instruction I p
Example two, assume that the basic block includes the following instruction sequence:
XOR ebx, ebx// ebx and ebx are exclusive-ored, and the result is ebx
ADD ebx, ecx// ecx and ebx are added to give an result of ecx
MOV ebx, eax// copy ebx data to eax
The instruction sequence comprises three instructions. Upon scanning the third instruction (MOV eax, ebx), the preamble instruction records the following information: the use resource of the first instruction is ebx, and the result storage resource is ebx; the second instruction uses ebx and ecx resources, and the result storage resource is ecx. At this time, since the usage resource of the third instruction is ebx and is the same as the result deposit resource of the first instruction, the third instruction depends on the first instruction, and the third instruction is added to the dependency chain of the first instruction, and assuming that the dependency chain is 1- >3, the result deposit resource of the first instruction is used by the third instruction. Note that, all instructions that depend on the first instruction are recorded in the dependency chain of the first instruction.
In an alternative embodiment of the present invention, the method may further include: merging the dependency chains with the same head instruction and tail instruction in the dependency chains of the basic blocks.
In one example, it is assumed that the basic block includes the following instruction sequences therein:
ADD eax, ebx// eax and ebx are added to result in ebx
XOR eax, eax// eax and eax are exclusive-ored, resulting in eax being discharged
ADD ebx, eax// eax and ebx are added to result in eax
SUB eax, ecx// ecx and eax are subtracted to give the result ecx
Subtracting SUB edx, eax// eax and edx to obtain eax
The instruction sequence includes five instructions. The result storage resource of the first instruction is used by a third instruction, the third instruction is added into the dependency chain of the first instruction, and the dependency chain is assumed to be marked as 1-3; the result storage resource of the second instruction is used by a third instruction, the third instruction is added into the dependency chain of the second instruction, and the dependency chain is assumed to be marked as 2- >3; the result storage resource of the third instruction is used by a fourth instruction, the fourth instruction is added into a dependency chain of the third instruction, and the dependency chain is assumed to be marked as 3-4; the result deposit resource of the third instruction may be used by the fifth instruction to add the fifth instruction to the dependency chain of the third instruction, assuming that the dependency chain is marked as 3- >5. Thus, the following four dependency chains can be obtained: 1- >3, 2- >3, 3- >4 and 3- >5.
The head instruction of the dependency chain 3- >4 is the same as the tail instruction of the dependency chain 1- >3, and the head instruction and the tail instruction can be combined into the dependency chain 1- >3- >4. Likewise, the dependency chains 1- >3 and 3- >5 may be merged into the dependency chains 1- >3- >5, the dependency chains 2- >3 and 3- >4 may be merged into the dependency chains 2- >3- >4, and the dependency chains 2- >3 and 3- >5 may be merged into the dependency chains 2- >3- >5. The basic block can be finally obtained to comprise the following four dependency chains: 1- >3- >4, 1- >3- >5, 2- >3- >4 and 2- >3- >5.
Next, determining an instruction sequence to be optimized contained in the basic block based on the dependency chain in the basic block and the translation templates in the translation template library. The instruction sequence to be optimized belongs to the dependency chain, and the instruction sequence to be optimized is provided with a matched translation template.
In an optional embodiment of the present invention, the determining, based on the dependency chain and the translation templates in the translation template library, the instruction sequence to be optimized included in the basic block may include:
step S21, for each dependency chain in the basic block, matching each instruction sequence in the dependency chain with a translation template in a translation template library respectively to obtain a matching success record corresponding to the dependency chain, wherein each matching success record corresponds to one instruction sequence in the dependency chain and records a translation template successfully matched with the instruction sequence;
Step S22, determining an instruction sequence to be optimized contained in each dependency chain based on a matching success record corresponding to each dependency chain in the basic block;
step S23, based on the instruction sequence to be optimized contained in the dependency chain in the basic block, the instruction sequence to be optimized contained in the basic block is obtained.
For a basic block, the embodiment of the invention analyzes all dependency relationship chains in the basic block one by one to obtain an instruction sequence to be optimized contained in the basic block, wherein the instruction sequence to be optimized contained in the basic block may be one or two or more.
According to the embodiment of the invention, each instruction sequence in each dependency chain in the basic block is respectively matched with a translation template in a translation template library, so that a matching success record corresponding to each dependency chain is obtained.
Further, step S21 may include the steps of:
step S211, regarding a certain dependency chain of the basic block, from the first instruction I of the dependency chain 0 To the last instruction I e Respectively and sequentially select as head instructions I bn The method comprises the steps of carrying out a first treatment on the surface of the De-head instruction I bn Start last instruction I to the dependency chain e One by one selected as a tail instruction I tn
Step S212, for the Denovo instruction I bn To tail instruction I tn Is a sequence of instructions S bn-tn Matching with the translation templates in the translation template library, and if the matching is successful, storing a matching success record R bn-tn The method comprises the steps of carrying out a first treatment on the surface of the Wherein, a successful match records the information of an instruction sequence in the dependency chain and a translation template matched with the instruction sequence;for example, for a match success record R bn-tn Subscript bn-tn denotes slave I bn To I tn This instruction sequence, R bn-tn Representing slave I bn To I tn Information of the translation template matched with the instruction sequence, such as a template identifier;
and S213, after all instruction sequences of the dependency chain are matched, obtaining a matching success record corresponding to the dependency chain.
For example, all matching successful records corresponding to each dependency chain may be represented by a tuple, such as R b1-t1 ,…,R bx-tx ]Wherein each match success record corresponds to a match success instruction sequence.
Summarizing the instruction sequences to be optimized contained in each dependency chain in the basic block to obtain the instruction sequences to be optimized contained in the basic block.
In a specific implementation, there may be two cases of dependency chains of a basic block: first kind: the dependency chain of the basic block has a first dependency chain, and the first dependency chain refers to that no overlapping matching successful records exist in the matching successful records corresponding to the dependency chain. Second case: a second dependency chain exists in the dependency chain of the basic block, and the second dependency chain refers to that matching successful records which are overlapped with each other exist in the matching successful records corresponding to the dependency chain.
For the first dependency chain and the second dependency chain, the embodiments of the present invention may determine the instruction sequence to be optimized in different manners, for example, determine the instruction sequence to be optimized included in the first dependency chain in a first manner, and determine the instruction sequence to be optimized included in the second dependency chain in a second manner. In a specific implementation, the dependency chains of one basic block may include both the first dependency chain and the second dependency chain. For each first dependency chain, determining an instruction sequence to be optimized according to a first mode; and for each second dependency chain, determining the instruction sequence to be optimized according to a second mode.
In an optional embodiment of the present invention, the determining, based on the matching success record corresponding to each dependency chain in the basic block, an instruction sequence to be optimized included in each dependency chain may include: mode one: and for the dependency chain with no overlapping successful matching records, determining each successful matching instruction sequence in the dependency chain as the instruction sequence to be optimized of the dependency chain.
For dependency chains for which there is no overlapping matching success record (i.e. if the basic block has a first dependency chain), the instruction sequence to be optimized included in the first dependency chain may be determined according to the method described in the above manner. Example three, assume that the basic block includes the following instruction sequence:
XOR ebx, eax// ebx and eax are exclusive-ored, and eax is discharged as a result
XOR ebx, ebx// ebx and ebx are exclusive-ored, and the result is ebx
ADD ecx, ebx// ecx and ebx are added, and the result ebx is put
Subtracting SUB ecx, eax// ecx and eax to obtain eax
The instruction sequence contains 4 instructions. The result-holding resource of the first instruction (XOR ebx, eax) is used by a fourth instruction (SUB ecx, eax) which is added to the dependency chain of the first instruction, assuming that the dependency chain is denoted as 4->1, the dependency chain has matched translation templates, and the matching success is assumed to be recorded as R 1 . The result-holding resource of the second instruction (XOR ebx, ebx) is used by the third instruction (ADD ecx, ebx) which is added to the dependency chain of the second instruction, assuming that the dependency chain is 3->2, the dependency chain has matched translation templates, and the matching success is assumed to be recorded as R 2 . For dependency chain 4->1, its match success is recorded as R 1 There is no matching success record overlapping each other, i.e., dependency chain 4->1 is a first dependency chain, thus, dependency chain 4->1 comprises an instruction sequence to be optimized of R 1 Corresponding instruction sequences, i.e. first instruction and fourth instructionAn instruction sequence of instructions. Similarly, the dependency chain 3->2 comprises an instruction sequence to be optimized of R 2 The corresponding instruction sequence, namely the instruction sequence formed by the second instruction and the third instruction.
In an optional embodiment of the present invention, the determining, based on the matching success record corresponding to each dependency chain in the basic block, an instruction sequence to be optimized included in each dependency chain may include: mode two: and determining an instruction sequence with the largest optimizing gain of the translation template in the mutually overlapped successful matching records as an instruction sequence to be optimized of the dependency chain.
For dependency chains for which there are overlapping matching successful records (i.e. if the basic block has a second dependency chain), two records R are present in the array of records for this second dependency chain bx-tx And R is by-ty The condition tx is greater than or equal to by and ty is greater than or equal to bx. At this time, the instruction sequence to be optimized included in the second dependency chain may be determined according to the method described in the second mode. That is, the optimal benefits of the translation templates in each mutually overlapped successful match record are obtained, and the mutually overlapped successful match records are replaced by the successful match record B with the maximum optimal benefits bm-tm
Example four, assume that the basic block includes the following instruction sequence:
XOR eax, eax// eax and eax are exclusive-ored, resulting in eax being discharged
ADD ebx, eax// eax and ebx are added to result in eax
SUB eax, ecx// ecx and eax are subtracted to give the result ecx
The instruction sequence comprises three instructions. Wherein the second instruction depends on the first instruction, and a dependency chain 1->2; the third instruction depends on the second instruction, and a dependency chain 2->3, a step of; the two dependency chains can be combined into the following dependency chain 1->2->3. For the dependency chain, the first instruction (XOR eax, eax) is first selected as the head instruction, and the first instruction is selected from the head instructionThe second instruction (ADD ebx, eax) is selected from the last instruction (SUB eax, ecx) as the tail instruction, and an instruction sequence is obtained, such as S 1-2 . Then, the first instruction (XOR eax, eax) is selected as the head instruction and the third instruction (SUB eax, ecx) is selected as the tail instruction, resulting in an instruction sequence such as S 1-3 . Next, the second instruction (ADD ebx, eax) is selected as the head instruction and the third instruction (SUB eax, ecx) is selected as the tail instruction, resulting in an instruction sequence such as denoted S 2-3 . That is, the dependency chain contains three instruction sequences. It should be noted that, the embodiment of the present invention optimizes the instruction sequence, so that the case that the head instruction and the tail instruction are the same instruction (in this case, a single instruction) is not considered.
The three instruction sequences are respectively matched with translation templates in a translation template library, and a matching success record is saved, so as to obtain the matching success record corresponding to the dependency chain, for example, the matching success record is recorded as [ R ] 1-2 ,R 1-3 ,R 2-3 ]。
Since there are matching translation templates for each of the three instruction sequences, each of the three instruction sequences can be optimized. The three instruction sequences have overlapping parts, namely the dependency chain 1- >2- >3 is a second dependency chain, and the instruction sequence to be optimized can be determined according to a second mode, so that the instruction sequence to be optimized with the largest optimizing gain is selected as the instruction sequence to be optimized.
The optimization benefits may be pre-recorded in the translation templates, and the optimization benefits recorded in the translation templates may be read after the matched translation templates are obtained, that is, each translation template corresponds to a respective optimization benefit. The optimization benefits may be custom, i.e., may be determined empirically or experimentally. Illustratively, the optimal benefit of one translation template may be: cost of pre-translational instruction sequence-cost of post-translational instruction sequence. The cost of an instruction sequence may be determined according to the number of instructions contained in the instruction sequence (i.e., the length of the instruction sequence) and the type of instructions.
Illustratively, suppose the optimizations of the three translation templates of example fourThe conversion yields were 2, 3 and 2, respectively. Since the optimization gain of the second translation template is the greatest, the second translation template is selected (i.e., the second match success record R 1-3 ) Corresponding instruction sequence (S 1-3 ) As a sequence of instructions to be optimized. At this time, the matching success record corresponding to the dependency chain may be updated to [ R ] 1-3 ]。
It should be noted that, since there is overlap in all three matching success records included in the dependency chain shown in example four, the second instruction sequence S with the greatest benefit will be optimized 1-3 The instruction sequence to be optimized as the dependency chain. Of course, in an implementation, a dependency chain may include several matching success records that overlap each other and several matching success records that do not overlap each other. At this time, the instruction sequence to be optimized may be determined in the first mode for the plurality of matching successful records that do not overlap, and the instruction sequence to be optimized may be determined in the second mode for the plurality of matching successful records that overlap each other.
After the dependency chain analysis is completed, for the determined instruction sequence to be optimized, a specific translation function can be called for overall translation according to the matched translation template.
In an alternative embodiment of the present invention, the method may further include: marking the instruction sequence to be optimized to indicate a translation template matched with the instruction sequence to be optimized;
the translating the instruction sequence to be optimized based on the translation template corresponding to the instruction sequence to be optimized may include: scanning the marked instruction sequence to be optimized, and translating the marked instruction sequence to be optimized according to a marked translation template.
In the translation stage, the marked instruction sequences to be optimized can be scanned, and the marked instruction sequences to be optimized are replaced one by one with the instruction sequences given in the corresponding translation templates.
Taking example four as an example, the instruction sequence to be optimized is S 1-3 That is, the instruction sequence to be optimized is:
XOR eax, eax// eax and eax are exclusive-ored, resulting in eax being discharged
ADD ebx, eax// eax and ebx are added to result in eax
SUB eax, ecx// ecx and eax are subtracted to give the result ecx
The translation templates that match the instruction sequence to be optimized are shown in table 2.
TABLE 2
Translating the instruction sequence to be optimized in the fourth example according to the translation template shown in table 2, wherein the translated instruction sequence is as follows:
MOVE ebx,eax
SUB ebx,ebx,ecx
for a basic block, the binary translation method according to the embodiment of the present invention may include three parts, where the first part is to analyze the dependency relationship between instructions in the basic block and construct a dependency relationship chain; the second part is to analyze each dependency chain one by one, and determine and mark the instruction sequence to be optimized in the basic block; the third part is to translate the marked instruction sequence to be optimized as a whole and translate the unmarked instruction according to the original mode to obtain a translated instruction (i.e. an optimized instruction).
In an alternative embodiment of the present invention, the method may further include: assembling the optimized instruction sequence to obtain a binary code of a target platform; or, the optimized instruction sequence is assembled and then stored in a code cache so as to be called and operated by a translator.
The binary translation method provided by the embodiment of the invention can be applied to static translation or dynamic translation scenes. In the static translation scenario, the optimized instruction (i.e., the translated instruction) is assembled by an assembler to form binary program code of the corresponding target platform. In the dynamic translation scenario, the optimized instruction (i.e., the translated instruction) is assembled by the assembler and then stored in the code cache, waiting to be invoked by the translator for operation.
In summary, in the binary translation process, the binary translation method provided by the embodiment of the invention analyzes the dependency relationship of each instruction in the basic block to be translated, and identifies the instruction sequence to be optimized by constructing the dependency relationship chain among the instructions. The instruction sequence to be optimized is from an instruction sequence with a matched translation template in the dependency chain. Therefore, the translation template can be utilized to translate a plurality of instructions (instruction sequences to be optimized) with dependency relationships in an integral way instead of translating the instructions one by one, so that translation according to semantics is realized, multi-instruction to multi-instruction translation is realized, the purpose of reducing redundant instruction generation is achieved, and the efficiency of a program after translation can be improved. Further, the embodiment of the invention identifies the instruction sequence to be optimized by identifying the dependency relationship among the instructions, can also increase the identification strength of the instruction sequence to be optimized, and avoids the condition of missing the instruction sequence which can be optimized originally caused by scheduling.
It should be noted that, for simplicity of description, the method embodiments are shown as a series of acts, but it should be understood by those skilled in the art that the embodiments are not limited by the order of acts, as some steps may occur in other orders or concurrently in accordance with the embodiments. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred embodiments, and that the acts are not necessarily required by the embodiments of the invention.
Referring to FIG. 3, there is shown a block diagram of an embodiment of a binary translation apparatus of the present invention, the apparatus comprising:
the dependency analysis module 301 is configured to construct a dependency chain for a basic block to be translated according to a dependency relationship between instructions in the basic block; each of the dependency chains comprises at least two instructions having a dependency relationship;
an optimization determining module 302, configured to determine an instruction sequence to be optimized included in the basic block based on the dependency chain and a translation template in a translation template library; the instruction sequence to be optimized is from an instruction sequence with a matched translation template in the dependency chain;
And the optimizing and translating module 303 is configured to translate the instruction sequence to be optimized based on a translation template corresponding to the instruction sequence to be optimized, so as to obtain an optimized instruction sequence.
Optionally, the dependency analysis module includes:
the scanning analysis sub-module is used for scanning the instructions in the basic block according to the instruction stream sequence and recording the use resources and the result storage resources of each instruction in the basic block;
the dependency determination submodule is used for determining that the first instruction and the second instruction have a dependency relationship if the first instruction and the second instruction exist in the basic block, and the use resources of the first instruction are the same as the result storage resources of the second instruction;
and the relation adding sub-module is used for adding the first instruction into the dependency relation chain of the second instruction.
Optionally, the optimization determining module includes:
the matching record sub-module is used for matching each dependency chain in the basic block with each instruction sequence in the dependency chain respectively with the translation templates in the translation template library to obtain matching success records corresponding to the dependency chain, wherein each matching success record corresponds to one instruction sequence in the dependency chain and records the translation template successfully matched with the instruction sequence;
The first determining submodule is used for determining an instruction sequence to be optimized contained in each dependency chain based on a matching success record corresponding to each dependency chain in the basic block;
and the second determining submodule is used for acquiring the instruction sequence to be optimized contained in the basic block based on the instruction sequence to be optimized contained in the dependency chain in the basic block.
Optionally, the first determining submodule is specifically configured to:
and for the dependency chain with no overlapping successful matching records, determining each successful matching instruction sequence in the dependency chain as the instruction sequence to be optimized of the dependency chain.
Optionally, the first determining submodule is specifically configured to:
and determining an instruction sequence with the largest optimizing gain of the translation template in the mutually overlapped successful matching records as an instruction sequence to be optimized of the dependency chain.
Optionally, the apparatus further comprises:
the marking module is used for marking the instruction sequence to be optimized so as to indicate a translation template matched with the instruction sequence to be optimized;
the optimizing and translating module is specifically configured to scan the marked instruction sequence to be optimized, and translate the marked instruction sequence to be optimized according to the marked translating template.
Optionally, the device further comprises an assembling module, which is used for assembling the optimized instruction sequence to obtain the binary code of the target platform; or, the optimized instruction sequence is assembled and then stored in a code cache so as to be called and operated by a translator.
In the binary translation device provided by the embodiment of the invention, in the binary translation process, each instruction in the basic block to be translated is subjected to dependency analysis, and the instruction sequence to be optimized is identified by constructing a dependency chain among the instructions. The instruction sequence to be optimized is from an instruction sequence with a matched translation template in the dependency chain. Therefore, the translation template can be utilized to translate a plurality of instructions (instruction sequences to be optimized) with dependency relationships in an integral way instead of translating the instructions one by one, so that translation according to semantics is realized, multi-instruction to multi-instruction translation is realized, the purpose of reducing redundant instruction generation is achieved, and the efficiency of a program after translation can be improved. Further, the embodiment of the invention identifies the instruction sequence to be optimized by identifying the dependency relationship among the instructions, can also increase the identification strength of the instruction sequence to be optimized, and avoids the condition of missing the instruction sequence which can be optimized originally caused by scheduling.
For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points.
Referring to fig. 4, a schematic structural diagram of an electronic device according to an embodiment of the present invention is shown. As shown in fig. 4, the electronic device includes: the device comprises a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface complete communication with each other through the communication bus; the memory is configured to store at least one executable instruction that causes the processor to perform the steps of the binary translation method of the foregoing embodiment.
An embodiment of the present invention provides a non-transitory computer-readable storage medium, which when executed by a program or a processor of a terminal, enables the terminal to perform the steps of the binary translation method of the foregoing embodiment.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
It will be apparent to those skilled in the art that embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the invention may take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or terminal device comprising the element.
The principles and embodiments of the present invention have been described herein with reference to specific examples, the description of which is intended only to assist in understanding the methods of the present invention and the core ideas thereof; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.

Claims (14)

1. A binary translation method, the method comprising:
for a basic block to be translated, constructing a dependency chain according to the dependency relationship among instructions in the basic block; each of the dependency chains comprises at least two instructions having a dependency relationship;
determining an instruction sequence to be optimized contained in the basic block based on the dependency chain and a translation template in a translation template library; the instruction sequence to be optimized is from an instruction sequence with a matched translation template in the dependency chain;
translating the instruction sequence to be optimized based on a translation template corresponding to the instruction sequence to be optimized to obtain an optimized instruction sequence;
the determining the instruction sequence to be optimized contained in the basic block based on the dependency chain and the translation templates in the translation template library comprises the following steps:
Matching each instruction sequence in the dependency chain with a translation template in a translation template library respectively to obtain a matching success record corresponding to the dependency chain, wherein each matching success record corresponds to one instruction sequence in the dependency chain and records a translation template successfully matched with the instruction sequence;
determining an instruction sequence to be optimized contained in each dependency chain based on a matching success record corresponding to each dependency chain in the basic block;
acquiring an instruction sequence to be optimized contained in the basic block based on the instruction sequence to be optimized contained in the dependency chain in the basic block;
the matching success record corresponding to a certain dependency chain is obtained through the following steps:
for a certain dependency chain of the basic block, sequentially selecting a first instruction to a last instruction of the dependency chain as a head instruction respectively; and the last instruction from the beginning instruction to the dependency chain is selected as a tail instruction one by one;
matching an instruction sequence from the head instruction to the tail instruction with a translation template in a translation template library, and if the matching is successful, storing a matching success record;
And after all instruction sequences of the dependency chain are matched, obtaining a matching success record corresponding to the dependency chain.
2. The method according to claim 1, wherein the constructing a dependency chain according to the dependency relationship between the instructions in the basic block includes:
scanning instructions in the basic block according to the instruction stream sequence, and recording the use resources and the result storage resources of each instruction in the basic block;
if a first instruction and a second instruction exist in the basic block, determining that the first instruction and the second instruction have a dependency relationship, wherein the use resource of the first instruction is the same as the result storage resource of the second instruction;
adding the first instruction into a dependency chain of the second instruction.
3. The method according to claim 1, wherein the determining the instruction sequence to be optimized included in each dependency chain based on the matching success record corresponding to each dependency chain in the basic block includes:
and for the dependency chain with no overlapping successful matching records, determining each successful matching instruction sequence in the dependency chain as the instruction sequence to be optimized of the dependency chain.
4. The method according to claim 1, wherein the determining the instruction sequence to be optimized included in each dependency chain based on the matching success record corresponding to each dependency chain in the basic block includes:
and determining an instruction sequence with the largest optimizing gain of the translation template in the mutually overlapped successful matching records as an instruction sequence to be optimized of the dependency chain.
5. The method according to claim 1, wherein the method further comprises:
marking the instruction sequence to be optimized to indicate a translation template matched with the instruction sequence to be optimized;
the translating the instruction sequence to be optimized based on the translation template corresponding to the instruction sequence to be optimized comprises the following steps:
scanning the marked instruction sequence to be optimized, and translating the marked instruction sequence to be optimized according to a marked translation template.
6. The method according to claim 1, wherein the method further comprises:
assembling the optimized instruction sequence to obtain a binary code of a target platform; or,
And the optimized instruction sequence is assembled and then stored in a code cache so as to be called and operated by a translator.
7. A binary translation apparatus, the apparatus comprising:
the dependency analysis module is used for constructing a dependency chain for the basic block to be translated according to the dependency relationship among the instructions in the basic block; each of the dependency chains comprises at least two instructions having a dependency relationship;
the optimization determining module is used for determining an instruction sequence to be optimized contained in the basic block based on the dependency chain and translation templates in the translation template library; the instruction sequence to be optimized is from an instruction sequence with a matched translation template in the dependency chain;
the optimizing translation module is used for translating the instruction sequence to be optimized based on a translation template corresponding to the instruction sequence to be optimized to obtain an optimized instruction sequence;
the optimization determination module comprises:
the matching record sub-module is used for matching each dependency chain in the basic block with each instruction sequence in the dependency chain respectively with the translation templates in the translation template library to obtain matching success records corresponding to the dependency chain, wherein each matching success record corresponds to one instruction sequence in the dependency chain and records the translation template successfully matched with the instruction sequence;
The first determining submodule is used for determining an instruction sequence to be optimized contained in each dependency chain based on a matching success record corresponding to each dependency chain in the basic block;
the second determining submodule is used for acquiring the instruction sequence to be optimized contained in the basic block based on the instruction sequence to be optimized contained in the dependency chain in the basic block;
the matching record submodule is specifically configured to:
for a certain dependency chain of the basic block, sequentially selecting a first instruction to a last instruction of the dependency chain as a head instruction respectively; and the last instruction from the beginning instruction to the dependency chain is selected as a tail instruction one by one;
matching an instruction sequence from the head instruction to the tail instruction with a translation template in a translation template library, and if the matching is successful, storing a matching success record;
and after all instruction sequences of the dependency chain are matched, obtaining a matching success record corresponding to the dependency chain.
8. The apparatus of claim 7, wherein the dependency analysis module comprises:
the scanning analysis sub-module is used for scanning the instructions in the basic block according to the instruction stream sequence and recording the use resources and the result storage resources of each instruction in the basic block;
The dependency determination submodule is used for determining that the first instruction and the second instruction have a dependency relationship if the first instruction and the second instruction exist in the basic block, and the use resources of the first instruction are the same as the result storage resources of the second instruction;
and the relation adding sub-module is used for adding the first instruction into the dependency relation chain of the second instruction.
9. The apparatus of claim 7, wherein the first determination submodule is configured to:
and for the dependency chain with no overlapping successful matching records, determining each successful matching instruction sequence in the dependency chain as the instruction sequence to be optimized of the dependency chain.
10. The apparatus of claim 7, wherein the first determination submodule is configured to:
and determining an instruction sequence with the largest optimizing gain of the translation template in the mutually overlapped successful matching records as an instruction sequence to be optimized of the dependency chain.
11. The apparatus of claim 7, wherein the apparatus further comprises:
the marking module is used for marking the instruction sequence to be optimized so as to indicate a translation template matched with the instruction sequence to be optimized;
The optimizing and translating module is specifically configured to scan the marked instruction sequence to be optimized, and translate the marked instruction sequence to be optimized according to the marked translating template.
12. The apparatus of claim 7, further comprising an assembly module for assembling the optimized instruction sequence to obtain a binary code for a target platform; or, the optimized instruction sequence is assembled and then stored in a code cache so as to be called and operated by a translator.
13. An electronic device, comprising: the device comprises a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface complete communication with each other through the communication bus; the memory is configured to store at least one executable instruction that causes the processor to perform the steps of the binary translation method according to any one of claims 1 to 6.
14. A readable storage medium, characterized in that the readable storage medium has stored thereon a program or instructions which, when executed by a processor, implement the steps of the binary translation method according to any of claims 1 to 6.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101907999A (en) * 2010-07-19 2010-12-08 中国科学技术大学 Binary translation method of super-long instruction word program
CN108197027A (en) * 2017-12-29 2018-06-22 广州景派科技有限公司 Software performance optimization method, can storage medium, computer, computer program
CN110874259A (en) * 2018-08-31 2020-03-10 龙芯中科技术有限公司 Program execution method, device, equipment and storage medium
CN114610325A (en) * 2022-02-24 2022-06-10 复旦大学 Full-system dynamic binary translation method based on translation rules
CN115769188A (en) * 2020-06-22 2023-03-07 苹果公司 System and method for performing binary translation

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7594221B2 (en) * 2004-04-20 2009-09-22 Hewlett-Packard Development Company, L.P. Method and apparatus for translating binary code

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101907999A (en) * 2010-07-19 2010-12-08 中国科学技术大学 Binary translation method of super-long instruction word program
CN108197027A (en) * 2017-12-29 2018-06-22 广州景派科技有限公司 Software performance optimization method, can storage medium, computer, computer program
CN110874259A (en) * 2018-08-31 2020-03-10 龙芯中科技术有限公司 Program execution method, device, equipment and storage medium
CN115769188A (en) * 2020-06-22 2023-03-07 苹果公司 System and method for performing binary translation
CN114610325A (en) * 2022-02-24 2022-06-10 复旦大学 Full-system dynamic binary translation method based on translation rules

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