CN116609564A - Receiver detection system and receiver detection device - Google Patents
Receiver detection system and receiver detection device Download PDFInfo
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- CN116609564A CN116609564A CN202210118011.4A CN202210118011A CN116609564A CN 116609564 A CN116609564 A CN 116609564A CN 202210118011 A CN202210118011 A CN 202210118011A CN 116609564 A CN116609564 A CN 116609564A
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- 238000001514 detection method Methods 0.000 title claims abstract description 91
- 238000000034 method Methods 0.000 claims abstract description 13
- 238000007689 inspection Methods 0.000 claims description 11
- 238000011084 recovery Methods 0.000 claims description 4
- 230000002093 peripheral effect Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
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- Dc Digital Transmission (AREA)
Abstract
A receiver detection device and a receiver detection system comprise a medium access control circuit, a common mode voltage detector and a receiver detector. The common-mode voltage detector is used for detecting whether a common-mode voltage meets a voltage condition or not and sending a preparation completion signal to the receiver detector after the common-mode voltage meets the voltage condition. The receiver detector is used for starting a detection procedure according to the preparation completion signal and a detection start signal of the media access control circuit. In the detection procedure, the receiver detector sends a detection signal for judging whether a receiver exists or not, and then outputs a detection result to the media access control circuit, wherein the detection result indicates whether the receiver exists or not. The receiver detection system can avoid the receiver detector starting the detection process before the common mode voltage satisfies the voltage condition.
Description
Technical Field
The present invention relates to a detection system and apparatus, and more particularly, to a detection system and apparatus capable of detecting the presence of a receiver.
Background
According to the PCI express protocol (Peripheral Component Interconnect Express; PCIe) or universal serial bus (Universal Serial Bus; USB) protocol, when a transmitter is not active, the transmitter enters a suspend state to save power, at which the common mode voltage of the transmitter (i.e., the sum of a pair of differential output signals of the transmitter) drops to zero volts (0V); when the transmitter is awakened, the transmitter enters a recovery state (resume state) from the rest state, and the common-mode voltage of the transmitter gradually climbs from 0V toAfter the common mode voltage begins to ramp up, the transmitter sends a detection signal to determine whether a receiver is present.
Practically, the common-mode voltage climbs from 0V toThe ramp-up time of (a) is affected by the impedance (e.g., resistance and capacitance) on an external printed circuit board and the length of a transmission line. Depending on the impedance and length, the ramp time may be tens of nanoseconds to milliseconds, with the difference between the minimum ramp time and the maximum ramp time being substantial. If the common mode voltage is risen to +>Before, the transmitter transmits the detection signal, and the transmitter may obtain an erroneous detection result.
In response to the uncertain ramp-up time, the prior art has the medium access control (media access control; MAC) circuit of the transmitter to delay the time for the transmitter to send the detection signal as much as possible so that the common mode voltage has enough time to ramp up toHowever, if the mac circuit delays the time for the transmitter to send the detection signal uniformly, this causes the time for the transmitter to enter the recovery state from the rest state to increase uniformly, thereby causing the performance of the transmitter to decrease.
Disclosure of Invention
It is an object of the present disclosure to provide a receiver detection system and a receiver detection apparatus, which avoid the aforementioned problems of the prior art.
One embodiment of a receiver detection system of the present disclosure includes a medium access control circuit, a common mode voltage detector, and a receiver detector. The common-mode voltage detector is used for detecting whether a common-mode voltage meets a voltage condition or not and sending a preparation completion signal to the receiver detector after the common-mode voltage meets the voltage condition. The receiver detector is used for starting a detection procedure according to the preparation completion signal and a detection start signal of the media access control circuit. In the detection procedure, the receiver detector sends a detection signal for judging whether a receiver exists or not, and then outputs a detection result to the media access control circuit, wherein the detection result indicates whether the receiver exists or not.
In the above embodiment, the voltage condition includes: the common mode voltage is not less than 70% of a standard common mode voltage; and the common mode voltage is not greater than 130% of the standard common mode voltage, wherein the standard common mode voltage is 50% of a supply voltage.
An embodiment of a receiver detection apparatus of the present disclosure includes the aforementioned common mode voltage detector and receiver detector.
The features, operations and technical effects of the present invention will be described in detail below with reference to preferred embodiments of the present invention in conjunction with the accompanying drawings.
Drawings
FIG. 1 shows an embodiment of a receiver detection system of the present disclosure; and
fig. 2 shows an embodiment of a receiver detection apparatus of the present disclosure.
Symbol description
100: receiver detection system
110: medium access control circuit
120: common-mode voltage detector
130: receiver detector
Rcv_detect: detection start signal
VCM_READY: preparation completion signal
Det_signal: detecting a signal
RXDDET: detection result
EnDDET: end of detection signal
200: receiver detection device
210: common-mode voltage detector
220: receiver detector
Detailed Description
The present specification discloses a receiver detection system and a receiver detection apparatus. The system and apparatus can avoid a receiver detector from prematurely starting to detect whether a receiver is present, thereby avoiding false detection results.
Fig. 1 shows an embodiment of a receiver detection system of the present disclosure. The receiver detection system 100 of FIG. 1 includes a medium access control (media access control; MAC) circuit 110, a common mode voltage detector 120, and a receiver detector 130.
Please refer to fig. 1. The mac circuit 110 is configured to transmit a detection start signal (rcv_detect) to the receiver detector 130. In one implementation, the receiver inspection system 100 is applied to a transmitter (not shown) that conforms to the PCI express (Peripheral Component Interconnect Express; PCIe) protocol or the universal serial bus (Universal Serial Bus; USB) protocol. When the transmitter enters a resume state (resume state) from a suspend state, the mac circuit 110 issues the detection start signal accordingly. It is noted that the receiver detection system 100 may be applied to devices that conform to other protocols, as may be practical.
Please refer to fig. 1. The common-mode voltage detector 120 is configured to detect whether a common-mode voltage satisfies a voltage condition, and send a READY signal (vcm_ready) to the receiver detector 130 after the common-mode voltage satisfies the voltage condition. In one implementation, the common mode voltage detector 120 comprises a known/self-developed comparator; the comparator is used for comparing the common-mode voltage with at least one voltage threshold, so that the common-mode voltage detector 120 determines whether the common-mode voltage satisfies the voltage condition. In one implementation, the common mode voltage detector 120 comprises a conventional/self-developed analog-to-digital converter; the analog-to-digital converter is used for converting the common-mode voltage into a digital value, so that the common-mode voltage detector 120 can know the magnitude of the common-mode voltage according to the digital value, and determine whether the common-mode voltage meets the voltage condition.
As mentioned above, in one implementation, the voltage condition includes "the common mode voltage reaches a standard common mode voltage". In one example, the voltage condition includes "the common mode voltage is not less than 70% of a standard common mode voltage". In one implementation example, the voltage condition includes "the common mode voltage is not greater than 130% of the standard common mode voltage". In one implementation, the standard common mode voltage is 50% of a supply Voltage (VDD). In one implementation, the standard common mode voltage is the sum of a pair of differential output signals (e.g., high speed output positive signal (HSOP) and high speed output negative signal (HSON) compliant with PCIe/USB protocol) of the transmitter. It is noted that the voltage conditions and standard common mode voltage may be dependent on implementation requirements. It is further noted that the medium access control circuit 110 sends the detection start signal at a first time point, and the common mode voltage detector 120 detects that the common mode voltage satisfies the voltage condition at a second time point, the first time point is usually earlier than the second time point.
Please refer to fig. 1. The receiver detector 130 is used to start a detection process according to the detection start signal (rcv_detect) and the READY signal (vcm_ready). In the detection procedure, the receiver detector 130 sends a detection SIGNAL (det_signal) for determining whether a receiver exists, and outputs a detection Result (RXDET) to the mac circuit 110 according to the detection SIGNAL, wherein the detection result indicates whether the receiver exists. For example, when the receiver is present, the detection result is a voltage of a first level (e.g., high level), and when the receiver is not present, the detection result is a voltage of a second level (e.g., low level). It should be noted that the receiver detector 130 itself may be used to determine whether a receiver is present, or a device (e.g., the transmitter) including the receiver detector 130 may be used to determine whether a receiver is present, and then report a determination result to the receiver detector 130. Since the present invention focuses on when to start the detection procedure rather than how to determine whether a receiver is present, the technical details of determining whether a receiver is present are omitted here.
As mentioned above, in one implementation example, the detection process conforms to the PCIe/USB protocol; however, this is not a limitation of the practice of the present invention. In one implementation example, the receiver detector 130 is used to determine whether a receiver exists, and the detection signal is a pulse signal (pulse signal); an intermediate voltage of the signal range of the pulse signal is substantially equal to the common mode voltage. In one implementation example, the detection signal is a notification signal; the notification signal is used to request that the device including the receiver detector 130 determine whether a receiver is present. In one implementation, the receiver detector 130 is further configured to send an end of detection signal (endset) to the mac circuit 130 at the end of the detection sequence; however, this is not a limitation of the practice of the present invention.
Fig. 2 shows an embodiment of a receiver detection apparatus of the present disclosure. The receiver detection apparatus 200 of fig. 2 includes a common mode voltage detector 210 and a receiver detector 220. One embodiment of the common mode voltage detector 210 is the common mode voltage detector 120 of fig. 1. One embodiment of the receiver detector 220 is the receiver detector 130 of fig. 1. The detection start signal (rcv_detect) is sent by the mac circuit 110 of fig. 1 or its equivalent. Since those skilled in the art can refer to the embodiment of fig. 1 to understand details and variations of the receiver detection apparatus 200, duplicate and redundant descriptions are omitted herein.
It should be noted that, where implementation is possible, a person skilled in the art may selectively implement some or all of the technical features of any of the foregoing embodiments, or selectively implement a combination of some or all of the technical features of the foregoing embodiments, so as to implement flexibility in implementing the present invention.
In summary, the receiver detection system and apparatus of the present disclosure can avoid a receiver detector from prematurely starting to detect whether a receiver is present, thereby avoiding erroneous detection results.
Although the embodiments of the present invention have been described above, the present invention is not limited thereto, and those skilled in the art can apply the present invention with respect to the technical features of the present invention according to the explicit or implicit disclosure, and all such variations are possible within the scope of the present invention, that is, the scope of the present invention is defined by the claims of the present specification.
Claims (10)
1. A receiver detection system comprising a medium access control circuit, a common mode voltage detector, and a receiver detector, wherein:
the common-mode voltage detector is used for detecting whether a common-mode voltage meets a voltage condition or not and sending a preparation completion signal to the receiver detector after the common-mode voltage meets the voltage condition;
the receiver detector is used for starting a detection procedure according to the preparation completion signal and a detection start signal of the media access control circuit; and
in the detection procedure, the receiver detector sends a detection signal for judging whether a receiver exists or not, and then outputs a detection result to the media access control circuit, wherein the detection result indicates whether the receiver exists or not.
2. The receiver inspection system of claim 1, wherein the receiver inspection device is further configured to send an inspection end signal to the media access control circuit at the end of the inspection sequence.
3. The receiver detection system of claim 1, wherein the voltage condition comprises: the common mode voltage is not less than 70% of a standard common mode voltage.
4. The receiver detection system of claim 1, wherein the medium access control circuit issues the detection start signal at a first time point, the common mode voltage detector detects that the common mode voltage satisfies the voltage condition at a second time point, the first time point being earlier than the second time point.
5. The receiver detection system of claim 1, wherein the receiver detection system is applied to a transmitter; when the transmitter enters a recovery state from a rest state, the medium access control circuit sends out the detection start signal.
6. A receiver detection device comprising a common mode voltage detector and a receiver detector, wherein:
the common-mode voltage detector is used for detecting whether a common-mode voltage meets a voltage condition or not and sending a preparation completion signal to the receiver detector after the common-mode voltage meets the voltage condition;
the receiver detector is used for starting a detection procedure according to the preparation completion signal and a detection start signal of a media access control circuit; and
in the detection procedure, the receiver detector sends a detection signal for judging whether a receiver exists or not, and then outputs a detection result to the media access control circuit, wherein the detection result indicates whether the receiver exists or not.
7. The receiver inspection device of claim 6, wherein the receiver inspection device is further configured to send an inspection end signal to the media access control circuit at the end of the inspection sequence.
8. The receiver detection apparatus of claim 6, wherein the voltage condition comprises: the common mode voltage is not less than 70% of a standard common mode voltage.
9. The receiver detecting apparatus according to claim 6, wherein the common-mode voltage detector receives the detection start signal at a first time point, the common-mode voltage detector detects that the common-mode voltage satisfies the voltage condition at a second time point, the first time point being earlier than the second time point.
10. The receiver inspection device of claim 6, wherein the receiver inspection system is applied to a transmitter; when the transmitter enters a recovery state from a rest state, the common mode voltage detector receives the detection start signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210118011.4A CN116609564A (en) | 2022-02-08 | 2022-02-08 | Receiver detection system and receiver detection device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210118011.4A CN116609564A (en) | 2022-02-08 | 2022-02-08 | Receiver detection system and receiver detection device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116609564A true CN116609564A (en) | 2023-08-18 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210118011.4A Pending CN116609564A (en) | 2022-02-08 | 2022-02-08 | Receiver detection system and receiver detection device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116609564A (en) |
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2022
- 2022-02-08 CN CN202210118011.4A patent/CN116609564A/en active Pending
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