CN116582396A - Synchronization signal (sync mark) detection using frequency-doubled sinusoidal (MFS) signal-based filtering - Google Patents

Synchronization signal (sync mark) detection using frequency-doubled sinusoidal (MFS) signal-based filtering Download PDF

Info

Publication number
CN116582396A
CN116582396A CN202310084150.4A CN202310084150A CN116582396A CN 116582396 A CN116582396 A CN 116582396A CN 202310084150 A CN202310084150 A CN 202310084150A CN 116582396 A CN116582396 A CN 116582396A
Authority
CN
China
Prior art keywords
mfs
data signal
signal
data
mark
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310084150.4A
Other languages
Chinese (zh)
Inventor
J·戈兰德威格
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Avago Technologies International Sales Pte Ltd
Original Assignee
Avago Technologies General IP Singapore Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US17/728,470 external-priority patent/US11784785B2/en
Application filed by Avago Technologies General IP Singapore Pte Ltd filed Critical Avago Technologies General IP Singapore Pte Ltd
Publication of CN116582396A publication Critical patent/CN116582396A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/0014Carrier regulation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202Channel estimation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/0014Carrier regulation
    • H04L2027/0024Carrier regulation at the receiver end
    • H04L2027/0026Correction of carrier offset
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/0014Carrier regulation
    • H04L2027/0083Signalling arrangements
    • H04L2027/0089In-band signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

Novel tools and techniques are provided for implementing synchronization signal ("sync mark") detection using filtering based on a frequency doubled sinusoidal "MFS" signal. In various embodiments, a computing system may detect a position of a syncmark within a data signal by using filtering based on an MFS signal and a sliding window comprising consecutive search windows each having a bit length corresponding to a bit length of the syncmark to identify a portion of the data signal having a magnitude indicative of the syncmark. The computing system may refine the location of the synchronization mark within the data signal by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark to identify a sub-portion of the identified portion of the data signal having a phase indicative of the synchronization mark, the phase measurement being performed based on the MFS signal-based filtering.

Description

Synchronization signal (sync mark) detection using frequency-doubled sinusoidal (MFS) signal-based filtering
Cross reference to related applications
The present application claims priority to U.S. patent application No. 63/308,941 (the' 941 application) entitled "detection of synchronization signals (syncmark) using frequency-doubled sinusoidal (MFS) Signal-Based Filtering" by Jeffrey Grundvig (attorney docket No. 220008US 01) at 2022, month 2, day 10, the disclosure of which is incorporated herein by reference in its entirety for all purposes.
Copyright statement
A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the patent and trademark office patent file or records, but otherwise reserves all copyright rights whatsoever.
Technical Field
The present disclosure relates generally to methods, systems, and apparatus for implementing optimized communication systems, and more particularly to methods, systems, and apparatus for implementing synchronization signal ("sync mark") detection using filtering based on frequency multiplied or multi-frequency sinusoidal ("MFS") signals.
Background
Synchronization signals or synchronization markers are typically used in communication systems to allow the data detection system to know the starting location of the data and thus the time at which to begin recovering the data. In addition to the sync mark (which may be a bit pattern), the preamble field, which may be a single frequency periodic pattern or other pattern that may be used to measure the phase of the incoming signal in order to set or correct the sampling phase for both sync mark detection and data recovery, typically precedes the sync mark.
For example, in the case of a hard disk drive ("HDD"), the sync mark and preamble fields may be used for fields such as user data fields and servo ("servo") fields. However, conventional HDDs currently use a fairly long preamble (typically up to 100 or more bits) followed by a sync mark for both the user data and the servo fields.
Thus, there is a need for more robust and scalable solutions for implementing optimized communication systems, and more particularly, for methods, systems, and apparatus for implementing synchronization signal ("sync mark") detection using filtering based on frequency multiplied or multi-frequency sinusoidal ("MFS") signals.
Disclosure of Invention
The technology of the present disclosure relates generally to tools and techniques for implementing optimized communication systems, and more particularly, to methods, systems, and apparatus for implementing synchronization signal ("sync mark") detection using filtering based on frequency multiplied or multi-frequency sinusoidal ("MFS") signals.
In one aspect, a method for performing synchronization signal ("sync mark") detection is provided. The method comprises the following steps: detecting, using a computing system, a position of a synchronization signal ("sync mark") within a data signal by using filtering based on a multi-frequency sinusoidal ("MFS") signal and a sliding window comprising successive search windows, each having a bit length corresponding to a bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the sync mark; and refining, using the computing system, the location of the synchronization mark within the data signal by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark to identify a sub-portion of the identified portion of the data signal having a phase indicative of the synchronization mark, the phase measurement performed based on the MFS signal-based filtering.
In some embodiments, the computing system comprises at least one of a data signal detection processor, a digital signal processor, a data retrieval processor, a processor of a mobile device, a processor of a user device, a server computer, a cloud-based computing system or distributed computing system over a network, and/or the like. In some examples, the data signal may be used within a hard disk drive or other hardware, wherein the sync mark is among a plurality of sync marks disposed within the data signal, wherein the data signal includes at least one data field and a servo ("servo") field, each field being preceded by a sync mark among the plurality of sync marks. Alternatively, the data signal may be included in a signal transmitted over one of a wireless medium or a wired medium.
According to some embodiments, using the sliding window comprises: measuring a magnitude of a portion of the data signal within a search window; and continuously moving the sliding window along the data signal for one sample to form another search window and measuring a magnitude of a portion of the data signal within the other search window.
In some embodiments, detecting the position of the syncmark includes multiplying an MFS sine coefficient of the syncmark and an MFS cosine coefficient of the syncmark with the portion of the data signal within each successive search window of the sliding window to generate a data signal filtered by an MFS sine coefficient and a data signal filtered by an MFS cosine coefficient, respectively, for each search window.
In some examples, the MFS sine coefficient of the sync mark is generated by: dividing the sync mark into a plurality of positive bit patterns each corresponding to a consecutive binary one in the sync mark and a plurality of negative bit patterns each corresponding to a consecutive binary zero in the sync mark, the plurality of positive bit patterns alternating with the plurality of negative bit patterns; generating for each of the plurality of positive bit patterns a positive sine half cycle having a number of periods corresponding to consecutive binary ones; generating for each of the plurality of negative bit patterns a negative sinusoidal half cycle having a number of periods corresponding to consecutive binary ones; and concatenating positive and negative sinusoidal half-cycles together in the same alternating order as the corresponding binary ones and zeros in the sync mark to generate the MFS sinusoidal coefficients of the sync mark.
In some cases, the magnitude of the portion of the data signal within each search window is calculated by squaring a sum of the data signals filtered by MFS sine coefficients and squaring a sum of the data signals filtered by MFS cosine coefficients, and calculating a square root of a sum of the squares of the data signals filtered by MFS sine coefficients and a sum of the squares of the data signals filtered by MFS cosine coefficients. In some examples, identifying the portion of the data signal having the magnitude indicative of the synchronization mark includes identifying a portion of the data signal having at least one of a maximum magnitude or a magnitude exceeding a predetermined threshold magnitude.
In some embodiments, identifying the portion of the data signal having the magnitude indicative of the syncmark comprises identifying a portion of the data signal having a maximum in-band to out-of-band energy ratio or having a maximum in-band to total signal energy ratio, wherein the in-band energy is calculated by squaring the magnitude of the portion of the data signal, wherein the total signal energy is calculated by summing squares of all samples of the data signal within a search window, and wherein the out-of-band energy is calculated by subtracting the in-band energy from the total signal energy.
According to some embodiments, the phase of the portion of the data signal within each search window is calculated by dividing the sum of the data signals filtered by MFS sine coefficients by the arctangent of the sum of the data signals filtered by MFS cosine coefficients.
Merely as an example, in some cases the method may further comprise determining, using the computing system, a frequency offset between a frequency of the data signal and an internal clock frequency of an internal clock of the computing system based on MFS sine coefficients and MFS cosine coefficients. In some examples, the method may further include adjusting, using the computing system, the internal clock frequency to match the frequency of the data signal based on the determined frequency offset. In some cases, determining the frequency offset may include: measuring a phase of a first portion of the syncmark by generating MFS sine coefficients and MFS cosine coefficients of the first portion of the syncmark and taking an arctangent of a sum of the first portion of the syncmark filtered by MFS sine coefficients divided by a sum of the first portion of the syncmark filtered by MFS cosine coefficients; measuring a phase of a second portion of the syncmark by generating MFS sine and MFS cosine coefficients of the second portion of the syncmark and taking an arctangent of a sum of the second portion of the syncmark filtered by MFS sine coefficients divided by a sum of the second portion of the syncmark filtered by MFS cosine coefficients; calculating a phase difference between the measured phases of the first and second portions of the synchronizing mark; and dividing the calculated phase difference by a number of bits between midpoints of the first and second portions of the sync mark.
In some embodiments, the method may further include determining, using the computing system, whether a polarity of the data signal has been reversed based on the phase of the identified portion of the data signal having the magnitude indicative of the synchronization mark.
In some cases, the synchronization mark replaces a combination of a single frequency synchronization signal and a preamble. In some examples, the bit length of the synchronization mark is less than a total bit length of the combination of the single frequency synchronization signal and the preamble. Alternatively, the bit length of the synchronization mark is the same as a total bit length of the combination of the single frequency synchronization signal and the preamble. Alternatively, the bit length of the synchronization mark is greater than a total bit length of the combination of the single frequency synchronization signal and the preamble.
According to some embodiments, the method may further comprise: identifying, using the computing system, a start point of a data field within the data signal based on the refined position of the synchronization mark within the data signal; and in response to identifying the origin of the data field, performing, using the computing system, retrieving data from the data field.
In another aspect, an apparatus for implementing synchronization signal ("sync mark") detection using frequency-doubled sinusoidal signal-based filtering is provided. The apparatus comprises: at least one processor; and a non-transitory computer readable medium communicatively coupled to the at least one processor. The non-transitory computer-readable medium has stored thereon computer software comprising a set of instructions that, when executed by the at least one processor, cause the apparatus to: detecting a position of a synchronization signal ("sync mark") within a data signal by using filtering based on a multi-frequency sinusoidal ("MFS") signal and a sliding window including successive search windows each having a bit length corresponding to a bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the sync mark; and refining the position of the synchronization mark within the data signal by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark to identify a sub-portion of the identified portion of the data signal having a phase indicative of the synchronization mark, the phase measurement being performed based on the MFS signal-based filtering.
In some embodiments, the computing system comprises at least one of a data signal detection processor, a digital signal processor, a data retrieval processor, a processor of a mobile device, a processor of a user device, a server computer, a cloud-based computing system or distributed computing system over a network, and/or the like. In some examples, the data signal is included in a hard disk drive, wherein the sync mark is among a plurality of sync marks disposed within the data signal, wherein the data signal includes at least one data field and a servo ("servo") field, each field being preceded by a sync mark among the plurality of sync marks. Alternatively, the data signal is included in a signal transmitted over one of a wireless medium or a wired medium.
According to some embodiments, detecting the position of the sync mark comprises multiplying an MFS sine coefficient of the sync mark and an MFS cosine coefficient of the sync mark with the portion of the data signal within each successive search window of the sliding window to generate a data signal filtered by an MFS sine coefficient and a data signal filtered by an MFS cosine coefficient, respectively, for each search window.
In some examples, the magnitude of the portion of the data signal within each search window is calculated by squaring a sum of the data signals filtered by MFS sine coefficients and squaring a sum of the data signals filtered by MFS cosine coefficients, and calculating a square root of a sum of the squares of the data signals filtered by MFS sine coefficients and a sum of the squares of the data signals filtered by MFS cosine coefficients.
Alternatively, identifying the portion of the data signal having the magnitude indicative of the syncmark includes identifying a portion of the data signal having a maximum in-band to out-of-band energy ratio or having a maximum in-band to total signal energy ratio, wherein the in-band energy is calculated by squaring the magnitude of the portion of the data signal, wherein the total signal energy is calculated by summing squares of all samples of the data signal within a search window, and wherein the out-of-band energy is calculated by subtracting the in-band energy from the total signal energy.
In some embodiments, the phase of the portion of the data signal within each search window is calculated by dividing the sum of the data signals filtered by MFS sine coefficients by the arctangent of the sum of the data signals filtered by MFS cosine coefficients.
In yet another aspect, a computing system is provided that includes logic that, when executed, is configured to: detecting the position of a synchronization signal ("sync mark") within a data signal by using multi-frequency sine ("MFS") signal-based filtering and a sliding window comprising successive search windows each having a bit length corresponding to the bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the sync mark, the MFC filtering comprising multiplying MFS sine coefficients of the sync mark and MFS cosine coefficients of the sync mark with the portion of the data signal within each successive search window of the sliding window to generate a data signal filtered by MFS sine coefficients and a data signal filtered by MFS cosine coefficients, respectively, for each search window; and refining the position of the synchronization mark within the data signal by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark to identify a sub-portion of the identified portion of the data signal having a phase indicative of the synchronization mark, the phase measurement calculated by taking an arctangent of a sum of the data signals filtered by MFS sine coefficients divided by a sum of the data signals filtered by MFS cosine coefficients.
Various modifications and additions may be made to the discussed embodiments without departing from the scope of the invention. For example, although the embodiments described above refer to particular features, the scope of the invention also includes embodiments having different combinations of features and embodiments that do not include all of the features described above.
The details of one or more aspects of the disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the technology described in this disclosure will be apparent from the description and drawings, and from the claims.
Drawings
A further understanding of the nature and advantages of the specific embodiments may be realized by reference to the remaining portions of the specification and the drawings wherein like reference numerals are used to refer to similar components. In some examples, a sub-label is associated with an element number to designate one of a plurality of similar components. When reference is made to an element symbol without specifying an existing sub-label, it is intended to refer to all such multiple similar components.
FIG. 1 is a schematic diagram illustrating a system for implementing synchronization signal ("sync mark") detection using frequency multiplied or multi-frequency sinusoidal ("MFS") signal-based filtering, in accordance with various embodiments.
Fig. 2A and 2B are diagrams illustrating examples of a sync mark detection method using single frequency signal-based filtering and a preamble.
Fig. 3A-3E are diagrams illustrating various non-limiting examples of sync mark detection using MFS signal-based filtering, according to various embodiments.
Fig. 4 is a flow chart illustrating a method for implementing sync mark detection using MFS signal-based filtering, in accordance with various embodiments.
Fig. 5 is a block diagram illustrating an example of a computer or system hardware architecture in accordance with various embodiments.
Detailed Description
Overview of the invention
Various embodiments provide tools and techniques for implementing an optimized communication system, and more particularly, methods, systems, and apparatus for implementing synchronization signal ("sync mark") detection using filtering based on a frequency multiplied or multi-frequency sinusoidal ("MFS") signal.
In various embodiments, the preamble and the sync mark are combined into a single combined field that is significantly shorter than the fields currently used for the preamble and the sync mark. In addition, by improving the sync mark detection performance while reducing bandwidth, this shorter single combined field will allow higher performance than previously achieved and thus allow more bandwidth to be used for other purposes. The various embodiments described below illustrate how to improve the syncmark detection performance for a given syncmark pattern length and how to extract the sub-bit phases of the syncmark pattern without the need for a separate preamble field that is typically used for that purpose. In some embodiments, the doubled sinusoidal computation provides the magnitude and phase of a multi-frequency or complex pattern signal, allowing simple magnitude comparison techniques as well as in-band and out-of-band energy comparison techniques to be used to detect the sync mark. Various embodiments may be used in a variety of applications (not limited to HDDs) for any communication system as it improves sync mark detection performance while reducing bandwidth.
These and other aspects of the systems and methods for implementing frequency doubled sinusoidal synchronization mark detection are described in more detail with respect to the accompanying drawings.
The following detailed description describes several embodiments in further detail to enable those skilled in the art to practice such embodiments. The described examples are provided for illustrative purposes and are not intended to limit the scope of the invention.
In the following description, for purposes of explanation, numerous details are set forth in order to provide a thorough understanding of the described embodiments. However, it will be apparent to one skilled in the art that other embodiments of the invention may be practiced without some of these details. In other instances, some structures and devices are shown in block diagram form. Several embodiments are described herein, and while various features are ascribed to different embodiments, it should be understood that features described with respect to one embodiment may also be combined with other embodiments. However, for the same reason, a single feature or several features of any described embodiment should not be considered essential to every embodiment of the invention, as other embodiments of the invention may omit such features.
Unless otherwise indicated, all numbers used herein to indicate amounts, dimensions, etc. used are to be understood as modified in all instances by the term "about". In the present application, the use of the singular includes the plural unless specifically stated otherwise, and the use of the terms "and" or "means" and/or "unless otherwise indicated. Furthermore, the use of the term "include" and other forms, such as "include" and "included", are to be considered non-exclusive. Moreover, terms such as "element" or "component" encompass both elements and components comprising one unit and elements and components comprising more than one unit, unless specifically stated otherwise.
The various embodiments as described herein, when embodied in a software product, a computer-implemented method, and/or a computer system, represent tangible, specific improvements to existing technology areas including, but not limited to, communication technology, data transfer technology, data retrieval technology, hard disk drive ("HDD") technology, and/or the like. In other aspects, some embodiments may improve the operation of the user equipment or the system itself (e.g., communication system, data transfer system, data retrieval system, HDD system, etc.), for example, by: detecting, using a computing system, a position of a synchronization signal ("sync mark") within a data signal by using filtering based on a multi-frequency sinusoidal ("MFS") signal and a sliding window comprising successive search windows, each having a bit length corresponding to a bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the sync mark; and refining, using the computing system, the location of the synchronization mark within the data signal by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark to identify a sub-portion of the identified portion of the data signal having a phase indicative of the synchronization mark, the phase measurement performed based on the MFS signal-based filtering; and/or the like.
In particular, to the extent that any abstract concepts exist in the various embodiments, those concepts may be implemented as described herein by devices, software, systems, and methods that involve novel functionality (e.g., steps or operations) that extends beyond just conventional computer processing operations, such as combining preambles and sync marks into a single combined field that is, in some cases, significantly shorter than the fields currently used for preambles and sync marks; the use of frequency doubled sinusoidal calculations to provide the magnitude and phase of a multi-frequency or complex pattern signal allows simple magnitude comparison techniques as well as in-band and out-of-band energy comparison techniques for detecting sync marks and/or the like. These functionalities may produce tangible results outside of the implementing computer system, including, by way of example only, optimized syncmark detection that allows for higher performance (compared to conventional techniques) while reducing bandwidth, thus allowing more bandwidth to be used for other purposes by eliminating the need for a separate preamble field, at least some of which may be observed or measured by a user, HDD manufacturer, other communication system manufacturer, etc.
Some embodiments
We now turn to the embodiments as illustrated by the accompanying drawings. Fig. 1-5 illustrate some features of methods, systems, and apparatus for implementing an optimized communication system, and more particularly, synchronous signal ("sync mark") detection using frequency multiplied or multi-frequency sinusoidal ("MFS") signal-based filtering as mentioned above. The methods, systems, and apparatus illustrated by fig. 1-5 relate to examples of different embodiments including various components and steps, which may be considered alternatives or may be used in conjunction with one another in various embodiments. The descriptions of the illustrated methods, systems, and apparatus shown in fig. 1-5 are provided for purposes of illustration and should not be construed as limiting the scope of the different embodiments.
Referring to the drawings, FIG. 1 is a schematic diagram illustrating a system 100 for implementing synchronization signal ("sync mark") detection using frequency multiplied or multi-frequency sinusoidal ("MFS") signal based filtering, in accordance with various embodiments.
In the non-limiting embodiment of FIG. 1, the system 100 can include a computing system 105 and corresponding database(s) 110. In some cases, computing system 105 and corresponding database(s) 110 may be disposed within user device 115 (represented in fig. 1 by computing system 105a and corresponding database(s) 110a or the like), which may include, but is not limited to, one of a smart phone, mobile phone, tablet computer, laptop computer, desktop computer, smart television, media streaming device, or media player, and/or the like. Alternatively or additionally, computing system 105 and corresponding database(s) 110 may be accessed through one or more networks 150 (represented in fig. 1 by remote computing system 105b and corresponding database(s) 110b or the like), and may include, but are not limited to, at least one of a server computer, a cloud-based computing system or a distributed computing system on a network, and/or the like.
In some embodiments, computing system 105 may include, but is not limited to, at least one of a data signal detection processor(s), a digital signal processor(s), a data retrieval processor(s), or other processor(s), and/or the like. In some cases, database(s) 110 may include, but are not limited to, at least one of read-only memory ("ROM"), programmable read-only memory ("PROM"), erasable programmable read-only memory ("EPROM"), electrically erasable programmable read-only memory ("EEPROM"), flash memory, other non-volatile memory devices, random access memory ("RAM"), static random access memory ("SRAM"), dynamic random access memory ("DRAM"), synchronous dynamic random access memory ("SDRAM"), virtual memory, RAM disk or other volatile memory devices, non-volatile RAM devices, and/or the like.
Although not shown, user device 115 may further include a communication system to communicate with other devices from which the user device receives data signals (e.g., data signal 120 or the like) and/or to which the user device transmits data signals. In some cases, a communication system may include a wireless communication device capable of communicating using a protocol including, but not limited to, bluetooth TM A communication protocol,At least one of a communication protocol or other 802.11 communication protocol set, a ZigBee communication protocol, a Z-wave communication protocol or other 802.15.4 communication protocol set, a cellular communication protocol (e.g., 3G, 4G LTE, 5G, etc.), or other suitable communication protocol, and/or the like.
In some embodiments, data signals (e.g., data signal 120 or the like) received or otherwise analyzed by computing system 105 may be used within a hard disk drive ("HDD") (e.g., HDD 125a or the like) or other hardware. Alternatively, the data signals received or otherwise analyzed by computing system 105 may be included in signals transmitted over a wireless medium (and received by a transceiver such as transceiver 125b or the like) or transmitted over a wired medium (and received by an input port or the like). In some cases, the system 100 may further include other data signal devices 125n or the like, which may include input ports as well as cables, other memory storage devices, receiver devices, and the like. Although FIG. 1 depicts each device 125 as being external to user device 115 but communicatively coupled with user device 115, various embodiments are not so limited, and one or more of HDD 125a, transceiver 125b, and/or other data signal device(s) 125n may be external to user device 115 but communicatively coupled with user device 115. Alternatively, one or more of HDD 125a, transceiver 125b, and/or other data signal device(s) 125n may each be disposed within user device 115 (not shown in FIG. 1).
According to some embodiments, a data signal (e.g., data signal 120 or the like) that may be stored or included in HDD 125a, received wirelessly via transceiver 125b, or stored or received by other data signal device(s) 125n may include a synchronization signal ("sync tag") (e.g., sync tag 130 or the like) preceding a data field (e.g., data field 135 or the like) and/or a sync tag (e.g., sync tag 140 (optional) or the like) preceding a servo ("servo") field (e.g., servo field 145 (optional; present in the HDD or the like), etc.). In some cases, the synchronization mark (e.g., synchronization mark 130 and/or synchronization mark 140, or the like) is among a plurality of synchronization marks disposed within a data signal (e.g., data signal 120, or the like). In this case, each field (e.g., each of the one or more data fields 135 and/or each of the one or more servo fields 145 (if any), etc.) may be preceded by a sync mark among a plurality of sync marks (e.g., sync mark 130 and/or sync mark 140 of the corresponding data field(s) 135 and/or servo field(s) 145, respectively, or the like).
In operation, computing system 105a and/or remote computing system 105b (collectively "computing systems") may perform a method of implementing sync mark detection using filtering based on a frequency multiplied or multi-frequency sinusoidal ("MFS") signal, as shown and described below with respect to fig. 4.
These and other functions of the system 100 (and its components) are described in more detail below with respect to fig. 3 and 4.
Fig. 2A and 2B (collectively, "fig. 2") are diagrams illustrating an example 200 of a sync mark detection method using single frequency signal based filtering and preamble.
In some approaches, a preamble field (e.g., preamble field 205) is typically preceded by a synchronization mark (which may be a bit pattern) (e.g., synchronization mark 210), where the preamble field is a single frequency periodic pattern that may be used to measure the phase of the incoming signal in order to set the sampling phase for data recovery. As used in HDD, the sync mark 210 and the preamble field 205 are used for both the user data field and the servo field. In some cases, a single bin discrete fourier transform ("DFT") is used in the HDD to determine the phase of the preamble signal and then the determined phase is used to set the sampling phase for sync mark detection and data detection. The magnitude of this same DFT is also typically used to adjust the amplitude of the incoming signal using a gain loop.
As shown in fig. 2, a typical servo waveform for an HDD starts with a periodic preamble pattern (e.g., preamble field 205) followed by a sync mark (e.g., sync mark 210). This pattern is written to disk as a digital bit stream such as that shown in fig. 2. In this example mode, the preamble pattern (or preamble field 205) is shown as a 36-bit preamble followed by a 36-bit sync mark 210. In practice, the length of the preamble pattern is typically approximately as long as 100 or more bits. When waveforms are read from a disk (e.g., HDD) and sampled through a band-limited channel, the waveforms appear similar to the noiseless medium gray solid line waveform 220 shown in the graph of fig. 2A. In practice, the readback signal will contain noise. However, fig. 2A is provided for illustrative purposes only, and thus noise has been omitted. In FIG. 2A, a dark gray dashed line or curve 215 represents a standard servo preamble synchronization digital waveform, while a medium gray solid line or curve 220 represents a standard servo preamble synchronization analog waveform.
To determine the phase and amplitude of the servo readback waveform, a single bin DFT is calculated over a portion of the preamble signal. In general, the preamble must be longer than the DFT window length in order to ensure that the entire DFT window fits the actual preamble portion of the readback signal with some uncertainty at the beginning of the DFT computation start. The real signal single bin DFT may be and typically is calculated by multiplying the signal of interest (e.g., the readback signal) by sine and cosine waves of the same frequency or period as the preamble signal. The chart in fig. 2B graphically depicts what the sine and cosine waves or coefficients look like for a preamble signal having a 4-bit period and a read back sampling rate that is twice the bit rate.
Next, the magnitude of the preamble signal is calculated by the following equation:
where sin _ sum is the sum of the data signals filtered by the single frequency sine coefficients (e.g., representing the preamble sine wave coefficients as shown by the medium gray solid line or curve 225 in fig. 2B), and cos _ sum is the sum of the data signals filtered by the single frequency cosine coefficients (e.g., representing the preamble cosine wave coefficients as shown by the dark gray dashed line or curve 230 in fig. 2B).
The phase of the preamble signal used to set the sampling phase for both sync mark detection and data detection is calculated by the following equation:
in some approaches, single bin DFT sine/cosine coefficient values are generated simply by employing a binary bit sequence used to write the preamble pattern and creating sine and cosine waves that match the period of the binary bit preamble sequence. For example, for a 16-bit preamble pattern "1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0" with a 4-bit period (T), the sine filter coefficients would be sin (2 x pi x n/T), where t=4 and n= {0:15}, and the cosine filter coefficients will be cos (2 x pi n/T), where t=4 and n= {0:15}. If the readback signal is processed at a sampling rate twice the bit rate at write, then period T will be 8 instead of 4 and n= {0:31} (i.e., twice the coefficient).
However, in these methods, the sync mark detection system and method require a long preamble, which limits the length of the sync mark and limits the amount of data within the signal (especially in the case of an HDD). As described herein with respect to fig. 1, 3 and 4 or the like, systems/apparatuses and methods for implementing sync mark detection using MFS signal-based filtering eliminate the need for preambles while achieving performance comparable to, if not better than, the above-described methods.
Fig. 3A-3E (collectively, "fig. 3") are diagrams illustrating various non-limiting examples 300 of sync mark detection using MFS signal-based filtering, according to various embodiments.
As shown in fig. 3A, a multi-frequency sinusoidal ("MFS") bit pattern 305 may be used instead of a single frequency preamble or sync mark method. To create a sine wave that is variable in frequency but continuously smooth in phase without discontinuities per half cycle, the following technique may be implemented.
The MFS sine coefficients of the sync mark are generated by: (1) Dividing the sync mark (e.g., MFS bit pattern 305 or the like) into a plurality of positive bit patterns (e.g., positive bit patterns 310 a-310 e or the like) each corresponding to a consecutive binary "one" or "1" in the sync mark, and a plurality of negative bit patterns (e.g., negative bit patterns 315 a-315 e or the like) each corresponding to a consecutive binary "zero" or "0" in the sync mark; (2) Generating for each of a plurality of positive bit patterns a positive sinusoidal half cycle (represented by the portion of the dark gray solid line or curve 320 defined by the dashed lines corresponding to positive bit patterns 310 a-310 e, as shown, for example, in fig. 3A) having a number of periods corresponding to consecutive binary ones; (3) Generating for each of a plurality of negative bit patterns a negative sinusoidal half cycle (represented by the portion of the dark gray solid line or curve 320 defined by the dashed lines corresponding to the negative bit patterns 315 a-315 e, as shown, for example, in fig. 3A) having a number of cycles corresponding to consecutive binary ones; and (4) concatenating the positive and negative sinusoidal half-cycles together in the same alternating order as the corresponding binary ones and zeros in the sync mark to produce the MFS sinusoidal coefficients of the sync mark (e.g., as depicted by the dark gray solid line or curve 320 in fig. 3A). For example, such MFS sine coefficients for bit pattern 305 (e.g., "1 11 00 11 11 00 00 0 11 10 00 11 00 11 10 0 0") start with a positive half cycle of period 3 (e.g., bit pattern 310 a), a negative half cycle of period 2 (e.g., bit pattern 315 a), a positive half cycle of period 4 (e.g., bit pattern 310 b), a negative half cycle of period 5 (e.g., bit pattern 315 b), and so on.
Similarly, the MFS cosine coefficient of the sync mark is generated by: (1) Dividing the sync mark into a plurality of positive bit patterns each corresponding to a consecutive binary one in the sync mark and a plurality of negative bit patterns each corresponding to a consecutive binary zero in the sync mark, the plurality of positive bit patterns alternating with the plurality of negative bit patterns; (2) Generating a sine-cosine half cycle for each of a plurality of positive bit patterns having a period corresponding to a number of consecutive binary ones; (3) Generating a negative cosine half cycle for each of a plurality of negative bit patterns having a period corresponding to a number of consecutive binary ones; and (4) concatenating the sine and cosine half cycles together in the same alternating order as the corresponding binary ones and binary zeros in the sync mark to produce the MFS cosine coefficient of the sync mark (e.g., as depicted in fig. 3A by the light gray dashed line or curve 325). Alternatively, MFS cosine coefficients may be generated by phase shifting MFS sine coefficients.
As shown in fig. 3A, the frequency of the MFS sine (or cosine) wave varies instantaneously at each sine wave zero-crossing, but the phase is continuously smoothed.
To detect this MFS signal, multi-frequency sine/cosine coefficients are then multiplied with the incoming signal samples in a sliding window fashion, in a similar manner as done for finite impulse response ("FIR") filters or matched filters. For example, a search window having a predetermined bit length (which may be a known length or number of bits of the sync mark to be detected; such as, but not limited to, 30, 36, or 54 bits, as shown in fig. 3A-3D, or the like) is used on the incoming signal samples, thereby multiplying a first portion of the incoming signal samples having the same number of bits as the sliding window by a multi-frequency sine/cosine coefficient. The search window is then shifted by a predetermined amount (e.g., without limitation, by up to one bit) [ thus, "sliding window" ], and the next portion of incoming signal samples having the same number of bits as the search window is multiplied by a plurality of frequency sine/cosine coefficients. And so on. The results of each such operation on portions of incoming signal samples are analyzed to detect MFS signals (e.g., by identifying the signal magnitude of MFS signals whose signal magnitude is greatest within a certain search window or whose signal magnitude is above a predetermined threshold, or the like), as described in detail below.
The magnitude and phase of the MFS signal of interest can be calculated using these multi-frequency sine/cosine coefficients, where the magnitude of the frequency multiplied signal is calculated by the following equation:
where mfs_sin_sum is the sum of the data signals filtered by MFS sine coefficients (e.g., representing MFS sine wave coefficients as shown by dark gray solid lines or curves 320 in fig. 3A), and mfs_cos_sum is the sum of the data signals filtered by MFS cosine coefficients (e.g., representing MFS cosine wave coefficients as shown by light gray dashed lines or curves 325 in fig. 3A).
The phase of the MFS signal that can be used for data detection and other processes is calculated by the following equation:
the position of the sync mark is then typically identified as the bit position whose mfs _ signal _ magnitide is largest within a certain search window or whose signal magnitude is above a predetermined threshold. This initial bit position based on the peak of mfs_signal_magnitide can be further improved to a more exact position using mfs_signal_phase. In fact, mfs_signal_phase can be used to provide the correct position containing the sub-bit phase even when the initial bit position based on mfs_signal_magnitide has several erroneous bits due to noise.
By way of example only, in some cases, such MFS detection techniques may be used to measure a frequency offset, which is defined as the frequency difference of a measured signal (or bit rate of an incoming signal) compared to the internal clock frequency (or bit rate based on the internal clock) of circuitry used to detect the synchronization mark and recover the data. Ideally, the two match perfectly, but in practice they may not be exactly the same. The MFS technique may be used to measure a frequency difference or "frequency offset" between two frequencies by measuring the phase of a syncmark pattern at two different points in time or two sub-portions of a syncmark and determining how much the phase between those two points in time varies. More particularly, two separate MFS sine and cosine coefficients may be generated for two different portions of the sync mark. In some cases, the two portions may be adjacent to each other. Alternatively, the two portions may be separated by a third portion. In some examples, the two portions may be adjacent but not overlapping. Alternatively, the two portions may overlap. In some cases, the two portions may have the same (bit) length. Alternatively, the two portions may have different (bit) lengths. Knowing the frequency offset may allow for better data detection and/or adjusting the internal clock rate to more accurately match the signal.
For example, the sync mark may have zero crossings of the sine wave (or peak crossings of the cosine wave) at the start, exact midpoint, and end of the sync mark, in which case the first part comprises the first half of the sync mark and the second part comprises the second half of the sync mark, and the two parts have the same length. In another example, the syncmark may have zero crossings of the sine wave (or peak crossings of the cosine wave) at the beginning of the syncmark, at approximately one third of the syncmark length closest to the beginning, at approximately one quarter of the syncmark length closest to the end, and at the end of the syncmark, in which case the first part comprises the first one third (1/3) of the syncmark, and the second part comprises the second one fourth (1/4) of the syncmark, and in the middle of the first and second parts is five twelfth (5/12) of the syncmark.
The frequency offset may be calculated based on the following equation:
wherein delta_phase can be determined by: measuring a phase of a first portion of the syncmark by generating MFS sine coefficients and MFS cosine coefficients of the first portion of the syncmark and taking an arctangent of a sum of the first portion of the syncmark filtered by MFS sine coefficients divided by a sum of the first portion of the syncmark filtered by MFS cosine coefficients; measuring a phase of a second portion of the syncmark by generating MFS sine and MFS cosine coefficients of the second portion of the syncmark and taking an arctangent of a sum of the second portion of the syncmark filtered by MFS sine coefficients divided by a sum of the second portion of the syncmark filtered by MFS cosine coefficients; and calculating a phase difference between the measured phases of the first and second portions of the synchronizing mark; wherein delta_time can be determined by: a number of bits between midpoints of the first and second portions of the synchronization mark is determined.
Another advantage of this MFS detection technique is that it easily allows a non-linear detection method, e.g. comparing in-band energy with out-of-band energy or total signal energy within a certain search window, wherein the window length for energy calculation is to be set to a predetermined length of the synchronization mark.
The in-band energy is calculated by squaring the magnitude of the portion of the data signal as follows:
in-band_energy=(mfs_signal_magnitude) 2 . (equation 6)
The total signal energy is calculated by summing the squares of all samples of the data signal within the search window as follows:
total_signal_energy=∑[(each_signal_sample) 2 ]. (equation 7)
The out-of-band energy is calculated by subtracting the in-band energy from the total signal energy as follows:
out-of-band_energy = total_signal_energy-in-band_energy. (equation 8)
Fig. 3B and 3C depict non-limiting examples of 54-bit sync mark patterns (e.g., sync mark 330 or the like). For example, a comparison plot of a digital waveform (e.g., digital waveform 335 or the like) and a band limited noise free sampled readback signal (e.g., analog waveform 340 or the like) is shown in fig. 3B. In some cases, the matched filter coefficients are the same as the noise-free readback signal for the matched filter comparison. Here, the read back sampling rate is twice the write bit rate, although the various embodiments are not limited in this regard. A plot of corresponding MFS sine coefficients (e.g., MFS sine wave 345 or the like) and MFS cosine coefficients (e.g., MFS cosine wave 350 or the like) is shown in fig. 3C.
Fig. 3D and 3E depict the simulation results of sync mark detection (fig. 3D) for a 54-bit sync mark pattern (e.g., sync mark 330 or the like) that compares the three sync mark detection methods and the standard deviation of the residual error of the phase measurement made on a data signal with random phase shift across a range of noise levels (using white noise) (fig. 3E).
Referring to fig. 3D, three sync mark detection methods include: (a) A matched filter method in which the filter coefficients are generated using a noise-free readback signal [ the matched filter technique is the optimal linear filtering method for signal detection with additive white gaussian ("AWG") noise ]; (b) MFS signal magnitude method (where MFS filter sine/cosine coefficients are generated as described above with respect to fig. 3A); and (c) a comparison of the in-band to out-of-band energy ratio of the MFS signal (which is also described above with respect to fig. 3A). The number of bits used for the sync mark pattern may be selected based on performance objectives and/or requirements and is not limited to the 54-bit and 36-bit patterns shown in fig. 3D.
As shown in fig. 3D, for all three detection methods, the maximum peak position of the corresponding method (which is the lowest servo-loss rate in fig. 3D, where-10 1 Corresponding to a servo loss rate of 1/10, and-106 corresponding to a servo loss rate of 1/1000000, etc.). For comparison purposes, the 54-bit sync mark pattern is divided (the simulation results of which are represented in FIG. 3D by middle gray, light gray, and dark gray corresponding to methods (a), (b), and (c), respectivelySolid lines or curves 355a, 360a, and 365 a) are also included in the simulation (the simulation results of which are represented in fig. 3D by middle gray, light gray, and dark gray dashed circular lines or curves 355b, 360b, and 365b, respectively, corresponding to methods (a), (b), and (c). As can be seen for both the 54-bit and 36-bit modes, the MFS energy ratio method (the result of which is depicted in fig. 3D by dark gray solid line or curve 365a and dark gray dashed circle line or curve 365 b) performs best, even beyond the matched filter technique (the result of which is depicted in fig. 3D by medium gray solid line or curve 355a and medium gray dashed circle line or curve 355 b).
As described above, the phase of the MFS signal may be calculated using equation 4 above. The period of the MFS signal phase measurement is approximately twice the average of the full period of the MFS sine/cosine signal. For example, for the 54-bit pattern shown in fig. 3B and 3C, the MFS sine wave has 7 cycles on 54 bits, which implies that the period of mfs_signal_phase measurement is Bits. Thus, when the position of the syncmark is found using MFS peak magnitude or energy ratio methods (b) and (c), respectively, as described above with respect to fig. 3D), if the initial position (peak calculated based on mfs_signal_magnitide only) is at +.>Within a bit period, then the phase measurement can be used to refine the raw position into a more exact estimate, which contains sub-bit phases.
In some embodiments, a two-step phase measurement process may be used for maximum accuracy. Assuming that the initial peak magnitude is initially found to differ from the true sync mark position by 2 bits, then first the phase is calculated based on this position, which is by 2 bits (this means that mfs_sin_sum and mfs_cos_sum values are calculated with 2 out of 54 bits outside the true sync mark window, which would give a 2-bit noise to the result). If the second phase measurement is calculated based on the adjusted syncmark position using the first phase calculation, the second phase calculation will be more fully calculated on the syncmark signal, which may improve the accuracy of the final second phase measurement.
Fig. 3E depicts the standard deviation of the residual error of a phase measurement made on a data signal with a random phase shift across a certain noise level range (using white noise). As shown in fig. 3E, the light gray dashed short-dashed line or curve 375 is a phase measurement of a 32-bit window of a single-frequency periodic pattern having a 4-bit period, and the gray dashed line or curve 380 is a phase measurement of a 64-bit window of a single-frequency periodic pattern having a 4-bit period, while the dark gray dashed line or curve 385 is a phase measurement of a 56-bit window of a single-frequency periodic pattern having an 8-bit period, and the black solid line or curve 370 is a phase measurement of a 54-bit MFS pattern having a bit period of-7.7 bits.
As shown in the plot, the MFS phase performance for the 54-bit mode (e.g., black solid line or curve 370) is nearly as good as expected for a 54-bit tone of 7.7 bits in period. This is very close to or the same as the result of a 56-bit window with a single tone 8-bit period (e.g., dark gray dashed line or curve 385). In summary, MFS phase measurements are very close to the performance of comparable single-tone DFT phase measurements.
As described herein, sync mark detection using MFS signal-based filtering allows for a significant reduction in the length of the combined preamble and sync mark fields by combining the preamble and sync mark fields in a single field. As described herein, sync mark detection using filtering based on MFS signals also allows for excellent system detection performance on both MFS magnitude and phase of the sync mark using DFT-type computation. As described herein, the use of a filtered syncmark detection based on MFS signals also allows detection methods that rely on in-band and out-of-band comparisons, where the energy ratio method (e.g., method (c) as described above with respect to fig. 3D) is less sensitive to amplitude errors and/or variations. As described herein, sync mark detection using MFS signal-based filtering improves system performance by allowing higher detection rates and/or providing more bandwidth for data. As described herein, the use of sync mark detection based on filtering of MFS signals improves circuit area, size, and/or power by providing high performance with a fairly simple circuit implementation. For example, MFS coefficients are easy to generate and repeatable among several cycle length choices. Also, because the MFS method is based only on a priori known digital patterns, there is no ideal sample dependence or channel bit density dependence that is adapted.
These and other functions of the example instance(s) 300 (and their components) are described in more detail herein with respect to fig. 1 and 4.
Fig. 4 is a flow chart illustrating a method 400 for implementing sync mark detection using MFS signal-based filtering, in accordance with various embodiments.
Although the techniques and procedures are depicted and/or described in a particular order for purposes of illustration, it should be understood that certain procedures may be reordered and/or omitted within the scope of the various embodiments. Moreover, while the method 400 illustrated by fig. 4 may be implemented by or with the systems, examples, or examples 100 and 300 of fig. 1 and 3, respectively (or components thereof), and in some cases described below with respect thereto, such methods may also be implemented using any suitable hardware (or software) implementation. Similarly, while each of the systems, examples, or embodiments 100 and 300 of fig. 1 and 3 (or components thereof), respectively, may operate according to the method 400 illustrated by fig. 4 (e.g., by executing instructions embodied on a computer-readable medium), each of the systems, examples, or embodiments 100 and 300 of fig. 1 and 3 may also each operate according to other modes of operation and/or perform other suitable procedures.
In the non-limiting embodiment of fig. 4, method 400 at block 405 may include detecting a position of a synchronization signal ("sync mark") within a data signal using filtering based on a multi-frequency sinusoidal ("MFS") signal and a sliding window including consecutive search windows each having a bit length corresponding to a bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the sync mark. At block 410, method 400 may include refining, using the computing system, the position of the syncmark within the data signal by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the syncmark to identify a sub-portion of the identified portion of the data signal having a phase indicative of the syncmark, the phase measurement performed based on the MFS signal-based filtering.
According to some embodiments, using the sliding window comprises the computing system: measuring a magnitude of a portion of the data signal within a search window; and continuously moving the sliding window along the data signal for one sample to form another search window and measuring a magnitude of a portion of the data signal within the other search window.
In some embodiments, detecting the position of the syncmark includes multiplying an MFS sine coefficient of the syncmark and an MFS cosine coefficient of the syncmark with portions of the data signal within each successive search window of the sliding window to generate a data signal filtered by an MFS sine coefficient and a data signal filtered by an MFS cosine coefficient, respectively, for each search window. The MFS sine coefficient and the MFS cosine coefficient of the sync mark may be generated as described above with respect to fig. 3.
In some cases, the magnitude of the portion of the data signal within each search window is calculated by squaring a sum of the data signals filtered by MFS sine coefficients and squaring a sum of the data signals filtered by MFS cosine coefficients, and calculating a square root of a sum of the squares of the data signals filtered by MFS sine coefficients and a sum of the squares of the data signals filtered by MFS cosine coefficients, as defined above in equation 3.
In some examples, identifying the portion of the data signal having the magnitude indicative of the synchronization mark includes identifying a portion of the data signal having at least one of a maximum magnitude or a magnitude exceeding a predetermined threshold magnitude.
In some embodiments, identifying the portion of the data signal having the magnitude indicative of the synchronization mark includes identifying a portion of the data signal having a maximum in-band to out-of-band energy ratio or having a maximum in-band to total signal energy ratio.
According to some embodiments, the phase of the portion of the data signal within each search window is calculated by dividing the sum of the data signals filtered by MFS sine coefficients by the arctangent of the sum of the data signals filtered by MFS cosine coefficients, as defined above in equation 4.
Merely by way of example, in some cases, the method 400 (although not shown in fig. 4) may further include determining, using the computing system, a frequency offset between the frequency of the data signal and an internal clock frequency of an internal clock of the computing system based on MFS sine coefficients and MFS cosine coefficients. In some examples, method 400 (although not shown in fig. 4) may further include adjusting, using the computing system, the internal clock frequency to match a frequency of the data signal based on the determined frequency offset. In some cases, determining the frequency offset may include: measuring a phase of a first portion of the syncmark by generating MFS sine coefficients and MFS cosine coefficients of the first portion of the syncmark and taking an arctangent of a sum of the first portion of the syncmark filtered by MFS sine coefficients divided by a sum of the first portion of the syncmark filtered by MFS cosine coefficients; measuring a phase of a second portion of the syncmark by generating MFS sine and MFS cosine coefficients of the second portion of the syncmark and taking an arctangent of a sum of the second portion of the syncmark filtered by MFS sine coefficients divided by a sum of the second portion of the syncmark filtered by MFS cosine coefficients; calculating a phase difference between the measured phases of the first and second portions of the synchronizing mark; and dividing the calculated phase difference by a number of bits between midpoints of the first and second portions of the synchronization mark; as defined in equation 5 above.
In some embodiments, method 400 may include, at optional block 415, using the computing system, determining, based on the phase of the data signal having the identified portion indicative of the magnitude of the synchronization mark, whether a polarity of the data signal has been reversed.
In some cases, the synchronization mark replaces a combination of a single frequency synchronization signal and a preamble. In some examples, the bit length of the synchronization mark is less than a total bit length of the combination of the single frequency synchronization signal and the preamble. Alternatively, the bit length of the synchronization mark is the same as a total bit length of the combination of the single frequency synchronization signal and the preamble. Alternatively, the bit length of the synchronization mark is greater than a total bit length of the combination of the single frequency synchronization signal and the preamble.
According to some embodiments, the method 400 may further comprise: identifying (at block 420) a start point of a data field within the data signal based on the refined position of the synchronization mark within the data signal, using the computing system; and in response to identifying the origin of the data field, performing (at block 425) a retrieval of data from the data field using the computing system.
Examples of System and hardware implementations
Fig. 5 is a block diagram illustrating an example of a computer or system hardware architecture in accordance with various embodiments. FIG. 5 provides a schematic illustration of one embodiment of a computer system 500 of service provider system hardware that may perform the methods provided by the various other embodiments as described herein and/or may perform the functions of a computer or hardware system (i.e., computing system 105a or 105b and user device 115, etc.) as described above. It should be noted that fig. 5 is intended only to provide a generalized illustration of various components, one or more of each of which may be utilized (or none of which is utilized) in appropriate cases. Thus, FIG. 5 summarily illustrates how individual system elements may be implemented in a relatively separate or relatively more integrated manner.
Computer or hardware system 500, which may represent an embodiment of a computer or hardware system as described above with respect to fig. 1-4 (i.e., computing system 105a or 105b and user device 115, etc.), is shown to include hardware elements that may be electrically coupled via bus 505 (or may otherwise communicate, where appropriate). The hardware elements may include: the one or more processors 510, including but not limited to one or more general purpose processors and/or one or more special purpose processors (e.g., microprocessors, digital signal processing chips, graphics acceleration processors, and/or the like); one or more input devices 515, which may include, but are not limited to, a mouse, a keyboard, and/or the like; and one or more output devices 520, which may include, but are not limited to, a display device, a printer, and/or the like.
The computer or hardware system 500 may further include (and/or be in communication with) one or more storage devices 525, which may include, but are not limited to, local and/or network accessible storage devices, and/or may include, but are not limited to, disk drives, drive arrays, optical storage devices, solid state storage devices such as random access memory ("RAM") and/or read only memory ("ROM"), programmable, flash updateable and/or the like. Such storage devices may be configured to implement any suitable data storage, including but not limited to various file systems, database structures, and/or the like.
The computer or hardware system 500 may also include a communication subsystem 530, which may include, but is not limited to, a modem, a network card (wireless or wired), an infrared communication device, a wireless communication device, and/or a chipset (e.g., bluetooth) TM Devices, 802.11 devices, wiFi devices, wiMax devices, WWAN devices, cellular communication facilities, etc.), and/or the like. The communication subsystem 530 may allow for the exchange of data with a network (such as the network described below, to name one example), other computer or hardware systems, and/or any other device described herein. In many embodiments, the computer or hardware system 500 will further include a working memory 535, which may include a RAM or ROM device, as described above.
The computer or hardware system 500 may also include software elements, shown as being currently located within the working memory 535, including an operating system 540, device drivers, executable libraries, and/or other code, such as one or more application programs 545, which may include computer programs provided by the various embodiments (including, but not limited to, hypervisors, VMs, and the like), and/or may be designed to implement methods provided by other embodiments and/or configure systems provided by other embodiments, as described herein. By way of example only, one or more programs described with respect to the method(s) discussed above may be implemented as code and/or instructions executable by a computer (and/or a processor within a computer); then, in an aspect, a general purpose computer (or other device) may be configured and/or adapted using such code and/or instructions to perform one or more operations in accordance with the described methods.
Such instructions and/or code sets may be encoded and/or stored on a non-transitory computer-readable storage medium, such as storage device(s) 525 described above. In some cases, the storage medium may be incorporated within a computer system, such as system 500. In other embodiments, the storage medium may be separate from the computer system (i.e., removable media, such as optical disks, etc.) and/or provided in an installation package, such that the storage medium may be used to program, configure, and/or adapt a general purpose computer having instructions/code stored thereon. These instructions may take the form of executable code that is executable by the computer or hardware system 500, and/or may take the form of source and/or installable code that, when compiled and/or installed on the computer or hardware system 500 (e.g., using any of a variety of commonly available compilers, installers, compression/decompression utilities, etc.).
It will be apparent to those skilled in the art that significant variations may be made in accordance with specific requirements. For example, custom hardware (e.g., programmable logic controllers, field programmable gate arrays, application specific integrated circuits, and/or the like) may also be used, and/or particular elements may be implemented in hardware, software (including portable software, such as applets, etc.), or both. Furthermore, connections to other computing devices, such as network input/output devices, may be employed.
As mentioned above, in one aspect, some embodiments may employ a computer or hardware system (e.g., computer or hardware system 500) to perform a method according to various embodiments of the invention. According to one set of embodiments, some or all of the programs of such methods are executed by computer or hardware system 500 in response to processor 510 executing one or more sequences of one or more instructions (which may be incorporated into operating system 540 and/or other code, such as in application programs 545) contained in working memory 535. Such instructions may be read into working memory 535 from another computer-readable medium, such as one or more of storage device(s) 525. By way of example only, execution of the sequences of instructions contained in working memory 535 may cause processor(s) 510 to perform one or more programs of the methods described herein.
The terms "machine-readable medium" and "computer-readable medium" as used herein refer to any medium that participates in providing data that causes a machine to operation in a fashion. In an embodiment implemented using computer or hardware system 500, various computer-readable media may be involved in providing instructions/code to processor(s) 510 for execution and/or may be used to store and/or carry such instructions/code (e.g., as signals). In many implementations, the computer-readable medium is a non-transitory, physical, and/or tangible storage medium. In some embodiments, the computer-readable medium may take many forms, including but not limited to, non-volatile media, or the like. Non-volatile media includes, for example, optical and/or magnetic disks, such as storage device(s) 525. Volatile media includes, but is not limited to, dynamic memory, such as working memory 535. In some alternative embodiments, the computer-readable medium may take the form of transmission media including, but not limited to, coaxial cables, copper wire and fiber optics, including the wires that comprise bus 505, and the various components of communication subsystem 530 (and/or the media by which communication subsystem 530 provides communication with other devices). In an alternative set of embodiments, the transmission medium may also take the form of waves (including, but not limited to, radio waves, acoustical waves, and/or optical waves, such as those waves generated during radio-wave and infrared data communications).
Common forms of physical and/or tangible computer-readable media include, for example, a floppy disk, a flexible disk, hard disk, magnetic tape, or any other magnetic medium, a CD-ROM, any other optical medium, punch cards, paper tape, any other physical medium with patterns of holes, a RAM, a PROM, and EPROM, a FLASH-EPROM, any other memory chip or cartridge, a carrier wave as described hereinafter, or any other medium from which a computer can read instructions and/or code.
Various forms of computer readable media may be involved in carrying one or more sequences of one or more instructions to processor(s) 510 for execution. By way of example only, the instructions may initially be carried on a magnetic and/or optical disk of a remote computer. The remote computer can load the instructions into its dynamic memory and send the instructions as signals over a transmission medium to be received and/or executed by the computer or hardware system 500. According to various embodiments of the invention, these signals, which may be in the form of electromagnetic signals, acoustic signals, optical signals, and/or the like, are all examples of carrier waves upon which instructions may be encoded.
The communication subsystem 530 (and/or components thereof) will typically receive the signals, and the bus 505 may then carry the signals (and/or data carried by the signals, instructions, etc.) to the working memory 535 from which the processor(s) 505 retrieve and execute the instructions. The instructions received by working memory 535 may optionally be stored on storage device 525 either before or after execution by processor(s) 510.
Although specific features and aspects have been described with respect to some embodiments, those skilled in the art will recognize that numerous modifications may be made. For example, the methods and processes described herein may be implemented using hardware components, software components, and/or any combination thereof. Moreover, although the various methods and processes described herein may be described with respect to particular structures and/or functional components for ease of description, the methods provided by the various embodiments are not limited to any particular structure and/or functional architecture, but may be implemented on any suitable hardware, firmware, and/or software configuration. Similarly, although particular functionality is attributed to a particular system component, unless the context dictates otherwise, this functionality need not be limited thereto and may be distributed among various other system components according to several embodiments.
Moreover, although the programs of the methods and processes described herein are described in a particular order for ease of description, the various programs may be reordered, added, and/or omitted according to the various embodiments, unless the context dictates otherwise. Furthermore, the programs described with respect to one method or process may be incorporated into other described methods or processes; likewise, system components described with respect to one system may be organized in alternate architecture and/or incorporated within other described systems according to a particular architecture. Thus, while various embodiments are described as having-or not-particular features for ease of description and illustration of some aspects of those embodiments, various components and/or features described herein with respect to particular embodiments may be substituted, added, and/or deleted from other described embodiments unless the context dictates otherwise. Thus, while several embodiments are described above, it will be apparent that the invention is intended to cover all modifications and equivalents within the scope of the following claims.

Claims (20)

1. A method for implementing synchronization signal ("sync mark") detection, the method comprising:
detecting, using a computing system, a position of a synchronization signal ("sync mark") within a data signal by using filtering based on a multi-frequency sinusoidal "MFS" signal and a sliding window comprising successive search windows, each having a bit length corresponding to a bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the sync mark; and
using the computing system, refining the position of the synchronization mark within the data signal by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark to identify a sub-portion of the identified portion of the data signal having a phase indicative of the synchronization mark, the phase measurement being performed based on the MFS signal-based filtering.
2. The method of claim 1, wherein the computing system comprises at least one of a data signal detection processor, a digital signal processor, a data retrieval processor, a processor of a mobile device, a processor of a user device, a server computer, a cloud-based computing system on a network, or a distributed computing system.
3. The method of claim 1, wherein using the sliding window comprises:
measuring a magnitude of a portion of the data signal within a search window; a kind of electronic device with high-pressure air-conditioning system
The sliding window is continuously moved along the data signal for one sample to form another search window and the magnitude of the portion of the data signal within the other search window is measured.
4. The method of claim 1, wherein detecting the position of the syncmark comprises multiplying an MFS sine coefficient of the syncmark and an MFS cosine coefficient of the syncmark with the portion of the data signal within each successive search window of the sliding window to generate a data signal filtered by an MFS sine coefficient and a data signal filtered by an MFS cosine coefficient, respectively, for each search window.
5. The method of claim 4, wherein the MFS sine coefficient of the sync mark is generated by:
dividing the sync mark into a plurality of positive bit patterns each corresponding to a consecutive binary one in the sync mark and a plurality of negative bit patterns each corresponding to a consecutive binary zero in the sync mark, the plurality of positive bit patterns alternating with the plurality of negative bit patterns;
Generating for each of the plurality of positive bit patterns a positive sine half cycle having a number of periods corresponding to consecutive binary ones;
generating for each of the plurality of negative bit patterns a negative sinusoidal half cycle having a number of periods corresponding to consecutive binary ones; a kind of electronic device with high-pressure air-conditioning system
Positive and negative sinusoidal half-cycles are concatenated together in the same alternating order as the corresponding binary ones and zeros in the sync mark to generate the MFS sinusoidal coefficients of the sync mark.
6. The method of claim 4, wherein the magnitude of the portion of the data signal within each search window is calculated by squaring a sum of the data signals filtered by MFS sine coefficients and squaring a sum of the data signals filtered by MFS cosine coefficients, and calculating a square root of a sum of the squares of the data signals filtered by MFS sine coefficients and a sum of the squares of the data signals filtered by MFS cosine coefficients.
7. The method of claim 6, wherein identifying the portion of the data signal having the magnitude indicative of the synchronization mark comprises identifying a portion of the data signal having at least one of a maximum magnitude or a magnitude exceeding a predetermined threshold magnitude.
8. The method of claim 4, wherein identifying the portion of the data signal having the magnitude indicative of the synchronization mark comprises identifying a portion of the data signal having a maximum in-band to out-of-band energy ratio or having a maximum in-band to total signal energy ratio, wherein the in-band energy is calculated by squaring the magnitude of the portion of the data signal, wherein the total signal energy is calculated by summing squares of all samples of the data signal within a search window, and wherein the out-of-band energy is calculated by subtracting the in-band energy from the total signal energy.
9. The method of claim 4, wherein a phase of the portion of the data signal within each search window is calculated by dividing the sum of the data signals filtered by MFS sine coefficients by an arctangent of the sum of the data signals filtered by MFS cosine coefficients.
10. The method as recited in claim 1, further comprising:
determining, using the computing system, a frequency offset between a frequency of the data signal and an internal clock frequency of an internal clock of the computing system based on MFS sine coefficients and MFS cosine coefficients, wherein determining the frequency offset comprises:
Measuring a phase of a first portion of the syncmark by generating MFS sine coefficients and MFS cosine coefficients of the first portion of the syncmark and taking an arctangent of a sum of the first portion of the syncmark filtered by MFS sine coefficients divided by a sum of the first portion of the syncmark filtered by MFS cosine coefficients;
measuring a phase of a second portion of the syncmark by generating MFS sine and MFS cosine coefficients of the second portion of the syncmark and taking an arctangent of a sum of the second portion of the syncmark filtered by MFS sine coefficients divided by a sum of the second portion of the syncmark filtered by MFS cosine coefficients;
calculating a phase difference between the measured phases of the first and second portions of the synchronizing mark; and dividing the calculated phase difference by a number of bits between midpoints of the first and second portions of the synchronization mark; a kind of electronic device with high-pressure air-conditioning system
The internal clock frequency is adjusted based on the determined frequency offset to match the frequency of the data signal using the computing system.
11. The method as recited in claim 1, further comprising:
Identifying, using the computing system, a start point of a data field within the data signal based on the refined position of the synchronization mark within the data signal; a kind of electronic device with high-pressure air-conditioning system
In response to identifying the origin of the data field, retrieving data from the data field is performed using the computing system.
12. An apparatus for implementing synchronization signal ("sync mark") detection using frequency doubled sinusoidal signal based filtering, comprising:
at least one processor; a kind of electronic device with high-pressure air-conditioning system
A non-transitory computer-readable medium communicatively coupled to the at least one processor, the non-transitory computer-readable medium having stored thereon computer software comprising a set of instructions that, when executed by the at least one processor, cause the apparatus to:
detecting a position of a synchronization signal ("sync mark") within a data signal by using filtering based on a multi-frequency sinusoidal "MFS" signal and a sliding window comprising successive search windows, each having a bit length corresponding to a bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the sync mark; and
Refining the position of the synchronization mark within the data signal by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark to identify a sub-portion of the identified portion of the data signal having a phase indicative of the synchronization mark, the phase measurement being performed based on the MFS signal-based filtering.
13. The apparatus of claim 12, wherein the apparatus comprises at least one of a data signal detection processor, a digital signal processor, a data retrieval processor, a processor of a mobile device, a processor of a user device, a server computer, a cloud-based computing system on a network, or a distributed computing system.
14. The apparatus of claim 12, wherein the data signal is included in a hard disk drive, wherein the sync mark is among a plurality of sync marks disposed within the data signal, wherein the data signal comprises at least one data field and a servo ("servo") field, each field being preceded by a sync mark among the plurality of sync marks.
15. The apparatus of claim 12, wherein the data signal is included in a signal transmitted over one of a wireless medium or a wired medium.
16. The apparatus of claim 12, wherein detecting the position of the syncmark comprises multiplying an MFS sine coefficient of the syncmark and an MFS cosine coefficient of the syncmark with the portion of the data signal within each successive search window of the sliding window to generate a data signal filtered by an MFS sine coefficient and a data signal filtered by an MFS cosine coefficient, respectively, for each search window.
17. The apparatus of claim 16, wherein the magnitude of the portion of the data signal within each search window is calculated by squaring a sum of the data signals filtered by MFS sine coefficients and squaring a sum of the data signals filtered by MFS cosine coefficients, and calculating a square root of a sum of the squares of the data signals filtered by MFS sine coefficients and a sum of the squares of the data signals filtered by MFS cosine coefficients.
18. The apparatus of claim 16, wherein identifying the portion of the data signal having the magnitude indicative of the synchronization mark comprises identifying a portion of the data signal having a maximum in-band to out-of-band energy ratio or having a maximum in-band to total signal energy ratio, wherein the in-band energy is calculated by squaring the magnitude of the portion of the data signal, wherein the total signal energy is calculated by summing squares of all samples of the data signal within a search window, and wherein the out-of-band energy is calculated by subtracting the in-band energy from the total signal energy.
19. The apparatus of claim 16, wherein a phase of the portion of the data signal within each search window is calculated by dividing the sum of the data signals filtered by MFS sine coefficients by an arctangent of the sum of the data signals filtered by MFS cosine coefficients.
20. A computing system comprising logic that, when executed, is configured to:
detecting the position of a synchronization signal ("sync mark") within a data signal by using a multi-frequency sinusoidal "MFS" signal-based filtering and a sliding window comprising successive search windows each having a bit length corresponding to the bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the sync mark, the MFC filtering comprising multiplying an MFS sine coefficient of the sync mark and an MFS cosine coefficient of the sync mark with the portion of the data signal within each successive search window of the sliding window to generate a data signal filtered by an MFS sine coefficient and a data signal filtered by an MFS cosine coefficient, respectively, for each search window; and
refining the position of the synchronization mark within the data signal by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark to identify a sub-portion of the identified portion of the data signal having a phase indicative of the synchronization mark, the phase measurement calculated by taking the arctangent of the sum of the data signals filtered by MFS sine coefficients divided by the sum of the data signals filtered by MFS cosine coefficients.
CN202310084150.4A 2022-02-10 2023-02-08 Synchronization signal (sync mark) detection using frequency-doubled sinusoidal (MFS) signal-based filtering Pending CN116582396A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US63/308,941 2022-02-10
US17/728,470 US11784785B2 (en) 2022-02-10 2022-04-25 Synchronization signal (Sync Mark) detection using multi-frequency sinusoidal (MFS) signal-based filtering
US17/728,470 2022-04-25

Publications (1)

Publication Number Publication Date
CN116582396A true CN116582396A (en) 2023-08-11

Family

ID=87540127

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310084150.4A Pending CN116582396A (en) 2022-02-10 2023-02-08 Synchronization signal (sync mark) detection using frequency-doubled sinusoidal (MFS) signal-based filtering

Country Status (1)

Country Link
CN (1) CN116582396A (en)

Similar Documents

Publication Publication Date Title
KR101376556B1 (en) Detection of presence of television signals embedded in noise using cyclostationary toolbox
CN105187070B (en) A kind of manchester encoded signals coding/decoding method and device
US9077501B1 (en) Systems and methods for detecting cycle slip and/or framing error
CN108199993A (en) A kind of synchronous head inspecting method, device, electronic equipment and readable storage medium storing program for executing
US10565284B2 (en) Apparatus for determining a similarity information, method for determining a similarity information, apparatus for determining an autocorrelation information, apparatus for determining a cross-correlation information and computer program
TW201826855A (en) System and method for blind detection of numerology, manufacturing method and testing method
CN101924628B (en) Data processing apparatus, receiving apparatus, synchronous detection apparatus and method
CA3097604A1 (en) Interference detection and suppression in non-coordinated systems
WO2019218721A1 (en) Phase calibration method and device
CN111641420B (en) Signal detection and acquisition method, device, receiver and storage medium
CN103391182A (en) Frame detection method and device
EP3549269A1 (en) Digital radio communication
CN107404450A (en) The method and device of demodulated signal
CN110619891B (en) Audio signal discriminator and encoder
CN116582396A (en) Synchronization signal (sync mark) detection using frequency-doubled sinusoidal (MFS) signal-based filtering
EP3258609B1 (en) Clear channel assessment
Liang et al. The Process of High‐Data‐Rate Mud Pulse Signal in Logging While Drilling System
US9672833B2 (en) Sinusoidal interpolation across missing data
US11784785B2 (en) Synchronization signal (Sync Mark) detection using multi-frequency sinusoidal (MFS) signal-based filtering
CN101964764B (en) Information channel evaluating method, basic training sequence code detecting method and receiving terminal
CN110022604A (en) Wireless communication apparatus and its time-frequency synchronization method
JP5344825B2 (en) Frequency offset estimation and C / I ratio measurement method using pilot signal by repetition for TDMA signal having offset larger than Nyquist frequency of reference symbol rate
US10243726B2 (en) Signal transceiving device and methods for detecting a synchronization point in a signal
US8892052B2 (en) Methods for determining whether a signal includes a wanted signal and apparatuses configured to determine whether a signal includes a wanted signal
CN117319161B (en) Chirp signal demodulation method and device, computer equipment and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication