CN116578391B - Descriptor table reading method and module, back-end equipment, medium, equipment and chip - Google Patents
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Abstract
The application relates to a descriptor table reading method and module, a back-end device, a storage medium and an electronic device, wherein the descriptor table reading method comprises the following steps: the pointer convergence module receives at least two pointer values sent by the pointer sending module, if the continuous n pointer values in the at least two pointer values are sequentially increased, the burst number is determined to be n, and the first pointer value in the n pointer values and the burst number are sent to the DMA reading request module; the DMA read request module generates a first DMA read request according to the first pointer value and the burst number, and sends the first DMA read request to the DMA processing module; the DMA read response module receives and analyzes the first response data to obtain n pieces of descriptor table item information, and if no next hop exists in the n pieces of descriptor table item information, the corresponding descriptor is obtained according to the n pieces of descriptor table item information and is sent to the data packet buffer reading module to read the data packet according to the descriptor, so that the data packet sending rate is improved.
Description
Technical Field
The application relates to the technical field of cloud computing virtualization, in particular to a descriptor table reading method and module, back-end equipment, a computer readable storage medium, electronic equipment and a chip.
Background
In cloud computing virtualization technology, in order to enable multiple Guest OSs (Guest operating systems) to run on the same hardware independently of a Host OS (Host operating system), a virtualization layer is generally required to be added to implement the virtualization layer, and the virtualization layer is called a VMM (Virtual Machine Monitor ).
QEMU (MachineEmulator and Virtualizer) provides a fully virtualized environment as a VMM in which the guest operating system does not perceive itself as a virtual machine nor does it need to be modified. However, since all operations require software simulation, frequent trapping/trapping during Device access causes serious performance problems, for which the paravirtualized technology virtoio (Virtual I/O Device) has developed.
VIRTIO is a generic paravirtualized I/O framework through which the VMM emulates a series of virtualized devices. The virtoio framework mainly includes 3 parts: front-end Driver (Front-end Driver), back-end device (Back-end device), and virtualization queue (virtual). The front-end driver is a driver corresponding to VIRTIO analog equipment (such as common VIRTIO network equipment, VIRTIO disk equipment and the like) in the virtual machine, and is used for receiving User Mode (User Mode) requests, packaging the requests according to a preset protocol and sending the requests to the back-end equipment; the back-end device is usually implemented in QEMU, and is used for receiving and analyzing the I/O request sent by the front-end driver, completing the request receiving and sending from the actual physical device, and finally notifying the front-end driver through an interrupt mechanism; the data of the front-end driver and the back-end device interact through the virtual queue.
According to the VIRTIO specification, a Virtqueue contains a Descriptor Table (Descriptor Table), an available Ring Table (available Ring) and a Used Ring Table (Used Ring), wherein the Descriptor Table stores information such as a data cache address, a length, a flag and a next hop pointer, and the available Ring Table and the Used Ring Table store pointers pointing to entries in the Descriptor Table; when a data packet is sent, the front end drives the data packet to be sent to be placed in a buffer memory, then generates a descriptor according to the address, the length and other information of the buffer memory, stores the address of the descriptor to the position pointed by the current index of the available ring table and updates the index; the front end driver informs the back end device to send the data packet.
When the back-end device sends a data packet, the back-end device needs to read corresponding data according to the acquired descriptor and the descriptor, and specifically comprises a ring table pointer for reading, a descriptor table for reading, a data packet buffer memory and a read interrupt suppression; taking the example of a small packet of 64 bytes, assuming a system dominant frequency of 1GHz, sending a read request that requires 4 clock cycles for a packet, the maximum packet rate is ideally 250 Mpps.
Disclosure of Invention
The application aims to provide a descriptor table reading method and module, back-end equipment, a computer readable storage medium, electronic equipment and a chip so as to improve the packet sending rate of a data packet.
In order to achieve the above objective, an embodiment of the present application provides a descriptor table reading method, where the method is implemented based on a descriptor table reading module, and the descriptor table reading module includes a pointer aggregation module, a DMA read request module, and a DMA read response module;
the method comprises the following steps:
the pointer convergence module receives at least two pointer values sent by the pointer sending module, if the continuous n pointer values in the at least two pointer values are sequentially increased, the burst number is determined to be n, and the first pointer value and the burst number in the continuous n pointer values are sent to the DMA reading request module; n is greater than or equal to 2;
the DMA read request module generates a first DMA read request according to the first pointer value and the burst number, and sends the first DMA read request to the DMA processing module, so that the DMA processing module reads n pieces of descriptor table entry information of a descriptor table, and generates first response data according to the n pieces of descriptor table entry information;
And the DMA read response module receives and analyzes the first response data to obtain the n pieces of descriptor table item information, and if no next hop exists in the n pieces of descriptor table item information, the corresponding descriptor is obtained according to the n pieces of descriptor table item information.
The embodiment of the application also provides a descriptor table reading module, which comprises:
the pointer convergence module is used for receiving the at least two pointer values sent by the pointer sending module, if the continuous n pointer values in the at least two pointer values are sequentially increased, determining the burst number as n, and sending the first pointer value and the burst number in the continuous n pointer values to the DMA reading request module; n is greater than or equal to 2;
the DMA reading request module is used for generating a first DMA reading request according to the first pointer value and the burst number, and sending the first DMA reading request to the DMA processing module so that the DMA processing module reads n pieces of descriptor table item information of the descriptor table and generates first response data according to the n pieces of descriptor table item information;
and the DMA reading response module is used for receiving and analyzing the first response data to obtain the n pieces of descriptor table item information, and if no next hop exists in the n pieces of descriptor table item information, the corresponding descriptor is obtained according to the n pieces of descriptor table item information.
Embodiments of the present application also provide a computer-readable storage medium storing a computer program which, when executed by a processor, implements the descriptor table reading method as described above.
The embodiment of the application also provides electronic equipment, which comprises a processor, a memory and a computer program stored in the memory and capable of running on the processor, wherein the descriptor table reading method is realized when the processor executes the program.
The embodiment of the application provides a chip, which comprises the VIRTIO back-end equipment.
Compared with the traditional method, in the embodiment of the application, when the back-end equipment reads the descriptors according to the pointer values, the DMA read requests of continuous n pointers with the pointer values increased are combined into a first DMA read request, so that the system data bandwidth can be fully utilized, the DMA processing module can return first response data containing n descriptor table item information at one time, a plurality of descriptors can be read at one time, the interaction times between the DMA processing module and the descriptor table reading module are reduced, the descriptor reading efficiency is greatly improved, the packet sending rate is improved, and the problem of low packet sending rate is solved.
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In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for reading a descriptor table according to an embodiment of the application.
FIG. 2 is a schematic diagram of a descriptor table reading module according to an embodiment of the application.
Fig. 3 is a schematic diagram of a packet sending process of a virio network device according to an embodiment of the present application.
FIG. 4 is a diagram of a descriptor table in one embodiment of the application.
Fig. 5 is a schematic diagram of a conventional method descriptor table reading method.
Fig. 6 is a schematic diagram of a virtoio backend device according to an embodiment of the present application.
Description of the embodiments
The detailed description of the drawings is intended as an illustration of the presently preferred embodiment of the application and is not intended to represent the only form in which the present application may be practiced. It is to be understood that the same or equivalent functions may be accomplished by different embodiments that are intended to be encompassed within the spirit and scope of the application.
Referring to fig. 1, an embodiment of the present application provides a descriptor table reading method, which is implemented based on a descriptor table reading module, as shown in fig. 2, where the descriptor table reading module includes a pointer aggregation module, a DMA read request module, and a DMA read response module.
As shown in fig. 3, the virtoio network device packet sending flow includes a virtoio front end driver execution flow and a back end device execution flow;
the VIRTIO front end driver execution flow comprises:
the first step, the driver program puts the data packet to be sent into the network data packet buffer. According to the specification, a 12-byte VIRTIO network device header is added before each data packet, and the VIRTIO network device header and the data packet content may be put into one buffer memory or may be put into different buffer memories in a plurality of parts;
and secondly, filling the information such as the address, the length and the like of the buffer memory used in the first step into a descriptor table, and stringing the descriptors into a chain through a next hop for a plurality of data packets which occupy a plurality of descriptors for a plurality of buffer memories. One link corresponds to one network data packet;
thirdly, filling the chain head address of the descriptor table into the position pointed by the current index of the available ring table, and simultaneously updating the index value (index value +1);
Writing a notification register (Notify) to Notify the back-end device that a network data packet is to be sent;
it should be noted that, the first step to the fourth step are all completed in the virto front end driver.
The execution flow of the VIRTIO back-end equipment comprises the following steps:
after receiving the Notify notification, the VIRTIO backend device executes the following steps:
fifthly, the pointer sending module reads pointer values in the available ring table according to indexes in the available ring table;
sixthly, the descriptor table reading module reads the related content in the descriptor table by using the pointer value returned in the fifth step;
a seventh step, the data packet buffer reading module reads the data packet from the data packet buffer pointed by the descriptor by using the descriptor read in the sixth step, and sends the data packet to a downstream module (not shown in the figure);
eighth step, the used ring table updating module updates the content of the address pointed by the current index of the used ring table according to the result of the seventh step;
and ninth, the MSI-X interrupt module reads an interrupt suppression FLAG (located at the bottom of the available ring table and not shown in the figure), reads the MSI-X interrupt table, and if the interrupt suppression FLAG is not suppressed, initiates an interrupt to inform software network that the data packet transmission is completed.
The method of this embodiment is mainly the content of the sixth step, referring to fig. 1, and the method of this embodiment includes the following steps:
step S10, the pointer convergence module receives at least two pointer values sent by the pointer sending module, if the continuous n pointer values in the at least two pointer values are sequentially increased, the burst number is determined to be n, and the first pointer value and the burst number in the continuous n pointer values are sent to the DMA reading request module; n is 2 or more.
Specifically, the virtual queue includes an available ring table, and a descriptor table, where the available ring table includes a plurality of pointers, and the descriptor table includes a plurality of descriptor table entries, as shown in fig. 4; in step S10, the pointer aggregation module receives at least two pointer values output by the pointer sending module, where the pointer values are addresses of descriptor entries in the descriptor table, and the corresponding descriptor entries can be found according to the pointer values; the pointer aggregation module determines whether n pointer values are sequentially incremented, for example, sequentially receives the pointer 1, the pointer 2, the pointer 3 and the pointer 4, and if the pointer values of the pointer 1, the pointer 2, the pointer 3 and the pointer 4 are incremented, the pointer 1, the pointer 2, the pointer 3 and the pointer 4 are aggregated to obtain one pointer value, wherein the one pointer value is the pointer 1 (the first pointer value), and the burst number is determined to be n.
Step S20, the DMA read request module generates a first DMA read request according to the first pointer value and the burst number, and sends the first DMA read request to the DMA processing module, so that the DMA processing module reads n pieces of descriptor table entry information of the descriptor table, and generates first response data according to the n pieces of descriptor table entry information.
Specifically, in the above example (the pointer aggregation module sequentially receives the pointers 1, 2, 3 and 4), the first DMA read request refers to the descriptor table entry information corresponding to n consecutive pointer values from which the pointer 1 starts to be read, and the DMA processing module reads the n descriptor table entry information (corresponding to the n pointer values) of the descriptor table in response to the first DMA read request.
Step S30, the DMA read response module receives and analyzes the first response data to obtain the n pieces of descriptor table item information, and if no next hop exists in the n pieces of descriptor table item information, the corresponding descriptor is obtained according to the n pieces of descriptor table item information.
Specifically, in step S30, the first response data returned by the DMA processing module may be parsed to obtain n descriptor table entry information corresponding to the n pointer values, where the descriptor table entry information is shown in fig. 4, where each action of the descriptor table in fig. 4 includes a buffer address, a buffer length, a flag, and a next hop (storage pointer value), whether there is a next hop is determined according to a flag bit of the descriptor table entry information, the next hop stores a descriptor table entry address (pointer value) of a next descriptor of a descriptor chain, and if any one of the n descriptor table entry information does not have a next hop, where the absence of the next hop refers to a case that a data packet has only one descriptor, and if there is no descriptor chain, the corresponding one descriptor is obtained according to the any one descriptor table entry information and sent to the data packet buffer reading module, so that the data packet reading module reads the corresponding one descriptor from the buffer address according to the one descriptor and sends the corresponding descriptor table entry to the downstream data packet receiving module; each finally obtained descriptor comprises a cache address and a cache length in descriptor table item information corresponding to each descriptor.
It should be noted that, as shown in fig. 5, in the conventional method, when the descriptor is read, the DMA read request module correspondingly generates a DMA read request each time a pointer value is received, the DMA processing module reads one descriptor table item information from the descriptor table according to the one DMA read request and returns the one descriptor table item information to the DMA read response module, and the DMA read response module obtains one descriptor (including a buffer address and a buffer length) according to the one descriptor table item information and sends the one descriptor to the data packet buffer reading module so that the data packet buffer reading module reads corresponding data from the buffer according to the one descriptor; for example, the pointer sending module sequentially sends 4 pointer values (pointer 1, pointer 2, pointer 3, pointer 4) to the descriptor table reading module, where the pointer values respectively point to different address locations of the descriptor table, and the DMA read request module in the descriptor table reading module respectively initiates the request 1, the request 2, the request 3 and the request 4 according to the address location information; after a delay, the response data (response 1, response 2, response 3, and response 4) of these read requests are sent back to the DMA read response module by the DMA processing module (not shown in the figure); and the DMA read response module analyzes the received response data, extracts the descriptor 1, the descriptor 2, the descriptor 3 and the descriptor 4, and outputs the descriptors to the downstream module.
Compared with the conventional method, the method of this embodiment merges the DMA read requests of n pointers with successively increasing pointer values into a first DMA read request, for example, as shown in fig. 2, the pointer aggregation module will first aggregate the pointer values (pointer 1, pointer 2, pointer 3, pointer 4), after receiving the response data, the DMA read response module will first parse the response data to obtain n corresponding descriptor table information (descriptor table information 1, descriptor table information 2, descriptor table information 3, descriptor table information 4), then determine the flag bit in each descriptor table information, if the flag bit indicates that there is no next hop, then generate n corresponding descriptors according to the cache address and the cache length in the n descriptor table information, and send the n corresponding descriptors to the packet cache read module.
Compared with the traditional method, the method of the embodiment can fully utilize the system data bandwidth, the DMA processing module returns first response data containing n pieces of descriptor table item information at one time, n pieces of descriptors are read at one time, the request/response times between the DMA processing module and the descriptor table reading module are reduced, the descriptor reading efficiency is greatly improved, the packet sending rate of the data packet is improved, and the problem of low packet sending rate of the data packet is solved.
In some embodiments, the method comprises:
and step S40, when at least one piece of descriptor table information in the n pieces of descriptor table information has a next hop, determining one piece of target descriptor table information according to the at least one piece of descriptor table information, and sending a pointer value of the next hop of the target descriptor table information to a DMA read request module.
Specifically, if the input pointer values are not sequentially incremented, convergence cannot be performed, and there are 2 possibilities for the reason why convergence cannot be performed: because of the existence of multiple descriptor chains (one chain needs to occupy multiple descriptors), the pointer to the chain-head descriptor is discontinuous from the subsequent pointer; since the descriptors are reclaimed out of order (present in the virtoio disk devices and not present in the network devices), the pointer values to these descriptors are discontinuous. In step S40, if any one of the n pieces of descriptor table information has a next hop, which indicates that there is an error in pointer value aggregation, as shown in fig. 4, n=2, pointer value 0 and pointer value 1 are aggregated, the first descriptor table information (corresponding to pointer value 0) of the descriptor table in fig. 4 has a next hop, and the next hop pointer points to pointer value 2 (third descriptor table information), and the DMA read response module sends pointer value 2 to the DMA read request module.
Wherein, the determining a target descriptor table item information according to the at least one description table item information specifically includes:
and determining target descriptor table item information according to at least one pointer value corresponding to the at least one descriptor table item information, and taking one descriptor table item information corresponding to the minimum pointer value in the at least one pointer value as the target descriptor table item information.
Step S50, a DMA read request module generates a second DMA read request according to the pointer value of the next hop and the set burst number m, and sends the second DMA read request to the DMA processing module, so that the DMA processing module reads m descriptor table item information of the descriptor table and generates second response data; m is 1 or more.
Specifically, the DMA read request module receives a pointer value 2, generates a second DMA read request according to the pointer value 2, and sends the second DMA read request to the DMA processing module, and the DMA processing module reads the continuous m pieces of descriptor table entry information starting with the pointer value 2 in response to the second DMA read request, and generates corresponding second response data according to the continuous m pieces of descriptor table entry information starting with the pointer value 2 (i.e., m pieces of descriptor table entry information corresponding to the pointer values 2 to m+1).
Step S60, the DMA read response module receives and analyzes the second response data to obtain m pieces of descriptor table item information; and if the descriptor table item information corresponding to the pointer value of the next hop does not exist in the m descriptor table item information, acquiring a corresponding descriptor according to the descriptor table item information corresponding to the pointer value of the next hop in the m descriptor table item information.
Specifically, if the first descriptor table of the m descriptor table information does not have the next hop, the method indicates that only one descriptor needs to be read, that is, the descriptor corresponding to the first descriptor table of the m descriptor table information. In step S60, the obtained descriptor is further sent to a packet buffer reading module, so that the packet buffer reading module reads the packet from the buffer according to the descriptor and sends the packet to the downstream module.
It should be noted that, the length of one descriptor table item information is 16 bytes, and under the condition that the internal data width of the system is 64 bytes, the effective byte of one DMA read in the traditional method only occupies 1/4, if the effective byte is read only 16 bytes each time, the bandwidth of 48 bytes is wasted, therefore, when the second descriptor of the descriptor chain needs to be continuously read, the DMA read request module still initiates a read request of 64 bytes of data in this embodiment, which is a data reading mode with detection property, and if the returned 64 bytes of data is just a plurality of continuous descriptors of one descriptor chain, the bandwidth of 3/4 is not wasted, which is beneficial to further reducing the request/response times between the DMA processing module and the descriptor table read module, greatly improving the descriptor read efficiency, thereby improving the packet sending rate of the data packet and solving the problem of low packet sending rate.
In some embodiments, the step S60 further includes:
if the descriptor table information corresponding to the pointer value of the next hop exists in the m pieces of descriptor table information, and the descriptor table information corresponding to the pointer value of the next hop of the descriptor table information is one of the m pieces of descriptor table information, the DMA read response module judges whether the descriptor table information corresponding to the pointer value of the next hop of the descriptor table information exists in the next hop, and if the descriptor table information does not exist, the corresponding descriptor is obtained according to the descriptor table information and the descriptor table information corresponding to the pointer value of the next hop (at this time, the descriptor chain to be read has only 2 descriptors); if there are at least 3 descriptors in the descriptor chain to be read, continuing to determine whether the 3 rd descriptor is in the m descriptor table information, if so, directly obtaining the 3 rd descriptor, and the like until the last descriptor in the descriptor chain is found, and if the found descriptor is not in the m descriptor table information, requesting the DMA processing module to read the corresponding descriptor table information again, namely repeating the steps S50 and 60.
It should be noted that, in this embodiment, 64 bytes of data returned by the heuristic read data are just 2/3/4 continuous descriptors of one descriptor chain, which makes full use of the system data bandwidth, is beneficial to further reducing the request/response times between the DMA processing module and the descriptor table reading module, and greatly improves the descriptor reading efficiency, thereby improving the packet sending rate and solving the problem of low packet sending rate.
In some embodiments, the step S60 further includes:
if the descriptor entry information corresponding to the pointer value of the next hop in the m pieces of descriptor entry information in step S60 has the next hop, and the descriptor entry information corresponding to the pointer value of the next hop in the descriptor entry information is not one of the m pieces of descriptor entry information, the DMA read response module sends the pointer value of the next hop in the descriptor entry information to the DMA read request module.
Specifically, if the descriptor entry information corresponding to the pointer value of the next hop in the m descriptor entry information has the next hop, the existence of a descriptor chain is indicated, and other descriptors of the descriptor chain need to be continuously acquired; however, the 2 nd descriptor of the descriptor chain is not in the m descriptor table item information, so interaction with the DMA processing module is required, and the DMA processing module is requested to read and return the 2 nd descriptor of the descriptor chain; and the DMA read response module sends the pointer value of the next hop of the descriptor table item information corresponding to the pointer value of the next hop in the m descriptor table item information to the DMA read request module, and the DMA read request module initiates the read request flow again, namely, the steps S70-S80.
The method further comprises the steps of:
step S70, a DMA read request module generates a third DMA read request according to the pointer value of the next hop of the descriptor table information and the set burst number m, and sends the third DMA read request to the DMA processing module, so that the DMA processing module reads continuous m pieces of descriptor table information starting with the pointer value of the next hop of the descriptor table information in the descriptor table, and generates third response data according to the m pieces of descriptor table information; the third response data contains the consecutive m descriptor table item information.
Step S80, the DMA read response module receives and analyzes the third response data to obtain the m pieces of descriptor table item information, and obtains corresponding descriptors according to the m pieces of descriptor table item information.
Specifically, the process of obtaining the corresponding descriptors according to the m descriptor table entry information in step S80 is the same as that of step S60, and the method of this embodiment continuously repeats steps S60 to S80 until all descriptors of the descriptor chain are successfully obtained.
In some embodiments, the method further comprises:
in step S90, when the DMA read request module receives the pointer value of the DMA read response module and the pointer value of the pointer aggregation module at the same time, the DMA read request module preferentially processes the pointer value of the DMA read response module.
Specifically, the priority of the pointer value returned by the DMA read response module is higher than the pointer value input by the pointer aggregation module, and the pointer value input by the pointer aggregation module is processed only after the pointer value returned by the DMA read response module is processed.
In some embodiments, the method comprises:
step S100, when at least one descriptor table item in the n descriptor table item information has a next hop, determining a target descriptor table item according to the at least one descriptor table item, and if the pointer value corresponding to the target descriptor table item is not the maximum pointer value of the n pointer values, transmitting all the pointer values after the pointer value corresponding to the target descriptor table item to the pointer transmitting module by the DMA read response module.
Wherein, the determining a target descriptor table item information according to the at least one description table item information specifically includes:
and determining target descriptor table item information according to at least one pointer value corresponding to the at least one descriptor table item information, and taking one descriptor table item information corresponding to the minimum pointer value in the at least one pointer value as the target descriptor table item information.
For example, the pointer sending module sequentially sends 4 pointer values (pointer 1, pointer 2, pointer 3, pointer 4) to the descriptor table reading module, where the pointer values respectively point to different address locations of the descriptor table, and the DMA read request module in the descriptor table reading module respectively initiates the request 1, the request 2, the request 3 and the request 4 according to the address location information; after a delay, the response data (response 1, response 2, response 3 and response 4) of the read requests are sent back to the DMA read response module by the DMA processing module; the DMA read response module analyzes the received response data to obtain descriptor table item information 1, descriptor table item information 2, descriptor table item information 3 and descriptor table item information 4, at this time, the descriptor table item information 2, descriptor table item information 3 have the next hop, the descriptor table item information 1, descriptor table item information 2, descriptor table item information 3 and descriptor table item information 4 are in one-to-one correspondence with the pointer 1, the pointer 2, the pointer 3 and the pointer 4, as described above, n pointer values are incremental, the pointer value of the pointer 2 is the smallest, and the descriptor table item information 2 corresponds to the pointer value 2, so that the descriptor table item information 2 is the target descriptor table item information, and simultaneously, the pointer values 3 and 4 corresponding to the descriptor table item information 3 and the descriptor table item information 4 are sent to the pointer sending module.
Step S110, the pointer sending module sends all the pointer values to the pointer aggregation module.
Specifically, the pointer sending module may send the pointer value returned by the DMA read response module preferentially after receiving the pointer value returned by the DMA read response module.
In some embodiments, n is less than or equal to a quotient of a PCIE bandwidth of a system in which the descriptor table reading module is located and a length of the descriptor table entry, and m is equal to a quotient of a PCIE bandwidth of a system in which the descriptor table reading module is located and a length of the descriptor table entry.
Another embodiment of the present application further provides a descriptor table reading module, as shown in fig. 2, including a pointer aggregation module, a DMA read request module, and a DMA read response module for implementing the method described in the foregoing embodiments.
The pointer convergence module is used for receiving the at least two pointer values sent by the pointer sending module, if the continuous n pointer values in the at least two pointer values are sequentially increased, determining the burst number as n, and sending the first pointer value and the burst number in the continuous n pointer values to the DMA reading request module; n is greater than or equal to 2;
the DMA reading request module is used for generating a first DMA reading request according to the first pointer value and the burst number, and sending the first DMA reading request to the DMA processing module so that the DMA processing module reads n pieces of descriptor table item information of the descriptor table and generates first response data according to the n pieces of descriptor table item information;
And the DMA reading response module is used for receiving and analyzing the first response data to obtain the n pieces of descriptor table item information, and if no next hop exists in the n pieces of descriptor table item information, the corresponding descriptor is obtained according to the n pieces of descriptor table item information.
In some embodiments, the DMA read response module is further configured to, when at least one of the n pieces of descriptor entry information has a next hop, determine a piece of target descriptor entry information according to the at least one piece of descriptor entry information, and send a pointer value of the next hop of the piece of target descriptor entry information to the DMA read request module;
the DMA read request module is further used for generating a second DMA read request according to the pointer value of the next hop and the set burst number m, and sending the second DMA read request to the DMA processing module, so that the DMA processing module reads the m descriptor table item information of the descriptor table and generates second response data; m is greater than or equal to 1;
the DMA read response module is also used for receiving and analyzing the second response data to obtain m pieces of descriptor table item information; and if the descriptor table item information corresponding to the pointer value of the next hop does not exist in the m descriptor table item information, acquiring a corresponding descriptor according to the descriptor table item information corresponding to the pointer value of the next hop.
In some embodiments, the DMA read response module is further configured to determine whether there is a next hop in the descriptor table entry information corresponding to the pointer value of the next hop, if there is a next hop in the descriptor table entry information corresponding to the pointer value of the next hop, and if the descriptor table entry information corresponding to the pointer value of the next hop in the descriptor table entry information is one of the m descriptor table entry information, and if not, obtain a corresponding descriptor according to the descriptor table entry information and the descriptor table entry information corresponding to the pointer value of the next hop.
In some embodiments, the DMA read response module is further configured to send the pointer value of the next hop of the descriptor entry information to the DMA read request module if the descriptor entry information corresponding to the pointer value of the next hop of the m descriptor entry information has the next hop, and the descriptor entry information corresponding to the pointer value of the next hop of the descriptor entry information is not one of the m descriptor entry information;
the DMA read request module is further used for generating a third DMA read request according to the pointer value of the next hop of the descriptor table information and the set burst number m, and sending the third DMA read request to the DMA processing module, so that the DMA processing module reads continuous m pieces of descriptor table information starting with the pointer value of the next hop of the descriptor table information in the descriptor table, and generates third response data according to the m pieces of descriptor table information;
And the DMA reading response module is also used for receiving and analyzing the third response data to obtain the m pieces of descriptor table item information and obtaining corresponding descriptors according to the m pieces of descriptor table item information.
In some embodiments, the DMA read request module is further configured to prioritize the pointer value of the DMA read response module when it receives both the pointer value of the DMA read response module and the pointer value of the pointer aggregation module.
In some embodiments, the DMA read response module is further configured to determine, when at least one descriptor entry information in the n descriptor entry information has a next hop, one target descriptor entry information according to the at least one descriptor entry information, and if a pointer value corresponding to the target descriptor entry information is not a maximum pointer value of the n pointer values, send all pointer values after the pointer value corresponding to the target descriptor entry information to the pointer sending module;
the pointer sending module is further configured to send all the pointer values to the pointer aggregation module.
It should be noted that, the functions (the executed method steps) implemented by the pointer aggregation module, the DMA read request module and the DMA read response module are described in detail in the method of the above embodiment, so that a detailed description is omitted in this embodiment.
The descriptor table reading module of the above-described embodiment is merely illustrative, in which the module illustrated as a separate component may or may not be physically separate, and the component as a module may or may not be a physical module, i.e. may be located in one place, or may be distributed over multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the descriptor table reading module of the embodiment.
As shown in fig. 6, another embodiment of the present application provides a virtoio backend device, including: the device comprises a pointer sending module, a data packet buffer reading module and the descriptor table reading module described in the above embodiment;
in some embodiments, the pointer sending module is specifically an available ring table reading module, configured to read at least two pointer values of an available ring table of the virtual queue, and send the at least two pointer values to the descriptor table reading module; and receiving the pointer value returned by the DMA read response module, and sending the pointer value returned by the DMA read response module to the descriptor table reading module.
And the data packet buffer reading module is used for reading the data packet from the buffer according to at least one descriptor output by the descriptor table reading module and sending the data packet to the downstream module.
Another embodiment of the present application also proposes a computer-readable storage medium storing a computer program that, when executed by a processor, implements the descriptor table reading method according to the above embodiment.
In particular, the computer-readable storage medium may include: any entity or recording medium, a USB flash disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), an electrical carrier signal, a telecommunications signal, a software distribution medium, etc. capable of carrying the computer program instructions.
Another embodiment of the present application provides an electronic device, including a processor, a memory, and a computer program stored in the memory and capable of running on the processor, where the processor implements the descriptor table reading method described in the foregoing embodiment when executing the program.
The electronic device may also include a bus that connects the different components, including the memory and the processor. The memory may include computer-readable media in the form of volatile memory, such as Random Access Memory (RAM) and/or cache memory. The memory may also include at least one program product having a set (e.g., at least one) of program modules configured to carry out the functions of the embodiments of the application. The electronic device may also communicate with one or more external devices (e.g., keyboard, pointing device, display, etc.), with one or more devices that enable a user to interact with the electronic device, and/or with any device (e.g., network card) that enables the electronic device to communicate with one or more other computing devices, such communication may be through an input/output (I/O) interface, and the electronic device may also communicate with one or more networks (e.g., a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network, such as the internet) through a network adapter.
Another embodiment of the present application provides a chip, including the virtoio backend device described in the foregoing embodiment.
The foregoing description of embodiments of the application has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or the technical improvements in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (17)
1. The descriptor table reading method is characterized by being realized based on a descriptor table reading module, wherein the descriptor table reading module comprises a pointer aggregation module, a DMA reading request module and a DMA reading response module;
the method comprises the following steps:
the pointer convergence module receives at least two pointer values sent by the pointer sending module, if the continuous n pointer values in the at least two pointer values are sequentially increased, the burst number is determined to be n, and the first pointer value and the burst number in the continuous n pointer values are sent to the DMA reading request module; n is greater than or equal to 2;
The DMA read request module generates a first DMA read request according to the first pointer value and the burst number, and sends the first DMA read request to the DMA processing module, so that the DMA processing module reads n pieces of descriptor table entry information of a descriptor table, and generates first response data according to the n pieces of descriptor table entry information;
and the DMA read response module receives and analyzes the first response data to obtain the n pieces of descriptor table item information, and if no next hop exists in the n pieces of descriptor table item information, the corresponding descriptor is obtained according to the n pieces of descriptor table item information.
2. The method according to claim 1, characterized in that the method comprises:
when at least one piece of descriptor table information in the n pieces of descriptor table information has a next hop, determining target descriptor table information according to the at least one piece of descriptor table information, and sending a pointer value of the next hop of the target descriptor table information to a DMA read request module;
the DMA read request module generates a second DMA read request according to the pointer value of the next hop and the set burst number m, and sends the second DMA read request to the DMA processing module, so that the DMA processing module reads m descriptor table item information of the descriptor table and generates second response data; m is greater than or equal to 1;
The DMA read response module receives and analyzes the second response data to obtain m pieces of descriptor table item information; and if the descriptor table item information corresponding to the pointer value of the next hop does not exist in the m descriptor table item information, acquiring a corresponding descriptor according to the descriptor table item information corresponding to the pointer value of the next hop.
3. The method according to claim 2, characterized in that the method comprises:
if the descriptor table information corresponding to the pointer value of the next hop exists in the m pieces of descriptor table information, and the descriptor table information corresponding to the pointer value of the next hop of the descriptor table information is one piece of the m pieces of descriptor table information, the DMA read response module judges whether the descriptor table information corresponding to the pointer value of the next hop of the descriptor table information exists or not, and if the descriptor table information does not exist, the corresponding descriptor is obtained according to the descriptor table information and the descriptor table information corresponding to the pointer value of the next hop of the descriptor table information.
4. A method according to claim 3, characterized in that the method comprises:
if the descriptor table information corresponding to the pointer value of the next hop exists in the m pieces of descriptor table information, and the descriptor table information corresponding to the pointer value of the next hop of the descriptor table information is not one of the m pieces of descriptor table information, the DMA read response module sends the pointer value of the next hop of the descriptor table information to the DMA read request module;
The DMA read request module generates a third DMA read request according to the pointer value of the next hop of the descriptor table information and the set burst number m, and sends the third DMA read request to the DMA processing module, so that the DMA processing module reads continuous m pieces of descriptor table information starting with the pointer value of the next hop of the descriptor table information in the descriptor table, and generates third response data according to the m pieces of descriptor table information;
and the DMA read response module receives and analyzes the third response data to obtain the m pieces of descriptor table item information, and obtains corresponding descriptors according to the m pieces of descriptor table item information.
5. The method according to any one of claims 2-4, characterized in that the method comprises:
when the DMA read request module receives the pointer value of the DMA read response module and the pointer value of the pointer convergence module at the same time, the DMA read request module preferentially processes the pointer value of the DMA read response module.
6. The method according to claim 1, characterized in that the method comprises:
when at least one piece of descriptor table information in the n pieces of descriptor table information has the next jump, determining one piece of target descriptor table information according to the at least one piece of descriptor table information, and if the pointer value corresponding to the target descriptor table information is not the maximum pointer value of the n pieces of pointer values, transmitting all pointer values after the pointer value corresponding to the target descriptor table information to the pointer transmitting module by the DMA reading response module;
And the pointer sending module sends all the pointer values to the pointer aggregation module.
7. The method of any of claims 2-4 and 6, wherein n is less than or equal to a quotient of a PCIE bandwidth of a system in which the descriptor table reading module is located and a length of the descriptor table entry, and m is equal to a quotient of a PCIE bandwidth of a system in which the descriptor table reading module is located and a length of the descriptor table entry.
8. A descriptor table reading module comprising:
the pointer convergence module is used for receiving the at least two pointer values sent by the pointer sending module, if the continuous n pointer values in the at least two pointer values are sequentially increased, determining the burst number as n, and sending the first pointer value and the burst number in the continuous n pointer values to the DMA reading request module; n is greater than or equal to 2;
the DMA reading request module is used for generating a first DMA reading request according to the first pointer value and the burst number, and sending the first DMA reading request to the DMA processing module so that the DMA processing module reads n pieces of descriptor table item information of the descriptor table and generates first response data according to the n pieces of descriptor table item information;
And the DMA reading response module is used for receiving and analyzing the first response data to obtain the n pieces of descriptor table item information, and if no next hop exists in the n pieces of descriptor table item information, the corresponding descriptor is obtained according to the n pieces of descriptor table item information.
9. The descriptor table reading module of claim 8, wherein,
the DMA read response module is further used for determining one piece of target descriptor table item information according to at least one piece of descriptor table item information when the next hop exists in at least one piece of descriptor table item information in the n pieces of descriptor table item information, and sending a pointer value of the next hop of the target descriptor table item information to the DMA read request module;
the DMA read request module is further used for generating a second DMA read request according to the pointer value of the next hop and the set burst number m, and sending the second DMA read request to the DMA processing module, so that the DMA processing module reads the m descriptor table item information of the descriptor table and generates second response data; m is greater than or equal to 1;
the DMA read response module is also used for receiving and analyzing the second response data to obtain m pieces of descriptor table item information; and if the descriptor table item information corresponding to the pointer value of the next hop does not exist in the m descriptor table item information, acquiring a corresponding descriptor according to the descriptor table item information corresponding to the pointer value of the next hop.
10. The descriptor table reading module of claim 9, wherein,
and the DMA read response module is further used for judging whether the descriptor table item information corresponding to the pointer value of the next hop of the descriptor table item information exists in the next hop or not if the descriptor table item information corresponding to the pointer value of the next hop exists in the m descriptor table item information, and acquiring a corresponding descriptor according to the descriptor table item information and the descriptor table item information corresponding to the pointer value of the next hop if the descriptor table item information corresponding to the pointer value of the next hop does not exist.
11. The descriptor table reading module of claim 10, wherein,
the DMA read response module is further configured to send the pointer value of the next hop of the descriptor entry information to the DMA read request module if the descriptor entry information corresponding to the pointer value of the next hop of the m descriptor entry information has the next hop, and the descriptor entry information corresponding to the pointer value of the next hop of the descriptor entry information is not one of the m descriptor entry information;
The DMA read request module is further used for generating a third DMA read request according to the pointer value of the next hop of the descriptor table information and the set burst number m, and sending the third DMA read request to the DMA processing module, so that the DMA processing module reads continuous m pieces of descriptor table information starting with the pointer value of the next hop of the descriptor table information in the descriptor table, and generates third response data according to the m pieces of descriptor table information;
and the DMA reading response module is also used for receiving and analyzing the third response data to obtain the m pieces of descriptor table item information and obtaining corresponding descriptors according to the m pieces of descriptor table item information.
12. The descriptor table reading module according to any one of claims 9-11, wherein,
and the DMA read request module is also used for preferentially processing the pointer value of the DMA read response module when receiving the pointer value of the DMA read response module and the pointer value of the pointer convergence module at the same time.
13. The descriptor table reading module according to claim 8, wherein the DMA read response module is further configured to determine, when at least one of the n pieces of descriptor table entry information has a next hop, a piece of target descriptor table entry information according to the at least one piece of descriptor table entry information, and if the pointer value corresponding to the piece of target descriptor table entry information is not the largest pointer value of the n pieces of pointer values, send all pointer values after the pointer value corresponding to the piece of target descriptor table entry information to the pointer sending module;
The pointer sending module is further configured to send all the pointer values to the pointer aggregation module.
14. The virtoio backend device, comprising the descriptor table reading module of any one of claims 8-13.
15. A computer readable storage medium, characterized in that the computer readable storage medium stores a computer program which, when executed by a processor, implements the descriptor table reading method according to any one of claims 1 to 7.
16. An electronic device comprising a processor, a memory and a computer program stored on the memory and adapted to run on the processor, characterized in that the processor implements the descriptor table reading method according to any one of the preceding claims 1-7 when executing the computer program.
17. A chip comprising the virtoio backend device of claim 14.
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| CN115113977A (en) * | 2022-06-30 | 2022-09-27 | 深圳云豹智能有限公司 | Descriptor reading apparatus and device, method and integrated circuit |
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| US7631106B2 (en) * | 2002-08-15 | 2009-12-08 | Mellanox Technologies Ltd. | Prefetching of receive queue descriptors |
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| CN101221543A (en) * | 2007-01-10 | 2008-07-16 | 国际商业机器公司 | Descriptor prefetch mechanism for high latency and out of order DMA device |
| CN105122228A (en) * | 2013-04-17 | 2015-12-02 | 密克罗奇普技术公司 | Direct memory access controller with hybrid scatter-gather functionality |
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