CN116540947B - Method and device for erasing and writing data, storage medium and single chip microcomputer - Google Patents

Method and device for erasing and writing data, storage medium and single chip microcomputer Download PDF

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Publication number
CN116540947B
CN116540947B CN202310809233.5A CN202310809233A CN116540947B CN 116540947 B CN116540947 B CN 116540947B CN 202310809233 A CN202310809233 A CN 202310809233A CN 116540947 B CN116540947 B CN 116540947B
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target
erasing
nonvolatile memory
function
nonvolatile
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CN116540947A (en
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程雯
张恩勤
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Hefei Smart Chip Semiconductor Co ltd
Shanghai Sasha Mai Semiconductor Co ltd
Tianjin Smart Core Semiconductor Technology Co ltd
Suzhou Sasama Semiconductor Co ltd
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Hefei Smart Chip Semiconductor Co ltd
Shanghai Sasha Mai Semiconductor Co ltd
Tianjin Smart Core Semiconductor Technology Co ltd
Suzhou Sasama Semiconductor Co ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/062—Securing storage systems
    • G06F3/0622—Securing storage systems in relation to access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1408—Protection against unauthorised use of memory or access to memory by using cryptography
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638—Organizing or formatting or addressing of data
    • G06F3/064—Management of blocks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0652—Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The invention discloses a method, a device, a storage medium and a singlechip for erasing data, wherein the singlechip comprises a volatile memory and N nonvolatile memories, the volatile memory comprises N reserved spaces, the N reserved spaces are in one-to-one correspondence with the N nonvolatile memories, and the method for erasing data comprises the following steps: reading ciphertext of a target erasing function of the nonvolatile memory to be erased and a corresponding target key from the N nonvolatile memories; decrypting the ciphertext of the target erasing function according to the target secret key to obtain the target erasing function; storing the target erasing function into a corresponding target reserved space in the volatile memory; and performing erasing operation on the target nonvolatile memory by using the target erasing function stored in the target reserved space. The method for erasing the data can effectively prevent the misoperation of erasing the nonvolatile memory, protect the data and codes of the nonvolatile memory, is applicable to all application scenes and all single-chip computers, and is simple and practical.

Description

Method and device for erasing and writing data, storage medium and single chip microcomputer
Technical Field
The present invention relates to the field of single chip microcomputer technologies, and in particular, to a method and an apparatus for erasing and writing data, a storage medium, and a single chip microcomputer.
Background
The single chip microcomputer generally has a nonvolatile Memory, such as a flash Memory and an EEPROM (Electrically Erasable Programmable Read-Only Memory) for storing codes and data. If such code and data needs to be modified, the contents of the non-volatile memory need to be modified by calling erase and write functions in the driver. Therefore, the erase and write functions of the nonvolatile memory are also typically stored in the nonvolatile memory. Under some abnormal conditions, such as program run-out, the erasing and writing functions are called by mistake, data can be erased or written by mistake, original codes or data are damaged, and when the power is on again, the program cannot be started normally or important data are damaged.
In the related art, there are two general schemes for solving the above problems, one of which is to add a write protection function to a nonvolatile memory, and to unlock the nonvolatile memory before executing an erasing command. By adding the unlocking step, the probability of erroneous erasure is reduced. This approach solves this problem to some extent, but requires nonvolatile memory hardware to support write protection functions. For devices that are not supported by hardware, this approach is not applicable. In addition, since the unlocked program is stored in the nonvolatile memory, there is a certain probability that erroneous erasure may occur. The other is to use bootloader program, and the erasing and writing functions of the nonvolatile memory in the bootloader program are not stored in the singlechip. When the nonvolatile memory is required to be erased, the upper computer downloads the erasing and writing functions to the volatile memory of the singlechip through the communication port, and after the erasing operation is finished, the contents of the erasing and writing functions are cleared. The method can solve the problem of misoperation of bootloader programs on the nonvolatile memory, but the matching of an upper computer is needed. And this method is only applicable to bootloader and not applicable to other applications. In general applications, it is also necessary to rewrite data in the nonvolatile memory, but there is no host computer capable of downloading the erase and write functions, and in the case of an abnormality, it is impossible to prevent the contents of the nonvolatile memory from being rewritten by mistake.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems in the related art to some extent. Therefore, an object of the present invention is to provide a method, an apparatus, a storage medium and a single chip microcomputer for erasing data, which can effectively prevent the erroneous erasing operation of a nonvolatile memory, protect the data and codes of the nonvolatile memory, and do not need the participation of a host computer or the write protection function of hardware, and is suitable for all application scenes and all single chip computers, and has strong versatility, simplicity and practicality.
In order to achieve the above objective, an embodiment of a first aspect of the present invention provides a method for erasing data, the method is applied to a single chip microcomputer, the single chip microcomputer includes a volatile memory and N nonvolatile memories, the volatile memory includes N reserved spaces, the N reserved spaces are in one-to-one correspondence with the N nonvolatile memories, and N is a positive integer, the method includes: reading ciphertext of a target erasing function of the nonvolatile memory to be erased and corresponding target keys from N nonvolatile memories; decrypting the ciphertext of the target erasing function according to the target key to obtain the target erasing function; storing the target erasing function into a corresponding target reserved space in the volatile memory; and performing erasing operation on the target nonvolatile memory by using the target erasing function stored in the target reserved space.
In addition, the method for erasing data according to the above embodiment of the present invention may further have the following additional technical features:
according to one embodiment of the present invention, after performing an erasing operation on the target nonvolatile memory, the method includes: and clearing the target erasing function stored in the target reserved space.
According to one embodiment of the invention, the method further comprises: compiling an erasing function of the nonvolatile memory aiming at each nonvolatile memory to obtain a bin file; encrypting the bin file according to a key corresponding to the nonvolatile memory to obtain a ciphertext of an erasing function of the nonvolatile memory; the key of the non-volatile memory and the ciphertext of the erasure function are stored to one of the N non-volatile memories.
According to one embodiment of the invention, the keys of all the nonvolatile memories and the ciphertext of the erasing function are stored in a preset nonvolatile memory.
According to one embodiment of the invention, the erasure function of all the non-volatile memories shares a key, or each of the non-volatile memories uses a separate key.
According to one embodiment of the invention, the ciphertext of the target erasure function is decrypted according to the target key using a decryption code or decryption hardware.
In order to achieve the above objective, an embodiment of a second aspect of the present invention provides a device for erasing data, the device being applied to a single chip microcomputer, the single chip microcomputer including a volatile memory and N nonvolatile memories, the volatile memory including N reserved spaces, the N reserved spaces and the N nonvolatile memories being in one-to-one correspondence, N being a positive integer, the device comprising: the reading module is used for reading ciphertext of a target erasing function of the nonvolatile memory to be erased and a corresponding target key from the N nonvolatile memories; the decryption module is used for decrypting the ciphertext of the target erasing function according to the target secret key to obtain the target erasing function; the storage module is used for storing the target erasing function into a corresponding target reserved space in the volatile memory; and the erasing module is used for erasing the target nonvolatile memory by utilizing the target erasing function stored in the target reserved space.
According to one embodiment of the invention, the apparatus further comprises: and the encryption module is used for compiling the erasing function of the nonvolatile memory for each nonvolatile memory to obtain a bin file, encrypting the bin file according to a key corresponding to the nonvolatile memory to obtain a ciphertext of the erasing function of the nonvolatile memory, and storing the key of the nonvolatile memory and the ciphertext of the erasing function into one of N nonvolatile memories.
To achieve the above object, an embodiment of a third aspect of the present invention provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements a method for erasing data as described above.
In order to achieve the above objective, a fourth embodiment of the present invention provides a single chip microcomputer, which includes a volatile memory, N nonvolatile memories, and a device for erasing and writing data as described above.
The method, the device, the storage medium and the singlechip for erasing data in the embodiment of the invention are characterized in that the singlechip comprises a volatile memory and N nonvolatile memories, and all erasing functions of the nonvolatile memories stored in the singlechip are encrypted, namely all the erasing functions of the nonvolatile memories are stored in a ciphertext form, and N different storage spaces are provided for storing the erasing functions of N different nonvolatile memories, so that the erasing functions of each nonvolatile memory are independently encrypted and do not interfere with each other. When the erasing operation is needed to be carried out on the nonvolatile memory, the erasing function of the nonvolatile memory is required to be decrypted and then stored in a reserved space corresponding to the volatile memory, the program carries out the erasing operation on the nonvolatile memory by calling the erasing function after decryption, and the erasing function of the nonvolatile memory in the volatile memory is cleared after the erasing operation is finished, so that the erasing operation on the nonvolatile memory can be effectively prevented, the data and codes of the nonvolatile memory are protected, the participation of an upper computer is not needed, the writing protection function of hardware is not needed, and the method is suitable for all application scenes and all single-chip computers, and has strong universality, simplicity and practicability.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a flow chart of a method of data erasure in accordance with one embodiment of the present invention;
FIG. 2 is a schematic diagram of nonvolatile memory erasure function ciphertext storage in accordance with one embodiment of the invention;
FIG. 3 is a schematic diagram of nonvolatile memory erase function storage in accordance with one embodiment of the present invention;
FIG. 4 is a flow chart of encrypting a nonvolatile memory erase function in accordance with one embodiment of the present invention;
FIG. 5 is a schematic diagram of an apparatus for erasing data according to one embodiment of the present invention;
FIG. 6 is a schematic diagram of a device for erasing data according to another embodiment of the present invention;
fig. 7 is a schematic diagram of a single chip microcomputer according to an embodiment of the present invention.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative and intended to explain the present invention and should not be construed as limiting the invention.
The method, the device, the storage medium and the singlechip for erasing data according to the embodiments of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.
FIG. 1 is a flow chart of a method of erasing data according to one embodiment of the present invention.
In one embodiment of the present invention, a method for erasing data is applied to a single chip microcomputer, the single chip microcomputer includes a volatile memory and N nonvolatile memories, the volatile memory includes N reserved spaces, the N reserved spaces and the N nonvolatile memories are in one-to-one correspondence, and N is a positive integer, as shown in fig. 1, the method for erasing data includes:
s1, the ciphertext of the target erasing function of the nonvolatile memory to be erased and the corresponding target key are read from N nonvolatile memories.
S2, decrypting the ciphertext of the target erasing function according to the target secret key to obtain the target erasing function.
And S3, storing the target erasing function into a corresponding target reserved space in the volatile memory.
S4, performing erasing operation on the target nonvolatile memory by using the target erasing function stored in the target reserved space.
In particular, in order to prevent data in the memory from being wrongly erased, the invention encrypts the erasing functions of the nonvolatile memory stored in the singlechip, namely the erasing functions of the nonvolatile memory are stored in the singlechip in the form of ciphertext. The invention is illustrated with a single chip microcomputer including N non-volatile memories and one volatile memory.
As in the example shown in fig. 2, the non-volatile memory is used to store code and data, and the ciphertext of the erasure function of the non-volatile memory, including the key, is also stored in the non-volatile memory. The erasing function of each nonvolatile memory is stored in the nonvolatile memory in an encrypted storage mode, the types of N nonvolatile memories can be various, and N different storage spaces are provided for protecting the erasing functions of the nonvolatile memories of various types. The erasing function of each nonvolatile memory is encrypted independently and does not interfere with each other.
Note that, in the example shown in fig. 1, the ciphertext of the erasure function of the N nonvolatile memories is stored in the nonvolatile memory 1, but in practice, the ciphertext of the erasure function of the N nonvolatile memories may be stored in any one or more nonvolatile memories, and the address of the deposit may be freely configured by the user.
The single chip microcomputer also comprises a volatile memory, the volatile memory comprises N reserved spaces, the N reserved spaces are in one-to-one correspondence with the N nonvolatile memories, and N is a positive integer. The reserved space of the volatile memory is used for temporarily storing the erasing function of the decrypted nonvolatile memory. By default, the N headspace writes in volatile memory are invalid, e.g., write all 0 s or all 1 s. So by default, there is no erase function of the non-volatile memory in the clear in the entire storage system. The encrypted ciphertext cannot be identified as an effective kernel instruction for the kernel of the singlechip, so that even if a program runs, the nonvolatile memory cannot be subjected to erroneous erasing operation, and the erroneous erasing operation can be effectively prevented.
When the data of a certain nonvolatile memory or a plurality of nonvolatile memories need to be erased, the erasing function of the nonvolatile memories needs to be decrypted, the decrypted data are stored in the corresponding reserved space in the volatile memories, and the program erases the nonvolatile memories by calling the decrypted erasing function.
Further specifically, firstly, ciphertext of a target erasing function of the nonvolatile memory to be erased and a corresponding target key are read from N nonvolatile memories, the ciphertext of the target erasing function and the corresponding target key are stored in the same nonvolatile memory, and the ciphertext of the target erasing function is decrypted according to a decryption algorithm in the target key to obtain the target erasing function. And storing the target erasing function into a corresponding target reserved space in the volatile memory. And then, according to the program, calling a target erasing function stored in the target reserved space to carry out erasing operation on the target nonvolatile memory.
In one embodiment of the invention, the ciphertext of the target erasure function is decrypted based on the target key using a decryption code or decryption hardware.
Specifically, when the ciphertext of the target erasing function is decrypted according to the decryption algorithm in the target key, if an encrypted and decrypted hardware module exists in the singlechip, the hardware module can be used for executing decryption operation. If the singlechip is not provided with a hardware encryption and decryption module, software codes can be used for realizing decryption operation.
In one embodiment of the present invention, after performing an erase operation on a target nonvolatile memory, the method includes: and clearing the target erasing function stored in the target reserved space.
Specifically, to protect the data in the nonvolatile memory from being erased by mistake, after the erasing operation is completed on the target nonvolatile memory, the target erasing function of the nonvolatile memory stored in the target reserved space is cleared, so that after the erasing operation is completed, the erasing function of the nonvolatile memory in the plaintext does not exist in the whole storage system.
As shown in fig. 3, when erasing data in the nonvolatile memory 1, firstly, the ciphertext of the erasing function stored in the nonvolatile memory 1 is decrypted to the reserved space corresponding to the volatile memory, the nonvolatile memory 1 is erased by using the erasing function of the nonvolatile memory 1 stored in the reserved space, and after the erasing operation is completed, the erasing function of the nonvolatile memory 1 in the reserved space of the volatile memory is cleared, that is, the state of the example shown in fig. 2 is restored.
In one embodiment of the present invention, as shown in fig. 4, the method for erasing data further includes:
s101, compiling the erasing function of each nonvolatile memory to obtain a bin file.
S102, encrypting the bin file according to the key corresponding to the nonvolatile memory to obtain the ciphertext of the erasing function of the nonvolatile memory.
S103, storing the key of the nonvolatile memory and the ciphertext of the erasing function into one of the N nonvolatile memories.
Specifically, before erasing data in the nonvolatile memories, it is necessary to perform an encryption operation on the erasing function of each nonvolatile memory, and store the encrypted ciphertext into the nonvolatile memories.
Further specifically, for each nonvolatile memory, firstly compiling an erasing function of a certain nonvolatile memory, converting the erasing function into a binary machine code, generating a bin file, encrypting the bin file according to a key corresponding to the nonvolatile memory to obtain a ciphertext of the erasing function of the nonvolatile memory, storing the key of the nonvolatile memory and the ciphertext of the erasing function into one of N nonvolatile memories, and performing the encryption operation on each nonvolatile memory, so that all the erasing functions of the nonvolatile memory exist in the ciphertext form.
It should be noted that, the above step of encrypting each nonvolatile memory may further update the ciphertext of the erasing function of the nonvolatile memory, and may be used to update the ciphertext of one or several or all of the erasing functions of the nonvolatile memory.
In one embodiment of the invention, the keys of all the nonvolatile memories and the ciphertext of the erasing function are stored in the preset nonvolatile memory.
Specifically, the erasing functions of the N nonvolatile memories are sequentially operated according to the steps, that is, ciphertext of the erasing functions of the N nonvolatile memories can be all stored in the nonvolatile memories of the single chip microcomputer, ciphertext of the erasing functions of the N nonvolatile memories can be stored in any one or more nonvolatile memories, and the stored addresses can be freely configured by a user. The erasing function of each nonvolatile memory is encrypted independently and does not interfere with each other.
The encryption algorithm may be a general algorithm or a private algorithm such as AES (Advanced Encryption Standard, advanced encryption algorithm), SM4 block cipher algorithm, RSA asymmetric encryption algorithm, ECC (Ellipse Curve Ctyptography, elliptic curve based algorithm), or the like.
In one embodiment of the invention, the erasure function of each non-volatile memory uses a common key, and the erasure functions of different non-volatile memories may use the same or different keys.
Specifically, as shown in the example of fig. 2, the ciphertext of the erasure functions of the N nonvolatile memories are all stored in the same nonvolatile memory 1, in which case the erasure functions of all nonvolatile memories can use a common key. If the ciphertext of the erasure function of the N nonvolatile memories is stored in different nonvolatile memories, a separate key may be used for each erasure function of the nonvolatile memories.
The method for erasing data in the embodiment of the invention encrypts all the erasing functions of the nonvolatile memories stored in the singlechip, namely, all the erasing functions of the nonvolatile memories are stored in the form of ciphertext, N different storage spaces are provided for storing the erasing functions of N different nonvolatile memories, and thus, the erasing functions of each nonvolatile memory are independently encrypted and do not interfere with each other. When the erasing operation is needed to be carried out on the nonvolatile memory, the erasing function of the nonvolatile memory is required to be decrypted and then stored in a reserved space corresponding to the volatile memory, the program carries out the erasing operation on the nonvolatile memory by calling the erasing function after decryption, and the erasing function of the nonvolatile memory in the volatile memory is cleared after the erasing operation is finished, so that the erasing operation on the nonvolatile memory can be effectively prevented, the data and codes of the nonvolatile memory are protected, the participation of an upper computer is not needed, the writing protection function of hardware is not needed, and the method is suitable for all application scenes and all single-chip computers, and has strong universality, simplicity and practicability.
The invention also provides a device for erasing and writing data.
In one embodiment of the present invention, the device 100 for erasing data is applied to a single chip microcomputer, the single chip microcomputer includes a volatile memory and N nonvolatile memories, the volatile memory includes N reserved spaces, the N reserved spaces are in one-to-one correspondence with the N nonvolatile memories, and N is a positive integer, as shown in fig. 5, the device 100 for erasing data includes:
the reading module 10 is configured to read ciphertext of a target erasing function of the nonvolatile memory to be erased and a corresponding target key from the N nonvolatile memories.
The decryption module 20 is configured to decrypt the ciphertext of the target erasure function according to the target key, thereby obtaining the target erasure function.
The storage module 30 is configured to store the target erasure function in a corresponding target reserved space in the volatile memory.
The erasing module 40 is configured to perform an erasing operation on the target nonvolatile memory by using the target erasing function stored in the target reserved space.
In one embodiment of the present invention, as shown in fig. 6, the apparatus for erasing data further includes: the encryption module 50 is configured to compile, for each nonvolatile memory, an erasure function of the nonvolatile memory to obtain a bin file, encrypt the bin file according to a key corresponding to the nonvolatile memory to obtain a ciphertext of the erasure function of the nonvolatile memory, and store the key of the nonvolatile memory and the ciphertext of the erasure function to one of the N nonvolatile memories.
The invention also proposes a computer readable storage medium.
In this embodiment, a computer program is stored on a computer readable storage medium, which when executed by a processor, implements a method of erasing data as described above.
The invention also provides a singlechip.
In this embodiment, as shown in fig. 7, the single-chip microcomputer 1000 includes a volatile memory, N nonvolatile memories, and the apparatus 100 for erasing data as described above.
The method, the device, the storage medium and the singlechip for erasing data in the embodiment of the invention are characterized in that the singlechip comprises a volatile memory and N nonvolatile memories, and all erasing functions of the nonvolatile memories stored in the singlechip are encrypted, namely all the erasing functions of the nonvolatile memories are stored in a ciphertext form, and N different storage spaces are provided for storing the erasing functions of N different nonvolatile memories, so that the erasing functions of each nonvolatile memory are independently encrypted and do not interfere with each other. When the erasing operation is needed to be carried out on the nonvolatile memory, the erasing function of the nonvolatile memory is required to be decrypted and then stored in a reserved space corresponding to the volatile memory, the program carries out the erasing operation on the nonvolatile memory by calling the erasing function after decryption, and the erasing function of the nonvolatile memory in the volatile memory is cleared after the erasing operation is finished, so that the erasing operation on the nonvolatile memory can be effectively prevented, the data and codes of the nonvolatile memory are protected, the participation of an upper computer is not needed, the writing protection function of hardware is not needed, and the method is suitable for all application scenes and all single-chip computers, and has strong universality, simplicity and practicability.
It should be noted that the logic and/or steps represented in the flowcharts or otherwise described herein, for example, may be considered as a ordered listing of executable instructions for implementing logical functions, and may be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer cartridge (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). In addition, the computer readable medium may even be paper or other suitable medium on which the program is printed, as the program may be electronically captured, via, for instance, optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner, if necessary, and then stored in a computer memory.
It is to be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above-described embodiments, the various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, may be implemented using any one or combination of the following techniques, as is well known in the art: discrete logic circuits having logic gates for implementing logic functions on data signals, application specific integrated circuits having suitable combinational logic gates, programmable Gate Arrays (PGAs), field Programmable Gate Arrays (FPGAs), and the like.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the device or element being referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present invention.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly, through intermediaries, or both, may be in communication with each other or in interaction with each other, unless expressly defined otherwise. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
In the present invention, unless expressly stated or limited otherwise, a first feature "up" or "down" a second feature may be the first and second features in direct contact, or the first and second features in indirect contact via an intervening medium. Moreover, a first feature being "above," "over" and "on" a second feature may be a first feature being directly above or obliquely above the second feature, or simply indicating that the first feature is level higher than the second feature. The first feature being "under", "below" and "beneath" the second feature may be the first feature being directly under or obliquely below the second feature, or simply indicating that the first feature is less level than the second feature.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.

Claims (10)

1. The method for erasing and writing data is characterized in that the method is applied to a single chip microcomputer, the single chip microcomputer comprises a volatile memory and N nonvolatile memories, the volatile memory comprises N reserved spaces, the N reserved spaces are in one-to-one correspondence with the N nonvolatile memories, and N is a positive integer, and the method comprises the following steps:
reading ciphertext of a target erasing function of the nonvolatile memory to be erased and corresponding target keys from N nonvolatile memories;
decrypting the ciphertext of the target erasing function according to the target key to obtain the target erasing function;
storing the target erasing function into a corresponding target reserved space in the volatile memory;
and performing erasing operation on the target nonvolatile memory by using the target erasing function stored in the target reserved space.
2. The method of claim 1, wherein after performing the erase operation on the target nonvolatile memory, comprising:
and clearing the target erasing function stored in the target reserved space.
3. The method of claim 1, further comprising:
compiling an erasing function of the nonvolatile memory aiming at each nonvolatile memory to obtain a bin file;
encrypting the bin file according to a key corresponding to the nonvolatile memory to obtain a ciphertext of an erasing function of the nonvolatile memory;
the key of the non-volatile memory and the ciphertext of the erasure function are stored to one of the N non-volatile memories.
4. The method of claim 1, wherein the keys of all the nonvolatile memories and the ciphertext of the erasing function are stored in a preset nonvolatile memory.
5. The method of claim 1, wherein the erasure function of all the non-volatile memories shares a key or each of the non-volatile memories uses a separate key.
6. The method of claim 5, wherein the ciphertext of the target erasure function is decrypted based on the target key using a decryption code or decryption hardware.
7. The utility model provides a device is used in to data erasure, its characterized in that, the device is applied to the singlechip, the singlechip includes volatile memory and N nonvolatile memory, the volatile memory includes N headspace, N the headspace with N nonvolatile memory one-to-one, N is positive integer, the device includes:
the reading module is used for reading ciphertext of a target erasing function of the nonvolatile memory to be erased and a corresponding target key from the N nonvolatile memories;
the decryption module is used for decrypting the ciphertext of the target erasing function according to the target secret key to obtain the target erasing function;
the storage module is used for storing the target erasing function into a corresponding target reserved space in the volatile memory;
and the erasing module is used for erasing and writing the target nonvolatile memory by utilizing the target erasing function stored in the target reserved space.
8. The apparatus for erasing data as set forth in claim 7, wherein the apparatus further comprises:
and the encryption module is used for compiling the erasing function of the nonvolatile memory for each nonvolatile memory to obtain a bin file, encrypting the bin file according to a key corresponding to the nonvolatile memory to obtain a ciphertext of the erasing function of the nonvolatile memory, and storing the key of the nonvolatile memory and the ciphertext of the erasing function into one of N nonvolatile memories.
9. A computer readable storage medium, on which a computer program is stored, which computer program, when being executed by a processor, implements a method of data erasure according to any of the claims 1-6.
10. A single chip microcomputer, comprising a volatile memory, N non-volatile memories and a device for erasing data as claimed in any one of claims 7 to 8.
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