CN116527438A - Single bus circuit and rotary steering logging instrument while drilling - Google Patents
Single bus circuit and rotary steering logging instrument while drilling Download PDFInfo
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- CN116527438A CN116527438A CN202310766914.8A CN202310766914A CN116527438A CN 116527438 A CN116527438 A CN 116527438A CN 202310766914 A CN202310766914 A CN 202310766914A CN 116527438 A CN116527438 A CN 116527438A
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- 238000005553 drilling Methods 0.000 title claims abstract description 18
- 238000004891 communication Methods 0.000 claims abstract description 65
- 239000003990 capacitor Substances 0.000 claims description 12
- 238000012545 processing Methods 0.000 claims description 5
- 230000009471 action Effects 0.000 claims description 2
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- 230000001105 regulatory effect Effects 0.000 claims 1
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- 230000005540 biological transmission Effects 0.000 description 7
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- 238000005516 engineering process Methods 0.000 description 3
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- 238000003491 array Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000007613 environmental effect Effects 0.000 description 1
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- 230000003993 interaction Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- 239000013307 optical fiber Substances 0.000 description 1
- 239000011435 rock Substances 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
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- E—FIXED CONSTRUCTIONS
- E21—EARTH OR ROCK DRILLING; MINING
- E21B—EARTH OR ROCK DRILLING; OBTAINING OIL, GAS, WATER, SOLUBLE OR MELTABLE MATERIALS OR A SLURRY OF MINERALS FROM WELLS
- E21B47/00—Survey of boreholes or wells
- E21B47/12—Means for transmitting measuring-signals or control signals from the well to the surface, or from the surface to the well, e.g. for logging while drilling
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/12—Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- General Life Sciences & Earth Sciences (AREA)
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- Arrangements For Transmission Of Measured Signals (AREA)
Abstract
The invention discloses a single bus circuit and a rotary steering logging instrument while drilling. The single bus circuit comprises a direct current bus and a plurality of communication nodes, wherein the communication nodes comprise an encoding circuit, a decoding circuit and a communication transformer, and the encoding circuit and the decoding circuit are respectively connected with the direct current bus through the communication transformer; after the coding circuit of any communication node generates the coding signal, the coding signal is coupled to the direct current bus through a corresponding communication transformer, and the decoding circuits of other communication nodes receive the coding signal through the corresponding communication transformers and decode the coding signal to obtain a decoding signal. The circuit can realize low space occupation.
Description
Technical Field
The invention relates to the technical field of logging while drilling, in particular to a single-bus circuit and rotary guiding logging instrument while drilling.
Background
Logging while drilling technology and rotary steering are key cores of modern drilling technology, the former is used for acquiring geophysical properties of underground rock and fluid in real time, and the latter is used for accurately controlling a drill bit to complete a complex three-dimensional borehole trajectory, and is a key technology for developing underground complex oil and gas resources.
In the practical application process, in order to realize logging while drilling and rotation guiding matched use, a reliable single bus system is required to ensure stable and efficient operation of equipment. However, the related art single bus circuit has a complex software algorithm, needs to include more than 20 signals such as a data transmission line, a clock line, a flag bit line, and the like, and also needs a corresponding number of pins, so that a dedicated chip is required, and a large space is occupied.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems in the related art to some extent. Therefore, a first object of the present invention is to provide a single bus circuit to reduce the occupied space.
A second object of the invention is to propose a rotary steerable logging while drilling instrument.
To achieve the above object, an embodiment of a first aspect of the present invention provides a single bus circuit, the circuit including a dc bus and a plurality of communication nodes, the communication nodes including an encoding circuit, a decoding circuit, and a communication transformer, the encoding circuit and the decoding circuit being connected to the dc bus through the communication transformer, respectively; after the coding circuit of any communication node generates a coding signal, the coding signal is coupled to the direct current bus through a corresponding communication transformer, and the decoding circuits of other communication nodes receive the coding signal through corresponding communication transformers and decode the coding signal to obtain a decoding signal.
To achieve the above objective, a second aspect of the present invention provides a rotary steerable logging while drilling tool, which includes the single bus circuit described above.
According to the single bus circuit and the rotary while-drilling guiding logging instrument, the direct current bus and the communication nodes are arranged, each communication node comprises the coding circuit, the decoding circuit and the communication transformer, the coding circuit couples the coding signals to the direct current bus through the communication transformer, and the decoding circuit receives the coding signals through the communication transformer and performs decoding processing, so that the reliable single bus circuit is designed, a special chip is not needed, and the occupied space is small.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a schematic diagram of a single bus circuit in accordance with one or more embodiments of the invention;
FIG. 2 is a schematic diagram of a communication transformer according to one or more embodiments of the present invention;
FIG. 3 is a schematic representation of an exemplary encoded signal of the present invention;
FIG. 4 is a circuit diagram of an encoding circuit according to one embodiment of the present invention;
FIG. 5 is a schematic diagram of another exemplary encoded signal of the present invention;
FIG. 6 is a block diagram of a decoding circuit in accordance with one or more embodiments of the invention;
FIG. 7 is a schematic diagram of a decoded signal of one example of the present invention;
FIG. 8 is a circuit diagram of a gain subcircuit according to one embodiment of the present invention;
FIG. 9 is a circuit diagram of a reference sub-circuit in accordance with one embodiment of the present invention;
FIG. 10 is a circuit diagram of a comparison subcircuit of an embodiment of the present invention;
FIG. 11 is a circuit diagram of a decoding circuit according to one example of the present invention;
FIG. 12 is a schematic diagram of the architecture of an exemplary single bus circuit of the present invention;
FIG. 13 is a schematic diagram of a power node according to an embodiment of the present invention;
FIG. 14 is a block diagram of a rotary steerable logging while drilling instrument according to an embodiment of the present invention.
Detailed Description
The single bus circuit, rotary steerable while drilling logging instrument of embodiments of the present invention is described below with reference to the drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described with reference to the drawings are exemplary and should not be construed as limiting the invention.
FIG. 1 is a schematic diagram of a single bus circuit in accordance with one or more embodiments of the invention.
As shown in fig. 1, the single bus circuit 10 includes a direct current bus DC and a plurality of communication nodes 100, the communication nodes 100 include an encoding circuit 101, a decoding circuit 102, and a communication transformer 103, and the encoding circuit 101 and the decoding circuit 102 are respectively connected to the direct current bus DC through the communication transformer 103.
After the encoding circuit 101 of any communication node 100 generates the encoded signal, the encoded signal is coupled to the DC bus DC through the corresponding communication transformer 103, and the decoding circuits 102 of other communication nodes 100 receive the encoded signal through the corresponding communication transformers 103 and decode the encoded signal to obtain a decoded signal.
Therefore, the direct current bus DC and the plurality of communication nodes 100 are arranged, each communication node 100 comprises an encoding circuit 101, a decoding circuit 102 and a communication transformer 103, the encoding circuit 101 couples encoding signals to the direct current bus DC through the communication transformer 103, the decoding circuit 102 receives the encoding signals through the communication transformer 103 and performs decoding processing, so that the reliable single bus circuit 10 is designed, in the circuit, an MCU (Micro Control Unit, a micro control unit) only needs to control the encoding circuit 101 to generate the encoding signals and receive decoding results of the decoding circuit 102, namely, the MCU can meet requirements only by five pins, the software algorithm is simple, the implementation can be realized without a traditional special chip, and the occupied space is small.
In one or more embodiments of the present invention, the communication transformer 103 may include three windings wound on a magnetic core, namely, a bus winding T, a transmit winding TX, and a receive winding RX, as shown in fig. 2. When the encoded signal is generated on the transmit winding TX, the same signal is generated on the busbar winding T, which is coupled to the direct current busbar DC, which is obtained by the receive winding RX of the other communication node 100 and sent to the MCU for acquisition by the decoding circuit 102.
In one or more embodiments of the invention, the encoded signal is a frequency-controlled sine wave signal, the frequency of which characterizes the information carried by the encoded signal. As an example, referring to fig. 3, the encoded signal is a sine wave signal with an amplitude of 1.2v_vpp and having two frequencies f1, f2, wherein the signal with frequency f1 represents 0 and the signal with frequency f2 represents 1, at which time the sine wave signal with frequency f1f2f1f2 may be coupled to the direct current bus DC if the signal 0101 is to be output. The value of the baud rate of the encoded signal generated by the encoding circuit 101 may be 9000 to 12000, for example 9600.
Therefore, the information carried by the coded signals is represented by the frequency of the sine wave signals, so that the distortion of the information of the coded signals in the transmission process can be effectively avoided, the applicability of the single bus circuit 10 is improved, and the single bus circuit can be normally used even under the condition of complex temperature, humidity and vibration environments such as underground. Moreover, the sine wave signal is adopted, so that the MCU is supported to adjust the signal frequency and the baud rate of communication, and the method can be suitable for more application occasions.
In one or more embodiments of the present invention, the encoding circuit 101 includes: the first end of the first switching tube Q1 is connected to a power supply, and the control end of the first switching tube Q1 is used for inputting a first control signal H1; the first end of the second switching tube Q2 is connected with the second end of the first switching tube Q1 and serves as a first output end of the coding circuit 101, the second end of the second switching tube Q2 is connected with one end of the first resistor R1, and the control end of the second switching tube Q2 is used for inputting a second control signal L1; the first end of the third switching tube Q3 is connected to a power supply, and the control end of the third switching tube Q3 is used for inputting a third control signal H2; the first end of the fourth switching tube Q4 is connected with the second end of the third switching tube Q3 and is used as a second output end of the coding circuit 101, the second end of the fourth switching tube Q4 is connected with one end of the first resistor R1, and the control end of the fourth switching tube Q4 is used for inputting a fourth control signal L2; the other end of the first resistor R1 is grounded. See fig. 4 and 5 for details.
In the embodiment shown in fig. 4, the power supply is 3.3V, the first resistor R1 is a 50Ω resistor, the encoded signal is output through the transmitting winding TX, the first switching tube Q1 and the third switching tube Q3 are PMOS tubes, and the second switching tube Q2 and the fourth switching tube Q4 are NMOS tubes. In practical application, the first resistor R1 can realize stable working state within 50-100 omega by repeatedly debugging the numerical value in the practical circuit, and the measurement accuracy is high.
The encoding circuit 101 is configured to output an encoded signal through a first output terminal and a second output terminal under the action of the first control signal H1, the second control signal L1, the third control signal H2, and the fourth control signal L2.
The transmitting winding TX of the communication transformer 103 is connected between the first output terminal and the second output terminal of the encoding circuit 101, and the encoding circuit 101 may output an encoded signal through the transmitting winding TX of the communication transformer 103.
Specifically, referring to fig. 5, the mcu controls the first switching tube Q1, the second switching tube Q2, the third switching tube Q3, and the fourth switching tube Q4, when the control ends of the first switching tube Q1 and the second switching tube Q2 are applied with a low level and the control ends of the third switching tube Q3 and the fourth switching tube Q4 are applied with a high level, the first switching tube Q1 and the fourth switching tube Q4 are turned on, the second switching tube Q2 and the third switching tube Q3 are turned off, and the voltage U on the transmitting winding TX is set to AB And rises in the forward direction. When the control ends of the first switching tube Q1 and the second switching tube Q2 are applied with high level and the control ends of the third switching tube Q3 and the fourth switching tube Q4 are applied with low level, the second switching tube Q2 and the third switching tube Q3 are turned on, the first switching tube Q1 and the fourth switching tube Q4 are turned off, and the voltage U on the transmitting winding TX is higher than the voltage U on the transmitting winding TX AB And increases in the negative direction. Thus, the signal frequency of the encoded signal can be controlled by controlling the on/off time of the first switching tube Q1, the second switching tube Q2, the third switching tube Q3, and the fourth switching tube Q4.
In one or more embodiments of the invention, the decoded signal is a square wave signal.
In one or more embodiments of the invention, referring to fig. 6, the decoding circuit 102 includes: gain subcircuit 1021, the input of gain subcircuit 1021 is as the input of decoding circuit 102, gain subcircuit 1021 is used for receiving the code signal, and gain process to the code signal; a reference sub-circuit 1022 for providing a reference voltage; the first input terminal of the comparison sub-circuit 1023 is connected to the output terminal of the gain sub-circuit 1021, the second input terminal of the comparison sub-circuit 1023 is connected to the output terminal of the reference sub-circuit 1022, the output terminal of the comparison sub-circuit 1023 is used as the output terminal of the decoding circuit 102, and the comparison sub-circuit 1023 is used for comparing the coded signal voltage after gain with the reference voltage and outputting the comparison result as a decoding signal.
Specifically, referring to the example shown in fig. 7, when the decoding circuit 102 does not receive the encoded signal, the static voltage at the output terminal of the decoding circuit 102 may be 3.3v_vpp referring to the signal 3. However, when the decoding circuit 102 receives the encoded signal shown as signal 1, the gain subcircuit 1021 performs gain processing on the signal 1, and the comparison subcircuit 1023 compares the voltage of the signal 1 after gain with the reference voltage. When the voltage of the signal 1 after gain is higher than the reference voltage, the comparison sub-circuit 1023 outputs a high level, and when the voltage of the signal 1 after gain is smaller than the reference voltage, the comparison sub-circuit 1023 outputs a low level, so that the comparison sub-circuit 1023 can output an output signal as shown by the signal 2, and further input the signal 2 to the MCU.
Thus, the design decoding circuit 102 includes the gain sub-circuit 1021, the reference sub-circuit 1022, and the comparison sub-circuit 1023 compares the voltage level between the output voltage of the gain sub-circuit 1021 and the output voltage of the reference sub-circuit 1022, and outputs a corresponding signal according to the comparison result, thereby realizing accurate decoding with a simple circuit structure. The circuit structure is simple, so that the single-bus circuit 10 has high environmental resistance, the applicability of the single-bus circuit 10 can be further improved, and normal use can be further ensured even under the conditions of complex temperature, humidity and vibration environments such as underground.
In one or more embodiments of the present invention, referring to fig. 8, the gain subcircuit 1021 includes: the first capacitor C1, one end of the first capacitor C1 is used as an input end of the decoding circuit 102; one end of the second resistor R2 is connected with the other end of the first capacitor C1; one end of the second capacitor C2 is connected with the other end of the second resistor R2, and the other end of the second capacitor C2 is grounded; a third resistor R3, wherein one end of the third resistor R3 is connected to a power supply; and one end of the fourth resistor R4 is connected with the other end of the third resistor R3 and is used as an output end of the gain subcircuit 1021, and the other end of the fourth resistor R4 is grounded.
The receiving winding RX of the communication transformer 103 is connected between one end of the first capacitor C1 and ground, and the gain sub-circuit 1021 receives the encoded signal through the receiving winding RX of the communication transformer 103.
In practical application, through repeated debugging of the numerical values in the practical circuit, the first capacitor C1 and the second capacitor C2 can realize stable working state within 750pF-1000pF, and the measurement accuracy is high.
In one or more embodiments of the invention, referring to fig. 9, reference sub-circuit 1022 includes: a fifth resistor R5, one end of the fifth resistor R5 is connected to a power supply; and one end of the sixth resistor R6 is connected with the other end of the fifth resistor R5, and forms an output end of the reference sub-circuit 1022, and the other end of the sixth resistor R6 is grounded.
In one or more embodiments of the invention, referring to fig. 10, the comparison sub-circuit 1023 includes: the first input end of the comparator U1 forms a first input end of the comparison sub-circuit 1023, the second input end of the comparator U1 forms a second input end of the comparison sub-circuit 1023, and the output end of the comparator U1 forms an output end of the comparison sub-circuit 1023; and one end of the seventh resistor R7 is connected to the power supply, and the other end of the seventh resistor R7 is connected with the output end of the comparator U1.
The decoding circuit 102 is described below with reference to a specific example shown in fig. 11.
Specifically, the decoding circuit 102 acquires the encoded signal through the receiving winding RX of the communication transformer 103, the gain sub-circuit 1021 performs gain processing on the encoded signal, and the encoded signal after gain is input to the positive input terminal of the comparator U1, and the negative input terminal of the comparator U1 receives the reference signal. The comparator U1 performs a comparison process and outputs a decoded signal from an output terminal.
In one or more embodiments of the invention, the single bus circuit 10 further includes a power node 200. Referring to the example shown in fig. 12, in a single bus circuit 10, a plurality of communication nodes 100 and a plurality of power nodes 200 may be included.
Referring to the specific embodiment shown in fig. 13, the power node 200 includes a filter circuit 201 and a power consumption module 202, where the filter circuit 201 is connected between the DC bus DC and the power consumption module 202, and is configured to perform a filtering process on the encoded signal on the DC bus DC to provide a stable voltage to the power consumption module 202. In the specific embodiment shown in fig. 13, the filter circuit 201 is an LC filter circuit.
Specifically, on the direct current bus DC, there is not only a direct voltage for power supply but also an encoded signal coupled to the communication node 100. For each power node 200, by setting the cut-off frequency of the filter circuit 201, it is possible to implement that the filter circuit 201 filters out the encoded signal obtained from the DC bus DC, leaving only the DC voltage, thereby providing a stable voltage for the power consumption module 202.
Thus, the power node 200 and the communication node 100 are provided independently, the communication node 100 is used for communication, the power node 200 is used for providing voltage, so that the voltage provided for the power consumption module 202 is not required to pass through a transformer used for communication, the voltage is transmitted for the power consumption module 202 without being limited by the saturation current of the transformer, and high-power transmission can be realized.
In summary, the single bus circuit of the embodiment of the invention is provided with the direct current bus and a plurality of communication nodes, each communication node comprises the coding circuit, the decoding circuit and the communication transformer, the coding circuit couples the coding signal to the direct current bus through the communication transformer, and the decoding circuit receives the coding signal through the communication transformer and decodes the coding signal, so that the reliable single bus circuit is designed, a special chip is not needed, and the occupied space is small. In addition, by designing the single bus circuit, the communication transformer can realize that only three windings are wound on one magnetic core, a large transformer is not needed, and the occupied space is further reduced. In addition, a decoding circuit comprising a gain sub-circuit, a reference sub-circuit and a comparison sub-circuit is designed, the circuit structure is simple, the transmission speed is high, and the error rate is small. In addition, the design single bus circuit also comprises a power node, and the power node is directly connected with the direct current bus and comprises a filter circuit, so that high power transmission can be realized. Moreover, the whole single bus circuit has simple structure and fewer devices, and can realize higher anti-interference capability. Moreover, the voltage amplitude used in the circuit is adjustable, and the circuit can be suitable for more application occasions.
Further, the invention provides a rotary steering logging instrument while drilling.
FIG. 14 is a block diagram of a rotary steerable logging while drilling instrument according to an embodiment of the present invention.
As shown in fig. 14, a rotary steerable logging while drilling tool 1000 includes the single bus circuit 10 described above.
The rotary steering logging instrument while drilling of the embodiment of the invention realizes that a special chip is not needed and the occupied space is small through the single bus circuit of the embodiment. In addition, by designing the single bus circuit, the communication transformer can realize that only three windings are wound on one magnetic core, a large transformer is not needed, and the occupied space is further reduced. In addition, a decoding circuit comprising a gain sub-circuit, a reference sub-circuit and a comparison sub-circuit is designed, the circuit structure is simple, the transmission speed is high, and the error rate is small. In addition, the design single bus circuit also comprises a power node, and the power node is directly connected with the direct current bus and comprises a filter circuit, so that high power transmission can be realized. Moreover, the whole single bus circuit has simple structure and fewer devices, and can realize higher anti-interference capability.
It should be noted that the logic and/or steps represented in the flow diagrams or otherwise described herein may be considered a ordered listing of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). In addition, the computer readable medium may even be paper or other suitable medium on which the program is printed, as the program may be electronically captured, via, for instance, optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner, if necessary, and then stored in a computer memory.
It is to be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above-described embodiments, the various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. If implemented in hardware, as in another embodiment, may be implemented using any one or combination of the following techniques, as known in the art: discrete logic circuits having logic gates for implementing logic functions on data signals, application specific integrated circuits having suitable combinational logic gates, programmable Gate Arrays (PGAs), field Programmable Gate Arrays (FPGAs), and the like.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
In the description of the present specification, the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. refer to an orientation or positional relationship based on that shown in the drawings, and do not indicate or imply that the apparatus or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and should not be construed as limiting the invention.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
In the description of the present specification, unless otherwise indicated, the terms "mounted," "connected," "secured," and the like are to be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly, through intermediaries, or both, may be in communication with each other or in interaction with each other, unless expressly defined otherwise. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
In the present invention, unless expressly stated or limited otherwise, a first feature "up" or "down" a second feature may be the first and second features in direct contact, or the first and second features in indirect contact via an intervening medium. Moreover, a first feature being "above," "over" and "on" a second feature may be a first feature being directly above or obliquely above the second feature, or simply indicating that the first feature is level higher than the second feature. The first feature being "under", "below" and "beneath" the second feature may be the first feature being directly under or obliquely below the second feature, or simply indicating that the first feature is less level than the second feature.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.
Claims (10)
1. The single bus circuit is characterized by comprising a direct current bus and a plurality of communication nodes, wherein the communication nodes comprise an encoding circuit, a decoding circuit and a communication transformer, and the encoding circuit and the decoding circuit are respectively connected with the direct current bus through the communication transformer;
after the coding circuit of any communication node generates a coding signal, the coding signal is coupled to the direct current bus through a corresponding communication transformer, and the decoding circuits of other communication nodes receive the coding signal through corresponding communication transformers and decode the coding signal to obtain a decoding signal.
2. The single bus circuit of claim 1, wherein the encoded signal is a frequency-controlled sine wave signal, the frequency of the sine wave signal being indicative of information carried by the encoded signal.
3. The single bus circuit of claim 2, wherein the encoding circuit comprises:
the first end of the first switching tube is connected to the power supply, and the control end of the first switching tube is used for inputting a first control signal;
the first end of the second switching tube is connected with the second end of the first switching tube and is used as a first output end of the coding circuit, the second end of the second switching tube is connected with one end of the first resistor, and the control end of the second switching tube is used for inputting a second control signal;
the first end of the third switching tube is connected to the power supply, and the control end of the third switching tube is used for inputting a third control signal;
the first end of the fourth switching tube is connected with the second end of the third switching tube and is used as a second output end of the coding circuit, the second end of the fourth switching tube is connected with one end of the first resistor, and the control end of the fourth switching tube is used for inputting a fourth control signal;
the other end of the first resistor is grounded;
the coding circuit is used for outputting the coding signal through the first output end and the second output end under the action of the first control signal, the second control signal, the third control signal and the fourth control signal.
4. A single bus circuit according to claim 3, wherein the decoded signal is a square wave signal.
5. The single bus circuit of claim 4, wherein the decoding circuit comprises:
the input end of the gain sub-circuit is used as the input end of the decoding circuit, and the gain sub-circuit is used for receiving the coded signal and performing gain processing on the coded signal;
a reference subcircuit for providing a reference voltage;
the first input end of the comparison sub-circuit is connected with the output end of the gain sub-circuit, the second input end of the comparison sub-circuit is connected with the output end of the reference sub-circuit, the output end of the comparison sub-circuit is used as the output end of the decoding circuit, and the comparison sub-circuit is used for comparing the coded signal voltage after gain with the reference voltage and outputting a comparison result as the decoding signal.
6. The single bus circuit of claim 5, wherein the gain subcircuit comprises:
one end of the first capacitor is used as an input end of the decoding circuit;
one end of the second resistor is connected with the other end of the first capacitor;
one end of the second capacitor is connected with the other end of the second resistor, and the other end of the second capacitor is grounded;
a third resistor, one end of which is connected to the power supply;
and one end of the fourth resistor is connected with the other end of the third resistor and is used as the output end of the gain subcircuit, and the other end of the fourth resistor is grounded.
7. The single bus circuit of claim 5, wherein the reference sub-circuit comprises:
a fifth resistor, one end of which is connected to the power supply;
and one end of the sixth resistor is connected with the other end of the fifth resistor, and forms an output end of the reference sub-circuit, and the other end of the sixth resistor is grounded.
8. The single bus circuit of claim 5, wherein the compare sub-circuit comprises:
a comparator, a first input of which forms a first input of the comparison sub-circuit, a second input of which forms a second input of the comparison sub-circuit, and an output of which forms an output of the comparison sub-circuit;
and one end of the seventh resistor is connected to the power supply, and the other end of the seventh resistor is connected with the output end of the comparator.
9. The single bus circuit of claim 1, further comprising a power node comprising a filter circuit and a power consumption module, the filter circuit being connected between the dc bus and the power consumption module for filtering the encoded signal on the dc bus to provide a regulated voltage to the power consumption module.
10. A rotary steerable logging while drilling instrument comprising a single bus circuit as claimed in any one of claims 1 to 9.
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| CN116527438B (en) | 2023-10-10 |
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