CN116525631A - Optical device and method of forming the same - Google Patents

Optical device and method of forming the same Download PDF

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Publication number
CN116525631A
CN116525631A CN202310204298.7A CN202310204298A CN116525631A CN 116525631 A CN116525631 A CN 116525631A CN 202310204298 A CN202310204298 A CN 202310204298A CN 116525631 A CN116525631 A CN 116525631A
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Prior art keywords
substrate
isolation structure
isolation
metal
layer
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Chinese (zh)
Inventor
何承颖
林冠华
周耕宇
许凯钧
林颂恩
王文德
刘人诚
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Priority claimed from US17/879,556 external-priority patent/US20230317758A1/en
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Publication of CN116525631A publication Critical patent/CN116525631A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1464—Back illuminated imager structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

An optical device having an isolation structure and a method of manufacturing the same are disclosed. The optical device includes a substrate having a first surface and a second surface opposite the first surface, first and second radiation sensing devices disposed in the substrate, a first isolation structure disposed in the substrate and located between the first and second radiation sensing devices. The first isolation structure has a first surface and a second surface opposite the first surface. The optical device further includes a second isolation structure disposed in the substrate and located on the first surface of the first isolation structure. The second isolation structure includes a metal structure and a dielectric layer surrounding the metal structure. The second isolation structure extends vertically above the first surface of the substrate.

Description

Optical device and method of forming the same
Technical Field
Embodiments of the invention relate to optical devices and methods of forming the same.
Background
Image sensors are used to sense incident visible or invisible radiation, such as visible light and infrared light. Complementary Metal Oxide Semiconductor (CMOS) image sensors (CIS) and Charge Coupled Device (CCD) sensors are used in a variety of applications such as digital cameras, cell phones, tablet computers, and goggles. These image sensors utilize an array of pixels to absorb (e.g., sense) incident radiation and convert it into an electrical signal. An example of an image sensor is a backside illuminated (BSI) image sensor, which detects radiation from the "backside" of the BSI image sensor substrate.
Disclosure of Invention
Some embodiments of the invention provide an optical device comprising: a substrate comprising a first surface and a second surface opposite the first surface; a first radiation sensing device and a second radiation sensing device disposed in the substrate; a first isolation structure disposed in the substrate and between the first radiation sensing device and the second radiation sensing device, the first isolation structure comprising a first surface and a second surface opposite the first surface; and a second isolation structure disposed in the substrate and on the first surface of the first isolation structure, the second isolation structure comprising: a metal structure; and a dielectric layer surrounding the metal structure; wherein the second isolation structure extends vertically above the first surface of the substrate.
Further embodiments of the present invention provide an optical device comprising: a substrate comprising a front side surface and a back side surface; a first pixel structure and a second pixel structure disposed in the substrate; a Shallow Trench Isolation (STI) structure disposed between the first pixel structure and the second pixel structure; a Deep Trench Isolation (DTI) structure disposed on the shallow trench isolation structure, the deep trench isolation structure comprising: a metal structure; and a dielectric liner disposed along sidewalls of the metal structure and over the shallow trench isolation structure; and a grid structure disposed on the backside surface of the substrate and substantially aligned with the deep trench isolation structure.
Still further embodiments of the present invention provide a method of forming an optical device, the method comprising: forming a first radiation sensing device and a second radiation sensing device through the first surface of the substrate; forming a first isolation structure through the first surface of the substrate and between the first radiation sensing device and the second radiation sensing device; forming a recessed region on a second surface of the substrate opposite the first surface of the substrate; forming an isolation trench through the second surface of the substrate and over the first isolation structure; forming a dielectric layer in the isolation trench, wherein the dielectric layer extends vertically above the second surface of the substrate; and forming a metal layer on the dielectric layer.
Drawings
Aspects of the invention are best understood from the following detailed description when read in connection with the accompanying drawing figures.
Fig. 1 illustrates a cross-sectional view of a BSI image sensor with isolation structures in accordance with some embodiments.
Fig. 2 illustrates a cross-sectional view of a BSI image sensor with isolation structures and grid structures, in accordance with some embodiments.
Fig. 3 is a flow chart of a method for manufacturing a BSI image sensor with isolation structures in accordance with some embodiments.
Fig. 4-18 illustrate cross-sectional views of BSI image sensors with isolation structures at various stages of their fabrication process, in accordance with some embodiments.
Fig. 19 is a flowchart of a method for fabricating a BSI image sensor with isolation structures and grid structures, in accordance with some embodiments.
Fig. 20-24 illustrate cross-sectional views of BSI image sensors having isolation structures and grid structures at various stages of their fabrication process, in accordance with some embodiments.
Illustrative embodiments will now be described with reference to the accompanying drawings. In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. Unless otherwise indicated, discussions of elements having the same comments apply to each other.
Detailed Description
The following disclosure provides many different embodiments, or examples, of the different components used to implement the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the following description, forming a first component over or on a second component may include embodiments in which the first component and the second component are formed in direct contact, and may also include embodiments in which additional components may be formed between the first component and the second component, such that the first component and the second component may not be in direct contact. As used herein, forming a first component on a second component means that the first component is formed in direct contact with the second component. Furthermore, the present invention may repeat reference numerals and/or characters in the various examples. The repetition itself does not dictate a relationship between the various embodiments and/or configurations discussed.
Spatially relative terms, such as "under …," "under …," "lower," "above …," "upper," and the like, may be used herein for ease of description to describe one element or component's relationship to another element(s) or component(s) as illustrated. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
It should be noted that references in the specification to "one embodiment," "an example," etc., indicate that the embodiment described may include a particular component, structure, or characteristic, but every embodiment may not necessarily include the particular component, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Furthermore, when a particular component, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to effect such component, structure, or characteristic in connection with other embodiments whether or not explicitly described.
It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings herein.
In some embodiments, the terms "about" and "substantially" may refer to a value of a given amount that varies within 5% of the value (e.g., ±1%, ±2%, ±3%, ±4%, ±5%) of the value. These values are merely examples and are not limiting. The terms "about" and "substantially" may refer to the percentage of such value as would be interpreted by one of ordinary skill in the relevant art in light of the teachings herein.
BSI image sensors include an array of pixel structures (which may include photodiodes, transistors, and other components) located in a substrate (e.g., a semiconductor substrate). The pixel structure is configured to receive (or absorb) electromagnetic radiation (e.g., infrared radiation) projected toward the substrate and to convert photons from the received radiation into electrical signals. The electrical signals are then distributed to a processing component attached to the BSI image sensor. The pixel structure is disposed on an interconnect structure configured to distribute electrical signals generated within the pixel structure to the appropriate processing components.
In BSI image sensors, an interconnect structure is coupled to a front side surface of a substrate, and color filters and microlenses are coupled to a back side surface of the substrate to minimize or collect light without obstructions from elements of the interconnect structure and/or pixel structure. As a result, BSI image sensors have improved performance and higher Quantum Efficiency (QE) (e.g., percent conversion of photons to electrons) under low light conditions than front-lit image sensors.
The challenge of BSI image sensors is to reduce or eliminate crosstalk between adjacent pixel structures. Pixel structures adjacent to each other may interfere with each other's operation. This crosstalk may occur when light from one pixel structure enters an adjacent pixel structure, resulting in the adjacent pixel structure sensing light. Such crosstalk may reduce the accuracy and quantum efficiency of BSI image sensors.
Exemplary BSI image sensors having isolation structures between adjacent pixel structures and exemplary methods of forming BSI image sensors are provided. In some embodiments, the BSI image sensor may include a stack of isolation structures disposed between adjacent pixel structures to optically isolate the adjacent pixel structures from one another. In some embodiments, the stack of isolation structures may include a Shallow Trench Isolation (STI) structure disposed on a front side surface of a substrate of the BSI image sensor and a Deep Trench Isolation (DTI) structure disposed on and in physical contact with the STI structure.
In some embodiments, the DTI structure may extend about 80nm to about 130nm above a backside surface of a substrate of the BSI image sensor. In some embodiments, the STI structure may include one or more dielectric layers and the DTI structure may include a metal fill layer and a dielectric liner surrounding the metal fill layer. By including such a metal fill layer in the DTI structure and extending the DTI structure over the backside surface of the substrate, cross-talk between adjacent pixel structures may be substantially minimized or eliminated, thereby improving the quantum efficiency of the BSI image sensor.
In some embodiments, the quantum efficiency of BSI image sensors may be further improved by including recessed areas on the back side surface of the substrate that are substantially aligned with the pixel structures. In some embodiments, the quantum efficiency of a BSI image sensor for detecting near infrared region light (e.g., between a wavelength of about 800nm and a wavelength of about 1000 nm) may be improved by a factor of about 0.5 to about 1.5 by using a recessed region and/or DTI structure as compared to a BSI image sensor without the recessed region and/or DTI structure.
Fig. 1 illustrates a cross-sectional view of a BSI image sensor 100 (also referred to as an "optical device 100") in accordance with some embodiments. In some embodiments, the BSI image sensor may include (i) a substrate 102 having a backside surface 102B and a front side surface 102F, (ii) interconnect structures 104 disposed on the front side surface 102F of the substrate 102, (iii) pixel structures 106A and 106B disposed in the substrate 102, (iv) STI structures 108 disposed in the substrate 102, (v) DTI structures 110 disposed on the STI structures 108, (vi) an anti-reflective coating (ARC) 112 disposed on the backside surface 102B, (vii) a passivation layer 114 disposed on the ARC 112, (viii) a dielectric layer 116 disposed on the passivation layer 114, (ix) color filters 118A and 118B disposed in the dielectric layer 116, (x) microlenses 120A and 120B disposed on the dielectric layer 116, and (xi) a metal shielding layer 122.
In some embodiments, the substrate 102 may be a semiconductor material, such as silicon, germanium (Ge), silicon germanium (SiGe), silicon-on-insulator (SOI) structures, and combinations thereof. Further, the substrate 102 may be doped with a p-type dopant (e.g., boron, indium, aluminum, or gallium) or an n-type dopant (e.g., phosphorus or arsenic).
In some embodiments, the backside surface 102B may include a first array of periodic groove regions 102Ga and a second array of periodic groove regions 102Gb. A first array of periodic groove regions 102Ga may be substantially aligned with pixel structure 106A and a second array of periodic groove regions 102Gb may be substantially aligned with pixel structure 106B. These arrays of periodic groove regions 102Ga and 102Gb can provide a greater incident surface area for the radiation beam 124 incident on each pixel structure 106A and 106B than BSI image sensors having a flat backside surface and no periodic groove regions in the backside surface of the substrate. The larger incident surface area may increase the quantum efficiency of the pixel structures 106A and 106B of the BSI image sensor 100.
In some embodiments, the recessed areas 102Ga and 102Gb may have a triangular cross-sectional profile, as shown in fig. 1. In some embodiments, the groove regions 102Ga and 102Gb may have other cross-sectional profiles, such as rectangular profiles and semi-elliptical profiles. In some embodiments, the notch regions 102Ga and 102Gb may ensure multiple reflections of the incident radiation beam 124 at the inner sidewalls of the notch regions 102Ga and 102Gb without exiting the notch regions 102Ga and 102Gb. Such multiple reflections of the incident radiation beam 124 may increase the likelihood and number of incident radiation beams 124 absorbed and processed by the pixel structures 106A and 106B, thereby increasing the quantum efficiency of the BSI image sensor 100. In some embodiments, each of the first and second arrays of groove regions 102Ga-102Gb may have an angle a between the inner sidewalls of the groove regions of about 60 ° to about 90 ° to ensure multiple reflections of the incident radiation beam 124 at the inner sidewalls of the groove regions 102Ga and 102Gb.
In some embodiments, interconnect structure 104 may include an inter-metal dielectric (IMD) layer 104A, and metal lines 104B, metal vias 104C, and sensing devices 104D disposed in IMD layer 104A. The metal lines 104B and metal vias 104C form interconnects (e.g., wires) between the pixel structures 106A and 106B and other components (not shown in fig. 1). In some embodiments, the metal lines 104B and the metal vias 104C may include conductive materials such as copper (Cu), ruthenium (Ru), cobalt (Co), cu alloys (e.g., cu-Ru, cu-Al, or copper-manganese (CuMn)), and any other suitable conductive materials. The layout of the metal lines 104B and the metal vias 104C is exemplary and not limiting, and other layout variations of the metal lines 104B and the metal vias 104C are within the scope of the present disclosure. The number and arrangement of metal lines 104B and metal vias 104C may be different from the layout shown in fig. 1.
In some embodiments, the sensing device 104D may be an array of Field Effect Transistors (FETs) and/or memory cells electrically connected to the respective pixel structures 106A and 106B and configured to read the electrical signals generated in these regions as a result of the photo-charge conversion process. In some embodiments, the interconnect structure 104 may be attached via a buffer layer (not shown in fig. 1) to a carrier substrate (not shown in fig. 1) that may provide support for structures fabricated thereon (e.g., interconnect structure 104, substrate 102, etc.). The carrier substrate may be a silicon wafer, a glass substrate, or any other suitable material.
In some embodiments, pixel structures 106A and 106B (also referred to as "radiation-sensing regions 106A and 106B" or "radiation-sensing devices 106A and 106B") may be disposed in substrate 102. For exemplary purposes, two pixel structures 106A and 106B are shown in fig. 1, but additional pixel structures 106A and 106B may be implemented in the substrate 102. Pixel structures 106A and 106B sense radiation, such as radiation beam 124, that enters pixel regions 105A and 105B, respectively, and impinges back side surface 102B at different angles of incidence. In some embodiments, each of the pixel structures 106A and 106B may include a photodiode that may convert photons of the radiation beam 124 into electrical charge. In some embodiments, the pixel structures 106A and 106B may include photodiodes, transistors, amplifiers, other similar devices, or combinations thereof.
In some embodiments, the pixel structures 106A and 106B may be electrically and optically isolated from each other using a stack of isolation structures 107. In some embodiments, each stack of isolation structures 107 may include STI structures 108 and DTI structures 110.STI structures 108 may be disposed in substrate 102 and a surface of STI structures 108 facing interconnect structure 104 may be substantially coplanar with front side surface 102F. In some embodiments, STI structures 108 may include dielectric materials such as silicon oxide, silicon nitride, silicon oxynitride, fluorine doped silicate glass (FSG), low-k dielectric materials (e.g., materials having a k value below 3.9), and any other suitable dielectric materials.
In some embodiments, the DTI structure 110 may be disposed on the STI structure 108 and in physical contact with the STI structure 108. DTI structure 110 may be formed over STI structure 108 without substantially any gaps at the interface between DTI structure 110 and STI structure 108 to substantially minimize or prevent any light leakage between pixel regions 105A and 105B and/or between pixel structures 106A and 106B, thus improving the quantum efficiency of pixel structures 106A and 106B. If a gap exists at the interface between the DTI structure 110 and the STI structure 108, the radiation beam 124 (e.g., photons) entering the pixel region 105A may propagate through the gap to the pixel region 105B, and vice versa.
In some embodiments, the DTI structure 110 may extend a distance D1 along the Z-axis above the backside surface 102B. Such extension of the DTI structure 110 over the substrate 102 may substantially minimize or prevent deviation of the radiation beam 124 (e.g., photons) entering the pixel region 105A at an angle of incidence greater than zero degrees to the pixel region 105B, and vice versa. As a result, by extending DTI structure 110 over substrate 102, pixel structures 106A and 106B can capture and process a greater number of photons, thereby improving the quantum efficiency of BSI image sensor 100. In some embodiments, the distance D1 may be in the range of about 80nm to about 130nm. Within this range of distance D1, DTI structure 110 may increase the quantum efficiency of BSI image sensor 100 without compromising the size and manufacturing cost of BSI image sensor 100.
In some embodiments, each DTI structure 110 may include a metal fill layer 110A, a dielectric layer 110B surrounding the metal fill layer 110A, and a high-k dielectric layer 110C surrounding the dielectric layer 110B. Dielectric layer 110B and high-k dielectric layer 110C may electrically isolate metal fill layer 110A from substrate 102 and/or pixel structures 106A and 106B. The metal fill layer 110A may block photons in the pixel region 105A from escaping through the dielectric material to the pixel region 105B, and vice versa. Furthermore, the metal fill layer 110A may ensure multiple reflections of the radiation beam 124 (e.g., photons) in the pixel regions 105A and 105B without exiting the pixel regions 105A and 105B. Such multiple reflections of the radiation beam 124 may increase the amount of the radiation beam 124 absorbed and processed by the pixel structures 106A and 106B, thereby improving the quantum efficiency of the BSI image sensor 100. In some embodiments, by using metal fill layer 110A, DTI structure 110A may be formed to have a width along the X-axis that is less than the width of a DTI structure formed from a dielectric layer and without a metal fill layer, because the radiation beam may be more effectively blocked by the metal layer than a dielectric layer having a substantially equal thickness. As a result, a smaller and more compact BSI image sensor 100 with DTI structures 110 may be formed without compromising the quantum efficiency of the BSI image sensor 100.
In some embodiments, the metal fill layer 110A may include a metal material, such as tungsten (W), aluminum (Al), cobalt (Co), ruthenium (Ru), and other suitable metal materials. In some embodiments, the dielectric layer 110B may include silicon oxide, silicon nitride, silicon oxynitride, or other suitable insulating oxideAnd/or nitride materials. In some embodiments, the high-k dielectric layer 110C may comprise a high-k material, such as hafnium oxide (HfO 2 ) Alumina (Al) 2 O 3 ) Any other suitable high-k dielectric material, and combinations thereof.
In some embodiments, the STI structures 108 may have a height H1 along the Z-axis of about 150nm to about 250nm and a width W1 along the X-axis of about 300nm to about 500 nm. In some embodiments, the DTI structure 110 may have a height H2 of about 5 μm to about 10 μm along the Z-axis and a width W2 of about 300nm to about 400nm along the X-axis. In some embodiments, height H2 may be greater than height H1 to substantially prevent cross-talk between pixel structures 106A and 106B. In some embodiments, the width W1 of the STI structure 108 may be greater than the width W2 of the DTI structure 110 to substantially block photons from deviating to neighboring pixel structures, because unlike the DTI structure 110, the STI structure 108 may be free of a metal layer. As described above, the metal layer can block photons more effectively than a dielectric layer having a substantially equal thickness. In some embodiments, the metal fill layer 110A may have a thickness T1 along the X-axis of about 70nm to about 150nm, the dielectric layer 110B may have a thickness T2 along the X-axis of about 100nm to about 150nm, and the high-k dielectric layer 110C may have a thickness T3 along the X-axis of about 10nm to about 20 nm. Within the above-described range of thicknesses T2 and T3, dielectric layer 110B and high-k dielectric layer 110C may substantially electrically isolate metal fill layer 110A from substrate 102 and/or pixel structures 106A and 106B without compromising the size and manufacturing cost of BSI image sensor 100. Within the above ranges of heights H1 and H2, widths W1 and W2, and thickness T1, STI structures 108 and DTI structures 110 may substantially minimize or prevent cross-talk between pixel structures 106A and 106B without compromising the size and manufacturing cost of BSI image sensor 100.
ARC 112 may be disposed on backside surface 102B to prevent incident radiation beam 124 from being reflected away from pixel structures 106A and 106B. In some embodiments, ARC 112 may comprise a high-k dielectric material, such as hafnium oxide (HfO 2 ) Tantalum pentoxide (Ta) 2 O 5 ) Zirconium dioxide (ZrO) 2 ) Alumina (Al) 2 O 3 ) And any other suitable high-k dielectric material. In some embodiments, ARC 112 may have a thickness T4 of about 1nm to about 50 nm. Within this range of thickness T4, ARC 112 may substantially prevent radiation beam 124 incident on pixel structures 106A and 106B from exiting pixel regions 105A and 105B without compromising the size and manufacturing cost of BSI image sensor 100. In some embodiments, ARC 112 and high-k dielectric layer 110C may comprise the same material. In some embodiments, passivation layer 114 may be disposed on ARC 112 and may include a dielectric material, such as silicon oxide (SiO 2 ) Silicon nitride (Si) 3 N 4 ) Silicon oxynitride (SiON) or any other suitable dielectric material. In some embodiments, the dielectric layer 116 may include an oxide layer.
In some embodiments, the color filters 118A and 118B may be disposed in the dielectric layer 116, and the top surfaces of the color filters 118A and 118B may be substantially coplanar with the top surface of the dielectric layer 116. Color filters 118A and 118B may be substantially aligned with pixel structures 106A and 106B, respectively. In some embodiments, the color filters 118A and 118B may include a polymeric material. In some embodiments, microlenses 120A and 120B can be disposed over color filters 118A and 118B, respectively.
In some embodiments, a metal shield layer 122 (also referred to as a "black level correction layer 122") may be disposed on the backside surface 102B and in the dielectric layer 116, passivation layer 114, and ARC 112. The metal shielding layer 122 shields the black reference sensor (not shown) of the BSI image sensor 100 from the radiation beam 124. The black reference sensor may be used to generate a reference black level signal in the BSI image sensor 100. As a result of the masking, the black reference sensor may provide a black reference signal for image processing in BSI image sensor 100.
Fig. 2 illustrates a cross-sectional view of a BSI image sensor 200 (also referred to as "optics 200") in accordance with some embodiments. Unless otherwise noted, the discussion of BSI image sensor 100 applies to BSI image sensor 200.
In some embodiments, BSI image sensor 200 may include a metal grid structure 226 in addition to elements of BSI image sensor 100. A metal grid structure 226 may be disposed in the dielectric layer 116 and substantially aligned with the DTI structure 110. In some embodiments, the metal grid structure 226 may be separated from the DTI structure 110 along the Z-axis by a distance D2 of about 100nm to about 300nm for ease of fabrication. In some embodiments, the grid structure may have a width W3 along the X-axis of about 100nm to about 300 nm. Within this range of width W3, the metal grid structure 226 may substantially minimize or prevent cross-talk between the pixel structures 106A and 106B without compromising the size and manufacturing cost of the BSI image sensor 200. In some embodiments, the width W3 may be greater than or less than W2.
Fig. 3 is a flowchart of an exemplary method 300 for manufacturing the BSI image sensor 100 shown in fig. 1, in accordance with some embodiments. For purposes of illustration, the operations shown in fig. 3 will be described with reference to an exemplary manufacturing process for manufacturing BSI image sensor 100 as shown in fig. 4-18. Fig. 4-18 are cross-sectional views of BSI image sensor 100 at various stages of manufacture, in accordance with some embodiments. Operations may or may not be performed in a different order depending on the particular application. It should be noted that the method 300 may not produce a complete BSI image sensor 100. Thus, it is to be understood that additional processes may be provided before, during, and after the method 300, and that some other processes may only be briefly described herein. The elements in fig. 4 to 18 having the same comments as the elements in fig. 1 are described above.
Referring to fig. 3, in operation 305, a pixel structure and an STI structure are formed through a front side surface of a substrate. For example, as shown in fig. 4, pixel structures 106A and 106B and STI structures 108 are formed through a front side surface 102F of the substrate 102. In some embodiments, after the STI structures 108 are formed, the interconnect structures 104 may be formed on the front side surface 102F.
Referring to fig. 3, in operation 310, a recess region is formed on a backside surface of a substrate. For example, as shown in fig. 5, groove regions 102Ga, 102Gb are formed on the back side surface 102B of the substrate 102. In some embodiments, the recess regions 102Ga and 102Gb may be formed by performing a photolithography process and an etching process on the backside surface 102B. In some embodiments, the triangular cross-sectional profile of the recess regions 102Ga and 102Gb may be formed by performing an anisotropic dry etching process through a patterned mask layer (not shown) formed on the backside surface 102B, followed by a wet etching process.
Referring to fig. 3, in operation 315, an ARC and passivation layer are formed on the recess region. For example, as shown in fig. 6, ARC 112 and passivation layer 114 are formed on recessed regions 102Ga and 102Gb. In some embodiments, the formation of ARC 112 may include depositing a high-k dielectric material over the structure of fig. 5 using an Atomic Layer Deposition (ALD) process, a Chemical Vapor Deposition (CVD) process, or any other suitable high-k dielectric material deposition process. In some embodiments, the formation of passivation layer 114 may include depositing an oxide material on ARC 112 using an ALD process, a CVD process, or any other suitable oxide material deposition process. A silicon oxide layer 716 may be formed on the passivation layer 114 after forming the passivation layer 114, as shown in fig. 7. Formation of the silicon oxide layer 716 may include depositing the silicon oxide layer 716 having a thickness T5 of about 100nm to about 200nm on the structure of fig. 6 using a CVD process.
Referring to fig. 3, in operation 320, a DTI structure is formed through a backside surface of a substrate. For example, as described with reference to fig. 8-13, DTI structures 110 are formed through the backside surface 102B. In some embodiments, the formation of DTI structure 110 may include the following sequential operations: (i) forming an isolation trench 810 having a width W2 over the STI structure 108, as shown in fig. 8, (ii) forming a high-k dielectric layer 910 over the structure of fig. 8 to form the structure of fig. 9, (iii) forming an oxide layer 1010 over the structure of fig. 9 to form the structure of fig. 10, (iv) removing portions of the high-k dielectric layer 910 and the oxide layer 1010 outside the isolation trench 810 using an etching process to form the structure of fig. 11, (v) depositing a metal layer 1210 over the structure of fig. 11 to fill the isolation trench 810 and form the structure of fig. 12, and (vi) removing portions of the metal layer 1210 outside the isolation trench 810 using an etching process to form the structure of fig. 13.
In some embodiments, the formation of isolation trenches 810 may include (i) forming a patterned photoresist layer (not shown) over the structure of fig. 7 using a photolithography process, and (ii) performing an etching process on the silicon oxide layer 716, passivation layer 114, ARC 112, and substrate 102 through the patterned photoresist layer to expose the backside surfaces of STI structures 108, as shown in fig. 8.
In some embodiments, the formation of the high-k dielectric layer 910 may include depositing substantially conformal HfO on the top surface of the silicon oxide layer 716, along the sidewalls of the isolation trench 810 and the exposed surfaces of the STI structures 108 using an ALD process 2 And Al 2 O 3 As shown in fig. 9. In some embodiments, the formation of the oxide layer 1010 may include depositing a substantially conformal silicon oxide layer over the high-k dielectric layer 910 using an ALD process, as shown in fig. 10.
After forming DTI structure 110, a silicon oxide layer 1416 may be formed over the structure of fig. 13 to form the structure of fig. 14. The formation of the silicon oxide layer 1416 may include depositing a silicon oxide layer (not shown) on the structure of fig. 13 using a CVD process and performing a Chemical Mechanical Polishing (CMP) process on the deposited silicon oxide layer to form the silicon oxide layer 1416 having a thickness T6 of about 80nm to about 130nm on the DTI structure 110. The silicon oxide layer 1416 may act as a buffer layer to protect the DTI structure 110 from etching during subsequent processing of the BSI image sensor 100. Within the above-described range of thickness T6, silicon oxide layer 1416 may substantially prevent DTI structure 110 from being etched during subsequent processing without compromising the size and manufacturing cost of BSI image sensor 100.
Referring to fig. 3, in operation 325, a metal shield layer is formed on a backside surface of a substrate. For example, as described with reference to fig. 15 and 16, the metal shielding layer 122 is formed on the backside surface 102B. In some embodiments, the formation of the metal shielding layer 122 may include the following sequential operations: (i) forming a patterned photoresist layer (not shown) over the structure of fig. 14 using a photolithographic process, (ii) performing an etching process through the patterned photoresist layer to the silicon oxide layers 716 and 1416, passivation layer 114, and ARC 112 to form an opening 1522, as shown in fig. 15, (iii) depositing a substantially conformal metal layer (not shown) on a top surface of the silicon oxide layer 1416, along sidewalls of the opening 1522 and exposed backside surfaces 102B in the opening 1522, (iv) forming a patterned mask layer (not shown) over the deposited substantially conformal metal layer, and (v) etching the deposited substantially conformal metal layer through the patterned mask layer to form the structure of fig. 16.
As shown in fig. 17, the silicon oxide layer 1716 may be formed after the metal shield layer 122 is formed. In some embodiments, the formation of the silicon oxide layer 1716 may include depositing a silicon oxide layer (not shown) over the structure of fig. 16 and performing a CMP process on the deposited silicon oxide layer to substantially planarize a top surface of the silicon oxide layer 1716 with a top surface of the metal shield 122, as shown in fig. 17. Silicon oxide layers 716, 1416, and 1716 may form dielectric layer 116.
Referring to fig. 3, in operation 330, color filters and microlenses are formed on a back side surface of a substrate. For example, as shown in fig. 18, color filters 118A and 118B may be formed in the dielectric layer 116, and microlenses 120A and 120B may be formed on the color filters 118A and 118B, respectively.
Fig. 19 is a flowchart of an exemplary method 1900 for manufacturing the BSI image sensor 200 shown in fig. 2, in accordance with some embodiments. For the purpose of illustration, the operation shown in fig. 19 will be described with reference to an example manufacturing process for manufacturing the BSI image sensor 200 shown in fig. 20-24. Fig. 20-24 are cross-sectional views of BSI image sensor 200 at various stages of manufacture, in accordance with some embodiments. Operations may or may not be performed in a different order depending on the particular application. It should be noted that the method 1900 may not produce a complete BSI image sensor 200. Thus, it is to be appreciated that additional processes may be provided before, during, and after method 1900, and that some other processes may only be briefly described herein. Elements in fig. 20 to 24 having the same comments as those in fig. 1 to 2 are described above.
Referring to FIG. 19, operations 1905-1920 are similar to operations 305-320 of FIG. 3. After operation 1920, a structure similar to that of fig. 14 is formed. Subsequent processing of the structure of fig. 14 in operations 1925-1930 is described with reference to fig. 20-24.
Referring to fig. 19, in operation 1925, a metal grid structure and a metal shielding layer are formed on a backside surface of a substrate. For example, as described with reference to fig. 20 to 22, the metal grid structure 226 and the metal shielding layer 122 are formed on the backside surface 102B. In some embodiments, the formation of the metal grid structure 226 and the metal shielding layer 122 may include the following sequential operations: (i) forming a patterned photoresist layer (not shown) over a structure similar to that of fig. 14 using a photolithography process, (ii) performing an etching process on the silicon oxide layers 716 and 1416, passivation layer 114, and ARC 112 through the patterned photoresist layer to form an opening 2022, as shown in fig. 20, (iii) depositing a substantially conformal metal layer 2122 on a top surface of the silicon oxide layer 1416, along sidewalls of the opening 2022, and exposed backside surface 102B in the opening 2022, as shown in fig. 21, (iv) forming a patterned mask layer (not shown) over the metal layer 2122, and (v) etching the metal layer 2122 through the patterned mask layer to form the structure of fig. 22. In some embodiments, the metal grid structure 226 may be formed without forming the metal shielding layer 122 in operation 1925. That is, the metal shielding layer 122 may not be formed in operation 1925.
As shown in fig. 23, a silicon oxide layer 1716 may be formed after forming the metal grid structure 226 and the metal shielding layer 122. In some embodiments, the formation of the silicon oxide layer 1716 may include depositing a silicon oxide layer (not shown) over the structure of fig. 22 and performing a CMP process on the deposited silicon oxide layer to substantially planarize a top surface of the silicon oxide layer 1716 with the top surfaces of the metal grid structure 226 and the metal shield 122, as shown in fig. 23. Silicon oxide layers 716, 1416, and 1716 may form dielectric layer 116.
Referring to fig. 19, in operation 1930, color filters and microlenses are formed on a back side surface of a substrate. For example, as shown in fig. 24, color filters 118A and 118B may be formed in the dielectric layer 116, and microlenses 120A and 120B may be formed on the color filters 118A and 118B, respectively.
The present invention provides exemplary BSI image sensors (e.g., BSI image sensors 100 and 200) having isolation structures (e.g., DTI structures 110 and STI structures 108) between adjacent pixel structures (e.g., pixel structures 106A and 106B) and exemplary methods (e.g., methods 300 and 1900) of forming BSI image sensors. In some embodiments, the BSI image sensor may include an isolation structure stack disposed between adjacent pixel structures to optically isolate the adjacent pixel structures from one another. In some embodiments, the stack of isolation structures may include Shallow Trench Isolation (STI) structures disposed on a front side surface (e.g., front side surface 102F) of a substrate (e.g., substrate 102) of a BSI image sensor, and Deep Trench Isolation (DTI) structures disposed on and in physical contact with the STI structures.
In some embodiments, the DTI structure may extend about 80nm to about 130nm above a backside surface (e.g., backside surface 102B) of a substrate of the BSI image sensor. In some embodiments, the STI structure may include one or more dielectric layers and the DTI structure may include a metal fill layer (e.g., metal fill layer 110A) and a dielectric liner (e.g., dielectric layers 110B and 110C) surrounding the metal fill layer. By including such a metal fill layer in the DTI structure and extending the DTI structure over the backside surface of the substrate, cross-talk between adjacent pixel structures (e.g., pixel structures 106A and 106B) may be substantially minimized or eliminated, thereby improving the quantum efficiency of the BSI image sensor.
In some embodiments, the quantum efficiency of BSI image sensors may be further improved by including recessed regions (e.g., recessed regions 102Ga and 102 Gb) on the backside surface of the substrate that are substantially aligned with the pixel structures. In some embodiments, the quantum efficiency of a BSI image sensor for detecting near infrared region light (e.g., between a wavelength of about 800nm and a wavelength of about 1000 nm) may be improved by a factor of about 0.5 to about 1.5 by using a recessed region and/or DTI structure as compared to a BSI image sensor without the recessed region and/or DTI structure.
In some embodiments, an optical device includes a substrate having a first surface and a second surface opposite the first surface, first and second radiation sensing devices disposed in the substrate, a first isolation structure disposed in the substrate and having the first surface and a second surface opposite the first surface, and a second isolation structure disposed in the substrate and located on the first surface of the first isolation structure. The second isolation structure includes a metal layer and a dielectric layer surrounding the metal layer. The second isolation structure extends vertically above the first surface of the substrate.
In some embodiments, an optical device includes a substrate having a front side surface and a back side surface, first and second pixel structures disposed in the substrate, an STI structure disposed between the first and second pixel structures, a DTI structure disposed on the STI structure, and a grid structure disposed on the back side surface of the substrate and substantially aligned with the DTI structure. The DTI structure includes a metal layer and a dielectric liner disposed along sidewalls of the metal layer and over the STI structure.
Some embodiments of the invention provide an optical device comprising: a substrate comprising a first surface and a second surface opposite the first surface; a first radiation sensing device and a second radiation sensing device disposed in the substrate; a first isolation structure disposed in the substrate and between the first radiation sensing device and the second radiation sensing device, the first isolation structure comprising a first surface and a second surface opposite the first surface; and a second isolation structure disposed in the substrate and on the first surface of the first isolation structure, the second isolation structure comprising: a metal structure; and a dielectric layer surrounding the metal structure; wherein the second isolation structure extends vertically above the first surface of the substrate.
In some embodiments, the second surface of the first isolation structure is substantially coplanar with the second surface of the substrate.
In some embodiments, the height of the second isolation structure is greater than the height of the first isolation structure.
In some embodiments, the width of the first isolation structure is greater than the width of the second isolation structure.
In some embodiments, the second isolation structure extends vertically above the first surface of the substrate a distance of about 80nm to about 130nm.
In some embodiments, the dielectric layer is in physical contact with the first surface of the first isolation structure.
In some embodiments, the dielectric layer comprises: an oxide layer surrounding the metal structure; and a high-k dielectric layer surrounding the oxide layer, wherein materials of the oxide layer and the high-k dielectric layer are different from each other.
In some embodiments, the dielectric layer comprises: a silicon oxide layer surrounding the metal structure; and a high-k dielectric layer comprising hafnium oxide and aluminum oxide surrounding the silicon oxide layer.
In some embodiments, the metal structure comprises tungsten or aluminum.
In some embodiments, the first surface of the substrate includes a recessed region substantially aligned with the first radiation sensing device and the second radiation sensing device.
In some embodiments, the groove region comprises a triangular profile.
In some embodiments, the optical device further comprises a buffer layer on the second isolation structure.
Further embodiments of the present invention provide an optical device comprising: a substrate comprising a front side surface and a back side surface; a first pixel structure and a second pixel structure disposed in the substrate; a Shallow Trench Isolation (STI) structure disposed between the first pixel structure and the second pixel structure; a Deep Trench Isolation (DTI) structure disposed on the shallow trench isolation structure, the deep trench isolation structure comprising: a metal structure; and a dielectric liner disposed along sidewalls of the metal structure and over the shallow trench isolation structure; and a grid structure disposed on the backside surface of the substrate and substantially aligned with the deep trench isolation structure.
In some embodiments, the dielectric liner comprises: a silicon oxide layer surrounding the metal structure; and a high-k dielectric layer comprising hafnium oxide and aluminum oxide surrounding the silicon oxide layer.
In some embodiments, the metal structure comprises tungsten or aluminum.
In some embodiments, the optical device further comprises a buffer layer between the metal structure and the grid structure.
In some embodiments, a method includes forming a first radiation sensing device and a second radiation sensing device through a first surface of a substrate, forming a first isolation structure through the first surface of the substrate and between the first radiation sensing device and the second radiation sensing device, forming a recessed region on a second surface of the substrate opposite the first surface of the substrate, forming an isolation trench through the second surface of the substrate and over the first isolation structure, forming a dielectric layer in the isolation trench, and forming a metal layer over the dielectric layer. The dielectric layer extends vertically above the second surface of the substrate.
In some embodiments, forming the dielectric layer includes: depositing a high-k dielectric layer along sidewalls of the isolation trench and over the first isolation structure; and depositing an oxide layer on the high-k dielectric layer, wherein materials of the oxide layer and the high-k dielectric layer are different from each other.
In some embodiments, the method further comprises forming a grid structure on the metal layer.
In some embodiments, the method further includes forming a buffer layer between the metal layer and the grid structure.
The foregoing disclosure outlines features of a drop-on embodiment so that those skilled in the art may better understand aspects of the invention. Those skilled in the art should appreciate that they may readily use the present invention as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the invention.

Claims (10)

1. An optical device, comprising:
a substrate comprising a first surface and a second surface opposite the first surface;
a first radiation sensing device and a second radiation sensing device disposed in the substrate;
a first isolation structure disposed in the substrate and between the first radiation sensing device and the second radiation sensing device, the first isolation structure comprising a first surface and a second surface opposite the first surface; and
a second isolation structure disposed in the substrate and on the first surface of the first isolation structure, the second isolation structure comprising:
a metal structure; and
a dielectric layer surrounding the metal structure;
wherein the second isolation structure extends vertically above the first surface of the substrate.
2. The optical device of claim 1, wherein the second surface of the first isolation structure is substantially coplanar with the second surface of the substrate.
3. The optical device of claim 1, wherein the second isolation structure has a height that is greater than a height of the first isolation structure.
4. The optical device of claim 1, wherein a width of the first isolation structure is greater than a width of the second isolation structure.
5. The optical device of claim 1, wherein the second isolation structure extends vertically above the first surface of the substrate a distance of about 80nm to about 130nm.
6. The optical device of claim 1, wherein the dielectric layer is in physical contact with the first surface of the first isolation structure.
7. The optical device of claim 1, wherein the dielectric layer comprises:
an oxide layer surrounding the metal structure; and
a high-k dielectric layer surrounding the oxide layer,
wherein the materials of the oxide layer and the high-k dielectric layer are different from each other.
8. The optical device of claim 1, wherein the dielectric layer comprises:
a silicon oxide layer surrounding the metal structure; and
a high-k dielectric layer comprising hafnium oxide and aluminum oxide surrounding the silicon oxide layer.
9. An optical device, comprising:
a substrate comprising a front side surface and a back side surface;
a first pixel structure and a second pixel structure disposed in the substrate;
a Shallow Trench Isolation (STI) structure disposed between the first pixel structure and the second pixel structure;
a Deep Trench Isolation (DTI) structure disposed on the shallow trench isolation structure, the deep trench isolation structure comprising:
a metal structure; and
a dielectric liner disposed along sidewalls of the metal structure and on the shallow trench isolation structure; and
a grid structure disposed on the backside surface of the substrate and substantially aligned with the deep trench isolation structure.
10. A method of forming an optical device, comprising:
forming a first radiation sensing device and a second radiation sensing device through the first surface of the substrate;
forming a first isolation structure through the first surface of the substrate and between the first radiation sensing device and the second radiation sensing device;
forming a recessed region on a second surface of the substrate opposite the first surface of the substrate;
forming an isolation trench through the second surface of the substrate and over the first isolation structure;
forming a dielectric layer in the isolation trench, wherein the dielectric layer extends vertically above the second surface of the substrate; and
a metal layer is formed on the dielectric layer.
CN202310204298.7A 2022-04-04 2023-03-06 Optical device and method of forming the same Pending CN116525631A (en)

Applications Claiming Priority (3)

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US63/327,018 2022-04-04
US17/879,556 US20230317758A1 (en) 2022-04-04 2022-08-02 Isolation structures in image sensors
US17/879,556 2022-08-02

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