CN116520927A - Improved current-adjustable self-adaptive bias circuit - Google Patents

Improved current-adjustable self-adaptive bias circuit Download PDF

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Publication number
CN116520927A
CN116520927A CN202310630758.2A CN202310630758A CN116520927A CN 116520927 A CN116520927 A CN 116520927A CN 202310630758 A CN202310630758 A CN 202310630758A CN 116520927 A CN116520927 A CN 116520927A
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China
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current
resistor
transistor hbt
circuit
transistor
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CN202310630758.2A
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Chinese (zh)
Inventor
张�杰
赵峰
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Chengdu Tongliang Technology Co ltd
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Chengdu Tongliang Technology Co ltd
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Priority to CN202310630758.2A priority Critical patent/CN116520927A/en
Publication of CN116520927A publication Critical patent/CN116520927A/en
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices

Abstract

The invention discloses an improved current-adjustable self-adaptive bias circuit, which comprises a current adjusting circuit and a self-adaptive bias circuit, wherein the current adjusting circuit is connected with the self-adaptive bias circuit; the current regulating circuit is connected with a second port of the self-adaptive bias circuit through a current regulating node; the current adjusting circuit is used for adjusting the first current and adjusting the second current of the self-adaptive bias circuit through the adjusted first current; a second port of the self-adaptive bias circuit is connected with a current regulation node of the current regulation circuit; the self-adaptive bias circuit adjusts the second current according to the first current adjusted by the current adjusting circuit, and adjusts the bias current through the adjusted second current. The invention can realize the adjustment of the bias current through the current adjusting circuit, further adjust the static current of the power tube and keep the reliable radio frequency performance, and realize the insensitivity of the bias current to the fluctuation of the power supply voltage by adopting three power supplies, thereby improving the reliability of the power tube.

Description

Improved current-adjustable self-adaptive bias circuit
Technical Field
The invention relates to the field of self-adaptive bias circuits, in particular to an improved current-adjustable self-adaptive bias circuit.
Background
With the development of wireless communication technology, wireless communication products such as mobile terminals and the internet of things are rapidly developed, and the radio frequency front end is also rapidly developed as an important module. The power tube is used as a module of the radio frequency front end for providing power amplification and output for the rear stage, and the performance of the power tube determines the performance of the whole radio frequency front end system to a great extent. Along with the increasing complexity of signal modulation modes, the peak-to-average ratio of signals is larger and larger, and higher requirements are also put on the linearity of the power tube. In the design of a mobile phone or a base station power tube, linearity is always one of the most critical and complex design indexes. The higher linearity reduces interference of adjacent channel signals with the main channel signal, as much as possible, so that the signal is amplified to a specified power without distortion.
The base-emitter voltage of the heterojunction bipolar transistor is reduced along with the increase of the input power, so that the bias state of the heterojunction bipolar transistor is changed along with the change of the input power, the bias voltage of the traditional bias circuit cannot dynamically compensate the change of the base-emitter voltage of the heterojunction bipolar transistor, and the self-adaptive bias circuit is generated.
The current self-adaptive bias circuit can realize the self-adaptive dynamic change of bias voltage along with input power, so that the performances of the power tube, such as gain, linear gain, adjacent channel power ratio and the like, are optimized, and meanwhile, the temperature compensation resistor in the circuit can optimize the performances of the power tube at high and low temperatures. However, the bias current provided by the circuit cannot be dynamically adjusted through the off-chip element, the performance of the power tube cannot be adjusted off-chip according to the use scene, the bias current provided can be obviously changed along with the fluctuation of the power supply voltage, and the reliable radio frequency performance cannot be maintained, so that the more severe system requirements cannot be met.
Disclosure of Invention
Aiming at the defects in the prior art, the improved current-adjustable self-adaptive bias circuit provided by the invention can change the bias current provided by the bias circuit, thereby adjusting the quiescent current of the power tube and keeping the reliable radio frequency performance.
In order to achieve the aim of the invention, the invention adopts the following technical scheme:
an improved current-adjustable self-adaptive bias circuit comprises a current adjusting circuit and a self-adaptive bias circuit;
the current regulating circuit is connected with a second port of the self-adaptive bias circuit through a current regulating node; the current adjusting circuit is used for adjusting the first current and adjusting the second current of the self-adaptive bias circuit through the adjusted first current;
a second port of the self-adaptive bias circuit is connected with a current regulation node of the current regulation circuit; the self-adaptive bias circuit adjusts the second current according to the first current adjusted by the current adjusting circuit, and adjusts the bias current through the adjusted second current.
Further, the first power supply is connected with the current regulating circuit; first power supply V B The power supply circuit is used for independently supplying power to the current regulating circuit; the second power supply is connected with the first port of the self-adaptive bias circuit, and the third power supply is connected with the third port of the self-adaptive bias circuit; second power supply V LDO And a third power supply V bias For separately powering the adaptive bias circuits.
Further, the current regulating circuit comprises a fifth resistor R 5 Sixth resistor R 6 Seventh resistor R 7 Fifth transistor HBT 5 Fourth transistor HBT 4 And an eighth resistor R 8 The method comprises the steps of carrying out a first treatment on the surface of the Fifth resistor R 5 One end of (a) is connected with a first power supply V B Fifth resistor R 5 The other end of (B) is connected with a sixth resistor R 6 Is a member of the group; sixth resistor R 6 Is connected to the other end of the fifth transistor HBT at the same time 5 Collector of (a) fifth transistor HBT 5 Base of (c) and fourth transistor HBT 4 A base of (2); fifth transistor HBT 5 The emitter of (2) passes through a seventh resistor R 7 Grounding; fourth transistor HBT 4 The emitter of (2) passes through an eighth resistor R 8 Grounding; fourth transistor HBT 4 Is connected to the current regulation node a.
Further, a fifth transistor HBT 5 And a fourth transistor HBT 4 Heterojunction bipolar transistors are used.
Further, the adaptive bias circuit includes a third resistor R 3 A first resistor R 1 Third transistor HBT 3 Sixth transistor HBT 6 Fourth resistor R 4 Second transistor HBT 2 A second resistor R 2 Capacitance C, first transistor HBT 1 Ninth resistor R 9 And a tenth resistor R bias The method comprises the steps of carrying out a first treatment on the surface of the Third resistor R 3 One end of (a) is connected with a current regulation node A, a third resistor R 3 The other end of (2) is connected with the first resistor R 1 One end of each is connected with a second power supply V LDO The method comprises the steps of carrying out a first treatment on the surface of the First resistor R 1 Is connected to the other end of the third transistor HBT at the same time 3 Collector of (d) and third transistor HBT 3 Base of (a) second transistor HBT 2 Base of (a) second transistor HBT 2 A collector of a capacitor C and a first transistor HBT 1 A base of (2); third transistor HBT 3 Emitter of (c) and sixth transistor HBT 6 The collector electrodes of the current regulation nodes are connected with a current regulation node A; sixth transistor HBT 6 The emitter of (2) passes through a fourth resistor R 4 Grounding; sixth transistor HBT 6 The base of (2) passes through a second resistor R 2 Connecting a second transistor HBT 2 An emitter of (a); the other end of the capacitor C is grounded; first transistor HBT 1 The collector of (2) passes through a ninth resistor R 9 Is connected with a third power supply V bias The method comprises the steps of carrying out a first treatment on the surface of the First transistor HBT 1 Emitter of (C) via tenth resistor R bias Output bias current I bias 。
Further, a third transistor HBT 3 Sixth transistor HBT 6 Second transistor HBT 2 And a first transistor HBT 1 Heterojunction bipolar transistors are used.
Further, the specific process of adjusting the bias current is as follows:
by adjusting a fifth resistance R 5 Resistance value adjusting current I of (2) 0 Due to the third transistor HBT 3 And a fourth transistor HBT 4 Symmetry of regulated current I 0 Will adjust the third transistor HBT 3 Is set to be a bias current I of 0 Thereby adjusting the first current I 1 Third current I 3 The second current I of the self-adaptive bias circuit is regulated according to the kirchhoff current law 2 ；
According to the regulated second current I 2 Adjusting the fourth resistance R 4 Voltage drop across, i.e. first voltage V 1 Thereby adjusting the third voltage V 3 Completing the adjustmentFirst transistor HBT 1 To complete the adjustment of the bias current I bias 。
The beneficial effects of the invention are as follows:
(1) The bias current can be adjusted through the current adjusting circuit, so that the static current of the power tube is adjusted and the reliable radio frequency performance is maintained;
(2) The invention can realize that the bias current is insensitive to the fluctuation of the power supply voltage by adopting three power supplies to supply power, and improves the reliability of the power tube.
Drawings
Fig. 1 is a schematic diagram of an improved current-adjustable adaptive bias circuit.
Detailed Description
The following description of the embodiments of the present invention is provided to facilitate understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and all the inventions which make use of the inventive concept are protected by the spirit and scope of the present invention as defined and defined in the appended claims to those skilled in the art.
As shown in fig. 1, an improved current-adjustable adaptive bias circuit includes a current adjustment circuit and an adaptive bias circuit.
In an alternative embodiment of the invention, the first power supply is connected to the current regulating circuit; first power supply V B The power supply circuit is used for independently supplying power to the current regulating circuit; the second power supply is connected with the first port of the self-adaptive bias circuit, and the third power supply is connected with the third port of the self-adaptive bias circuit; second power supply V LDO And a third power supply V bias For separately powering the adaptive bias circuits.
For the adaptive bias circuit, when the first power supply V B Upon fluctuation, bias current I bias Fluctuations occur, affecting the stability and robustness of the amplifier. The improved current-adjustable self-adaptive bias circuit provided by the invention realizes bias current following on the basis of realizing current adjustmentAnd the power supply voltage fluctuation is insensitive.
In particular, the invention adopts a first power supply V B Second power supply V LDO And a third power supply V bias Three power supplies, the voltage power supply sensitive power supply end is separated from the current regulation power supply end, so that the second power supply V with the greatest influence on the bias current can be realized LDO The voltage stabilizing circuit is adopted to independently supply power, so that the bias current is insensitive to the fluctuation of the power supply voltage, and meanwhile, the first power supply V B The presence of (3) does not affect the current regulation function.
In an alternative embodiment of the invention, the current regulation circuit is connected to the second port of the adaptive bias circuit via a current regulation node; the current adjusting circuit is used for adjusting the first current and adjusting the second current of the self-adaptive bias circuit through the adjusted first current.
The current regulating circuit comprises a fifth resistor R 5 Sixth resistor R 6 Fifth transistor HBT 5 Seventh resistor R 7 Fourth transistor HBT 4 And an eighth resistor R 8 The method comprises the steps of carrying out a first treatment on the surface of the Fifth resistor R 5 One end of (a) is connected with a first power supply V B Fifth resistor R 5 The other end of (B) is connected with a sixth resistor R 6 Is a member of the group; sixth resistor R 6 Is connected to the other end of the fifth transistor HBT at the same time 5 Collector of (a) fifth transistor HBT 5 Base of (c) and fourth transistor HBT 4 A base of (2); fifth transistor HBT 5 The emitter of (2) passes through a seventh resistor R 7 Grounding; fourth transistor HBT 4 The emitter of (2) passes through an eighth resistor R 8 Grounding; fourth transistor HBT 4 Is connected to the current regulation node a.
Specifically, a seventh resistor R 7 And an eighth resistor R 8 For providing a first current I 1 Such that the first current I 1 Is not changed along with temperature fluctuation, and further has no influence on bias current I bias And performing temperature compensation.
Fifth transistor HBT 5 And a fourth transistor HBT 4 Heterojunction bipolar transistors are used.
The specific process of adjusting the first current is as follows: by adjusting a fifth resistance R 5 To adjust the first current I 1 。
Specifically, a fifth resistor R 5 An increase leads to a current I 0 Reduced due to the fourth transistor HBT 4 And a third transistor HBT 3 Symmetry of third transistor HBT 3 Is set to be a bias current I of 03 Will also decrease, resulting in a first current I 1 And (3) reducing. Likewise, a fifth resistor R 5 Reducing the resulting current I 0 Increase due to the fourth transistor HBT 4 And a third transistor HBT 3 Symmetry of third transistor HBT 3 Is set to be a bias current I of 03 Will also increase, resulting in a first current I 1 Increasing.
In an alternative embodiment of the invention, the second port of the adaptive bias circuit is connected to a current regulation node of the current regulation circuit; the self-adaptive bias circuit adjusts the second current according to the first current adjusted by the current adjusting circuit, and adjusts the bias current through the adjusted second current.
The self-adaptive bias circuit comprises a third resistor R 3 A first resistor R 1 Third transistor HBT 3 Sixth transistor HBT 6 Fourth resistor R 4 Second transistor HBT 2 A second resistor R 2 Capacitance C, first transistor HBT 1 Ninth resistor R 9 And a tenth resistor R bias The method comprises the steps of carrying out a first treatment on the surface of the Third resistor R 3 One end of (a) is connected with a current regulation node A, a third resistor R 3 The other end of (2) is connected with the first resistor R 1 One end of each is connected with a second power supply V LDO The method comprises the steps of carrying out a first treatment on the surface of the First resistor R 1 Is connected to the other end of the third transistor HBT at the same time 3 Collector of (d) and third transistor HBT 3 Base of (a) second transistor HBT 2 Base of (a) second transistor HBT 2 A collector of a capacitor C and a first transistor HBT 1 A base of (2); third transistor HBT 3 Emitter of (c) and sixth transistor HBT 6 The collector electrodes of the current regulation nodes are connected with a current regulation node A; sixth transistor HBT 6 The emitter of (2) passes through a fourth resistor R 4 Grounding; sixth transistor HBT 6 The base of (2) passes through a second resistor R 2 Connecting a second transistor HBT 2 An emitter of (a); the other end of the capacitor C is grounded; first transistor HBT 1 The collector of (2) passes through a ninth resistor R 9 Is connected with a third power supply V bias The method comprises the steps of carrying out a first treatment on the surface of the First transistor HBT 1 Emitter of (C) via tenth resistor R bias Output bias current I bias 。
Specifically, a third resistor R 3 A first resistor R 1 A second resistor R 2 And a fourth resistor R 4 For providing bias current I bias Such that the bias current I bias Is not changed with temperature fluctuation.
Third transistor HBT 3 Sixth transistor HBT 6 Second transistor HBT 2 And a first transistor HBT 1 Heterojunction bipolar transistors are used.
The specific process for regulating the bias current comprises the following steps:
the invention is realized by adjusting the fifth resistor R 5 Resistance value adjusting current I of (2) 0 Due to the third transistor HBT 3 And a fourth transistor HBT 4 Symmetry of regulated current I 0 Will adjust the third transistor HBT 3 Is set to be a bias current I of 0 Thereby adjusting the first current I 1 Third current I 3 The second current I of the self-adaptive bias circuit is regulated according to the kirchhoff current law 2 。
According to the regulated second current I 2 Adjusting the fourth resistance R 4 Voltage drop across, i.e. first voltage V 1 Thereby adjusting the third voltage V 3 Complete the adjustment of the first transistor HBT 1 To complete the adjustment of the bias current I bias 。
Specifically, a third current I 3 The invention is kept unchanged, and the second current I is according to kirchhoff current law 2 Will increase to make the fourth resistance R 4 The upper voltage drop increases, the first voltage V 1 Increase and thereby make the third voltage V 3 Increasing, first transistor HBT 1 An increase in the bias voltage of (a) results in a first transistor HBT 1 Base current I of (2) B And a first transistor HBT 1 Emitter current of (I) i.e. bias current I bias Is increased, ultimately resulting in a quiescent current I of the power tube C Increasing. Likewise, a fifth resistor R 5 The reduction of the bias current can lead to the reduction of the bias current, and finally the quiescent current I of the power tube C And (3) reducing. In summary, the current regulation process of the present invention is specifically as follows: fifth resistor R 5 An increase leads to a current I 0 Reduce, thereby making the current I 03 Reduced, corresponding first current I 1 Reduce the second current I 2 Increase and thereby make the first voltage V 1 Increase of the first voltage V 1 Increase and thereby make the third voltage V 3 Increase, resulting in current I B Increasing the bias current I bias Further increase, finally result in quiescent current I of the power tube C Increasing.
Those of ordinary skill in the art will recognize that the embodiments described herein are for the purpose of aiding the reader in understanding the principles of the present invention and should be understood that the scope of the invention is not limited to such specific statements and embodiments. Those of ordinary skill in the art can make various other specific modifications and combinations from the teachings of the present disclosure without departing from the spirit thereof, and such modifications and combinations remain within the scope of the present disclosure.

Claims (7)

1. An improved current-adjustable self-adaptive bias circuit is characterized by comprising a current adjusting circuit and a self-adaptive bias circuit;
the current regulating circuit is connected with a second port of the self-adaptive bias circuit through a current regulating node; the current adjusting circuit is used for adjusting the first current and adjusting the second current of the self-adaptive bias circuit through the adjusted first current;
a second port of the self-adaptive bias circuit is connected with a current regulation node of the current regulation circuit; the self-adaptive bias circuit adjusts the second current according to the first current adjusted by the current adjusting circuit, and adjusts the bias current through the adjusted second current.
2. An improved current-adjustable adaptive bias circuit according to claim 1, wherein the first power supply is connected to the current adjustment circuit; first power supply V B The power supply circuit is used for independently supplying power to the current regulating circuit; the second power supply is connected with the first port of the self-adaptive bias circuit, and the third power supply is connected with the third port of the self-adaptive bias circuit; second power supply V LDO And a third power supply V bias For separately powering the adaptive bias circuits.
3. An improved current-adjustable adaptive bias circuit according to claim 2, wherein the current adjustment circuit includes a fifth resistor R 5 Sixth resistor R 6 Seventh resistor R 7 Fifth transistor HBT 5 Fourth transistor HBT 4 And an eighth resistor R 8 The method comprises the steps of carrying out a first treatment on the surface of the Fifth resistor R 5 One end of (a) is connected with a first power supply V B Fifth resistor R 5 The other end of (B) is connected with a sixth resistor R 6 Is a member of the group; sixth resistor R 6 Is connected to the other end of the fifth transistor HBT at the same time 5 Collector of (a) fifth transistor HBT 5 Base of (c) and fourth transistor HBT 4 A base of (2); fifth transistor HBT 5 The emitter of (2) passes through a seventh resistor R 7 Grounding; fourth transistor HBT 4 The emitter of (2) passes through an eighth resistor R 8 Grounding; fourth transistor HBT 4 Is connected to the current regulation node a.
4. An improved current-adjustable adaptive bias circuit according to claim 3 and wherein said fifth transistor HBT 5 And a fourth transistor HBT 4 Heterojunction bipolar transistors are used.
5. An improved current-adjustable adaptive bias circuit according to claim 3, wherein the adaptive bias circuit comprises a third resistor R 3 A first resistor R 1 Third transistor HBT 3 Sixth transistor HBT 6 Fourth resistor R 4 Second transistor HBT 2 A second resistor R 2 Capacitance C, first transistor HBT 1 Ninth resistor R 9 And a tenth resistor R bias The method comprises the steps of carrying out a first treatment on the surface of the Third resistor R 3 One end of (a) is connected with a current regulation node A, a third resistor R 3 The other end of (2) is connected with the first resistor R 1 One end of each is connected with a second power supply V LDO The method comprises the steps of carrying out a first treatment on the surface of the First resistor R 1 Is connected to the other end of the third transistor HBT at the same time 3 Collector of (d) and third transistor HBT 3 Base of (a) second transistor HBT 2 Base of (a) second transistor HBT 2 A collector of a capacitor C and a first transistor HBT 1 A base of (2); third transistor HBT 3 Emitter of (c) and sixth transistor HBT 6 The collector electrodes of the current regulation nodes are connected with a current regulation node A; sixth transistor HBT 6 The emitter of (2) passes through a fourth resistor R 4 Grounding; sixth transistor HBT 6 The base of (2) passes through a second resistor R 2 Connecting a second transistor HBT 2 An emitter of (a); the other end of the capacitor C is grounded; first transistor HBT 1 The collector of (2) passes through a ninth resistor R 9 Is connected with a third power supply V bias The method comprises the steps of carrying out a first treatment on the surface of the First transistor HBT 1 Emitter of (C) via tenth resistor R bias Output bias current I bias 。
6. An improved current-adjustable adaptive bias circuit according to claim 5 and wherein said third transistor HBT 3 Sixth transistor HBT 6 Second transistor HBT 2 And a first transistor HBT 1 Heterojunction bipolar transistors are used.
7. The improved current-adjustable adaptive bias circuit of claim 5, wherein the specific process of adjusting the bias current is:
by adjusting a fifth resistance R 5 Resistance value adjusting current I of (2) 0 Due to the third transistor HBT 3 And a fourth transistor HBT 4 Symmetry of regulated current I 0 Will adjust the third transistor HBT 3 Is set to be a bias current I of 0 Thereby adjusting the first current I 1 Third current I 3 The second current I of the self-adaptive bias circuit is regulated according to the kirchhoff current law 2 ；
According to the regulated second current I 2 Adjusting the fourth resistance R 4 Voltage drop across, i.e. first voltage V 1 Thereby adjusting the third voltage V 3 Complete the adjustment of the first transistor HBT 1 To complete the adjustment of the bias current I bias 。
CN202310630758.2A 2023-05-30 2023-05-30 Improved current-adjustable self-adaptive bias circuit Pending CN116520927A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310630758.2A CN116520927A (en) 2023-05-30 2023-05-30 Improved current-adjustable self-adaptive bias circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310630758.2A CN116520927A (en) 2023-05-30 2023-05-30 Improved current-adjustable self-adaptive bias circuit

Publications (1)

Publication Number Publication Date
CN116520927A true CN116520927A (en) 2023-08-01

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
CN (1) CN116520927A (en)

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