CN116505473A - Hardware protection circuit capable of self-recovering under-frequency and over-voltage detection - Google Patents

Hardware protection circuit capable of self-recovering under-frequency and over-voltage detection Download PDF

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Publication number
CN116505473A
CN116505473A CN202310493347.3A CN202310493347A CN116505473A CN 116505473 A CN116505473 A CN 116505473A CN 202310493347 A CN202310493347 A CN 202310493347A CN 116505473 A CN116505473 A CN 116505473A
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CN
China
Prior art keywords
resistor
circuit
capacitor
frequency
output
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CN202310493347.3A
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Chinese (zh)
Inventor
李金龙
沈振雄
尹巧红
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Shenzhen Faithtech Co ltd
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Shenzhen Faithtech Co ltd
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Priority to CN202310493347.3A priority Critical patent/CN116505473A/en
Publication of CN116505473A publication Critical patent/CN116505473A/en
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H1/00Details of emergency protective circuit arrangements
    • H02H1/0007Details of emergency protective circuit arrangements concerning the detecting means
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/02Details
    • H02H3/05Details with means for increasing reliability, e.g. redundancy arrangements
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/02Details
    • H02H3/06Details with automatic reconnection
    • H02H3/066Reconnection being a consequence of eliminating the fault which caused disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/20Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess voltage
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/46Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to frequency deviations

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  • Emergency Protection Circuit Devices (AREA)

Abstract

The invention discloses a hardware protection circuit capable of automatically recovering underfrequency and overvoltage detection, which comprises a frequency detection circuit, an overvoltage detection circuit, a protection action circuit, a reset clock circuit and a fault locking delay circuit, wherein the output end of the frequency detection circuit, the output end of the overvoltage detection circuit and the output end of the reset clock circuit are connected with the input end of the protection action circuit, and the output end of the protection action circuit is respectively connected with the input end of the reset clock circuit and the input end of the fault locking delay circuit. The hardware protection circuit provided by the invention realizes the protection of underfrequency and overvoltage, and the unlocking recovery function after protection locking and fault recovery.

Description

Hardware protection circuit capable of self-recovering under-frequency and over-voltage detection
Technical Field
The invention relates to the technical field of protection circuits, in particular to a hardware protection circuit capable of automatically recovering underfrequency and overvoltage detection.
Background
The protection of some parameters of the existing equipment is realized by adopting digital protection of software, the advantages of the software protection are very obvious, the setting of protection parameters is simple, and the protection speed is high; however, software protection is not applicable in the following applications: 1. there is an isolation requirement: the digital processor generally needs more information to be acquired, and a large number of acquired signal potentials are generally inconsistent, so that when the digital processor is used for software calculation, quite a large number of isolation measures are needed, and the isolation cost is high; 2. the control part does not have a digital processor because of the need for pure hardware control: in some inverter, power supply, rectifier and other devices, no digital processor is provided, and the whole control and circuit are realized by adopting a pure hardware mode; 3. miniaturization needs: larger time relays, thermal relays, etc. cannot be used.
In addition, chinese patent publication No. CN210224934U discloses a hardware protection circuit comprising a voltage dividing circuit, a hardware protection circuit, and a detection circuit, wherein: the voltage dividing circuit is connected with the hardware protection circuit, the hardware protection circuit is connected with the detection circuit, the hardware protection circuit comprises an undervoltage protection circuit and an overvoltage protection circuit, and the hardware protection circuit realizes undervoltage and overvoltage protection on equipment in a hardware mode. However, the hardware protection circuit has a single function, only has the functions of under-voltage protection and over-voltage protection, and does not have the functions of under-frequency protection, protection locking, unlocking recovery after fault recovery and the like.
Disclosure of Invention
In order to solve the problems that the hardware protection circuit in the prior art has single function and does not have the functions of underfrequency protection, protection locking, unlocking recovery after fault recovery and the like, the invention provides a hardware protection circuit capable of self-recovering underfrequency and overvoltage detection.
The technical scheme of the invention is as follows:
the hardware protection circuit capable of automatically recovering the underfrequency and overvoltage detection comprises a frequency detection circuit, an overvoltage detection circuit, a protection action circuit, a reset clock circuit and a fault locking delay circuit, wherein the output end of the frequency detection circuit, the output end of the overvoltage detection circuit and the output end of the reset clock circuit are all connected with the input end of the protection action circuit, and the output end of the protection action circuit is respectively connected with the input end of the reset clock circuit and the input end of the fault locking delay circuit;
the protection action circuit is used for outputting a protection action signal according to the underfrequency signal detected and output by the frequency detection circuit or the overvoltage signal detected and output by the overvoltage detection circuit;
the reset clock circuit is used for outputting a reset clock pulse signal to the protection action circuit when the underfrequency signal or the overvoltage signal is not detected and output any more;
the fault locking delay circuit is used for outputting and latching fault signals for a period of time according to the protection action signals output by the protection action circuit.
According to the above hardware protection circuit capable of self-recovering under-frequency and over-voltage detection, the frequency detection circuit is configured to detect whether the frequency of the input voltage is lower than an expected set frequency threshold, and if the frequency of the input voltage is detected to be lower than the expected set frequency threshold, output an under-frequency signal;
the overvoltage detection circuit is used for detecting whether the voltage value of the input voltage is higher than an expected set voltage threshold value, and outputting an overvoltage signal if the voltage value of the input voltage is lower than the expected set voltage threshold value.
According to the above hardware protection circuit capable of self-recovering under-frequency and over-voltage detection, the frequency detection circuit comprises a resistor R11, a resistor R13, a resistor R15, a resistor R14, a resistor R16, a resistor R20, a resistor R21, a capacitor C3, a capacitor C5, a capacitor C6, a switching tube Q1 and a switching tube Q2, wherein the input end of the protection action circuit is connected with one end of the resistor R11, the other end of the resistor R11 is connected with one end of the resistor R13, one end of the resistor R15, one end of the capacitor C3 and one end of the resistor R14 respectively, the other end of the resistor R13 and the other end of the resistor R15 are connected with a reference voltage, the other end of the capacitor C3 is connected with a ground terminal, the other end of the resistor R14 is connected with one end of the resistor R16, a first end of the switching tube Q1 and a first end of the switching tube Q2 respectively, the other end of the switching tube Q16 is connected with the output end of the reset clock circuit, the second end of the switching tube Q1 is connected with one end of the capacitor C5 and one end of the resistor R20 respectively, the other end of the switching tube Q1 is connected with the other end of the resistor Q2 respectively, the other end of the switching tube Q2 is connected with the third end of the resistor Q2 respectively, and the other end of the driving end is connected with the resistor is connected with the third end of the resistor.
Further, the first pulse driving signal is a positive half-cycle pulse signal of the input voltage, and the second pulse driving signal is a negative half-cycle pulse signal of the input voltage.
Further, the other end of the resistor R16 is connected to the output end of the reset clock circuit through the diode D7.
According to the above hardware protection circuit capable of self-recovering under-frequency and over-voltage detection, the over-voltage detection circuit comprises an operational amplifier U2B, a resistor R17, a resistor R18, a resistor R19, a capacitor C4 and a diode D6, wherein the negative input end of the operational amplifier U2B is connected with a reference voltage, the positive input end of the operational amplifier U2B is respectively connected with one end of the resistor R17, one end of the resistor R18 and one end of the capacitor C4, the other end of the resistor R17 is connected with an input voltage, the other end of the resistor R18 is respectively connected with the other end of the capacitor C4 and the ground end after passing through the resistor R19, and the output end of the operational amplifier U2B is connected with the input end of the protection action circuit after passing through the diode D6.
According to the above hardware protection circuit capable of self-recovering under-frequency and over-voltage detection, the protection action circuit comprises an operational amplifier U2A, a resistor R8, a resistor R9, a resistor R10 and a diode D4, wherein the negative input end of the operational amplifier U2A is respectively connected with one end of the resistor R8 and one end of the resistor R9, the other end of the resistor R8 is connected with a reference voltage, the other end of the resistor R9 is connected with a grounding end, the positive input end of the operational amplifier U2A is respectively connected with one end of the resistor R10 and the output end of the reset clock circuit, the other end of the resistor R10 is respectively connected with one end of the diode D4, the output end of the frequency detection circuit and the output end of the over-voltage detection circuit, and the output end of the operational amplifier U2A is respectively connected with the other end of the diode D4, the input end of the reset clock circuit and the input end of the fault locking delay circuit.
According to the above hardware protection circuit capable of self-recovering under-frequency and over-voltage detection, the reset clock circuit comprises a resistor R4, a resistor R5, a resistor R6, a resistor R7, a diode D3, a capacitor C2 and a nand gate U2A, wherein one end of the resistor R4 and one end of the resistor R5 are respectively connected with the output end of the protection action circuit, the other end of the resistor R4 is connected with one end of the diode D3, the other end of the resistor R6 is connected with one end of the resistor D7, the other end of the diode D3 is respectively connected with the other end of the resistor R7, one end of the capacitor C2 and one end of the resistor R5, the other end of the capacitor C2 is connected with the ground, the other end of the resistor R5 is connected with the first input end of the nand gate U2A, the second input end of the nand gate U2A is connected with the power supply voltage, and the output end of the nand gate U2A is connected with the output end of the reset clock circuit.
Further, the output end of the nand gate U2A is connected to the output end of the reset clock circuit after passing through the diode D5.
According to the above hardware protection circuit capable of self-recovering under-frequency and over-voltage detection, the fault locking delay circuit comprises a resistor R1, a resistor R2, a resistor R3, a diode D1, a capacitor C1 and a nand gate U1A, wherein one end of the resistor R2 is respectively connected with the output end of the protection action circuit and the input end of the reset clock circuit, the other end of the resistor R2 is respectively connected with one end of the resistor R3 and one end of the diode D1, the other end of the resistor R3 is respectively connected with the other end of the diode D1, one end of the capacitor C1 and the input end of the nand gate U1A, the other end of the capacitor C1 is connected with the ground, and the output end of the nand gate U1A is connected with an external circuit after passing through the resistor R1.
Compared with the prior art, the invention has the beneficial effects that:
the hardware protection circuit capable of automatically recovering the underfrequency and overvoltage detection provided by the invention realizes the protection of the underfrequency and overvoltage and the unlocking recovery function after protection locking and fault recovery by arranging the frequency detection circuit, the overvoltage detection circuit, the protection action circuit, the reset clock circuit and the fault locking delay circuit, can prevent the jitter of fault signals and can avoid the reset clock low pulse of the reset protection action circuit, thereby not influencing the locking of the fault signals, and being suitable for the application occasions with isolation requirements, pure hardware control requirements and miniaturization requirements.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments or the description of the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a circuit diagram of the present invention;
FIG. 2 is a circuit diagram of a frequency detection circuit according to the present invention;
FIG. 3 is a waveform diagram of the input voltage frequency in the present invention;
FIG. 4 is a waveform diagram of the input voltage with too low a frequency in the present invention;
FIG. 5 is a circuit diagram of an overvoltage detection circuit according to the present invention;
FIG. 6 is a circuit diagram of a protection circuit according to the present invention;
FIG. 7 is a circuit diagram of a reset clock circuit in the present invention;
FIG. 8 is a waveform diagram after a fault in the present invention;
FIG. 9 is a waveform diagram of the present invention with automatic recovery after the failure has disappeared;
fig. 10 is a circuit diagram of a fault-locked delay circuit in accordance with the present invention.
Detailed Description
In order to make the technical problems, technical schemes and beneficial effects to be solved more clear, the invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Meanwhile, it is stated that the embodiments described below are only for explaining the present invention and are not intended to limit the present invention.
It should be noted that, the terms "disposed," "connected," and the like should be understood in a broad sense, and for example, may be fixedly connected, detachably connected, or integrated; can be mechanically or electrically connected; either directly or indirectly, through intermediaries, or both, may be in communication with each other or in interaction with each other, unless expressly defined otherwise. The terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features.
Referring to fig. 1, the present embodiment provides a hardware protection circuit capable of self-recovering under-frequency and over-voltage detection, which includes a frequency detection circuit 1, an over-voltage detection circuit 2, a protection action circuit 3, a reset clock circuit 4 and a fault locking delay circuit 5, wherein the output end of the frequency detection circuit 1, the output end of the over-voltage detection circuit 2 and the output end of the reset clock circuit 4 are all connected with the input end of the protection action circuit 3, and the output end of the protection action circuit 3 is respectively connected with the input end of the reset clock circuit 4 and the input end of the fault locking delay circuit 5.
The frequency detection circuit 1 is configured to detect whether the frequency of the input voltage is lower than an expected frequency threshold, and if the frequency of the input voltage is detected to be lower than the expected frequency threshold, output an under-frequency signal to the protection action circuit 3; the overvoltage detection circuit 2 is configured to detect whether a voltage value of the input voltage is higher than an expected set voltage threshold, and if the voltage value of the input voltage is detected to be lower than the expected set voltage threshold, output an overvoltage signal to the protection action circuit 3; the protection action circuit 3 is used for outputting a protection action signal according to the underfrequency signal detected and output by the frequency detection circuit 1 or the overvoltage signal detected and output by the overvoltage detection circuit 2; the reset clock circuit 4 is used for outputting a reset clock pulse signal to the protection action circuit 3 when the under-frequency signal or the overvoltage signal is no longer detected and output, and resetting the level of the protection action signal output by the protection action circuit 3; the fault locking delay circuit 5 is used for outputting and latching fault signals for a period of time according to the protection action signals output by the protection action circuit 3, so that the jitter of the fault signals is prevented, and the reset clock low pulse of the reset protection action circuit 3 can be avoided, thereby not affecting the locking of the fault signals.
Referring to fig. 2 to 4, in this embodiment, the frequency detection circuit 1 includes a resistor R11, a resistor R13, a resistor R15, a resistor R14, a resistor R16, a resistor R20, a resistor R21, a capacitor C3, a capacitor C5, a capacitor C6, a switching tube Q1, and a switching tube Q2, wherein an input end of the protection operation circuit 3 is connected to one end of the resistor R11, the other end of the resistor R11 is connected to one end of the resistor R13, one end of the resistor R15, one end of the capacitor C3, one end of the resistor R14, the other end of the resistor R13 and the other end of the resistor R15 are connected to a reference voltage REF, the other end of the capacitor C3 is connected to a ground terminal, the other end of the resistor R14 is connected to one end of the resistor R16, a first end of the switching tube Q1, a first end of the switching tube Q2, the other end of the switching tube Q16 is connected to an output end of the reset clock circuit 4 via a diode D7, a second end of the switching tube Q1 is connected to one end of the capacitor C5, one end of the other end of the resistor R20 is connected to one end of the switching tube C5, the other end of the switching tube C5 is connected to the first end of the first pulse G1 and the driving end of the switching tube Q1 is connected to the first end of the switching tube Q2, and the other end of the switching tube Q2 is connected to the other end of the first end of the resistor Q2 is connected to the first end of the resistor Q2.
The core of the frequency detection circuit 1 is the voltage of the capacitor C3, the capacitor C3 is connected to the charging circuit of the capacitor C3 through the resistor R11, the reference voltage REF is charged through the resistor R13 and the resistor R15, and the discharging circuit of the capacitor C3 is discharged to the ground through the resistor R14 and then through the switching tube Q1 or the switching tube Q2. The first pulse driving signal G1 is a positive half-cycle pulse signal of the input voltage Uac, and the second pulse driving signal G2 is a negative half-cycle pulse signal of the input voltage Uac. When the input voltage Uac is positive half cycle, the rising edge of the first pulse driving signal G1 controls the switch tube Q1 to be conducted through the capacitor C5, and at the moment, the capacitor C3 rapidly discharges through the resistor R14 and the switch tube Q1; when the input voltage Uac is negative half cycle, the rising edge of the second pulse driving signal G2 controls the switch tube Q2 to be turned on through the capacitor C6, and at this time, the capacitor C3 rapidly discharges through the resistor R14 and the switch tube Q2.
When the frequency of the input voltage Uac is lower than the frequency threshold value which is expected to be set, the capacitor C3 cannot be discharged in time, the reference voltage REF is charged continuously through the charging loop, the set voltage protection action value is triggered, and the resistor R11 outputs an under-frequency signal to the protection action circuit 3. Since the capacitor C3 is discharged for a very short time, the protection frequency is determined by the charging time of the charging loop composed of the resistor R13, the resistor R15, and the capacitor C3.
Referring to fig. 5, in the present embodiment, the overvoltage detection circuit 2 includes an operational amplifier U2B, a resistor R17, a resistor R18, a resistor R19, a capacitor C4, and a diode D6, wherein a negative input terminal of the operational amplifier U2B is connected to the reference voltage REF, a positive input terminal of the operational amplifier U2B is connected to one end of the resistor R17, one end of the resistor R18, one end of the capacitor C4, the other end of the resistor R17 is connected to the input voltage Uac, the other end of the resistor R18 is connected to the other end of the capacitor C4 and the ground terminal after passing through the resistor R19, and an output terminal of the operational amplifier U2B is connected to an input terminal of the protection circuit 3 after passing through the diode D6.
In the overvoltage detection circuit 2 described above, when the voltage value of the input voltage Uac is higher than the voltage threshold value (reference voltage REF) set as desired, the output voltage of the operational amplifier U2B is inverted, and a high level (overvoltage signal) is output to the protection operation circuit 3 via the diode D6.
Referring to fig. 6, in the present embodiment, the protection action circuit 3 includes an operational amplifier U2A, a resistor R8, a resistor R9, a resistor R10, and a diode D4, wherein the negative input end of the operational amplifier U2A is connected to one end of the resistor R8 and one end of the resistor R9, the other end of the resistor R8 is connected to a reference voltage REF, the other end of the resistor R9 is connected to a ground, the positive input end of the operational amplifier U2A is connected to one end of the resistor R10 and the output end of the reset clock circuit 4, respectively, the other end of the resistor R10 is connected to one end of the diode D4, the output end of the frequency detection circuit 1, the output end of the overvoltage detection circuit 2, and the output end of the operational amplifier U2A is connected to the other end of the diode D4, the input end of the reset clock circuit 4, and the input end of the fault-locking delay circuit 5, respectively.
The protection operation circuit 3 is inputted with an undersrequency signal or an overvoltage signal detected and outputted by the frequency detection circuit 1 or the overvoltage detection circuit 2 through the resistor R10, compares the undersrequency signal or the overvoltage signal with a reference value (reference voltage REF), and if the undersrequency signal or the overvoltage signal is larger than the reference value, inverts the level of the protection operation signal Prt outputted by the operational amplifier U2A, outputs a high level, and outputs the high level to the reset clock circuit 4 and the fault-locked delay circuit 5.
Referring to fig. 7, in the present embodiment, the reset clock circuit 4 includes a resistor R4, a resistor R5, a resistor R6, a resistor R7, a diode D3, a capacitor C2, and a nand gate U2A, wherein one end of the resistor R4 and one end of the resistor R5 are respectively connected to the output end of the protection action circuit 3, the other end of the resistor R4 is connected to one end of the diode D3, the other end of the resistor R6 is connected to one end of the resistor D7, the other end of the diode D3 is respectively connected to the other end of the resistor R7, one end of the capacitor C2, one end of the resistor R5, the other end of the capacitor C2 is connected to the ground, the other end of the resistor R5 is connected to the first input end of the nand gate U2A, the second input end of the nand gate U2A is connected to the power supply voltage VCC1, and the output end of the nand gate U2A is connected to the output end of the reset clock circuit 4 after passing through the diode D5.
The core of the reset clock circuit 4 is that the voltage of the capacitor C2 is turned over to output a low level when the voltage of the capacitor C2 rises to the upper limit value of the logic high level of the nand gate U2A, and the level of the reset clock signal protect_clk output by the nand gate U2A is turned over; when the charging loop of the capacitor C2 outputs a high level from the protection operation circuit 3, the capacitor C2 is charged through the resistor R6 and the resistor R7; when the low level is output from the protection operation circuit 3, the discharge circuit of the resistor C2 discharges the capacitor C2 through the diode D3 and the resistor R4.
When the frequency detection circuit 1 detects and outputs an under-frequency signal or the overvoltage detection circuit 2 detects and outputs an overvoltage signal, the protection action signal Prt output by the protection action circuit 3 is in a high level, at this time, the capacitor C2 is charged through the resistor R6 and the resistor R7, when the voltage of the capacitor C2 rises to the upper logic limit of the input high level of the NAND gate U2A, the level of the reset clock pulse signal Protect_clk output by the NAND gate U2A is pulled down, and the low level is output, as can be seen from the figure 1, the reset clock pulse signal Protect_clk output by the NAND gate U2A is returned to the input end of the protection action circuit 3 through the diode D5, so that the protection action signal Prt output by the protection action circuit 3 is in a low level, and the capacitor C2 is rapidly discharged through R4 and D3; when the voltage of the capacitor C2 is lower than the logic lower limit of the input low level of the nand gate U2A, the level of the reset clock signal detect_clk output by the nand gate U2A is pulled high, and a high level is output, so that one reset period is completed.
In addition, if the frequency detection circuit 1 still detects the output underfrequency signal or the overvoltage detection circuit 2 still detects the output overvoltage signal during one reset period, the protection action signal Prt output by the protection action circuit 3 will be pulled up again, as shown in fig. 8, and the level of the protection action signal Prt cannot be restored to the low level due to the still failure. If the frequency detection circuit 1 no longer detects the output underfrequency signal and the overvoltage detection circuit 2 no longer detects the output overvoltage signal within a reset period, the protection action signal Prt output by the protection action circuit 3 will be pulled down, as shown in fig. 9, and after the fault disappears, the level of the protection action signal Prt is restored to a low level.
Referring to fig. 10, in the present embodiment, the fault-locked delay circuit 5 includes a resistor R1, a resistor R2, a resistor R3, a diode D1, a capacitor C1, and a nand gate U1A, wherein one end of the resistor R2 is connected to the output end of the protection circuit 3 and the input end of the reset clock circuit 4, the other end of the resistor R2 is connected to one end of the resistor R3 and one end of the diode D1, the other end of the resistor R3 is connected to the other end of the diode D1, one end of the capacitor C1, and the input end of the nand gate U1A, the other end of the capacitor C1 is connected to the ground, and the output end of the nand gate U1A is connected to an external circuit after passing through the resistor R1.
The core of the fault-locked delay circuit 5 is that the voltage of the capacitor C1, when the voltage of the capacitor C1 rises to the upper limit value of the logic level of the nand gate U1A, the output of the nand gate U1A will be inverted, and a low level is output; when the charging loop of the capacitor C1 outputs a high level by the protection action circuit 3, the capacitor C1 is charged by the resistor R2 and the diode D1, when the voltage of the capacitor C1 rises to the upper logic limit of the input high level of the NAND gate U1A, the level of a fault signal output by the NAND gate U1A is pulled down, a low level is output, and the output fault signal can be finally sent to an external circuit for use by the resistor R1; when the discharge loop of the capacitor C1 outputs a low level from the protection operation circuit 3, the capacitor C1 is discharged through the resistor R2 and the resistor R3, and when the voltage of the capacitor C1 is lower than the input low level logic lower limit of the nand gate U1A, the level of the fault signal output by the nor gate U1A is pulled up, and a high level is output.
The fault locking delay circuit 5 can prevent the jitter of fault signals and avoid the low pulse of the reset clock of the reset protection action circuit 3 through the cooperation of the capacitor C1, the diode D1, the resistor R2 and the resistor R3, so that the locking of the fault signals is not influenced. When the fault disappears (the underfrequency signal or the overvoltage signal is not detected and output any more), that is, the protection action circuit 3 outputs a low level for a long time, the voltage of the capacitor C1 discharges through the resistor R2 and the resistor R3, the final discharge is terminated, the output of the NAND gate U1A is turned to a high level, and the fault is finally recovered.
In summary, the hardware protection circuit capable of self-recovering under-frequency and over-voltage detection provided by the embodiment of the invention realizes the protection of under-frequency and over-voltage, the protection and the unlocking recovery function after protection locking and fault recovery by arranging the frequency detection circuit 1, the over-voltage detection circuit 2, the protection action circuit 3, the reset clock circuit 4 and the fault locking delay circuit 5, and is suitable for application occasions with isolation requirements, pure hardware control requirements and miniaturization requirements.
It will be appreciated that modifications and variations to the above description will be apparent to those skilled in the art and may be made to the protection of other aspects, such as under-voltage, over-current, etc., all of which are intended to be within the scope of the appended claims.
While the invention has been described above with reference to the accompanying drawings, it will be apparent that the implementation of the invention is not limited by the above manner, and it is within the scope of the invention to apply the inventive concept and technical solution to other situations as long as various improvements made by the inventive concept and technical solution are adopted, or without any improvement.

Claims (10)

1. The hardware protection circuit is characterized by comprising a frequency detection circuit, an overvoltage detection circuit, a protection action circuit, a reset clock circuit and a fault locking delay circuit, wherein the output end of the frequency detection circuit, the output end of the overvoltage detection circuit and the output end of the reset clock circuit are all connected with the input end of the protection action circuit, and the output end of the protection action circuit is respectively connected with the input end of the reset clock circuit and the input end of the fault locking delay circuit;
the protection action circuit is used for outputting a protection action signal according to the underfrequency signal detected and output by the frequency detection circuit or the overvoltage signal detected and output by the overvoltage detection circuit;
the reset clock circuit is used for outputting a reset clock pulse signal to the protection action circuit when the underfrequency signal or the overvoltage signal is not detected and output any more;
the fault locking delay circuit is used for outputting and latching fault signals for a period of time according to the protection action signals output by the protection action circuit.
2. The hardware protection circuit for self-recovery under-frequency and over-voltage detection according to claim 1, wherein the frequency detection circuit is configured to detect whether the frequency of the input voltage is lower than an expected set frequency threshold, and if the frequency of the input voltage is detected to be lower than the expected set frequency threshold, output an under-frequency signal;
the overvoltage detection circuit is used for detecting whether the voltage value of the input voltage is higher than an expected set voltage threshold value, and outputting an overvoltage signal if the voltage value of the input voltage is lower than the expected set voltage threshold value.
3. The hardware protection circuit capable of self-recovering underfrequency and overvoltage detection according to claim 1, wherein the frequency detection circuit comprises a resistor R11, a resistor R13, a resistor R15, a resistor R14, a resistor R16, a resistor R20, a resistor R21, a capacitor C3, a capacitor C5, a capacitor C6, a switching tube Q1 and a switching tube Q2, the input end of the protection action circuit is connected with one end of the resistor R11, the other end of the resistor R11 is respectively connected with one end of the resistor R13, one end of the resistor R15, one end of the capacitor C3 and one end of the resistor R14, the other end of the resistor R13 and the other end of the resistor R15 are respectively connected with a reference voltage, the other end of the capacitor C3 is connected with a ground terminal, the other end of the resistor R14 is respectively connected with one end of the resistor R16, a first end of the switching tube Q1 and a first end of the switching tube Q2, the other end of the switching tube Q16 is respectively connected with the output end of the reset clock circuit, the second end of the switching tube Q1 is respectively connected with one end of the capacitor C5 and one end of the other end of the switching tube Q20, the other end of the switching tube Q2 is respectively connected with the other end of the resistor Q2, and the other end of the driving tube is respectively connected with the third end of the resistor Q2.
4. The hardware protection circuit for self-recovering under-frequency and over-voltage detection according to claim 3, wherein the first pulse driving signal is a positive half-cycle pulse signal of the input voltage, and the second pulse driving signal is a negative half-cycle pulse signal of the input voltage.
5. A self-recovering underfrequency and overvoltage detection hardware protection circuit according to claim 3, wherein the other end of the resistor R16 is connected to the output terminal of the reset clock circuit through a diode D7.
6. The hardware protection circuit capable of self-recovering under-frequency and over-voltage detection according to claim 1, wherein the over-voltage detection circuit comprises an operational amplifier U2B, a resistor R17, a resistor R18, a resistor R19, a capacitor C4 and a diode D6, wherein the negative input end of the operational amplifier U2B is connected with a reference voltage, the positive input end of the operational amplifier U2B is respectively connected with one end of the resistor R17, one end of the resistor R18 and one end of the capacitor C4, the other end of the resistor R17 is connected with an input voltage, the other end of the resistor R18 is respectively connected with the other end of the capacitor C4 and a grounding end after passing through the resistor R19, and the output end of the operational amplifier U2B is connected with the input end of the protection action circuit after passing through the diode D6.
7. The hardware protection circuit capable of self-recovering under-frequency and over-voltage detection according to claim 1, wherein the protection action circuit comprises an operational amplifier U2A, a resistor R8, a resistor R9, a resistor R10 and a diode D4, wherein the negative input end of the operational amplifier U2A is respectively connected with one end of the resistor R8 and one end of the resistor R9, the other end of the resistor R8 is connected with a reference voltage, the other end of the resistor R9 is connected with a grounding end, the positive input end of the operational amplifier U2A is respectively connected with one end of the resistor R10 and the output end of the reset clock circuit, the other end of the resistor R10 is respectively connected with one end of a diode D4, the output end of the frequency detection circuit and the output end of the over-voltage detection circuit, and the output end of the operational amplifier U2A is respectively connected with the other end of the diode D4, the input end of the reset clock circuit and the input end of the fault locking delay circuit.
8. The hardware protection circuit capable of self-recovering under-frequency and over-voltage detection according to claim 1, wherein the reset clock circuit comprises a resistor R4, a resistor R5, a resistor R6, a resistor R7, a diode D3, a capacitor C2 and a nand gate U2A, one end of the resistor R4 and one end of the resistor R5 are respectively connected with the output end of the protection action circuit, the other end of the resistor R4 is connected with one end of the diode D3, the other end of the resistor R6 is connected with one end of the resistor D7, the other end of the diode D3 is respectively connected with the other end of the resistor R7, one end of the capacitor C2 and one end of the resistor R5, the other end of the capacitor C2 is connected with a ground terminal, the other end of the resistor R5 is connected with the first input end of the nand gate U2A, the second input end of the nand gate U2A is connected with a power supply voltage, and the output end of the nand gate U2A is connected with the output end of the reset clock circuit.
9. The hardware protection circuit for self-recovering under-frequency and over-voltage detection according to claim 8, wherein the output end of the nand gate U2A is connected to the output end of the reset clock circuit through a diode D5.
10. The hardware protection circuit capable of self-recovering under-frequency and over-voltage detection according to claim 1, wherein the fault locking delay circuit comprises a resistor R1, a resistor R2, a resistor R3, a diode D1, a capacitor C1 and a nand gate U1A, one end of the resistor R2 is respectively connected with the output end of the protection action circuit and the input end of the reset clock circuit, the other end of the resistor R2 is respectively connected with one end of the resistor R3 and one end of the diode D1, the other end of the resistor R3 is respectively connected with the other end of the diode D1, one end of the capacitor C1 and the input end of the nand gate U1A, the other end of the capacitor C1 is connected with a ground terminal, and the output end of the nand gate U1A is connected with an external circuit after passing through the resistor R1.
CN202310493347.3A 2023-05-04 2023-05-04 Hardware protection circuit capable of self-recovering under-frequency and over-voltage detection Pending CN116505473A (en)

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CN202310493347.3A CN116505473A (en) 2023-05-04 2023-05-04 Hardware protection circuit capable of self-recovering under-frequency and over-voltage detection

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CN202310493347.3A CN116505473A (en) 2023-05-04 2023-05-04 Hardware protection circuit capable of self-recovering under-frequency and over-voltage detection

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CN116505473A true CN116505473A (en) 2023-07-28

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