CN116501454A - Multitasking execution method and device and electronic equipment - Google Patents
Multitasking execution method and device and electronic equipment Download PDFInfo
- Publication number
- CN116501454A CN116501454A CN202210060948.0A CN202210060948A CN116501454A CN 116501454 A CN116501454 A CN 116501454A CN 202210060948 A CN202210060948 A CN 202210060948A CN 116501454 A CN116501454 A CN 116501454A
- Authority
- CN
- China
- Prior art keywords
- processor
- configuration information
- register
- task
- control module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 67
- 230000004044 response Effects 0.000 claims description 12
- 238000004891 communication Methods 0.000 claims description 11
- 238000012545 processing Methods 0.000 description 26
- 230000008569 process Effects 0.000 description 18
- 238000004364 calculation method Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 7
- 230000006870 function Effects 0.000 description 6
- 238000013473 artificial intelligence Methods 0.000 description 4
- 238000013528 artificial neural network Methods 0.000 description 4
- 230000003993 interaction Effects 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000004590 computer program Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000011176 pooling Methods 0.000 description 1
- 238000009877 rendering Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/485—Task life-cycle, e.g. stopping, restarting, resuming execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30094—Condition code generation, e.g. Carry, Zero flag
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Stored Programmes (AREA)
Abstract
The embodiment of the application discloses a method and a device for executing multiple tasks and electronic equipment. The method comprises the following steps: the first control module receives configuration information of a plurality of tasks sent by the second control module; the first control module sends configuration information of a task to a first register of the processor; before the processor finishes the task corresponding to the configuration information in the first register, the first control module sends the configuration information of one task in the remaining tasks to the second register of the processor; and the first control module responds to the task execution completion notification sent by the processor and sends the configuration information of one task in the rest tasks to a target register in the processor until a plurality of tasks are executed by the processor. Through the mode, the first control module and the second control module can work more stably under the condition that the workload is reduced.
Description
Technical Field
The present disclosure relates to the field of computer technologies, and in particular, to a method and an apparatus for performing multiple tasks, and an electronic device.
Background
With the complexity of artificial intelligence, more and more scene processing needs to involve processing of multiple tasks, and when performing multiple tasks, a processor (such as an artificial intelligence network processor (Neural network Processing Unit, NPU)) needs to be frequently switched among the multiple tasks, and in a related manner, a control module (such as a micro control unit (Microcontroller Unit, MCU)) is generally used to interactively control the processor, so that the processor can normally process the multiple tasks.
However, in the interaction process of the control module and the processor, there is a problem that the working stability of the control module needs to be improved.
Disclosure of Invention
In view of the above problems, the present application proposes a method and an apparatus for performing multiple tasks, and an electronic device, so as to improve the above problems.
In a first aspect, the present application provides a multitasking method, applied to an electronic device, where the electronic device includes a first control module, a second control module, and a processor, where two registers are disposed in the processor, and the method includes: the first control module receives configuration information of a plurality of tasks sent by the second control module; the first control module sends configuration information of a task to a first register of the processor, so that the processor can execute the corresponding task based on the configuration information in the first register, wherein the first register is any one of two registers included in the processor; before the processor completes a task corresponding to the configuration information in the first register, the first control module sends the configuration information of one task in the remaining tasks to a second register of the processor, wherein the second register is a register in which the configuration information is not written in the registers included in the processor; the first control module responds to the task execution completion notification sent by the processor, and sends configuration information of one task of the remaining tasks to a target register in the processor, wherein the target register is a register for storing task configuration information corresponding to the task execution completion notification until the tasks are executed by the processor, and the processor executes the corresponding task directly based on the configuration information in one register after executing the corresponding task based on the configuration information in the other register.
In a second aspect, the present application provides a multitasking method, applied to an electronic device, where the electronic device includes a first control module, a second control module, and a processor, where two registers are disposed in the processor, and the method includes: the processor receives configuration information of a task sent by the first control module, and stores the configuration information of the task in a first register, wherein the first register is any one of two registers included by the processor; before the processor completes a task corresponding to the configuration information in the first register, the processor receives the configuration information of one task in the remaining tasks sent by the first control module, and stores the configuration information of the task in a second register, wherein the second register is a register in which the configuration information is not written in the registers included in the processor, and after the processor completes the corresponding task based on the configuration information in one register, the processor directly executes the corresponding task based on the configuration information in the other register; after the task execution is completed, returning a task execution completion notification to the first control module, wherein the task execution completion notification is used for the first control module to respond to the task execution completion notification and return configuration information of one task of the rest tasks to the processor until the tasks are executed by the processor; after receiving the configuration information returned by the first control module in response to the task execution completion notification, the processor stores the returned configuration information in a target register, wherein the target register is a register for storing the configuration information corresponding to the task execution completion notification.
In a third aspect, the present application provides a multitasking execution apparatus, which operates in an electronic device, where the electronic device includes a first control module, a second control module, and a processor, where two registers are disposed in the processor; the device comprises: the configuration information acquisition unit is used for receiving the configuration information of the plurality of tasks sent by the second control module by the first control module; the configuration information sending unit is used for sending configuration information of one task to a first register of the processor by the first control module, so that the processor can execute the corresponding task based on the configuration information in the first register, and the first register is any one of two registers included by the processor; before the processor completes a task corresponding to the configuration information in the first register, the first control module sends the configuration information of one task in the remaining tasks to a second register of the processor, wherein the second register is a register in which the configuration information is not written in the registers included in the processor; the first control module responds to the task execution completion notification sent by the processor, and sends configuration information of one task of the remaining tasks to a target register in the processor, wherein the target register is a register for storing task configuration information corresponding to the task execution completion notification until the tasks are executed by the processor, and the processor executes the corresponding task directly based on the configuration information in one register after executing the corresponding task based on the configuration information in the other register.
In a fourth aspect, the present application provides an electronic device comprising a first control module, a second control module, and a processor having two registers and a memory disposed therein, one or more programs stored in the memory and configured to be executed by the first control module, the one or more programs configured to perform the method described above.
In a fifth aspect, the present application provides a computer readable storage medium having program code stored therein, wherein the method described above is performed when the program code is run.
After the first control module receives configuration information of a plurality of tasks sent by the second control module, the first control module sends the configuration information of one task to a first register of the processor, so that the processor executes the corresponding task based on the configuration information in the first register. Before the processor completes the task corresponding to the configuration information in the first register, the first control module sends the configuration information of one task in the remaining tasks to the second register of the processor, and the first control module responds to the task execution completion notification sent by the processor and sends the configuration information of one task in the remaining tasks to the target register in the processor until the tasks are executed by the processor, wherein the processor executes the corresponding task based on the configuration information in one of the registers and then directly executes the corresponding task based on the configuration information in the other register. By the method, in the process of controlling the processor to execute the tasks, the second control module can be responsible for acquiring the configuration information of the tasks to be executed, and the first control module is responsible for interacting with the configuration information of the tasks to be executed by the processor, so that the first control module and the second control module can work cooperatively, the workload of a single control module is reduced, the efficiency of the processor for processing a plurality of tasks is improved, and the first control module and the second control module can work more stably under the condition of reduced workload.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for performing multiple tasks according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a processor executing tasks as set forth herein;
fig. 3 is a schematic diagram showing a first control module sending task configuration information according to the present application;
FIG. 4 is a schematic diagram illustrating another first control module according to the present application sending task configuration information;
FIG. 5 is a flow chart illustrating a method of performing multiple tasks according to another embodiment of the present application;
fig. 6 shows a schematic diagram of an electronic device according to an embodiment of the present application;
FIG. 7 is a flow chart illustrating a method of performing multiple tasks according to yet another embodiment of the present application;
FIG. 8 is a block diagram of a multi-task execution device according to an embodiment of the present application;
Fig. 9 shows a block diagram of an electronic device proposed in the present application;
fig. 10 is a storage unit for storing or carrying program code for implementing a multitasking method according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
With the complexity of artificial intelligence, more and more scene processing needs to involve processing of multiple tasks, and when performing multiple tasks, a processor (such as an artificial intelligence network processor (Neural network Processing Unit, NPU)) needs to be frequently switched among the multiple tasks, and in a related manner, a control module (such as a micro control unit (Microcontroller Unit, MCU)) is generally used to interactively control the processor, so that the processor can normally process the multiple tasks.
The inventor finds that in the related research, in the process of interaction between the control module and the processor, the problem that the working stability of the control module needs to be improved exists.
Therefore, the inventor proposes a method, an apparatus and an electronic device for executing multiple tasks in the present application, where after the first control module receives configuration information of multiple tasks sent by the second control module, the first control module sends configuration information of one task to a first register of the processor, so that the processor executes a corresponding task based on the configuration information in the first register. Before the processor completes the task corresponding to the configuration information in the first register, the first control module sends the configuration information of one task in the remaining tasks to the second register of the processor, and the first control module responds to the task execution completion notification sent by the processor and sends the configuration information of one task in the remaining tasks to the target register in the processor until the tasks are executed by the processor, wherein the processor executes the corresponding task based on the configuration information in one of the registers and then directly executes the corresponding task based on the configuration information in the other register.
By the method, in the process of controlling the processor to execute the tasks, the second control module can be responsible for acquiring the configuration information of the tasks to be executed, and the first control module is responsible for interacting with the configuration information of the tasks to be executed by the processor, so that the first control module and the second control module can work cooperatively, the workload of a single control module is reduced, the efficiency of the processor for processing a plurality of tasks is improved, and the first control module and the second control module can work more stably under the condition of reduced workload.
Referring to fig. 1, the method for performing multiple tasks provided in the present application is applied to an electronic device, where the electronic device includes a first control module, a second control module, and a processor, and two registers are disposed in the processor, and the method includes:
s110: the first control module receives configuration information of a plurality of tasks sent by the second control module.
In this embodiment of the present application, the configuration information refers to information required in the task execution process, and may include configuration information of a register in a processor, a source address and a destination address of task data, and the like. The configuration information of the registers in the processor may be an identifier of a register that is needed in the task execution process. The task Data refers to Data that needs to be processed by the processor, the source address of the task Data refers to a storage address of the task Data, the destination address of the task Data is a storage address of Data processed by the processor, and the source address and the destination address of the task Data may be represented by address identifiers, for example, the source address and the destination address may be an address identifier of a Static Random-Access Memory (SRAM) storage area inside the processor, an address identifier of a Double Data Rate (DDR) storage area in the electronic device, and the like.
Furthermore, in the embodiment of the present application, the first control module may be a hardware configuration unit (Hardware programmer, HW programmer); the second control module can be MCU, etc.; the processor refers to a chip having data computing and image processing functions, for example: NPU, DSP (Digital Signal Processing ), etc.
As a way, the second control module may send configuration information of a plurality of tasks to the first control module at a time, and after the second control module receives the configuration information of the plurality of tasks, the configuration information of the plurality of tasks may be stored in a task summary table. For example, after the first control module receives the register configuration information corresponding to the plurality of tasks, the source address and the destination address of the task data, the first control module may store the configuration information in table 1 according to the correspondence between the tasks and the configuration information.
TABLE 1
S120: the first control module sends configuration information of a task to a first register of the processor, so that the processor can execute the corresponding task based on the configuration information in the first register, and the first register is any one of two registers included in the processor.
In one manner, the first control module may send configuration information of a task to the first register of the processor in response to the start instruction sent by the second control module, so that the processor may execute the corresponding task based on the configuration information in the first register.
Optionally, the processor further includes a direct memory access (Direct Memory Access, DMA) unit and a computing unit, where after the first control module sends configuration information of a task to a first register of the processor, the DMA may acquire register configuration information of a current task, a source address and a destination address of task data from the first register, acquire task data according to the acquired task data source address, and input the task data into a register corresponding to the current task (i.e., the first register) according to the acquired register configuration information; after the DMA inputs all task data into the register corresponding to the current task, the computing unit in the processor may perform related computation on the task data and send the computation result to the DMA, so that the DMA may send the computation result to the target address of the current task, and thus the processor may execute the corresponding task based on the configuration information in the first register.
For example, as shown in FIG. 2, the processor may be an NPU, with the source address and destination address of the current task data being located in separate storage areas in memory (e.g., DDR). After the second control module sends a starting instruction to the first control module, the first control module can respond to the starting instruction to send configuration information corresponding to the task one in the table 1 to the first register, and after the DMA obtains the configuration information of the task one from the first register, the DMA can load the characteristic image data and the weight data corresponding to the task one into the register corresponding to the task one in batches from the source address of the DDR; after loading is finished, the DMA may send a data loading completion signal to trigger a tensor operation unit and a vector operation unit in the NPU calculation unit to perform data calculation, where the tensor operation unit may perform convolution operation, and the vector operation unit may perform operations such as pooling operator, activating operator, scaling operator, and the like. After the data calculation is completed, the DMA may send the calculation result to the target address of the DDR.
S130: before the processor completes the task corresponding to the configuration information in the first register, the first control module sends the configuration information of one task in the remaining tasks to a second register of the processor, wherein the second register is a register in which the configuration information is not written in the registers included in the processor.
When the processor starts to process the task corresponding to the configuration information in the first register, the first control module may send the configuration information of one task of the remaining tasks to the second register of the processor. For example, as shown in fig. 3, the first control module may send the configuration information of the first task to the first register, and then send the configuration information of the second task to the second register at time T0.
Alternatively, the first control module may send the configuration information of one of the remaining tasks to the second register of the processor while sending the configuration information of the one task to the first register of the processor. For example, as shown in fig. 4, the first control module may send the configuration information of the task one and the task two to the first register and the second register before the time T0.
S140: the first control module responds to the task execution completion notification sent by the processor, and sends configuration information of one task of the remaining tasks to a target register in the processor, wherein the target register is a register for storing task configuration information corresponding to the task execution completion notification until the tasks are executed by the processor, and the processor executes the corresponding task directly based on the configuration information in one register after executing the corresponding task based on the configuration information in the other register.
The second control module can query the working state of the processor in real time, and when the second control module can query the computing unit in the processor to complete task data calculation, the second control module can take a register storing configuration information corresponding to the task completed by the current computing unit as a target register and send the information of the target register to the first control module, so that the first control module can send the configuration information of one task in the rest tasks to the target register in the processor. Illustratively, the second control module may be an MCU, the processor may be an NPU, and the first control module may be a HW programmer. When the MCU queries that the computing unit in the NPU completes task-one corresponding task data computation, the MCU may obtain table 1 obtained in step S110 from the HW programmer, and may determine a register storing task-one configuration information according to table 1, and use the register as a target register. The MCU then sends the information of the target register to the HW programmer, so that the HW programmer can send the configuration information of one task in the remaining tasks to the target register in the processor.
Alternatively, the target register corresponding to each task may be preconfigured by the second control module, where the second control module uses the configured target register as the register configuration information in the configuration information of each task. The second control module may alternatively configure the target registers, and for example, when the target register of the task one is the first register, the target register of the task two is the second register, and the target register of the task three is the first register. When the calculation unit in the processor completes the calculation of the task data, the processor can send a task execution completion notification to the first control module; the first control module responds to a task execution completion notice sent by the processor, and sends the configuration information of one task in the remaining tasks to a target register in the processor, namely a register corresponding to the configuration information of the register, based on the configuration information of the register in the configuration information of the one task in the remaining tasks. Illustratively, the processor may be an NPU and the first control module may be a HW programmer. When the HW programmer receives the task execution completion notification corresponding to the task one sent by the NPU, the target register of one task in the remaining tasks may be determined from table 1 obtained in step S110, and the configuration information of the task may be sent to the target register in the NPU.
In the multitasking execution method provided in this embodiment, after the first control module receives the configuration information of a plurality of tasks sent by the second control module, the first control module sends the configuration information of one task to the first register of the processor, so that the processor executes the corresponding task based on the configuration information in the first register. Before the processor completes the task corresponding to the configuration information in the first register, the first control module sends the configuration information of one task in the remaining tasks to the second register of the processor, and the first control module responds to the task execution completion notification sent by the processor and sends the configuration information of one task in the remaining tasks to the target register in the processor until the tasks are executed by the processor, wherein the processor executes the corresponding task based on the configuration information in one of the registers and then directly executes the corresponding task based on the configuration information in the other register. By the method, in the process of controlling the processor to execute the tasks, the second control module can be responsible for acquiring the configuration information of the tasks to be executed, and the first control module is responsible for interacting with the configuration information of the tasks to be executed by the processor, so that the first control module and the second control module can work cooperatively, the workload of a single control module is reduced, the efficiency of the processor for processing a plurality of tasks is improved, and the first control module and the second control module can work more stably under the condition of reduced workload.
Referring to fig. 5, the method for performing multiple tasks provided in the present application is applied to an electronic device, where the electronic device includes a first control module, a second control module, and a processor, and two registers are disposed in the processor, and the method includes:
s210: the first control module receives configuration information of a plurality of tasks sent by the second control module.
In one manner, after the first control module receives the configuration information of the plurality of tasks sent by the second control module, the configuration information may be stored according to the execution sequence of the tasks, and a waiting instruction is set after the configuration information of each task, so as to generate a multi-task queue summary table as shown in table 2.
TABLE 2
S220: the first control module sends configuration information of a task to a first register of the processor, so that the processor can execute the corresponding task based on the configuration information in the first register, and the first register is any one of two registers included in the processor.
S230: before the processor completes the task corresponding to the configuration information in the first register, the first control module sends the configuration information of one task in the remaining tasks to a second register of the processor, wherein the second register is a register in which the configuration information is not written in the registers included in the processor.
S240: and after the first control module sends the configuration information to the processor, executing a waiting instruction to enter a waiting state.
In one manner, after the first control module sends the configuration information of one task to the processor, the first control module may execute the waiting instruction corresponding to the current task according to the sequence in table 2 to enter a waiting state, where the first control module does not continue to send the configuration information to the processor.
S250: and the first control module in the waiting state responds to the task execution completion notification sent by the processor, and sends the configuration information of one task in the rest tasks to a register in the processor, which stores the configuration information corresponding to the task execution completion notification, until the tasks are executed by the processor.
In this embodiment, as shown in fig. 6, the electronic device is further provided with a communication bus, such as a peripheral bus (Advanced Peripheral Bus, APB), or the like. In one mode, the first control module responds to the task execution completion notification sent by the processor, can recover to a normal working state from a waiting state, and sends configuration information of one task in the remaining tasks to a target register in the processor through a communication bus.
Optionally, the communication bus may be further used to implement signal transmission between the first control module, the second control module, and the processor, transmission of task data, and so on.
Optionally, a through passage is connected between the first control module and the processor. As one approach, the processor may send a task execution completion notification to the first control module via the pass-through path. By using the task execution completion notification sent to the first control module by the through channel, the transmission efficiency of the task execution completion notification can be improved, thereby improving the communication efficiency between the processor and the first control module.
S260: the processor sends an interrupt signal to the second control module, wherein the interrupt signal is used for notifying the second control module that the tasks are all completely executed, so that the second control module sends configuration information of the new tasks to the first control module.
Wherein, as a way, after all tasks in table 2 of step S210 are executed by the processor, the processor may send an interrupt signal to the second control module through the communication bus, so that the second control module sends configuration information of the new multiple tasks to the first control module.
According to the multi-task execution method provided by the embodiment, in the process of controlling the processor to execute tasks, the second control module can be responsible for acquiring configuration information of tasks to be executed, and the first control module is responsible for interaction with the configuration information of the tasks to be executed by the processor, so that the first control module and the second control module can work cooperatively, the workload of a single control module is reduced, the efficiency of the processor for processing a plurality of tasks is improved, and the first control module and the second control module can work more stably under the condition of reduced workload. In addition, in this embodiment, by adding a control module (e.g., a first control module), the first control module and the second control module can perform interactive control on the processor, so that not only the workload of the second control module (e.g., an MCU) can be reduced, but also the delay in the task processing process can be reduced, so that the switching between tasks is faster and more efficient.
Referring to fig. 7, the method for performing multiple tasks provided in the present application is applied to an electronic device, where the electronic device includes a first control module, a second control module, and a processor, and two registers are disposed in the processor, and the method includes:
S310: the processor receives configuration information of a task sent by the first control module, and stores the configuration information of the task in a first register, wherein the first register is any one of two registers included in the processor.
Where the processor includes two registers, the register being used by the processor may be referred to as a working register, and the register not being used by the processor may be referred to as a shadow register. The register being used by the processor may be understood as a register in which a task corresponding to the stored configuration information is being executed by the processor.
It should be noted that both registers included in the processor may be switched between the shadow register and the working register. Illustratively, when the processor is currently processing a task corresponding to the configuration information in the first register, the first register is a working register, and the second register is a shadow register; when the processor is currently processing a task corresponding to the configuration information in the second register, the first register is a shadow register, and the second register is a working register.
Furthermore, it should be noted that the method for performing multiple tasks according to the embodiments of the present application is also applicable to a case where the processor includes three or more registers, and when there are three or more registers, the register being used by the processor may be used as a working register, and other registers not being used by the processor may be used as shadow registers.
S320: before the processor completes the task corresponding to the configuration information in the first register, the processor receives the configuration information of one task in the remaining tasks sent by the first control module, and stores the configuration information of the task in a second register, wherein the second register is a register in which the configuration information is not written in the registers included in the processor, and after the processor completes the corresponding task based on the configuration information in one of the registers, the processor directly executes the corresponding task based on the configuration information in the other register.
When the processor starts to process the task corresponding to the configuration information in the first register, the processor may receive the configuration information of one task in the remaining tasks sent by the first control module, and store the configuration information of the task in the second register.
As another way, the processor may receive the configuration information of the two tasks from the first control module at the same time before starting to process the task corresponding to the configuration information in the first register, and store the configuration information of the two tasks in the first register and the second register respectively.
S330: and after the task execution is completed, returning a task execution completion notification to the first control module, wherein the task execution completion notification is used for the first control module to respond to the task execution completion notification and return configuration information of one task of the rest tasks to the processor until the tasks are executed by the processor.
Wherein, as a way, after the task execution is completed, the processor may return a task execution completion notification to the first control module, so that the first control module may return configuration information of one task of the remaining tasks to the processor in response to the task execution completion notification until a plurality of tasks are all executed by the processor.
S340: after receiving the configuration information returned by the first control module in response to the task execution completion notification, the processor stores the returned configuration information in a target register, wherein the target register is a register for storing the configuration information corresponding to the task execution completion notification.
Wherein, as a way, after receiving the configuration information returned by the first control module in response to the task execution completion notification, the processor may store the returned configuration information in a target register, where the target register is a register storing the configuration information corresponding to the task execution completion notification.
According to the multi-task execution method provided by the embodiment, in the process of controlling the processor to execute tasks, the second control module can be responsible for acquiring configuration information of tasks to be executed, and the first control module is responsible for interaction with the configuration information of the tasks to be executed by the processor, so that the first control module and the second control module can work cooperatively, the workload of a single control module is reduced, the efficiency of the processor for processing a plurality of tasks is improved, and the first control module and the second control module can work more stably under the condition of reduced workload. In addition, in this embodiment, the configuration information of the tasks is stored by using two registers, so that after the processor executes the corresponding task based on the configuration information in one register, the processor can execute the corresponding task directly based on the configuration information in the other register, thereby improving the working efficiency of the processor.
Referring to fig. 8, a multitasking device 600 provided in the present application is operated in an electronic device, where the electronic device includes a first control module, a second control module, and a processor, and the processor includes two registers; the apparatus 600 includes:
A configuration information obtaining unit 610, configured to receive, by using the first control module, configuration information of a plurality of tasks sent by the second control module;
a configuration information sending unit 620, configured to send configuration information of one task to a first register of the processor by using the first control module, where the first register is any one of two registers included in the processor, and the first register is used for the processor to execute a corresponding task based on the configuration information in the first register; before the processor completes a task corresponding to the configuration information in the first register, the first control module sends the configuration information of one task in the remaining tasks to a second register of the processor, wherein the second register is a register in which the configuration information is not written in the registers included in the processor; the first control module responds to the task execution completion notification sent by the processor, and sends configuration information of one task of the remaining tasks to a target register in the processor, wherein the target register is a register for storing task configuration information corresponding to the task execution completion notification until the tasks are executed by the processor, and the processor executes the corresponding task directly based on the configuration information in one register after executing the corresponding task based on the configuration information in the other register.
As one way, the configuration information sending unit 620 is specifically configured to execute a wait instruction to enter a wait state after the first control module sends configuration information to the processor; and the first control module in the waiting state responds to the task execution completion notification sent by the processor, and sends the configuration information of one task in the rest tasks to a register in the processor, which stores the configuration information corresponding to the task execution completion notification, until the tasks are executed by the processor.
As another way, a through path is connected between the first control module and the processor, and the configuration information sending unit 620 is specifically configured to send, in response to a task execution completion notification sent by the processor through the through path, configuration information of one task of the remaining tasks to a target register in the processor, where the target register is a register storing task configuration information corresponding to the task execution completion notification, until all the tasks are executed by the processor.
As still another way, the electronic device further includes a communication bus, and the configuration information sending unit 620 is specifically configured to send, by using the first control module in response to the task execution completion notification sent by the processor, configuration information of one task of the remaining tasks to a target register in the processor through the communication bus, where the target register is a register storing task configuration information corresponding to the task execution completion notification, until all the tasks are executed by the processor.
As yet another manner, the configuration information sending unit 620 is specifically configured to send an interrupt signal to the second control module, where the interrupt signal is used to inform the second control module that the plurality of tasks are all executed completely, so that the second control module sends configuration information of a new plurality of tasks to the first control module.
As yet another manner, the configuration information sending unit 620 is specifically configured to, in response to a start instruction sent by the second control module, send configuration information of one task to a first register of the processor, so that the processor executes the corresponding task based on the configuration information in the first register.
Optionally, the second control module is a micro control unit.
An electronic device provided in the present application will be described with reference to fig. 9.
Referring to fig. 8, based on the above-mentioned method and apparatus for performing multiple tasks, another electronic device 100 capable of performing the above-mentioned method for performing multiple tasks is provided in the embodiments of the present application. The electronic device 100 includes a first control module 102, a second control module 104, a processor 106, and a memory 108, wherein two registers, a first register 1061 and a second register 1062, are disposed in the processor. The memory 108 stores therein a program that can execute the contents of the foregoing embodiments, and the first control module 102 can execute the program stored in the memory 108.
Wherein the processor 106 may include one or more processing cores. The processor 106 utilizes various interfaces and lines to connect various portions of the overall electronic device 100, perform various functions of the electronic device 100, and process data by executing or executing instructions, programs, code sets, or instruction sets stored in the memory 106, and invoking data stored in the memory 106. Alternatively, the processor 106 may be implemented in hardware in at least one of a network processor (Neural network Processing Unit, NPU), digital signal processing (Digital Signal Processing, DSP), field programmable gate array (Field-Programmable Gate Array, FPGA), programmable logic array (Programmable Logic Array, PLA). The processor 106 may integrate one or a combination of several of a central processing unit (Central Processing Unit, CPU), an image processor (Graphics Processing Unit, GPU), a network processor (Neural network Processing Unit, NPU), and a modem, etc. The CPU mainly processes an operating system, a user interface, an application program and the like; the GPU is used for being responsible for rendering and drawing of display content; the NPU is responsible for processing multimedia data of video and image types; the modem is used to handle wireless communications. It will be appreciated that the modem may not be integrated into the processor 106 and may be implemented solely by a single communication chip.
The Memory 108 may include a random access Memory (Random Access Memory, RAM) or a Read-Only Memory (DDR) and a Double data rate synchronous dynamic random access Memory (Double data rate). Memory 108 may be used to store instructions, programs, code, sets of codes, or sets of instructions. The memory 108 may include a stored program area and a stored data area, wherein the stored program area may store instructions for implementing an operating system, instructions for implementing at least one function (e.g., a touch function, a sound playing function, an image playing function, etc.), instructions for implementing the various method embodiments described below, etc. The storage data area may also store data created by the terminal 100 in use (such as phonebook, audio-video data, chat-record data), etc.
Referring to fig. 10, a block diagram of a computer readable storage medium according to an embodiment of the present application is shown. The computer readable storage medium 800 has stored therein program code that can be invoked by a processor to perform the methods described in the method embodiments described above.
The computer readable storage medium 800 may be an electronic memory such as a flash memory, an EEPROM (electrically erasable programmable read only memory), an EPROM, a hard disk, or a ROM. Optionally, the computer readable storage medium 800 comprises a non-volatile computer readable storage medium (non-transitory computer-readable storage medium). The computer readable storage medium 800 has storage space for program code 810 that performs any of the method steps described above. The program code can be read from or written to one or more computer program products. Program code 810 may be compressed, for example, in a suitable form.
In summary, after the first control module receives the configuration information of the plurality of tasks sent by the second control module, the first control module sends the configuration information of one task to the first register of the processor, so that the processor executes the corresponding task based on the configuration information in the first register. Before the processor completes the task corresponding to the configuration information in the first register, the first control module sends the configuration information of one task in the remaining tasks to the second register of the processor, and the first control module responds to the task execution completion notification sent by the processor and sends the configuration information of one task in the remaining tasks to the target register in the processor until the tasks are executed by the processor, wherein the processor executes the corresponding task based on the configuration information in one of the registers and then directly executes the corresponding task based on the configuration information in the other register. By the method, in the process of controlling the processor to execute the tasks, the second control module can be responsible for acquiring the configuration information of the tasks to be executed, and the first control module is responsible for interacting with the configuration information of the tasks to be executed by the processor, so that the first control module and the second control module can work cooperatively, the workload of a single control module is reduced, the efficiency of the processor for processing a plurality of tasks is improved, and the first control module and the second control module can work more stably under the condition of reduced workload.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and are not limiting thereof; although the present application has been described in detail with reference to the foregoing embodiments, one of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not drive the essence of the corresponding technical solutions to depart from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims (11)
1. The multi-task execution method is characterized by being applied to electronic equipment, wherein the electronic equipment comprises a first control module, a second control module and a processor, and two registers are arranged in the processor; the method comprises the following steps:
the first control module receives configuration information of a plurality of tasks sent by the second control module;
the first control module sends configuration information of a task to a first register of the processor, so that the processor can execute the corresponding task based on the configuration information in the first register, wherein the first register is any one of two registers included in the processor;
Before the processor completes a task corresponding to the configuration information in the first register, the first control module sends the configuration information of one task in the remaining tasks to a second register of the processor, wherein the second register is a register in which the configuration information is not written in the registers included in the processor;
the first control module responds to the task execution completion notification sent by the processor, and sends configuration information of one task of the remaining tasks to a target register in the processor, wherein the target register is a register for storing task configuration information corresponding to the task execution completion notification until the tasks are executed by the processor, and the processor executes the corresponding task directly based on the configuration information in one register after executing the corresponding task based on the configuration information in the other register.
2. The method of claim 1, wherein the first control module, in response to the task execution completion notification sent by the processor, sends configuration information of one task of remaining tasks to a target register in the processor, the target register being a register storing task configuration information corresponding to the task execution completion notification until all of the plurality of tasks are executed by the processor, comprising:
After the first control module sends configuration information to the processor, executing a waiting instruction to enter a waiting state;
and the first control module in the waiting state responds to the task execution completion notification sent by the processor, and sends the configuration information of one task in the rest tasks to a register in the processor, which stores the configuration information corresponding to the task execution completion notification, until the tasks are executed by the processor.
3. The method of claim 1, wherein a pass-through path is connected between the first control module and the processor; the first control module responds to a task execution completion notification sent by the processor, sends configuration information of one task of the remaining tasks to a target register in the processor, wherein the target register is a register for storing task configuration information corresponding to the task execution completion notification until the tasks are executed by the processor, and comprises:
the first control module responds to a task execution completion notification sent by the processor through the through passage, and sends configuration information of one task of the rest tasks to a target register in the processor, wherein the target register is a register for storing task configuration information corresponding to the task execution completion notification until the tasks are executed by the processor.
4. The method of claim 1, wherein the electronic device further comprises a communication bus, wherein the first control module, in response to the task execution completion notification sent by the processor, sends configuration information of one task of remaining tasks to a target register in the processor, the target register being a register storing task configuration information corresponding to the task execution completion notification until all of the plurality of tasks are executed by the processor, comprising:
the first control module responds to the task execution completion notification sent by the processor, and sends configuration information of one task in the rest tasks to a target register in the processor through the communication bus, wherein the target register is a register for storing the task configuration information corresponding to the task execution completion notification until the tasks are executed by the processor.
5. The method according to any one of claims 1 to 4, wherein the first control module, in response to a task execution completion notification sent by the processor, sends configuration information of one task of remaining tasks to a target register in the processor, where the target register is a register storing task configuration information corresponding to the task execution completion notification, until after the plurality of tasks are executed by the processor, further includes:
The processor sends an interrupt signal to the second control module, wherein the interrupt signal is used for notifying the second control module that the tasks are all completely executed, so that the second control module sends configuration information of the new tasks to the first control module.
6. The method of claim 5, wherein the first control module sending configuration information for a task to a first register of the processor for the processor to perform the corresponding task based on the configuration information in the first register, comprising:
and responding to the starting instruction sent by the second control module, and sending configuration information of one task to a first register of the processor by the first control module so as to be used for executing the corresponding task by the processor based on the configuration information in the first register.
7. The method of claim 1, wherein the second control module is a micro-control unit.
8. The multi-task execution method is characterized by being applied to electronic equipment, wherein the electronic equipment comprises a first control module, a second control module and a processor, and the processor comprises two registers; the method comprises the following steps:
The processor receives configuration information of a task sent by the first control module, and stores the configuration information of the task in a first register, wherein the first register is any one of two registers included by the processor;
before the processor completes a task corresponding to the configuration information in the first register, the processor receives the configuration information of one task in the remaining tasks sent by the first control module, and stores the configuration information of the task in a second register, wherein the second register is a register in which the configuration information is not written in the registers included in the processor, and after the processor completes the corresponding task based on the configuration information in one register, the processor directly executes the corresponding task based on the configuration information in the other register;
after the task execution is completed, returning a task execution completion notification to the first control module, wherein the task execution completion notification is used for the first control module to respond to the task execution completion notification and return configuration information of one task of the rest tasks to the processor until the tasks are executed by the processor;
After receiving the configuration information returned by the first control module in response to the task execution completion notification, the processor stores the returned configuration information in a target register, wherein the target register is a register for storing the configuration information corresponding to the task execution completion notification.
9. The multi-task execution device is characterized by being operated in electronic equipment, wherein the electronic equipment comprises a first control module, a second control module and a processor, and two registers are arranged in the processor; the device comprises:
the configuration information acquisition unit is used for receiving the configuration information of the plurality of tasks sent by the second control module by the first control module;
the configuration information sending unit is used for sending configuration information of one task to a first register of the processor by the first control module, so that the processor can execute the corresponding task based on the configuration information in the first register, and the first register is any one of two registers included by the processor; before the processor completes a task corresponding to the configuration information in the first register, the first control module sends the configuration information of one task in the remaining tasks to a second register of the processor, wherein the second register is a register in which the configuration information is not written in the registers included in the processor; the first control module responds to the task execution completion notification sent by the processor, and sends configuration information of one task of the remaining tasks to a target register in the processor, wherein the target register is a register for storing task configuration information corresponding to the task execution completion notification until the tasks are executed by the processor, and the processor executes the corresponding task directly based on the configuration information in one register after executing the corresponding task based on the configuration information in the other register.
10. An electronic device comprising a first control module, a second control module, a processor and a memory, the processor having two registers disposed therein, one or more programs stored in the memory and configured to be executed by the first control module, the one or more programs configured to perform the method of any of claims 1-8.
11. A computer readable storage medium, characterized in that the computer readable storage medium has stored therein a program code, wherein the method of any of claims 1-8 is performed when the program code is run.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210060948.0A CN116501454A (en) | 2022-01-19 | 2022-01-19 | Multitasking execution method and device and electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210060948.0A CN116501454A (en) | 2022-01-19 | 2022-01-19 | Multitasking execution method and device and electronic equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116501454A true CN116501454A (en) | 2023-07-28 |
Family
ID=87325429
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210060948.0A Pending CN116501454A (en) | 2022-01-19 | 2022-01-19 | Multitasking execution method and device and electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116501454A (en) |
-
2022
- 2022-01-19 CN CN202210060948.0A patent/CN116501454A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR102466984B1 (en) | Improved function callback mechanism between a central processing unit (cpu) and an auxiliary processor | |
| US7583268B2 (en) | Graphics pipeline precise interrupt method and apparatus | |
| US9703603B1 (en) | System and method for executing accelerator call | |
| CN111274019B (en) | Data processing method, device and computer readable storage medium | |
| US9043806B2 (en) | Information processing device and task switching method | |
| CN108509272B (en) | Method and device for copying GPU (graphics processing Unit) video memory texture to system memory and electronic equipment | |
| CN107315563B (en) | Apparatus and method for performing vector compare operations | |
| CN112529995B (en) | Image rendering calculation method and device, storage medium and terminal | |
| CN109213607B (en) | Multithreading rendering method and device | |
| WO2019005485A1 (en) | Early virtualization context switch for virtualized accelerated processing device | |
| US20230351145A1 (en) | Pipelining and parallelizing graph execution method for neural network model computation and apparatus thereof | |
| WO2020015087A1 (en) | Method and system for large-scale processing of images, computer device, and computer storage medium | |
| CN111310638B (en) | Data processing method, device and computer readable storage medium | |
| CN112559403A (en) | Processor and interrupt controller therein | |
| CN116501454A (en) | Multitasking execution method and device and electronic equipment | |
| CN109426529B (en) | Method, device and terminal for drawing graphics based on X window system | |
| CN116243983A (en) | Processor, integrated circuit chip, instruction processing method, electronic device, and medium | |
| CN115373646A (en) | Information expansion method, device and related product | |
| CN111258653A (en) | Atomic access and storage method, storage medium, computer equipment, device and system | |
| CN111143078B (en) | Data processing method, device and computer readable storage medium | |
| CN110796587A (en) | Drawcall call processing method, device, terminal and storage medium | |
| CN117435259B (en) | VPU configuration method and device, electronic equipment and computer readable storage medium | |
| CN114020476B (en) | Job processing method, device and medium | |
| CN116225532A (en) | General processor supporting acceleration vector operation | |
| CN111831405B (en) | Data processing method, logic chip and equipment thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |