CN116501156B

CN116501156B - Power supply time sequence control method, device, equipment and storage medium

Info

Publication number: CN116501156B
Application number: CN202310570746.5A
Authority: CN
Inventors: 孙太宇
Original assignee: Ecarx Hubei Tech Co Ltd
Current assignee: Ecarx Hubei Tech Co Ltd
Priority date: 2023-05-19
Filing date: 2023-05-19
Publication date: 2024-01-30
Anticipated expiration: 2043-05-19
Also published as: CN116501156A

Abstract

The application provides a power supply time sequence control method, a device, equipment and a storage medium, and relates to the technical field of power supply management, wherein the power supply time sequence control method comprises the following steps: determining a target power supply time sequence in response to the power supply state switching, and triggering a setting instruction of the target power supply time sequence, wherein the target power supply time sequence is configurable; responding to a setting instruction of a target power supply time sequence, setting a control request for the power supply node based on a preset time sequence parameter corresponding to the power supply node aiming at each power supply node in the target power supply time sequence, wherein the control request carries a power supply node identifier and an enabling identifier corresponding to the power supply node; and responding to the control request, determining a target power supply node corresponding to the power supply node identifier in the preset power supply nodes, and enabling the target power supply node according to the enabling identifier and preset control parameters corresponding to the target power supply node. The power supply time sequence can be flexibly controlled.

Description

Power supply time sequence control method, device, equipment and storage medium

Technical Field

The present disclosure relates to the field of power management technologies, and in particular, to a power timing control method, apparatus, device, and storage medium.

Background

With the rapid development of electronic technology, the functional complexity of electronic devices is increasing, and accordingly, the power management of electronic devices is also increasing.

Currently, due to the increase of the number of chips in a circuit of an electronic device, a power supply of the electronic device is generally divided into different power supply groups, and for power supply nodes corresponding to each power supply group, a delay is set before and after execution of an enabling function corresponding to each power supply node to control a power supply timing sequence. If the power supply timing is to be adjusted, this is achieved by modifying the code logic. The power supply time sequence is controlled in the mode, so that the problem of inflexibility exists.

Disclosure of Invention

The application provides a power supply time sequence control method, a device, equipment and a storage medium, which are used for solving the problem that the control of the power supply time sequence is not flexible enough in the current mode.

In a first aspect, the present application provides a power timing control method, including:

determining a target power supply time sequence in response to the power supply state switching, and triggering a setting instruction of the target power supply time sequence, wherein the target power supply time sequence is used for indicating the time sequence of a power supply node to be enabled, and the target power supply time sequence is configurable;

Responding to a setting instruction of a target power supply time sequence, setting a control request for the power supply node based on a preset time sequence parameter corresponding to the power supply node aiming at each power supply node in the target power supply time sequence, wherein the control request carries a power supply node identifier and an enabling identifier corresponding to the power supply node;

and responding to the control request, determining a target power supply node corresponding to the power supply node identifier in the preset power supply nodes, and enabling the target power supply node according to the enabling identifier and preset control parameters corresponding to the target power supply node.

Optionally, in response to the control request, determining, in the preset power nodes, the target power node corresponding to the power node identifier includes: traversing a preset power supply node; determining whether a power supply node in preset power supply nodes receives a control request or not; if yes, responding to the control request, and determining a target power node corresponding to the power node identification in the preset power nodes.

Optionally, the power supply timing control method further includes: if not, determining whether a power node in the preset power nodes is enabled; if enabled, then monitoring whether the power supply feedback signal of the enabled power supply node is normal.

Optionally, after the target power node is enabled, the power timing control method further includes: and determining whether the function of the enabled target power supply node is normal or not according to the preset checking parameters corresponding to the target power supply node.

Optionally, the preset checking parameters include a preset feedback level corresponding to the power supply feedback signal and a feedback timeout period, and determining whether the function of the enabled target power supply node is normal according to the preset checking parameters corresponding to the target power supply node includes: acquiring a target power supply feedback signal corresponding to the enabled target power supply node within the feedback timeout period; determining whether the target power supply feedback signal is the same as a preset feedback level; if yes, determining that the function of the enabled target power supply node is normal; if not, determining that the function of the enabled target power supply node is abnormal.

Optionally, the power supply timing control method further includes: and when the functional abnormality of the enabled target power supply node is determined, outputting first indication information, wherein the first indication information is used for indicating the functional abnormality of the enabled target power supply node.

Optionally, the preset inspection parameter further includes a debounce duration corresponding to the power supply feedback signal, and the acquiring the target power supply feedback signal corresponding to the enabled target power supply node within the feedback timeout duration includes: and after waiting for the debounce time period, acquiring a target power supply feedback signal corresponding to the enabled target power supply node within the feedback timeout time period.

Optionally, the preset timing parameter includes a dependency relationship between power supply nodes, and setting a control request for the power supply nodes based on the preset timing parameter corresponding to the power supply nodes includes: if the power supply node is determined to have a dependent power supply node according to the dependency relationship, waiting for enabling of the dependent power supply node to be completed; after the dependent power node is enabled, a control request for the power node is set.

Optionally, the preset timing parameter further includes a delay time of the power node relative to the dependent power node, and after the enabling of the dependent power node is completed, setting a control request for the power node includes: after the enabling of the dependent power supply node is completed, waiting for the arrival of the delay time of the power supply node relative to the dependent power supply node; after the delay time is up, a control request for the power supply node is set.

Optionally, the preset timing parameter includes a first callback function corresponding to the power node before enabling, and setting a control request for the power node based on the preset timing parameter corresponding to the power node includes: checking whether the dependent condition corresponding to the power node meets the preset enabling requirement of the target power sequence or not through a first callback function; if yes, setting a control request for the power supply node.

Optionally, the power supply timing control method further includes: if the power supply node does not meet the preset enabling requirement of the target power supply time sequence, outputting second indicating information, wherein the second indicating information is used for indicating that the dependent condition corresponding to the power supply node does not meet the preset enabling requirement of the target power supply time sequence.

Optionally, the preset timing sequence parameter further includes a second callback function corresponding to the enabled power node, and after the target power node is enabled, the power sequence control method further includes: and executing a preset event through the second callback function, and outputting a corresponding execution result, wherein the preset event comprises an initialization event.

Optionally, the switching of the power state includes: determining whether a state transition event exists in the current power state; if the power state exists, switching the power state, and switching the current power state into a target power state after transition indicated by a state transition event.

Optionally, the power supply timing control method further includes at least one of: responding to a first access request of a request platform to a first application interface, and outputting a current power state; responding to a second access request of the request platform to a second application interface, enabling a power node corresponding to the power node identifier according to the enabling identifier, wherein the second access request carries the power node identifier and the enabling identifier; and responding to a third access request of the request platform to a third application interface, executing the power supply time sequence corresponding to the power supply time sequence identifier, wherein the third access request carries the power supply time sequence identifier.

In a second aspect, the present application provides a power supply timing control apparatus, including:

the first processing module is used for responding to the power state switching, determining a target power supply time sequence and triggering a setting instruction of the target power supply time sequence, wherein the target power supply time sequence is used for indicating the time sequence of a power supply node to be enabled, and the target power supply time sequence is configurable;

the setting module is used for responding to a setting instruction of the target power supply time sequence, setting a control request for the power supply node based on a preset time sequence parameter corresponding to the power supply node aiming at each power supply node in the target power supply time sequence, wherein the control request carries a power supply node identifier and an enabling identifier corresponding to the power supply node;

the second processing module is used for responding to the control request, determining a target power supply node corresponding to the power supply node identifier in the preset power supply nodes, and enabling the target power supply node according to the enabling identifier and preset control parameters corresponding to the target power supply node.

Optionally, the second processing module is specifically configured to: traversing a preset power supply node; determining whether a power supply node in preset power supply nodes receives a control request or not; if yes, responding to the control request, and determining a target power node corresponding to the power node identification in the preset power nodes.

Optionally, the second processing module is further configured to: if not, determining whether a power node in the preset power nodes is enabled; if enabled, then monitoring whether the power supply feedback signal of the enabled power supply node is normal.

Optionally, the power supply timing control device further includes a determining module, configured to: after enabling the target power supply node, determining whether the function of the enabled target power supply node is normal or not according to the preset checking parameters corresponding to the target power supply node.

Optionally, the preset checking parameters include a preset feedback level and a feedback timeout duration corresponding to the power supply feedback signal, and the determining module is specifically configured to: acquiring a target power supply feedback signal corresponding to the enabled target power supply node within the feedback timeout period; determining whether the target power supply feedback signal is the same as a preset feedback level; if yes, determining that the function of the enabled target power supply node is normal; if not, determining that the function of the enabled target power supply node is abnormal.

Optionally, the determining module is further configured to: and when the functional abnormality of the enabled target power supply node is determined, outputting first indication information, wherein the first indication information is used for indicating the functional abnormality of the enabled target power supply node.

Optionally, the preset inspection parameter further includes a debounce duration corresponding to the power supply feedback signal, and the determining module is specifically configured to, when configured to obtain, within the feedback timeout duration, the target power supply feedback signal corresponding to the enabled target power supply node: and after waiting for the debounce time period, acquiring a target power supply feedback signal corresponding to the enabled target power supply node within the feedback timeout time period.

Optionally, the preset timing parameter includes a dependency relationship between power nodes, and the setting module is specifically configured to: if the power supply node is determined to have a dependent power supply node according to the dependency relationship, waiting for enabling of the dependent power supply node to be completed; after the dependent power node is enabled, a control request for the power node is set.

Optionally, the preset timing sequence parameter further includes a delay time of the power supply node relative to the dependent power supply node, and the setting module is specifically configured to: after the enabling of the dependent power supply node is completed, waiting for the arrival of the delay time of the power supply node relative to the dependent power supply node; after the delay time is up, a control request for the power supply node is set.

Optionally, the preset timing parameter includes a first callback function corresponding to the power node before enabling, and the setting module is specifically configured to: checking whether the dependent condition corresponding to the power node meets the preset enabling requirement of the target power sequence or not through a first callback function; if yes, setting a control request for the power supply node.

Optionally, the setting module is further configured to: if the power supply node does not meet the preset enabling requirement of the target power supply time sequence, outputting second indicating information, wherein the second indicating information is used for indicating that the dependent condition corresponding to the power supply node does not meet the preset enabling requirement of the target power supply time sequence.

Optionally, the preset timing sequence parameter further includes a second callback function corresponding to the enabled power node, and the second processing module is further configured to: after enabling the target power supply node, executing a preset event through the second callback function, and outputting a corresponding execution result, wherein the preset event comprises an initialization event.

Optionally, the power supply timing control device further includes a switching module, configured to: determining whether a state transition event exists in the current power state; if the power state exists, switching the power state, and switching the current power state into a target power state after transition indicated by a state transition event.

Optionally, the power supply timing control apparatus further includes a third processing module, configured to at least one of: responding to a first access request of a request platform to a first application interface, and outputting a current power state; responding to a second access request of the request platform to a second application interface, enabling a power node corresponding to the power node identifier according to the enabling identifier, wherein the second access request carries the power node identifier and the enabling identifier; and responding to a third access request of the request platform to a third application interface, executing the power supply time sequence corresponding to the power supply time sequence identifier, wherein the third access request carries the power supply time sequence identifier.

In a third aspect, the present application provides an electronic device, comprising: a processor, a memory communicatively coupled to the processor;

the memory stores computer-executable instructions;

the processor executes the computer-executable instructions stored in the memory to implement the power timing control method as described in the first aspect of the present application.

In a fourth aspect, the present application provides a computer readable storage medium having stored therein computer program instructions which, when executed, implement the power timing control method according to the first aspect of the present application.

In a fifth aspect, the present application provides a computer program product comprising a computer program which when executed implements the power supply timing control method according to the first aspect of the present application.

The power supply time sequence control method, the device, the equipment and the storage medium provided by the application determine the target power supply time sequence by responding to the power supply state switching and trigger a setting instruction of the target power supply time sequence, wherein the target power supply time sequence is configurable; responding to a setting instruction of a target power supply time sequence, setting a control request for the power supply node based on a preset time sequence parameter corresponding to the power supply node aiming at each power supply node in the target power supply time sequence, wherein the control request carries a power supply node identifier and an enabling identifier corresponding to the power supply node; and responding to the control request, determining a target power supply node corresponding to the power supply node identifier in the preset power supply nodes, and enabling the target power supply node according to the enabling identifier and preset control parameters corresponding to the target power supply node. Because the target power supply time sequence, the preset time sequence parameters and the preset control parameters are configurable, the power supply time sequence can be flexibly and efficiently adapted to the requirement change of different electronic equipment, and accordingly, the power supply time sequence can be flexibly controlled, when hardware is rapidly iterated to change or software is used for changing, the development efficiency can be effectively improved, and the development period is saved.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief description will be given below of the drawings that are needed in the embodiments or the prior art descriptions, and it is obvious that the drawings in the following description are some embodiments of the present application, and that other drawings can be obtained according to these drawings without inventive effort to a person skilled in the art.

Fig. 1 is a schematic view of an application scenario provided in an embodiment of the present application;

FIG. 2 is a flowchart of a power timing control method according to an embodiment of the present disclosure;

FIG. 3 is a flowchart of a power timing control method according to another embodiment of the present disclosure;

FIG. 4 is a schematic diagram of a power timing control device according to an embodiment of the present disclosure;

FIG. 5 is a schematic diagram of a power timing control device according to another embodiment of the present disclosure;

fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.

It should be noted that, the user information (including but not limited to user equipment information, user personal information, etc.) and the data (including but not limited to data for analysis, stored data, presented data, etc.) related to the present application are information and data authorized by the user or fully authorized by each party, and the collection, use and processing of the related data need to comply with the related laws and regulations and standards of the related country and region, and provide corresponding operation entries for the user to select authorization or rejection.

The electronic device is for example an electronic control unit (Electronic Control Unit, ECU) of the vehicle, which ECU may in particular be an in-vehicle infotainment host, a cabin controller or an autopilot controller etc. With the increasing complexity of the functions of vehicles, the requirements on safety, environmental protection and energy saving are increasingly strict, and the requirements on comfort, flexibility and individuation are quite different, so that the development period of the vehicles is continuously shortened, and a large number of ECUs are widely used in the vehicles. With the development of the vehicle ECU toward a centralized direction, a regional computing unit or a central computing unit is finally formed, and the centralized arrangement brings complex electronic circuits, complex board-level power supply topology and great challenges for board-level power supply management of the ECU. In the development process of a vehicle, different power supply groups are required to be divided due to the increase of the number of chips in a circuit, and different power supply power-on or power-off time sequences are required to be set for different chips under different system states because of different power supply voltages, reset time, front-back stage relations and the like; along with the improvement of the complexity of the system, higher requirements are also put on the energy consumption of the system, so that more power states are needed, and the required power control granularity is subdivided more; meanwhile, as the development period of the vehicle is continuously shortened, the iteration of the hardware platform is faster and faster, and a high-adaptation board-level power supply time sequence control framework which can be reused in different scenes is also needed, so that the development time and the development cost are saved due to the fact that the development time is rapidly adapted to the continuous change of the requirements.

Currently, when adjusting the power supply time sequence of an electronic device, the adjustment of the power supply time sequence is generally realized by modifying code logic, which has the problem of inflexibility. In addition, when the power supply timing is controlled, feedback check and monitoring of the operation state of the power supply node are not generally performed, so that the efficiency of fault location is low when the power supply node is abnormal in operation.

Based on the above problems, the present application provides a power supply time sequence control method, device, equipment and storage medium, which obtain a power supply time sequence corresponding to a current power supply state when switching to the current power supply state, and set the power supply time sequence, so that each power supply node in the power supply time sequence is enabled based on a preset time sequence parameter, a preset control parameter and a preset inspection parameter, wherein the power supply time sequence, the preset time sequence parameter, the preset control parameter and the preset inspection parameter corresponding to the power supply state are all configurable, thereby being capable of flexibly and efficiently adapting to the requirement change of different electronic equipment and realizing flexible control of the power supply time sequence. In addition, important steps in the power supply time sequence control process can be reported or recorded so as to track analysis, debugging and error diagnosis; unified application interfaces can be provided, and compatibility is improved.

In the following, first, an application scenario of the solution provided in the present application is illustrated.

Fig. 1 is a schematic view of an application scenario provided in an embodiment of the present application. As shown in fig. 1, in this application scenario, taking an in-vehicle infotainment host as an example, the in-vehicle infotainment host typically includes a plurality of computing system units, for example, a micro control unit (MicroController Unit, MCU) system with high real-time and high security; a System On Chip (SOC) System for infotainment with higher performance; and a security Island (security Island) system having medium performance, high security, and high real-time. Meanwhile, since the in-vehicle infotainment host needs to be connected with external sensors/execution devices such as cameras, screens, meters, in-vehicle sound equipment and the like, the in-vehicle infotainment host has software and hardware drivers of the external sensors/execution devices. The computing system unit and the external sensor/execution device are connected to power supplies corresponding to the same or different power supply nodes in the vehicle-mounted infotainment host according to requirements. The vehicle-mounted information entertainment host machine synthesizes the self states according to the vehicle body signal change from the external ECU, judges the scene change of a user, triggers the power state switching, acquires the power time sequence corresponding to the current power state, and controls the corresponding power node to be electrified or powered down according to the power time sequence, so that different computing system units and external sensors/execution equipment in the vehicle-mounted information entertainment host machine can coordinate normal work.

It should be noted that fig. 1 is only a schematic diagram of an application scenario provided by the embodiment of the present application, and the embodiment of the present application does not limit the devices included in fig. 1, or limit the positional relationship between the devices in fig. 1.

The following describes the technical scheme of the present application in detail through specific embodiments. It should be noted that the following embodiments may be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

Fig. 2 is a flowchart of a power timing control method according to an embodiment of the present application. The power supply timing control method may be performed by software and/or hardware means, for example, the hardware means may be a power supply timing control means, and the power supply timing control means may be an electronic device or a processing chip in the electronic device. As shown in fig. 2, the method of the embodiment of the present application includes:

s201, determining a target power supply time sequence in response to power supply state switching, and triggering a setting instruction of the target power supply time sequence, wherein the target power supply time sequence is configurable.

The target power supply time sequence is used for indicating the time sequence of the power supply node to be enabled.

In the embodiment of the present application, the power state includes, for example, a low power consumption state, an energy saving state, a normal state, and a strong power consumption state. The power supply state of the vehicle is switched, for example, when the running state of the vehicle changes. For example, the user scene change may be determined by integrating the self state according to the vehicle body signal change from the external ECU, thereby triggering the power state switching. It will be appreciated that different power states may correspond to different power timings, the power timings being configurable to enable each power node in the power timings in accordance with the timing. The power supply node is, for example, a power supply that can be controlled by a pin of the electronic device, and the power supply may be, for example, a power supply chip or a field effect transistor (MOS). Different power supply time sequences can be configured according to different power supply states, and the requirement change of different electronic equipment can be flexibly and efficiently adapted.

Alternatively, the power state switching may include: determining whether a state transition event exists in the current power state; if the power state exists, switching the power state, and switching the current power state into a target power state after transition indicated by a state transition event.

For example, it may be determined whether a state transition event exists in the current power state, such as entering a power saving state from a normal state. If a state transition event exists, power state switching is performed, for example, the current power state is switched from a normal state to an energy-saving state.

In this step, in response to the switching of the power state, the current power state is switched to, the target power timing may be determined according to the current power state, and the target power timing may be set, that is, an execution request enabling each power node in the target power timing according to the timing is issued to execute the target power timing.

This step is understood to be power state management and may run in a periodic task or thread. Optionally, important steps in the power state management execution process can be reported or recorded so as to track analysis, debugging and error diagnosis, and the positioning efficiency of software and hardware faults is improved. Specific ways in which the report or record may be made include, but are not limited to, output logs.

S202, responding to a setting instruction of a target power supply time sequence, setting a control request for the power supply node based on a preset time sequence parameter corresponding to the power supply node aiming at each power supply node in the target power supply time sequence, wherein the control request carries a power supply node identifier and an enabling identifier corresponding to the power supply node.

The preset timing parameters corresponding to the power nodes include, for example, the power nodes, a dependency relationship between the power nodes, a delay time of the power nodes relative to the dependent power nodes, a first callback function corresponding to the power nodes before being enabled, a second callback function corresponding to the power nodes after being enabled, and the like, and the preset timing parameters can be configured as required. The enable flag is used to indicate whether the power supply node is powered up or powered down. For example, in response to a setting instruction of the target power supply timing sequence, that is, receiving an execution request of the target power supply timing sequence, for each power supply node in the target power supply timing sequence, a control request for the power supply node may be set according to the timing sequence based on a preset timing parameter corresponding to the power supply node, such as checking that the dependent power supply node is enabled to be completed, a delay time arrives, and the like, until each power supply node in the target power supply timing sequence is enabled to be completed. For how to set the control request for the power node based on the preset timing parameter corresponding to the power node, reference may be made to the subsequent embodiments, which are not described herein.

This step is understood to be power timing management and may run in a periodic task or thread. Important steps in the power supply time sequence management execution process can be reported or recorded so as to track analysis, debugging and error diagnosis, and the positioning efficiency of software and hardware faults is improved. Specific ways in which the report or record may be made include, but are not limited to, output logs.

S203, responding to the control request, determining a target power supply node corresponding to the power supply node identifier in the preset power supply nodes, and enabling the target power supply nodes according to the enabling identifier and preset control parameters corresponding to the target power supply nodes.

Illustratively, the preset power supply nodes are, for example, power supply nodes in all power supply time sequences, and the preset power supply nodes can be configured as required. The preset power supply nodes can be traversed, whether the power supply nodes in the preset power supply nodes receive the control request or not is determined according to the power supply node identification carried by the control request, and accordingly the target power supply nodes corresponding to the power supply node identification are determined in the preset power supply nodes in response to the control request. The preset control parameters include, for example, an enable control level and an enable control pin of the power supply node, and the preset control parameters can be configured as required. After determining the target power supply node, the target power supply node may be enabled according to preset control parameters corresponding to the target power supply node, such as an enable control level and an enable control pin of the target power supply node, so as to control a state of the target power supply node.

The step S203 may be understood as power node management, and may run in a periodic task or thread. Important steps in the power supply node management execution process can be reported or recorded so as to track analysis, debugging and error diagnosis, and the positioning efficiency of software and hardware faults is improved. Specific ways of reporting or logging include, but are not limited to, outputting logs, specific log content including, for example, obtaining the status of the target power node and enabling control execution time stamps, etc.

For each power supply node in the target power supply timing, each power supply node may be enabled by performing the steps of S202 and S203.

According to the power supply time sequence control method, the target power supply time sequence is determined by responding to the power supply state switching, and the setting instruction of the target power supply time sequence is triggered, so that the target power supply time sequence is configurable; responding to a setting instruction of a target power supply time sequence, setting a control request for the power supply node based on a preset time sequence parameter corresponding to the power supply node aiming at each power supply node in the target power supply time sequence, wherein the control request carries a power supply node identifier and an enabling identifier corresponding to the power supply node; and responding to the control request, determining a target power supply node corresponding to the power supply node identifier in the preset power supply nodes, and enabling the target power supply node according to the enabling identifier and preset control parameters corresponding to the target power supply node. Because the target power supply time sequence, the preset time sequence parameter and the preset control parameter are configurable, the power supply time sequence can be flexibly and efficiently adapted to the requirement change of different electronic equipment, and accordingly the power supply time sequence can be flexibly controlled, when hardware is rapidly and iteratively changed or software usage scene is changed, development efficiency can be effectively improved, and development period is saved.

Based on the foregoing embodiment, optionally, the power supply timing control method provided in the embodiment of the present application may further include at least one of the following: responding to a first access request of a request platform to a first application interface, and outputting a current power state; responding to a second access request of the request platform to a second application interface, enabling a power node corresponding to the power node identifier according to the enabling identifier, wherein the second access request carries the power node identifier and the enabling identifier; and responding to a third access request of the request platform to a third application interface, executing the power supply time sequence corresponding to the power supply time sequence identifier, wherein the third access request carries the power supply time sequence identifier.

Illustratively, the requesting platform is, for example, a software module that requires power operation or acquisition of state. The current power state may be output upon receiving a first access request to the first application interface by the requesting platform. When a second access request of the request platform to the second application interface is received, enabling the power supply node corresponding to the power supply node identifier carried by the second access request according to the enabling identifier carried by the second access request. When a third access request of the request platform to the third application interface is received, a power supply time sequence corresponding to the power supply time sequence identifier carried by the third access request can be executed. It will be appreciated that this embodiment provides a unified application interface for the requesting platform, enabling the individual software modules to coordinate and co-operate with each other. By providing a unified application interface, high compatibility with other software modules may be provided, thereby better multiplexing the power timing control software framework.

Fig. 3 is a flowchart of a power timing control method according to another embodiment of the present application. On the basis of the above embodiments, the power supply timing control method is further described in the embodiments of the present application. As shown in fig. 3, the method of the embodiment of the present application may include:

s301, determining a target power supply time sequence in response to power supply state switching, and triggering a setting instruction of the target power supply time sequence, wherein the target power supply time sequence is configurable.

A detailed description of this step may be referred to the related description of S201 in the embodiment shown in fig. 2, and will not be repeated here.

Considering that the preset timing parameters include the dependency relationship between the power supply nodes, the delay time of the power supply nodes relative to the dependent power supply nodes, and the first callback function corresponding to the power supply nodes before being enabled, in this embodiment of the present application, step S202 in fig. 2 may further include steps S302 to S305 as follows:

s302, responding to a setting instruction of the target power supply time sequence, and if the power supply nodes are determined to have the dependent power supply nodes according to the dependency relationship among the power supply nodes aiming at each power supply node in the target power supply time sequence, waiting for the completion of enabling the dependent power supply nodes.

In this step, when a setting instruction of the target power supply timing is received, each power supply node in the power supply timing may be traversed, and for each power supply node, each power supply node is enabled in turn from the first power supply in accordance with the timing. Specifically, the preset time sequence parameters corresponding to the power supply nodes comprise the dependency relationship among the power supply nodes, and if the power supply nodes are determined to have the dependency power supply nodes according to the dependency relationship among the power supply nodes, the completion of enabling the dependency power supply nodes is waited.

S303, after the enabling of the dependent power supply node is completed, waiting for the arrival of the delay time of the power supply node relative to the dependent power supply node.

For example, the completion of the enabling of the dependent power supply node may be determined according to a power supply feedback signal corresponding to the dependent power supply node, or the completion of the enabling of the dependent power supply node may be determined according to a preset waiting period. The preset time sequence parameters corresponding to the power supply nodes comprise the time delay time length of the power supply nodes relative to the dependent power supply nodes, and after the enabling of the dependent power supply nodes is completed, the time delay time length of the power supply nodes relative to the dependent power supply nodes is waited for.

S304, after the delay time is reached, checking whether the dependent condition corresponding to the power node meets the preset enabling requirement of the target power supply time sequence through a first callback function.

In this step, the preset time sequence parameter corresponding to the power node includes a first callback function corresponding to the power node before enabling, and the dependency condition corresponding to the power node may be understood as a precondition for enabling the power node, where the specific dependency condition is that the power node depends on that the first several power nodes in the target power sequence are enabled correctly. After the delay time is up, checking whether the dependent condition corresponding to the power node meets the preset enabling requirement of the target power sequence through a first callback function, and if so, executing S305; if not, step S306 is performed.

S305, setting a control request for the power supply node, wherein the control request carries a power supply node identifier and an enabling identifier corresponding to the power supply node.

A detailed description of this step may be referred to the related description of S202 in the embodiment shown in fig. 2, and will not be repeated here.

After setting the control request for the power supply node, step S307 is performed, and it can be understood that, for each power supply node in the target power supply timing, step S307 is performed after setting the control request for the power supply node.

S306, outputting second indication information.

The second indication information is used for indicating that the dependent condition corresponding to the power supply node does not meet the preset enabling requirement of the target power supply time sequence.

In the step, when the first callback function checks that the dependent condition corresponding to the power node does not meet the preset enabling requirement of the target power sequence, second indication information is output. The step can be understood as reporting or recording important steps in the execution process of power supply time sequence management so as to track analysis, debugging and error diagnosis, and improve the positioning efficiency of software and hardware faults.

In this embodiment, the step S203 in fig. 2 may further include the following steps S307 to S309:

s307, responding to the control request, traversing the preset power supply node; and determining whether a power supply node in the preset power supply nodes receives a control request.

If the power supply node in the preset power supply nodes receives the control request, executing step S308; if the power node in the preset power nodes does not receive the control request, step S315 is executed.

S308, determining a target power node corresponding to the power node identification in the preset power nodes.

It can be understood that the target power node is the power node that receives the control request in the preset power nodes, and the power node identifier corresponding to the target power node is the power node identifier carried in the control request.

S309, enabling the target power supply node according to the enabling identification and the preset control parameter corresponding to the target power supply node.

A detailed description of this step may be referred to the related description of S203 in the embodiment shown in fig. 2, and will not be repeated here.

Optionally, after the target power node is enabled, the power timing control method provided in the embodiment of the present application may further include: and determining whether the function of the enabled target power supply node is normal or not according to the preset checking parameters corresponding to the target power supply node.

Illustratively, the preset checking parameters include a preset feedback level, a feedback timeout period, a debounce period, a feedback pin of the Power feedback signal (Power Good, PG) corresponding to the Power feedback signal, and the like, and the preset checking parameters may be configured as needed. Whether the function of the enabled target power supply node is normal or not can be determined according to the preset checking parameters corresponding to the target power supply node, so that the state of the target power supply node is perceived.

Considering that the preset inspection parameters include a preset feedback level, a feedback timeout period and a debounce period corresponding to the power supply feedback signal, in this embodiment of the present application, according to the preset inspection parameters corresponding to the target power supply node, determining whether the function of the enabled target power supply node is normal may further include steps S310 to S313 as follows:

S310, waiting for debounce duration.

The debounce duration is used to remove external noise interference when sampling the power supply feedback signal. The debounce duration is, for example, 1 millisecond.

S311, after waiting for the debounce duration, acquiring a target power supply feedback signal corresponding to the enabled target power supply node within the feedback timeout duration, and determining whether the target power supply feedback signal is identical to a preset feedback level.

For example, assuming that the preset feedback level is a high level, if the obtained target power supply feedback signal corresponding to the enabled target power supply node is a high level, it may be determined that the enabled target power supply node functions normally; if the obtained target power supply feedback signal corresponding to the enabled target power supply node is at a low level, the functional abnormality of the enabled target power supply node can be determined.

The step may be understood as checking a target power supply feedback signal corresponding to the target power supply node, and if the target power supply feedback signal is the same as the preset feedback level, executing step S312; if the target power feedback signal is different from the preset feedback level, step S313 is performed.

S312, determining that the enabled target power supply node is normal in function.

After this step is performed, S315 may be continued.

S313, determining the functional abnormality of the enabled target power supply node.

And S314, when the functional abnormality of the enabled target power supply node is determined, outputting first indication information, wherein the first indication information is used for indicating the functional abnormality of the enabled target power supply node.

In the step, when the functional abnormality of the enabled target power supply node is determined, first instruction information is output. By outputting the first indication information, important steps in the power supply node management execution process can be reported or recorded so as to track analysis, debugging and error diagnosis, and the positioning efficiency of software and hardware faults is improved.

S315, determining whether a power supply node in the preset power supply nodes is enabled.

It can be appreciated that when traversing the preset power nodes, it can be determined whether the power node in the preset power nodes is enabled, and if so, step S316 is performed; if not, the step S307 is executed, i.e. the step for the current power node is ended, and the step for the next power node is executed.

S316, monitoring whether the power supply feedback signal of the enabled power supply node is normal.

It can be appreciated that if the power supply node is always in the enabled state, the power supply feedback signal of the power supply node should also be in a normal state; if the power supply node fails, the power supply feedback signal of the power supply node is not received, namely the power supply feedback signal of the power supply node is in an abnormal state, and can be reported or recorded so as to track analysis, debugging and error diagnosis, and improve the positioning efficiency of software and hardware faults. After this step is performed, the step for the current power supply node is ended, and the step for the next power supply node is performed.

Taking into consideration that the preset timing parameters further include a corresponding second callback function after the power node is enabled, step S317 is executed after the target power node is enabled.

S317, executing a preset event through the second callback function, and outputting a corresponding execution result.

In this step, the preset event is, for example, an event or action that can be executed after the target power node is enabled, such as initialization, etc. And executing the preset event through the second callback function, and outputting a corresponding execution result. After the step S317 is performed, the step S302 may be continued to process the next power node in the target power supply timing, i.e., for each power node in the target power supply timing, each power node may be enabled by performing the steps S302 to S317.

According to the power supply time sequence control method, the demand change of different electronic equipment can be flexibly and efficiently adapted through the configurable target power supply time sequence, the preset time sequence parameter, the preset control parameter and the preset inspection parameter, so that the power supply time sequence can be flexibly controlled; the first callback function and the second callback function can provide high compatibility for other software modules, so that the power supply time sequence control software framework is better reused; by outputting the prompt information, important steps in the power supply time sequence control process can be reported or recorded so as to track analysis, debugging and error diagnosis, and the positioning efficiency of software and hardware faults is improved. When the hardware is changed in a rapid iteration mode or the software usage scene is changed, the development efficiency can be effectively improved, and the development period is saved.

The following are device embodiments of the present application, which may be used to perform method embodiments of the present application. For details not disclosed in the device embodiments of the present application, please refer to the method embodiments of the present application.

Fig. 4 is a schematic structural diagram of a power timing control apparatus according to an embodiment of the present application, and as shown in fig. 4, a power timing control apparatus 400 according to an embodiment of the present application includes: a first processing module 401, a setting module 402, and a second processing module 403. Wherein:

the first processing module 401 is configured to determine a target power supply timing in response to the power state switching, and trigger a setting instruction of the target power supply timing, where the target power supply timing is configured to indicate a timing of a power supply node to be enabled.

The setting module 402 is configured to respond to a setting instruction of the target power supply timing sequence, set, for each power supply node in the target power supply timing sequence, a control request for the power supply node based on a preset timing parameter corresponding to the power supply node, where the control request carries a power supply node identifier and an enable identifier corresponding to the power supply node.

The second processing module 403 is configured to determine, in response to the control request, a target power node corresponding to the power node identifier from among preset power nodes, and enable the target power node according to the enable identifier and a preset control parameter corresponding to the target power node.

In some embodiments, the second processing module 403 may be specifically configured to: traversing a preset power supply node; determining whether a power supply node in preset power supply nodes receives a control request or not; if yes, responding to the control request, and determining a target power node corresponding to the power node identification in the preset power nodes.

Optionally, the second processing module 403 may be further configured to: if not, determining whether a power node in the preset power nodes is enabled; if enabled, then monitoring whether the power supply feedback signal of the enabled power supply node is normal.

Optionally, the power timing control apparatus 400 may further include a determining module 404 configured to: after enabling the target power supply node, determining whether the function of the enabled target power supply node is normal or not according to the preset checking parameters corresponding to the target power supply node.

In some embodiments, the preset check parameters include a preset feedback level and a feedback timeout period corresponding to the power supply feedback signal, and the determining module 404 may be specifically configured to: acquiring a target power supply feedback signal corresponding to the enabled target power supply node within the feedback timeout period; determining whether the target power supply feedback signal is the same as a preset feedback level; if yes, determining that the function of the enabled target power supply node is normal; if not, determining that the function of the enabled target power supply node is abnormal.

Optionally, the determining module 404 may be further configured to: and when the functional abnormality of the enabled target power supply node is determined, outputting first indication information, wherein the first indication information is used for indicating the functional abnormality of the enabled target power supply node.

Optionally, the preset inspection parameter further includes a debounce duration corresponding to the power supply feedback signal, and the determining module 404 may be specifically configured to: and after waiting for the debounce time period, acquiring a target power supply feedback signal corresponding to the enabled target power supply node within the feedback timeout time period.

In some embodiments, the preset timing parameters include a dependency relationship between power supply nodes, and the setting module 402 may be specifically configured to: if the power supply node is determined to have a dependent power supply node according to the dependency relationship, waiting for enabling of the dependent power supply node to be completed; after the dependent power node is enabled, a control request for the power node is set.

Optionally, the preset timing parameters further include a delay time of the power node relative to the dependent power node, and the setting module 402 may be specifically configured to: after the enabling of the dependent power supply node is completed, waiting for the arrival of the delay time of the power supply node relative to the dependent power supply node; after the delay time is up, a control request for the power supply node is set.

In some embodiments, the preset timing parameters include a first callback function corresponding to the power node before enabling, and the setting module 402 may be specifically configured to: checking whether the dependent condition corresponding to the power node meets the preset enabling requirement of the target power sequence or not through a first callback function; if yes, setting a control request for the power supply node.

Optionally, the setting module 402 may be further configured to: if the power supply node does not meet the preset enabling requirement of the target power supply time sequence, outputting second indicating information, wherein the second indicating information is used for indicating that the dependent condition corresponding to the power supply node does not meet the preset enabling requirement of the target power supply time sequence.

Optionally, the preset timing parameters further include a second callback function corresponding to the enabled power node, and the second processing module 403 may be further configured to: after enabling the target power supply node, executing a preset event through the second callback function, and outputting a corresponding execution result, wherein the preset event comprises an initialization event.

Optionally, the power timing control apparatus 400 may further include a switching module 405 for: determining whether a state transition event exists in the current power state; if the power state exists, switching the power state, and switching the current power state into a target power state after transition indicated by a state transition event.

Optionally, the power timing control apparatus 400 may further include a third processing module 406 configured to at least one of: responding to a first access request of a request platform to a first application interface, and outputting a current power state; responding to a second access request of the request platform to a second application interface, enabling a power node corresponding to the power node identifier according to the enabling identifier, wherein the second access request carries the power node identifier and the enabling identifier; and responding to a third access request of the request platform to a third application interface, executing the power supply time sequence corresponding to the power supply time sequence identifier, wherein the third access request carries the power supply time sequence identifier.

The device of the present embodiment may be used to execute the technical solution of any of the above-described method embodiments, and its implementation principle and technical effects are similar, and are not described herein again.

Fig. 5 is a schematic structural diagram of a power timing control device according to another embodiment of the present application. As shown in fig. 5, the power supply timing control apparatus 500 of the embodiment of the present application includes: a power node management module 501, a power timing management module 502, a power state management module 503, a power system configuration module 504, a process tracking and error debugging module 505, and an application interface module 506. Wherein:

The power node management module 501 is configured to control enabling, checking and monitoring PG feedback of each power node according to the power node parameters set in the power system configuration module 504, so as to control and sense the state of each power node;

the power supply time sequence management module 502 is configured to check whether the dependent signal is triggered and whether the delay time is reached according to the power supply time sequence relation set in the power supply system configuration module 504, so as to determine whether to send a control request for each power supply node to the power supply node management module 501 according to the time sequence; the power node management module 501 determines whether a power timing execution request is received, and if so, executes a power timing; if not, continuing to wait for the power supply time sequence execution request.

The power state management module 503 is configured to determine whether to issue a request to the power timing management module 502 to execute the control of the power nodes according to the time sequence according to the running state and the state change of the whole device.

The power system configuration module 504 is configured to set control parameters, inspection parameters and timing parameters corresponding to the power nodes; for example, the control parameters corresponding to the power supply node include, but are not limited to, an enable control pin, an enable control level, and the like of the power supply node; the inspection parameters corresponding to the power supply node include, but are not limited to, PG feedback pins, PG feedback levels, PG sampling debounce duration, PG feedback timeout duration and the like; the timing parameters corresponding to the power supply node include, but are not limited to, the current power supply node to be controlled (i.e., the target power supply node), the dependent power supply node, the dependency relationship and the delay time length of the dependent power supply node, the callback function before the target power supply node is controlled, the callback function after the target power supply node is controlled, and the like.

A process tracking and error debugging module 505, configured to report or record important steps in the process performed by the power node management module 501, the power timing management module 502, and the power status management module 503, so as to track analysis, debugging, and error diagnosis; among other means of reporting or logging include, but are not limited to, an output log or other module (such as a console) obtaining the status of the power source node, enabling control execution time stamps, PG feedback record time stamps, and the like.

The application interface module 506 is configured to provide a unified interface for other software modules that need to perform power operation or acquire status, so that each software module can coordinate and operate together.

It can be appreciated that the functions of the power node management module in the embodiment of the present application are similar to those of the second processing module and the determining module in the above embodiment; the function of the power timing management module in the embodiment of the present application is similar to that of the setting module in the above-described embodiment; the functions of the power state management module in the embodiment of the present application are similar to those of the first processing module and the switching module in the above embodiment; the function of the application interface module in the embodiment of the present application is similar to that of the third processing module in the above embodiment.

Fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present application. As shown in fig. 6, the electronic device 600 may include: at least one processor 601 and a memory 602.

A memory 602 for storing programs. In particular, the program may include program code including computer-executable instructions.

The memory 602 may include high-speed random access memory (Random Access Memory, RAM) and may also include non-volatile memory (non-volatile memory), such as at least one disk memory.

The processor 601 is configured to execute computer-executable instructions stored in the memory 602 to implement the power timing control method described in the foregoing method embodiment. The processor 601 may be a central processing unit (Central Processing Unit, CPU), or an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), or one or more integrated circuits configured to implement embodiments of the present application. Specifically, when the power supply timing control method described in the foregoing method embodiment is implemented, the electronic device may be, for example, an electronic control unit on a vehicle.

Optionally, the electronic device 600 may also include a communication interface 603. In a specific implementation, if the communication interface 603, the memory 602, and the processor 601 are implemented independently, the communication interface 603, the memory 602, and the processor 601 may be connected to each other through buses and perform communication with each other. The bus may be an industry standard architecture (Industry Standard Architecture, ISA) bus, an external device interconnect (Peripheral Component, PCI) bus, or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, among others. Buses may be divided into address buses, data buses, control buses, etc., but do not represent only one bus or one type of bus.

Alternatively, in a specific implementation, if the communication interface 603, the memory 602, and the processor 601 are integrated on a chip, the communication interface 603, the memory 602, and the processor 601 may complete communication through internal interfaces.

The present application also provides a computer readable storage medium having stored therein computer program instructions which, when executed by a processor, implement the scheme of the power supply timing control method as above.

The present application also provides a computer program product comprising a computer program which, when executed by a processor, implements aspects of the power supply timing control method as described above.

The computer readable storage medium described above may be implemented by any type or combination of volatile or non-volatile Memory devices, such as static random access Memory (Static Random Access Memory, SRAM), electrically erasable programmable Read-Only Memory (Electrically Erasable Programmable Read Only Memory, EEPROM), erasable programmable Read-Only Memory (Erasable Programmable Read Only Memory, EPROM), programmable Read-Only Memory (Programmable Read Only Memory, PROM), read Only Memory (ROM), magnetic Memory, flash Memory, magnetic disk, or optical disk. A readable storage medium can be any available medium that can be accessed by a general purpose or special purpose computer.

An exemplary readable storage medium is coupled to the processor such the processor can read information from, and write information to, the readable storage medium. In the alternative, the readable storage medium may be integral to the processor. The processor and the readable storage medium may reside in an application specific integrated circuit. It is of course possible that the processor and the readable storage medium are present as discrete components in the power supply timing control arrangement.

Those of ordinary skill in the art will appreciate that: all or part of the steps for implementing the method embodiments described above may be performed by hardware associated with program instructions. The foregoing program may be stored in a computer readable storage medium. The program, when executed, performs steps including the method embodiments described above; and the aforementioned storage medium includes: various media that can store program code, such as ROM, RAM, magnetic or optical disks.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A power timing control method, comprising:

determining a target power supply time sequence in response to power supply state switching, and triggering a setting instruction of the target power supply time sequence, wherein the target power supply time sequence is used for indicating the time sequence of a power supply node to be enabled, and the target power supply time sequence is configurable;

responding to a setting instruction of the target power supply time sequence, setting a control request for each power supply node in the target power supply time sequence based on a preset time sequence parameter corresponding to the power supply node, wherein the control request carries a power supply node identifier and an enabling identifier corresponding to the power supply node;

responding to the control request, determining a target power supply node corresponding to the power supply node identifier in preset power supply nodes, and enabling the target power supply node according to the enabling identifier and preset control parameters corresponding to the target power supply node;

the preset time sequence parameters comprise a dependency relationship among the power supply nodes, delay time of the power supply nodes relative to the dependent power supply nodes, and a first callback function corresponding to the power supply nodes before being enabled, and the control request for the power supply nodes is set based on the preset time sequence parameters corresponding to the power supply nodes, and the method comprises the following steps:

If the power supply node is determined to have a dependent power supply node according to the dependency relationship, waiting for the completion of enabling the dependent power supply node;

after the enabling of the dependent power supply node is completed, waiting for the arrival of the delay time length of the power supply node relative to the dependent power supply node;

after the delay time is up, checking whether the dependent condition corresponding to the power node meets the preset enabling requirement of the target power time sequence or not through the first callback function;

and if so, setting a control request for the power supply node.

2. The power timing control method according to claim 1, wherein the determining, in response to the control request, the target power node corresponding to the power node identifier in the preset power nodes includes:

traversing the preset power supply node;

determining whether a power supply node in the preset power supply nodes receives the control request;

if yes, responding to the control request, and determining a target power node corresponding to the power node identification in the preset power nodes.

3. The power supply timing control method according to claim 2, characterized by further comprising:

If not, determining whether a power supply node in the preset power supply nodes is enabled;

if enabled, then monitoring whether the power supply feedback signal of the enabled power supply node is normal.

4. The power timing control method of claim 1, further comprising, after said enabling said target power node:

and determining whether the function of the enabled target power supply node is normal or not according to the preset checking parameters corresponding to the target power supply node.

5. The power timing control method according to claim 4, wherein the preset check parameters include a preset feedback level and a feedback timeout duration corresponding to a power feedback signal, and the determining whether the function of the enabled target power node is normal according to the preset check parameters corresponding to the target power node includes:

acquiring a target power supply feedback signal corresponding to the enabled target power supply node within the feedback timeout period;

determining whether the target power supply feedback signal is the same as the preset feedback level;

if yes, determining that the function of the enabled target power supply node is normal;

if not, determining that the function of the enabled target power supply node is abnormal.

6. The power supply timing control method according to claim 5, characterized by further comprising:

and when the functional abnormality of the enabled target power supply node is determined, outputting first indication information, wherein the first indication information is used for indicating the functional abnormality of the enabled target power supply node.

7. The power timing control method according to claim 5, wherein the preset inspection parameters further include a debounce duration corresponding to the power supply feedback signal, and the obtaining, within the feedback timeout duration, a target power supply feedback signal corresponding to the enabled target power supply node includes:

and after waiting for the debounce duration, acquiring a target power supply feedback signal corresponding to the enabled target power supply node in the feedback timeout duration.

8. The power supply timing control method according to claim 1, characterized by further comprising:

if the power supply node does not meet the preset enabling requirement of the target power supply time sequence, outputting second indicating information, wherein the second indicating information is used for indicating that the dependent condition corresponding to the power supply node does not meet the preset enabling requirement of the target power supply time sequence.

9. The power timing control method according to claim 1, wherein the preset timing parameters further include a second callback function corresponding to a power node after being enabled, and further comprising, after the target power node is enabled:

And executing a preset event through the second callback function, and outputting a corresponding execution result, wherein the preset event comprises an initialization event.

10. The power supply timing control method according to any one of claims 1 to 6, characterized in that the power supply state switching includes:

determining whether a state transition event exists in the current power state;

and if the state transition event indicates the transition target power state, switching the current power state to the target power state after the transition, and if the state transition event indicates the transition target power state, switching the current power state to the target power state after the transition.

11. The power supply timing control method according to any one of claims 1 to 6, characterized by further comprising at least one of:

responding to a first access request of a request platform to a first application interface, and outputting a current power state;

responding to a second access request of the request platform to a second application interface, and enabling a power node corresponding to a power node identifier according to an enabling identifier, wherein the second access request carries the power node identifier and the enabling identifier;

and responding to a third access request of the request platform to a third application interface, and executing a power supply time sequence corresponding to the power supply time sequence identifier, wherein the third access request carries the power supply time sequence identifier.

12. A power supply timing control apparatus, comprising:

the setting module is used for responding to the setting instruction of the target power supply time sequence, setting a control request for the power supply nodes based on preset time sequence parameters corresponding to the power supply nodes aiming at each power supply node in the target power supply time sequence, wherein the control request carries a power supply node identifier and an enabling identifier corresponding to the power supply nodes;

the second processing module is used for responding to the control request, determining a target power supply node corresponding to the power supply node identifier in preset power supply nodes, and enabling the target power supply nodes according to the enabling identifier and preset control parameters corresponding to the target power supply nodes;

the preset time sequence parameters comprise a dependency relationship among the power supply nodes, delay time of the power supply nodes relative to the dependency power supply nodes and a first callback function corresponding to the power supply nodes before being enabled, and the setting module is specifically used for waiting for the completion of enabling the dependency power supply nodes if the power supply nodes are determined to have the dependency power supply nodes according to the dependency relationship; after the enabling of the dependent power supply node is completed, waiting for the arrival of the delay time length of the power supply node relative to the dependent power supply node; after the delay time is up, checking whether the dependent condition corresponding to the power node meets the preset enabling requirement of the target power time sequence or not through the first callback function; and if so, setting a control request for the power supply node.

13. An electronic device, comprising: a processor, and a memory communicatively coupled to the processor;

the memory stores computer-executable instructions;

the processor executes computer-executable instructions stored in the memory to implement the power supply timing control method of any one of claims 1 to 11.

14. A computer readable storage medium, wherein computer program instructions are stored in the computer readable storage medium, which when executed, implement the power supply timing control method according to any one of claims 1 to 11.