CN116500383B

CN116500383B - Method and system for identifying high-resistance faults and switching disturbance based on Lissajous curves

Info

Publication number: CN116500383B
Application number: CN202310759980.2A
Authority: CN
Inventors: 石访; 张恒旭; 韩兆儒; 靳宗帅
Original assignee: Shandong University
Current assignee: Shandong University
Priority date: 2023-06-27
Filing date: 2023-06-27
Publication date: 2023-09-05
Anticipated expiration: 2043-06-27
Also published as: CN116500383A

Abstract

The application belongs to the technical field of power distribution networks, and provides a method and a system for identifying high-resistance faults and switching disturbance based on Lissajous curves. The method comprises the steps of obtaining zero-sequence voltage and zero-sequence current of an event to be detected, and constructing a zero-sequence Lissajous curve; deforming the mathematical morphology, and extracting the mutation characteristics of the zero-sequence Lissajous curve by adopting the deformed mathematical morphology; based on the mutation characteristics, performing expansion, corrosion, open operation and close operation after deformation, and calculating a difference value between an open operation result and a close operation result; and selecting each half period around the maximum value moment of the difference value in the identification period range, calculating the ratio of the out-of-limit times of the difference value in the period to the total out-of-limit times of the identification period, and if the ratio is larger than a set threshold value, switching the capacitor, otherwise, performing high-resistance fault.

Description

Method and system for identifying high-resistance faults and switching disturbance based on Lissajous curves

Technical Field

The application belongs to the technical field of power distribution networks, and particularly relates to a method and a system for identifying high-resistance faults and switching disturbance based on Lissajous curves.

Background

The statements in this section merely provide background information related to the present disclosure and may not necessarily constitute prior art.

The high-resistance faults are common fault forms of the power distribution network, and account for about 10% of the faults of the power distribution network. The overhead line is broken and dropped to the ground due to the influence of external forces such as lightning stroke, strong wind and the like, or the overhead line is contacted with a high-impedance grounding medium due to branch line collision, so that a single-phase grounding fault is formed. Common high impedance grounding media include cement, sand, soil, rubber, asphalt, trees, and the like, with grounding resistances ranging from hundreds of ohms to tens of kiloohms. In most cases, high resistance faults are accompanied by nonlinear arcs caused by dielectric breakdown, known as arc high resistance faults, due to the voltage difference between the feed line and ground. In addition, the nonlinear arc generally has a certain dynamic development process, so that the transition resistance value is continuously changed, and the detection difficulty is increased. If the high-resistance faults cannot be cleared in time, the faults such as forest fires, transformer explosions and personal electric shock are further caused easily. When a fault occurs, it is critical for safe operation of the power system to detect the fault quickly and accurately.

In a medium-voltage distribution network, for metallic single-phase earth faults (low-resistance earth faults) with lower transition resistance, the existing relay protection device and detection algorithm can effectively detect and rapidly trip and isolate faults, and the forward rate can reach more than 90%. The fault current after the high-resistance fault is weak and is usually not more than 50 amperes, the fault current is even within 1 ampere according to different fault point media, is far less than the normal load current, and the fault information is submerged. Therefore, it is difficult to handle high resistance faults with conventional protection schemes of overcurrent relays, reclosers, and fuses.

The information of the high-resistance fault is weak, and the traditional detection algorithm adopts a method for reducing the threshold value so as to improve the detection success rate. However, there are many disturbance events in the distribution network, such as most common capacitor bank switching, and there is an unbalanced transient process in the switching process, and the characteristics of the disturbance events coincide with the high-resistance faults, which easily causes misjudgment of a detection algorithm. The accurate distinction between high-resistance faults and switching disturbances is very important for accurate fault detection, and the current mainstream algorithms lack correlation analysis, so that in actual scenes, various fault detection algorithms are poorly applied, fault diagnosis failure or false alarm event frequently occur, and trouble is brought to the work of overhaulers.

Disclosure of Invention

In order to solve the technical problems in the background art, the application provides a method and a system for identifying high-resistance faults and switching disturbance based on a Lissajous curve, which are characterized in that a transient equivalent circuit of the high-resistance faults and a transient equivalent circuit of the switching disturbance are analyzed to obtain the difference of transient components of two events, the difference of the transient components is visualized by adopting a zero-sequence Lissajous curve, and the difference of graphs is compared to provide a space-time complexity characteristic of the zero-sequence Lissajous curve; and performing feature extraction based on mathematical morphology (Mathematical Morphology, MM), converting the frequency domain features of the transient component into time domain features for identifying high-resistance faults and switching disturbances.

In order to achieve the above purpose, the present application adopts the following technical scheme:

the first aspect of the application provides a method for identifying high-resistance faults and switching disturbances based on Lissajous curves.

A method for identifying high-resistance faults and switching disturbance based on Lissajous curves comprises the following steps:

acquiring zero-sequence voltage and zero-sequence current of an event to be detected, and constructing a zero-sequence Lissajous curve;

deforming the mathematical morphology, and extracting the mutation characteristics of the zero-sequence Lissajous curve by adopting the deformed mathematical morphology;

based on the mutation characteristics, performing expansion, corrosion, open operation and close operation after deformation, and calculating a difference value between an open operation result and a close operation result;

and selecting each half period around the maximum value moment of the difference value in the identification period range, calculating the ratio of the out-of-limit times of the difference value in the period to the total out-of-limit times of the identification period, and if the ratio is larger than a set threshold value, switching the capacitor, otherwise, performing high-resistance fault.

Further, the process of extracting the mutation characteristic of the zero-sequence lissajous curve by adopting the deformed mathematical morphology comprises the following steps: and extracting local features of the zero-sequence Lissajous curve by adopting deformed mathematical morphology, and highlighting abrupt features in the waveform through waveform transformation.

Further, the mathematical morphology after the deformation is:

wherein ,1,2, 3.N, N is the maximum acquisition point number of the time window; />Is a structural elementThe element length, M, is 1,2, 3. M, M<N；/>For the structural element vector, get +.>；/>Calculating a vector corresponding to the maximum amplitude value in a calculation domain; />Calculating a vector corresponding to the minimum amplitude value for the calculation domain; />The zero sequence Lissajous curve track vector is input; />Is a phase plane expansion formula; />Is a phase plane corrosion formula; />Is phase plane closed operation;performing open operation on a phase plane; />Is a VCODO algorithm.

Further, the range of the identification period is larger than the range of the period.

Further, the ratio of the number of out-of-limit times of the difference value to the total number of out-of-limit times of the identification period in the period of time is calculated, if the ratio is larger than a set threshold value, the capacitor is switched, otherwise, the following formula is adopted for the process of high-resistance faults:

in the formula ,to identify a time window; />For judging the time window; />When VCODO is more limited, 1 is adopted, and conversely, 0 is adopted; />For the set threshold value, Y is the set threshold value.

The second aspect of the application provides a system for identifying high-resistance faults and switching disturbances based on Lissajous curves.

A Lissajous curve-based system for identifying high-resistance faults and switching disturbances comprises:

a curve construction module configured to: acquiring zero-sequence voltage and zero-sequence current of an event to be detected, and constructing a zero-sequence Lissajous curve;

a feature extraction module configured to: deforming the mathematical morphology, and extracting the mutation characteristics of the zero-sequence Lissajous curve by adopting the deformed mathematical morphology;

a computing module configured to: based on the mutation characteristics, performing expansion, corrosion, open operation and close operation after deformation, and calculating a difference value between an open operation result and a close operation result;

an identification module configured to: and selecting each half period around the maximum value moment of the difference value in the identification period range, calculating the ratio of the out-of-limit times of the difference value in the period to the total out-of-limit times of the identification period, and if the ratio is larger than a set threshold value, switching the capacitor, otherwise, performing high-resistance fault.

Compared with the prior art, the application has the beneficial effects that:

according to the application, by applying the improved mathematical morphology and the zero sequence Lissajous curve to the identification of the high-resistance fault and the capacitor switching identification, the two event identification can be effectively performed, and the accuracy of the high-resistance fault and the capacitor switching identification is improved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the application.

Fig. 1 is a schematic view of a power distribution network equipped with a phasor measurement unit according to the present application;

FIG. 2 is a graph of phase voltage waveforms before and after a fault constituting a Lissajous curve with only a single feeder line in a monitored area as shown in the present application;

FIG. 3 is a graph of phase current waveforms before and after a fault constituting a Lissajous curve with only a single feeder line in the monitored area shown in the present application;

FIG. 4 is a graph of phase voltage waveforms before and after a fault constituting a Lissajous curve with a branch feeder included in a monitoring region according to the present application;

FIG. 5 is a graph of phase current waveforms before and after a fault constituting a Lissajous curve with a branch feeder included in a monitoring region according to the present application;

FIG. 6 is a graph of Lissajous plots before and after a single feeder fault shown in the present application;

FIG. 7 is a graph of Lissajous plots before and after a fault under a feeder containing branch lines, as shown in the present application;

FIG. 8 is a graph of the variation of zero sequence voltage before and after a fault shown in the present application;

FIG. 9 is a graph of the variation of zero sequence current before and after a fault in accordance with the present application;

fig. 10 is a graph of zero sequence lissajous before and after a fault shown in the present application;

FIG. 11 is a graph of the time sequence variation of the area of the zero sequence Lissajous curves before and after the occurrence of the high-resistance fault shown in the application;

FIG. 12 is a transient equivalence circuit diagram of the present application illustrating a high-resistance fault;

FIG. 13 is a schematic diagram and simplified diagram of a capacitive switching transient equivalence circuit shown in the present application; fig. 13 (a) is a schematic diagram of a capacitive switching transient equivalent circuit according to the present application, and fig. 13 (b) is a simplified schematic diagram of a capacitive switching transient equivalent circuit according to the present application;

fig. 14 is a dynamic trajectory diagram of a high-resistance fault zero-sequence lissajous curve shown in the present application;

fig. 15 is a graph of the dynamic trajectory of the zero sequence lissajous curve of the capacitive switching shown in the present application;

FIG. 16 is a vector magnitude graph of the high-resistance fault zero-sequence Lissajous curve trace continuity shown in the present application;

FIG. 17 is a vector phase graph of the high resistance fault zero sequence Lissajous curve trace continuity shown in the present application;

fig. 18 is a vector magnitude graph showing the continuity of the capacitive switching zero sequence lissajous curve track of the present application;

fig. 19 is a vector phase graph of the capacitive switching zero sequence lissajous curve trace continuity shown in the present application;

FIG. 20 is a schematic view of calculated VCODO values for a high resistance fault shown by the present application;

FIG. 21 is a schematic diagram of VCODO values calculated by the capacitive switching of the present application;

fig. 22 is a flowchart of a method for identifying high-resistance faults and switching disturbances based on lissajous curves according to the present application.

Detailed Description

The application will be further described with reference to the drawings and examples.

It should be noted that the following detailed description is illustrative and is intended to provide further explanation of the application. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the present application. As used herein, the singular is also intended to include the plural unless the context clearly indicates otherwise, and furthermore, it is to be understood that the terms "comprises" and/or "comprising" when used in this specification are taken to specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof.

It is noted that the flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of methods and systems according to various embodiments of the present disclosure. It should be noted that each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the logical functions specified in the various embodiments. It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by special purpose hardware-based systems which perform the specified functions or operations, or combinations of special purpose hardware and computer instructions.

Term interpretation:

the lissajous curve is a special curve shape proposed by the french physicist josephson lissajous, also called "oscillation curve". Such a curve is also called an "oscillating pattern" because of the trajectory created by an object vibrating in two perpendicular directions.

Example 1

As shown in fig. 22, the present embodiment provides a method for identifying high-resistance faults and switching disturbances based on lissajous curves, and the present embodiment is illustrated by applying the method to a server, and it can be understood that the method may also be applied to a terminal, and may also be applied to a system and a terminal, and implemented through interaction between the terminal and the server. The server can be an independent physical server, a server cluster or a distributed system formed by a plurality of physical servers, and can also be a cloud server for providing cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network servers, cloud communication, middleware services, domain name services, security services CDNs, basic cloud computing services such as big data and artificial intelligent platforms and the like. The terminal may be, but is not limited to, a smart phone, a tablet computer, a notebook computer, a desktop computer, etc. The terminal and the server may be directly or indirectly connected through wired or wireless communication, and the present application is not limited herein. In this embodiment, the method includes the steps of:

The following is a specific scheme of this embodiment for performing expansion analysis:

(1) Fault detection based on zero-sequence Lissajous curve area

In the electrical field, the current and the voltage are utilized to form the Lissajous curves, and the Lissajous curves in different running states of the system are different. The current and the voltage forming the lissajous curve are synchronously acquired by two synchronous phasor measurement units (Phasor Measurement Unit, PMU) of the monitoring distribution network, and are respectively arranged at the front end and the tail end of the monitoring area, as shown in fig. 1.

（1）

（2）

wherein ,representing phase voltage, +.>Represents the voltage measured by the phasor measurement unit 1, < >>Represents the voltage measured by the phasor measurement unit 2, < >>Representing phase current +.>Represents the current measured by the phasor measurement unit 1, < >>Representing the current measured by the phasor measurement unit 2.

The traditional Lissajous curve is formed by phase voltage and phase current, under the normal operation of a power distribution network, the current and the voltage are industrial frequency sine waves, a certain phase difference exists, and the Lissajous curve is an ellipse; after the fault occurs, the characteristics of the Lissajous curve such as the area size, the track direction, the curve distortion and the like are changed, and the fault detection is performed by utilizing the characteristic change of the curve. However, when a plurality of branch lines exist in a monitoring area, the reliability of the conventional Lissajous curve-based fault detection method is obviously reduced, the distinction degree of the Lissajous curves is reduced before and after the fault occurs, and the influence is more serious along with the rise of the transition resistance.

FIG. 2 is a graph of phase voltage waveforms before and after a fault constituting a Lissajous curve with only a single feeder line in a monitored area as shown in the present application; FIG. 3 is a graph of phase current waveforms before and after a fault constituting a Lissajous curve with only a single feeder line in the monitored area shown in the present application; FIG. 4 is a graph of phase voltage waveforms before and after a fault constituting a Lissajous curve with a branch feeder included in a monitoring region according to the present application; FIG. 5 is a graph of phase current waveforms before and after a fault constituting a Lissajous curve with a branch feeder included in a monitoring region according to the present application; in the figure, the waveform before failure is 0.1s, and the waveform after failure is 0.1 s.

If the feeder line has a branch line, the faulty line information is significantly masked if the upstream of the fault has a branch line. As shown in fig. 6-7, fig. 6 is a graph of lissajous before and after a single feeder fault; fig. 7 is a graph of lissajous before and after a fault under a feeder containing branch lines. Wherein the solid line represents the pre-fault curve (corresponding to the 0.1s pre-waveform in fig. 2-5) and the dashed line represents the post-fault curve (corresponding to the 0.1s post-waveform in fig. 2-5). It can also be seen that the above situation causes blurring of the characteristic limits before and after the lissajous curve failure.

In order to solve the problems, the zero sequence current and the zero sequence voltage are selected to form the Lissajous waveform instead of the phase current and the phase voltage. When the power distribution network operates normally, no zero sequence quantity exists in the line. Therefore, when the high-resistance fault occurs, the zero-sequence lissajous curve begins to appear and is not influenced by the multiple branch line factors. As shown in fig. 8 and 9, fig. 8 and 9 are graphs of the change of the zero sequence voltage and the zero sequence current before and after the fault; fig. 10 is a graph of zero sequence lissajous before and after a fault. Wherein, before representing the fault before 0.1 second, after representing the fault after 0.1 second, it can be seen that the zero sequence lissajous curve before the fault is only near the zero point and has obvious distinction from the curve after the fault. The zero sequence voltage and zero sequence current in the figure can be measured from the bus only.

Therefore, fault detection can be performed according to the abrupt change of the zero sequence lissajous curve area before and after the fault, and the calculation formula of the curve area is as follows:

（3）

in the formula ,for zero sequence voltage sampling value, ">For zero sequence current sampling value, ">Sampling time; />Is the fundamental frequency; />Is a harmonic order; />Is the time window length; />And->Respectively zero sequence voltage->Amplitude and phase angle of subharmonic; />And->Respectively zero sequence current->Amplitude and phase angle of subharmonic; />Is the maximum harmonic order.

As shown in fig. 11, the time sequence of the area of the zero-sequence lissajous curve before and after the occurrence of the high-resistance fault is changed, the area is always zero before the occurrence of the fault, the area is continuously suddenly changed and finally stabilized after the occurrence of the fault, the fault characteristics are obvious, and the high-resistance fault detection effectiveness is proved.

(2) Fault identification based on zero sequence Lissajous curve space-time complexity

In order to improve the power factor and balance reactive power of the distribution network, a large number of parallel capacitors are connected to the transformer substation. The transient characteristic caused by the capacitor switching is similar to the high-resistance fault characteristic, fault diagnosis false alarm event is easy to cause, and the characteristic difference between the capacitor switching and the high-resistance fault is correctly distinguished to be the key for optimizing fault diagnosis criteria. Analyzing the difference of the zero sequence Lissajous curves after two events occur, popularizing a mathematical morphology method to be applied to a phase plane, extracting the space-time complexity characteristics of the zero sequence Lissajous curves, and carrying out identification method design, wherein the process is as follows:

step 1: analyzing the difference between the high-resistance fault and the capacitor switching transient component from the perspective of the transient equivalent circuit;

taking a resonant grounding system as an example for analysis, FIG. 12 shows a transient equivalence circuit in the event of a high-resistance fault, whereinFor the system capacitance to ground +.>Equivalent zero sequence inductance of arc suppression coil>Is 3 times of the transition resistance,is a virtual voltage source, ">Is a virtual voltage source, ">For normal phase voltage amplitude, +.>Is the frequency of power frequency>For the initial switching phase angle +.>For fault point current, +.>For the sum of zero sequence currents of the feed lines through the ground point, respectively>Is the zero sequence voltage of the bus.

Normally, the high-resistance fault transition resistance is higher, the system is in an underdamped state, and a differential equation is established according to fig. 12, so that characteristic roots can be obtained:

（4）

at this time, the zero sequence current through the arc elimination loop can be expressed as:

（5）

the zero sequence current through a healthy line can be expressed as:

（6）

wherein ,equivalent capacitance to ground for each feed line.

The zero sequence current through the faulty line can be expressed as:

（7）

wherein ,equivalent capacitance to ground for each faulty feeder.

The zero sequence voltage of the bus can be expressed as:

（8）

the following formulas:，/>，/>，，/>，/>，。

wherein ,is->Amplitude correlation coefficients of the resonant components; />Is->Amplitude correlation coefficient of power frequency component; />Is transient equivalent circuit impedance; />Is an attenuation factor; />Is the resonant frequency; />Is the power frequency initial phase angle.

As can be seen from the above analysis,after the high-resistance fault occurs, each electric quantity consists of two parts, namely a power frequency component and an oscillation attenuation component, wherein the frequency of the attenuation component is as follows. Generally, under the action of power frequency, the following relation is approximately satisfied between the inductance of the arc suppression coil and the capacitance of the system to ground:

（9）

thus, the first and second substrates are bonded together,the oscillation frequency is approximately equal to the power frequency under high-resistance faults.

And a transient equivalent circuit switched by the capacitor is also established for analysis. In a practical scenario, the three-phase circuit breaker for capacitor switching is not performed exactly contemporaneously, so there is an unbalanced capacitance during switching.

The established capacitive switching transient equivalence circuit is shown in (a) of FIG. 13, wherein、/>For the zero-sequence equivalent resistance and zero-sequence equivalent inductance of the line from the switching point to the bus, the number of the switching point is +.>Is the zero sequence equivalent inductance of the arc suppression coil>For the system capacitance to ground +.>Is an unbalanced capacitor during switching>Is a virtual voltage source, ">Is a virtual voltage source, ">For normal phase voltage amplitude, +.>Is the frequency of power frequency>Is the initial fault phase angle. Usually->The capacitor is very small in resistance, so that the capacitor is very fast in charging speed, the main resonant frequency is relatively high, and the equivalent impedance of the arc suppression coil is far greater than the capacitance reactance of the capacitor connected in parallel to the ground. Therefore, the transient influence of the arc suppression coil on the switching of the capacitor can be ignored, the circuit is simplified to be shown in (b) of fig. 13, wherein the equivalent capacitor is +.>。

The linear constant coefficient second-order homogeneous differential equation is established, and the switching transient current can be obtained by solving the following steps:

（10）

the zero sequence voltage of the bus is as follows:

（11）

the zero sequence current on each feed line is:

（12）

wherein ,equivalent capacitance to ground for each feed line.

The following formulas:，/>，/>，，/>，/>。

wherein ,is->Amplitude correlation coefficients of the resonant components; />Is->Amplitude correlation coefficient of power frequency component; />Is an attenuation factor; />Is the resonant frequency; />Is the power frequency initial phase angle.

From the above, it is known that each electric quantity is composed of a ringing component and a power frequency component in the capacitor switching. But different from high-resistance fault, the capacitor switches the oscillation frequencyFar greater than the high-resistance fault oscillation frequency. In an actual scenario, the capacitive switching transient has two distinct features: (1) when in switching, a high-frequency arc exists in the air gap of the circuit breaker, so that the transient oscillation degree is increased; (2) the zero sequence transient duration is short, typically remaining within a quarter of a cycle, depending on the breaker non-contemporaneous action time.

Step 2: identification method according to zero-sequence Lissajous curve space-time complexity

The analysis proves that the transient components of the high-resistance fault and the capacitor switching event are different, and the difference of the transient components is visualized by using a zero-sequence Lissajous curve. As shown in fig. 14-15, fig. 14 is a high-resistance fault zero-sequence lissajous curve dynamic track, and fig. 15 is a capacitor switched zero-sequence lissajous curve dynamic track. Because the capacitive switching transient process is high-frequency oscillation, the dynamic track of the capacitive switching transient process has more 'inflection points', namely the capacitive switching transient process is more complex in spatial distribution. At the same time, the curves exist for a short time, i.e. are more concentrated in the time distribution. This feature is called lissajous space-time complexity, which essentially converts the original frequency domain feature into a new time domain feature, and is implemented by the subsequent VCODO (Vector Closing Opening Difference Operation) algorithm, so that the time and space distributions of the conversion from different frequencies into different time domains are different.

Aiming at Lissajous space-time complexity, a method for extracting features by using Mathematical Morphology (MM) is provided.

Mathematical morphology is a signal processing technology for nonlinear filtering and feature extraction of time domain signals, and utilizes a Structural Element (SE) as a probe to continuously move in a time domain waveform, extract local features of the signals, and highlight abrupt features in the waveform through waveform transformation. It contains four basic operations, expansion (condition), erosion (erosion), open operation (closing) and close operation (closing), defined as follows:

（13）

wherein ,the principle of the expansion formula is that a local maximum value is taken in a specified range; />The corrosion formula is characterized in that a local minimum value is taken in a specified range; />For closed operation, performing expansion and corrosion on an input signal to obtain an input signal peak point; />For open operation, performing corrosion-before-expansion operation on an input signal to obtain a low valley point of the input signal; />Is a CODO algorithm (Closing Opening Difference Operation); />For inputting signals +.>The number is (1, 2, 3. N), which represents the input signal acquisition point, and N is the maximum acquisition point of the time window; />For the structural elements set up, +.>Is the length of the structural element.

The closed operation can fill up the minor groove of the waveform and filter off the low-valley noise. The open operation can make the waveform outline smoother, remove burrs and isolated points in the waveform, and inhibit peak noise. By making a difference between the closed operation result and the open operation result, the distortion amount of the input signal can be amplified.

The CODO algorithm can reveal waveform discontinuities and highlight abrupt features in the waveform, thereby accurately extracting waveform distortion features. However, the traditional CODO algorithm is to extract the time sequence waveform and cannot be directly applied to the lissajous curve.

Therefore, the CODO algorithm is deformed and generalized to the phase plane use. The following algorithm is defined:

（14）

wherein ,1,2, 3.N, N is the maximum acquisition point number of the time window; />Is the length of structural element, M is 1,2, 3.M, M<N;/>For the structural element vector, one can take +.>；/>Calculating a vector corresponding to the maximum amplitude value in a calculation domain; />Calculating a vector corresponding to the minimum amplitude value for the calculation domain; />The zero sequence Lissajous curve track vector is input; />Is a phase plane expansion formula; />Is a phase plane corrosion formula; />Is phase plane closed operation; />Performing open operation on a phase plane; />Is a VCODO algorithm.

And taking the data of the total three periods from the previous period to the next period when the event is detected to occur to perform VCODO calculation, wherein the normalized calculation results are shown in fig. 16-21.

In the figure, in the identification period correspondingly set in each of figures 16-19, the vector amplitude and vector phase of the continuous high-resistance fault and capacitor switching zero-sequence lissajous curve track are obtained by connecting each space track point with the projection on the time axis. Fig. 20 and 21 correspond to the VCODO values obtained by the high-resistance fault and the capacitor switching calculation, respectively. The comparison shows that the high-resistance fault VCODO mainly appears at the zero crossing point of the current, and the continuous concentrated characteristic of the capacitor switching VCODO appears, which is the same as the analysis conclusion.

Selecting half periods around the maximum value time of VCODO in the identification period, and setting a threshold valueWhen the ratio of the VCODO out-of-limit times to the total out-of-limit times of the identification period in the time period is calculated, and when the total ratio is more than 90%, the event is regarded as capacitor switching, otherwise, the event is a high-resistance fault.

And (3) identifying a calculation formula:

（15）

in the formula ,to identify a time window; />For judging the time window; />When VCODO is more limited, 1 is adopted, and conversely, 0 is adopted; />For the set threshold, the normalization may be set to 0.1.

(1) The application utilizes the zero sequence Lissajous curve area to detect the high-resistance fault, and is not influenced by the number of feeder branch lines. Because zero sequence quantity does not exist when the power distribution network normally operates, the area characteristics provided by the application have higher degree of distinction before and after the occurrence of high-resistance faults, and are suitable for fault scenes with higher transition resistance. And moreover, the electric quantity required by area calculation is only required to be obtained from one measuring device at the bus, and other devices are not required to be additionally assembled, so that the method is easy to implement and apply.

(2) The application analyzes the high-resistance fault and the capacitor switching based on the transient equivalent circuit, compares the difference of transient components of two events, visualizes the characteristic difference through the zero-sequence Lissajous curve track, and is convenient for subsequent research and analysis of researchers. The Lissajous space-time complexity characteristic is provided, and the frequency domain characteristic of fuzzy discrimination between high-resistance faults and capacitor switching is converted into a more reliable time domain characteristic. And a VCODO algorithm suitable for phase plane feature extraction is deduced, two kinds of event identification can be effectively carried out, and the accuracy of high-resistance fault and capacitor switching identification is improved.

Example two

The embodiment provides a system for identifying high-resistance faults and switching disturbance based on Lissajous curves.

It should be noted that the curve construction module, the feature extraction module, the calculation module and the identification module are the same as the examples and application scenarios implemented by the steps in the first embodiment, but are not limited to the disclosure of the first embodiment. It should be noted that the modules described above may be implemented as part of a system in a computer system, such as a set of computer-executable instructions.

The above description is only of the preferred embodiments of the present application and is not intended to limit the present application, but various modifications and variations can be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. The method for identifying the high-resistance faults and switching disturbances based on the Lissajous curves is characterized by comprising the following steps:

selecting each half period of the maximum value moment of the difference value in the identification period range, calculating the ratio of the out-of-limit times of the difference value in each half period of the maximum value moment of the difference value to the total out-of-limit times of the identification period, if the ratio is larger than a set threshold value, switching the capacitor, otherwise, high-resistance fault;

the process for extracting the mutation characteristics of the zero-sequence Lissajous curve by adopting the deformed mathematical morphology comprises the following steps: extracting local features of the zero-sequence Lissajous curve by adopting deformed mathematical morphology, and highlighting abrupt features in the waveform through waveform transformation;

the mathematical morphology after deformation is:

wherein ,1,2, 3.N, N is the maximum acquisition point number of the time window; />Is the length of structural element, M is 1,2, 3.M, M<N；/>For the structural element vector, get +.>I is an imaginary unit; />Calculating a vector corresponding to the maximum amplitude value in a calculation domain; />Calculating a vector corresponding to the minimum amplitude value for the calculation domain; />The zero sequence Lissajous curve track vector is input; />Is a phase plane expansion formula; />Is of the phasePlane corrosion formula; />Is phase plane closed operation; />Performing open operation on a phase plane; />Is a VCODO algorithm.

2. The method for identifying high resistance faults and switching disturbances based on lissajous curves according to claim 1 where the range of the identification period is greater than the range of the period.

3. The method for identifying high-resistance faults and switching disturbance based on lissajous curves according to claim 1, wherein the ratio of the number of out-of-limit times of the difference to the total number of out-of-limit times of an identification period in each half period around the maximum value moment of the difference is calculated, if the ratio is larger than a set threshold value, the capacitor switching is performed, otherwise, the process of high-resistance faults adopts the following formula:

in the formula ,to identify a time window; />For judging the time window; />When VCODO is more limited, 1 is adopted, and conversely, 0 is adopted; />For setting upThe threshold value, Y, is a set threshold value.

4. The system for identifying high-resistance faults and switching disturbance based on Lissajous curves is characterized by comprising:

an identification module configured to: selecting each half period of the maximum value moment of the difference value in the identification period range, calculating the ratio of the out-of-limit times of the difference value in each half period of the maximum value moment of the difference value to the total out-of-limit times of the identification period, if the ratio is larger than a set threshold value, switching the capacitor, otherwise, high-resistance fault;

the mathematical morphology after deformation is:

wherein ,1,2, 3.N, N is the maximum acquisition point number of the time window; />Is the length of structural element, M is 1,2, 3.M, M<N；/>For the structural element vector, get +.>I is an imaginary unit; />Calculating a vector corresponding to the maximum amplitude value in a calculation domain; />Calculating a vector corresponding to the minimum amplitude value for the calculation domain; />The zero sequence Lissajous curve track vector is input; />Is a phase plane expansion formula; />Is a phase plane corrosion formula; />Is phase plane closed operation; />Performing open operation on a phase plane; />Is a VCODO algorithm.