CN116484798A - PCB wiring acceleration optimization method based on segmentation parallel search - Google Patents
PCB wiring acceleration optimization method based on segmentation parallel search Download PDFInfo
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- G06F30/39—Circuit design at the physical level
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
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Abstract
The invention provides a PCB wiring acceleration optimization method based on segmentation parallel search, which comprises the following steps: (1) searching for an inflection point: inputting map information, and finding out inflection points meeting limiting conditions by using obstacles on the straight line of the initial point and the target point; (2) searching for segment nodes: finding a proper segmentation node through an inflection point; (3) segment parallel a search algorithm wiring: and dividing wiring areas according to the segmentation nodes, and executing the A-search algorithm wiring of segmentation parallelism in each wiring area. According to the method, the search problem in a larger area is decomposed into parallel search problems in a plurality of small areas and solved, and the characteristics of the obstacles in the plurality of areas are guided by adopting an adaptive heuristic guiding function.
Description
Technical Field
The invention belongs to the field of Electronic Design Automation (EDA), and particularly relates to a PCB wiring acceleration optimization method.
Background
Printed circuit boards (Printed Circuit Board, PCBs) are widely used in consumer electronics, medical devices, automotive industry, national defense, aerospace, and other fields closely related to national timing and civilian life. The PCB board in the electronic device is to electrically interconnect the electronic components according to the design intent through physical wires, thereby implementing the specified functions. PCB routing is a critical ring in electronic product design, and its goals can be grouped into two layers: (1) The primary objective is to complete 100% of the required electrical interconnections within a defined area (area, shape, level, etc.) under conditions that meet the requirements of design, process rules, and meet electrical performance, according to the connection relationship description of the circuit; (2) On the premise of completing wiring, the template of the PCB wiring is also used for further optimizing the wiring result, so that the required PCB area is minimized, and the functions and performances of the PCB are better.
With the rapid development of integrated circuit technology and the increasing of complex applications, electronic devices have become smaller and smaller, and have increasingly complex functions, and the wiring difficulty of PCBs has also been continuously increased. At this time, the efficiency of pure manual wiring has far from satisfying the requirements of design scenarios, and the automatic wiring function realized based on EDA (Electronic design automation) tools can greatly improve the design efficiency. Although the existing EDA tool for PCB has complete functions, with the increasing arrangement density of pins of electronic components and the decreasing size of PCB, the EDA tool for PCB automatic wiring is facing increasingly serious challenges, and mainly is characterized by increasing difficulty of PCB automatic wiring, and wiring efficiency is not capable of meeting the requirement of design period.
Achieving efficient PCB automatic routing requires reliance on sophisticated and reliable routing algorithms. The earliest wiring algorithm is the Lees algorithm proposed in 1961, the basic idea is to spread a plurality of searching directions all around in the whole searching process, and the disadvantage is that the searching process is slow and the requirement on memory space is large. After that, the Lees algorithm is continuously improved, wherein the a search algorithm is one of the most classical algorithms and the most currently used algorithms. The algorithm finds an optimal path based on the evaluation function through heuristic search. The search algorithm is faster and more efficient than the Lees algorithm, but the calculation amount is still large. Moreover, the a search algorithm does not traverse all feasible solutions, and different heuristic functions may result in different routing results, and in poor cases may cause routing congestion.
Disclosure of Invention
The invention aims at least solving the problems and provides a PCB wiring acceleration optimization method based on segmented parallel search, which is used for decomposing a search problem in a larger area into parallel search problems in a plurality of small areas and solving the parallel search problems, and guiding wiring by adopting an adaptive heuristic guiding function aiming at the characteristics of obstacles in the plurality of areas.
In order to achieve the above purpose, the invention adopts the following technical scheme:
(1) Definition of inflection points and search method:
the inflection point means that only one of nodes adjacent to each other above and below the search area of the wiring path is an obstacle, and only one of nodes adjacent to each other to the left and right is a wiring grid point of the obstacle, and the sense of the inflection point is that a segment connection that effectively bypasses the obstacle is provided between the start point and the target point.
By traversing the initial point S (x 1 ，y 1 ) And target point T (x 2 ，y 2 ) The elements between the line segments may result in the first node x to encounter an obstacle. We start the search from node x. First, two adjacent nodes in the vertical direction of the node are searched. If both nodes are obstacles, the node x is shifted to the vertical direction, and the search is continued to see whether the adjacent nodes above and below the node are obstacles. This search process is repeated until the yellow node x is moved vertically to the edge of the obstacle, satisfying that there is and only one obstacle for the two nodes next to each other above and below the node. Next, the left and right adjacent nodes of the node are searched, and the same as the searching process in the vertical direction is carried out until the left and right adjacent nodes of the node have one obstacle and only one obstacle, and finally, the position of the point which is needed finally is calculated according to the searching direction (as shown in fig. 2).
By this search method, an initial point and an inflection point on a target point line segment can be found from the obstacle eye. If the given goal is N segments in parallel, then N-1 obstacles are selected on the segment and N-1 inflection points are found that bypass the obstacles.
(2) The segment node searching method comprises the following steps:
the present invention defines two terms:
(1) the complexity epsilon E [0,1 ] of the wiring map is used for describing the complexity of the component barriers in the map and assisting in finding out proper segmentation nodes. Specifically, the wiring map complexity represents the ratio of component obstructions to area of the area within the wiring area, ε i ＝N si-number of barrier cells /N si-total number of cells 。N si-total number of cells Indicated in the region S i The number of all the square cells, N si-number of barrier cells Indicated in the region S i The number of barrier panels. As shown in fig. 3, the green dots are segment nodes, and a rectangular area Si is defined by the segment nodes and the initial dot.
(2) Wiring distance ratio lambda i The important index of the path search time can be reflected to a certain extent. Specifically, the wiring distance ratio is the node n (x, y) and the initial inflection point S in the region i (x 0 ，y 0 ) Manhattan distance from initial node S i (x 0 ，y 0 ) And a target inflection point T (x x ，y y ) The ratio of Manhattan distances, i.e. lambda i ＝|x-x 0 |+|y-y 0 |/|x x -x 0 |+|y y -y 0 |。
Combining the two key considerations mentioned above: wiring map complexity and wiring distance ratio, establish cost function P (n) to guide decision of segment nodes, P (n) =ε i +λ i 。
Constructing a wiring map subarea by { S, y1, y2, y3, …, T }, searching adjacent nodes around the wiring map subarea by taking nodes in inflection point sets { y1, y2, y3, … } as parent nodes, and calculating cost function values corresponding to each subarea one by one until each subarea node set { N1, N2, N3,..n (N-1) } with the minimum max { subarea cost function value set } is found, and the wiring map subarea is the segmented node.
(3) Segment parallel search:
after the segmented node set { N1, N2, N3,..n (N-1) } in the wiring sub-area is found by the above method, the wiring searching process is divided into N segments, and the N segments are executed in parallel by using an a-search algorithm, wherein the searching time is max { T1, T2, T3,..tn }. And selecting an appropriate heuristic function to guide wiring according to the wiring scene.
The invention has the technical effects that:
1. constructing a segmented node through an inflection point, and proposing to establish a cost function P (n) to guide the decision of the segmented node, so that the search time of each segment is as short and balanced as possible;
2. under the condition that the line length is basically the same as that of the Lees algorithm and the A-search algorithm, the search space is reduced, the search speed is accelerated, the wiring effect is optimized, the search cost is reduced, and the wiring efficiency is improved.
Drawings
The accompanying drawings illustrate various embodiments by way of example in general and not by way of limitation, and together with the description and claims serve to explain the inventive embodiments. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts. Such embodiments are illustrative and not intended to be exhaustive or exclusive of the present apparatus or method.
FIG. 1 shows a schematic diagram of a segmented parallel search algorithm of the present invention;
FIG. 2 shows an example plot of inflection point search of the present invention;
FIG. 3 illustrates an exemplary diagram of a two-segment parallel search of the present invention;
FIG. 4 illustrates an exemplary graph of a two-segment node search of the present invention;
FIG. 5 illustrates an exemplary diagram of a search segment node of the present invention encountering an obstacle;
fig. 6 shows a comparison of the results of the inventive a-search (a) (c) and the optimized segmented parallel search (b) (d).
Detailed Description
It should be noted that, in the case of no conflict, the embodiments and features in the embodiments may be combined with each other. The present application will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.
FIG. 2 shows an inflection point search procedure for the presence of an obstacle between the origin and destination (the present application is not limited to the origin and destination being only oneIn the case of individual obstacles) by traversing the initial point S (x 1 ，y 1 ) And target point T (x 2 ，y 2 ) The elements between the line segments may result in the first node x to encounter an obstacle. The search starts from node x. First, two adjacent nodes in the vertical direction of the node are searched. If both nodes are obstacles, the node x is shifted to the vertical direction, and the search is continued to see whether the adjacent nodes above and below the node are obstacles. This search process is repeated until node x is moved vertically to the edge of the obstacle, satisfying that there is and only one obstacle for two nodes next to each other above and below the node. Next, searching the left and right adjacent nodes of the node, and the same as the searching process in the vertical direction, until the left and right adjacent nodes of the node have one obstacle and only one obstacle, and finally calculating the position of the point which is needed finally according to the searching direction.
The method demonstrated by fig. 2 can find the initial point and the inflection point on the target point line segment from the obstacle's view. If the given goal is N segments in parallel, then N-1 obstacles are selected on the segment and N-1 inflection points are found that bypass the obstacles. The search process can be described as follows:
(1) Map mazeMap, initial point S, target node T is input.
(2) Starting from the initial point, elements on the initial point and the target point line segment in the mazeMap are traversed until the obstacle node x is encountered.
(3) And searching the nodes x to be vertical to adjacent nodes, and judging whether the nodes x are barriers or not.
(4) If both vertically adjacent nodes are obstacles, vertically translating the nodes, and then repeating (3) otherwise proceeding to (5).
(5) If the vertically adjacent nodes are all obstacles, horizontally shifting the node, and then repeating (4) if the output node x continues to horizontally and vertically shift the node by one unit, namely an inflection point y.
After the inflection point is searched, searching the segment nodes according to the position of the inflection point:
to more reasonably judge the location of segmented nodes, the present invention defines two terms:
(1) the concept of wiring map complexity ε [0,1 ] represents the ratio of component obstacles to area within a wiring area.
ε i ＝N si-number of barrier cells /N si-total number of cells
S i Representing the area of the rectangle contained in the abscissa of the segmentation node and the initial node.Indicated in the region S i The number of all squares in->Indicated in the region S i The number of barrier panels. As shown in FIG. 3, a rectangular region S defined by segment nodes and an initial point i 。/> ε i =1/18。
(2) The concept of the wiring distance ratio λi indicates the node n (x, y) and the initial inflection point S in a certain wiring region i (x 0 ，y 0 ) Manhattan distance from initial node S i (x 0 ，y 0 ) And a target inflection point T (x x ，y y ) Is a ratio of manhattan distances.
λ i ＝|x-x 0 |+|y-y 0 |/|x x -x 0 |+|y y -y 0 |
Combining the two key considerations mentioned above: the wiring map complexity and wiring distance ratio, a cost function P (n) is established to guide the decision of the segment nodes.
P(n)＝ε i +λ i
Fig. 4 is a diagram showing an exemplary searching of a two-segment node (the present application is not limited to the case of two-segment nodes), starting from an inflection point, along the direction of the straight line of the initial point S and the target point T. As shown in FIG. 4, the target nodes are first traversed and the nodes are computed one by oneThe corresponding cost function value until max { P } is found s (n)，P T (n) } is the smallest node n, i.e., its segmentation point.
The segment node searching method is specifically described as follows:
(1) Inputting a wiring map mazeMap, inflection point sets { y1, y2, y3, & gt } an initial point S, a target point T
(2) Constructing a wiring map sub-area from { S, y1, y2, y3,., T };
(3) Searching adjacent nodes around the node in the inflection point set { y1, y2, y3, & gt } by taking the node in the inflection point set { y1, y2, y3, >
(4) Until max { sub-region cost function aggregate };
(5) The smallest set of sub-region nodes { N1, N2, N3,..n (N-1) }, is the segmented node.
If an obstacle is encountered during the search, as shown in fig. 5, the node m around the search inflection point just passes through the obstacle, we find the inflection point on the obstacle according to the node m and algorithm 1. Based on this new inflection point, algorithm 2 is then used to find the appropriate segmentation node.
Fig. 6 is a comparison graph of the results of an a-search algorithm and an optimized piecewise parallel search algorithm provided by the present invention, where the heuristic function of the first search used by the piecewise parallel search algorithm is chebyshev distance, and the heuristic function of the second search is manhattan distance, and according to the experimental result, it can be seen that using these two heuristic functions makes the routing channel make more space for other network routing.
Although embodiments of the present invention have been disclosed above, it is not limited to the details and embodiments shown, it is well suited to various fields of use, and further modifications may be readily apparent to those skilled in the art, without departing from the general concepts defined by the claims and the equivalents thereof, and therefore the invention is not limited to the specific details and illustrations shown and described herein.
Claims (4)
1. A PCB wiring acceleration optimization method based on segmentation parallel search is characterized by comprising the following steps:
(1) Searching for an inflection point: inputting map information, and finding out inflection points meeting limiting conditions by using obstacles on the straight line of the initial point and the target point;
(2) Searching segment nodes: finding a proper segmentation node through an inflection point;
(3) Segment parallel a search algorithm wiring: and dividing wiring areas according to the segmentation nodes, and executing the A-search algorithm wiring of segmentation parallelism in each wiring area.
2. The method of claim 1, wherein, in the search inflection point in (1):
if the given goal is N segments in parallel, then N-1 obstacles are selected on the segment and N-1 inflection points are found that bypass the obstacles.
3. The method of claim 1, wherein the search segment nodes in (2) are:
forming N-1 turning point sets according to the given N-section parallel planning; combining key points in the starting point, the end point and the inflection point set, and constructing N wiring map subregions according to rectangles formed by adjacent points;
to make the search time of each segment as short and balanced as possible, the complexity epsilon of the wiring map is defined i And a wiring distance ratio lambda i ：
Representing the ratio of the component barrier to the area of the area in the wiring area;
λ i ＝|x-x 0 |+|y-y 0 |/|x x -x 0 |+|y y -y 0 i, which represents the node n (x, y) and the initial inflection point S in a certain wiring region i (x 0 ,y 0 ) Manhattan distance from initial node S i (x 0 ,y 0 ) And a target inflection point T (x x ,y y ) Is a ratio of manhattan distances;
establishing a cost function P (n) to guide decision of the segment nodes:
P(n)＝ε i +λ i the method comprises the steps of carrying out a first treatment on the surface of the And in the process of searching the segmented nodes, calculating a cost function P (n) corresponding to the nodes one by one until a point with the minimum cost is found out as the segmented node.
4. The method of claim 1, wherein the piecewise parallel a-search algorithm of (3) is routed as:
after N-1 segment nodes are found, dividing a wiring area into N areas;
the search process for each region is performed independently and in parallel, and the heuristic guidance function for each region is flexibly selected based on the obstacle characteristics.
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| CN202310465049.3A CN116484798B (en) | 2023-04-27 | PCB wiring acceleration optimization method based on segmentation parallel search |
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