CN116483586B - Data efficient processing method based on dynamic array - Google Patents

Data efficient processing method based on dynamic array Download PDF

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Publication number
CN116483586B
CN116483586B CN202310737382.5A CN202310737382A CN116483586B CN 116483586 B CN116483586 B CN 116483586B CN 202310737382 A CN202310737382 A CN 202310737382A CN 116483586 B CN116483586 B CN 116483586B
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data
array
dynamic
memory
static array
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CN116483586A (en
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汤智彬
庄广壬
陈建生
邓超河
植挺生
赵尚谦
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Guangdong Guangyu Technology Development Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4812Task transfer initiation or dispatching by interrupt, e.g. masked
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
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  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The application relates to the field of data dynamic array processing, in particular to a data efficient processing method based on a dynamic array, which comprises the following steps: s1, obtaining a data static array by utilizing data to be processed; s2, carrying out integrity verification according to the data to be processed by utilizing the data static array to obtain a data static array verification result; s3, establishing a corresponding data dynamic array according to the data static array verification result; s4, utilizing the data dynamic array to complete real-time dynamic processing of the data to be processed, completing data processing by gradually and sequentially establishing a static array to a dynamic array, simultaneously ensuring strong relevance with initial data by the static array and the dynamic array which are sequentially established, rapidly judging the scheme reporting error position through a corresponding process result when the process is interrupted, carrying out reverse verification at the initial establishment of the dynamic array, judging on memory occupation, corresponding time and a static array recurrence relation, and providing multi-layer verification guarantee for the finally established result.

Description

Data efficient processing method based on dynamic array
Technical Field
The application relates to the field of data dynamic array processing, in particular to a data efficient processing method based on a dynamic array.
Background
First, the length of the static array is predefined, and once the size is given, the static array cannot be changed in the whole procedure, while the length of the dynamic array is not fixed and can be changed, and the memory space of the dynamic array is dynamically allocated from the heap. The code is allocated memory by executing it. When the program is executed to the distribution statement written by the user, the program is distributed, but in daily use, a dynamic array is often obtained through recursion of a static array, and in the process of establishing connection, the static array and the dynamic array are not matched due to the situations of unstable memory distribution or operation and the like, so that the program or data processing errors are affected.
Disclosure of Invention
Aiming at the defects of the prior art, the application provides a data efficient processing method based on a dynamic array, which ensures the high relevance between the dynamic array and the preceding data and the static array by firstly carrying out static array and then dynamic array and executing independent verification process, and provides support for the conditions of follow-up calling and the like.
In order to achieve the above object, the present application provides a method for efficiently processing data based on a dynamic array, including:
s1, obtaining a data static array by utilizing data to be processed;
s2, carrying out integrity verification according to the data to be processed by utilizing the data static array to obtain a data static array verification result;
s3, establishing a corresponding data dynamic array according to the data static array verification result;
and S4, utilizing the data dynamic array to complete real-time dynamic processing of the data to be processed.
Preferably, the obtaining the data static array by using the data to be processed includes:
s1-1, acquiring a corresponding recording moment of data to be processed as an array generation starting moment;
s1-2, acquiring a static array corresponding to data to be processed as a basic static array;
s1-3, judging whether the running position of the basic static array is a memory stack area, if so, generating a starting moment by using the basic static array and establishing a data static array with the basic static array, otherwise, acquiring a corresponding running abnormal result of the basic static array;
s1-4, carrying out iterative processing according to the abnormal operation result to obtain a data static array;
the recording time is the generation time of the data to be processed or the execution operation time of the data to be processed.
Further, the obtaining the abnormal operation result corresponding to the basic static array includes:
s1-3-1, judging whether the current time of the memory stack area is occupied, if yes, executing S1-3-2, otherwise, returning to S1-1;
s1-3-2, judging whether the memory stack area has a basic static array corresponding to the last time, if so, delaying the abnormal operation result, and otherwise, occupying the abnormal operation result.
Further, performing iterative processing according to the operation abnormal result to obtain a data static array includes:
when the abnormal operation result is delay, replacing the corresponding basic static array at the next previous time in the internal stack area by the corresponding basic static array at the current time, and returning to S1-3;
when the operation abnormal result is occupied, the corresponding basic static array at the current moment is utilized to update the internal stack area correspondingly to obtain a data static array;
wherein the updated memory stack region is an independent memory stack region.
Further, performing integrity verification according to the data to be processed by using the data static array to obtain a data static array verification result includes:
s2-1, judging whether the data static array has historical iterative processing, if so, executing S2-2, otherwise, verifying that the data static array is complete;
s2-2, judging whether the data static array corresponds to the memory stack area and whether adjustment exists, if so, executing S2-3, otherwise, executing S2-4;
s2-3, judging whether the corresponding internal stack area at the current moment is identical to the corresponding internal stack area at the adjacent last moment, if so, the data static array verification result is complete, otherwise, the data static array verification result is partially complete;
s2-4, judging whether the data static array is completely corresponding to the data to be processed, if so, the data static array verification result is complete, otherwise, the data static array verification result is partially complete.
Further, establishing a corresponding data dynamic array according to the data static array verification result includes:
s3-1, when the data static array verification result is complete, establishing a data dynamic memory by using the data static array verification result to correspond to a memory stack area to obtain a data dynamic array;
s3-2, when the data static array verification result is partially complete, dividing the dynamic execution memory and the dynamic management memory by utilizing the corresponding basic static array of the data static array verification result;
s3-3, obtaining a data dynamic array by utilizing the dynamic execution memory and the dynamic management memory;
the dynamic execution memory is an operation environment of the data dynamic array, and the dynamic management memory is a corresponding control dynamic execution memory.
Further, establishing a data dynamic memory by using the data static array verification result to correspond to the memory stack area to obtain a data dynamic array comprises:
s3-1-1, acquiring a corresponding memory stack area of the data static array verification result as a standard processing memory;
s3-1-2, establishing a first data dynamic memory by using the standard processing memory;
s3-1-3, judging whether the data static array corresponding to the data static array verification result normally operates in a first data dynamic memory, if so, using the data static array in the first data dynamic memory as a data dynamic array, otherwise, executing S3-1-4;
s3-1-4, establishing a second data dynamic memory by utilizing the data static array;
s3-1-5, judging whether the data static array corresponding to the data static array verification result normally operates in a second data dynamic memory, if so, using the data static array in the second data dynamic memory as a data dynamic array, otherwise, returning to S2-1;
the standard processing memory is identical to the first data dynamic memory, and the normal operation is that the data static array operates without error reporting in the first data dynamic memory.
Further, the obtaining the data dynamic array by using the dynamic execution memory and the dynamic management memory includes:
s3-3-1, acquiring a data static array with a complete corresponding part of a data static array verification result as a verification-free data static array;
s3-3-2, obtaining a data static array to be verified from the data static array according to the verification-free data static array;
s3-3-3, obtaining a first data dynamic array by using the dynamic execution memory and the verification-free data static array;
s3-3-4, obtaining a second data dynamic array by utilizing the dynamic execution memory and the data static array to be verified;
s3-3-5, performing verification processing by using the dynamic management memory and the second data dynamic array to obtain a third data dynamic array;
s3-3-6, using the first data dynamic array and the third data dynamic array as data dynamic arrays;
and combining the verification-free data static array with the data static array to be verified to obtain data static data.
Further, performing verification processing by using the dynamic management memory and the second data dynamic array to obtain a third data dynamic array includes:
establishing synchronous time sequence mapping by utilizing a dynamic management memory and a dynamic execution memory;
obtaining a synchronous data dynamic array in a dynamic management memory by utilizing the second data dynamic array;
and judging whether the synchronous data dynamic array exists in the dynamic execution memory according to the synchronous time sequence mapping, if so, the second data dynamic array is used as a third data dynamic array through verification, otherwise, returning to S3-3-2.
Preferably, the data dynamic array is used for completing real-time dynamic processing of the data to be processed.
S4-1, judging whether the data to be processed at the current moment has change, if so, acquiring the change state of the data to be processed at the next moment, otherwise, reserving the data to be processed at the current moment to finish real-time dynamic processing;
s4-2, judging whether the change state of the data to be processed at the next time is active change, if so, using the data to be processed at the next time as the data to be processed at the current time and returning to S1, otherwise, executing S4-3;
s4-3, judging whether a data dynamic array of the data to be processed corresponding to the passive change is complete, if so, returning to S2-1, otherwise, returning to S3-2;
the change condition is that the data to be processed at the next time is different from the data to be processed at the current time, and the change state comprises active change and passive change.
Compared with the closest prior art, the application has the following beneficial effects:
under the condition of fixed memory, the data processing is completed by gradually and sequentially establishing a static array to a dynamic array, the memory occupation is reduced as much as possible, meanwhile, the static array and the dynamic array which are sequentially established ensure the strong relevance with initial data, when the process is interrupted, the error position can be reported by the corresponding process result fast judgment scheme when the process is interrupted, the reverse verification is performed at the initial establishment of the dynamic array, the judgment is made on the memory occupation, the corresponding time and the static array recurrence relation, and the multi-layer verification guarantee is provided for the finally established result.
Drawings
FIG. 1 is a flow chart of a method for efficiently processing data based on a dynamic array.
Detailed Description
The following describes the embodiments of the present application in further detail with reference to the drawings.
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Example 1: the application provides a data efficient processing method based on a dynamic array, which is shown in figure 1 and comprises the following steps:
s1, obtaining a data static array by utilizing data to be processed;
s2, carrying out integrity verification according to the data to be processed by utilizing the data static array to obtain a data static array verification result;
s3, establishing a corresponding data dynamic array according to the data static array verification result;
and S4, utilizing the data dynamic array to complete real-time dynamic processing of the data to be processed.
S1 specifically comprises:
s1-1, acquiring a corresponding recording moment of data to be processed as an array generation starting moment;
s1-2, acquiring a static array corresponding to data to be processed as a basic static array;
s1-3, judging whether the running position of the basic static array is a memory stack area, if so, generating a starting moment by using the basic static array and establishing a data static array with the basic static array, otherwise, acquiring a corresponding running abnormal result of the basic static array;
s1-4, carrying out iterative processing according to the abnormal operation result to obtain a data static array;
the recording time is the generation time of the data to be processed or the execution operation time of the data to be processed.
S1-3 specifically comprises:
s1-3-1, judging whether the current time of the memory stack area is occupied, if yes, executing S1-3-2, otherwise, returning to S1-1;
s1-3-2, judging whether the memory stack area has a basic static array corresponding to the last time, if so, delaying the abnormal operation result, and otherwise, occupying the abnormal operation result.
In this embodiment, a data efficient processing method based on a dynamic array is that a static array is located in a stack area in a memory, and a fixed size is allocated on the stack when the static array is defined, and the size cannot be changed when the static array runs, and after a function is executed, the system is automatically destroyed, so that in S1-3-1, when the stack area is occupied, the same data or the same program occupies a single stack area, and at the moment, the stack area is objectively divided by the occupied description time, and the time is required to be calibrated again by returning to S1-1.
S1-4 specifically comprises:
s1-4-1, when the abnormal operation result is delayed, replacing a basic static array corresponding to the last adjacent time in the memory stack area by a basic static array corresponding to the current time, and returning to S1-3;
s1-4-2, when the abnormal operation result is occupied, correspondingly updating the memory stack area by using the basic static array corresponding to the current moment to obtain a data static array;
wherein the updated memory stack region is an independent memory stack region.
S2 specifically comprises:
s2-1, judging whether the data static array has historical iterative processing, if so, executing S2-2, otherwise, verifying that the data static array is complete;
s2-2, judging whether the data static array corresponds to the memory stack area and whether adjustment exists, if so, executing S2-3, otherwise, executing S2-4;
s2-3, judging whether the corresponding internal stack area at the current moment is identical to the corresponding internal stack area at the adjacent last moment, if so, the data static array verification result is complete, otherwise, the data static array verification result is partially complete;
s2-4, judging whether the data static array is completely corresponding to the data to be processed, if so, the data static array verification result is complete, otherwise, the data static array verification result is partially complete.
S3 specifically comprises:
s3-1, when the data static array verification result is complete, establishing a data dynamic memory by using the data static array verification result to correspond to a memory stack area to obtain a data dynamic array;
s3-2, when the data static array verification result is partially complete, dividing the dynamic execution memory and the dynamic management memory by utilizing the corresponding basic static array of the data static array verification result;
s3-3, obtaining a data dynamic array by utilizing the dynamic execution memory and the dynamic management memory;
the dynamic execution memory is an operation environment of the data dynamic array, and the dynamic management memory is a corresponding control dynamic execution memory.
In this embodiment, when the static data verification result is complete, the dynamic array can be directly obtained by recursion through the static array, the actual content is the same, and when the static data verification result is partially complete, that is, the memory or the array has a change, in order to simplify the verification process, and avoid excessive repeated verification, the two-wire process is divided to generate the dynamic array by synchronous processing, which can be understood that when the static data verification result is partially complete, the corresponding content is not required to be obtained, and in the subsequent execution step, the final data dynamic array can be obtained by further deriving according to the synchronizable array.
S3-1 specifically comprises:
s3-1-1, acquiring a corresponding memory stack area of the data static array verification result as a standard processing memory;
s3-1-2, establishing a first data dynamic memory by using the standard processing memory;
s3-1-3, judging whether the data static array corresponding to the data static array verification result normally operates in a first data dynamic memory, if so, using the data static array in the first data dynamic memory as a data dynamic array, otherwise, executing S3-1-4;
s3-1-4, establishing a second data dynamic memory by utilizing the data static array;
s3-1-5, judging whether the data static array corresponding to the data static array verification result normally operates in a second data dynamic memory, if so, using the data static array in the second data dynamic memory as a data dynamic array, otherwise, returning to S2-1;
the standard processing memory is identical to the first data dynamic memory, and the normal operation is that the data static array operates without error reporting in the first data dynamic memory.
S3-3 specifically comprises:
s3-3-1, acquiring a data static array with a complete corresponding part of a data static array verification result as a verification-free data static array;
s3-3-2, obtaining a data static array to be verified from the data static array according to the verification-free data static array;
s3-3-3, obtaining a first data dynamic array by using the dynamic execution memory and the verification-free data static array;
s3-3-4, obtaining a second data dynamic array by utilizing the dynamic execution memory and the data static array to be verified;
s3-3-5, performing verification processing by using the dynamic management memory and the second data dynamic array to obtain a third data dynamic array;
s3-3-6, using the first data dynamic array and the third data dynamic array as data dynamic arrays;
and combining the verification-free data static array with the data static array to be verified to obtain data static data.
S3-3-5 specifically comprises:
s3-3-5-1, utilizing dynamic management memory and dynamic execution memory to establish synchronous time sequence mapping;
s3-3-5-2, obtaining a synchronous data dynamic array in a dynamic management memory by utilizing the second data dynamic array;
s3-3-5-3, judging whether the synchronous data dynamic array has a corresponding data dynamic array in the dynamic execution memory according to the synchronous time sequence mapping, if so, the second data dynamic array is used as a third data dynamic array through verification, otherwise, returning to S3-3-2.
S4, specific treatment.
S4-1, judging whether the data to be processed at the current moment has change, if so, acquiring the change state of the data to be processed at the next moment, otherwise, reserving the data to be processed at the current moment to finish real-time dynamic processing;
s4-2, judging whether the change state of the data to be processed at the next time is active change, if so, using the data to be processed at the next time as the data to be processed at the current time and returning to S1, otherwise, executing S4-3;
s4-3, judging whether a data dynamic array of the data to be processed corresponding to the passive change is complete, if so, returning to S2-1, otherwise, returning to S3-2;
the change condition is that the data to be processed at the next time is different from the data to be processed at the current time, and the change state comprises active change and passive change.
In this embodiment, in a data efficient processing method based on a dynamic array, active change is changed to change data to be processed, and passive change is a situation of running process deviation or bug caused by non-human factors in a scheme implementation process.
It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: the above embodiments are only for illustrating the technical aspects of the present application and not for limiting the same, and although the present application has been described in detail with reference to the above embodiments, it should be understood by those of ordinary skill in the art that: modifications and equivalents may be made to the specific embodiments of the application without departing from the spirit and scope of the application, which is intended to be covered by the claims.

Claims (6)

1. A data high-efficiency processing method based on a dynamic array is characterized by comprising the following steps:
s1, obtaining a data static array by utilizing data to be processed;
s1-1, acquiring a corresponding recording moment of data to be processed as an array generation starting moment;
s1-2, acquiring a static array corresponding to data to be processed as a basic static array;
s1-3, judging whether the running position of the basic static array is a memory stack area, if so, generating a starting moment by using the basic static array and establishing a data static array with the basic static array, otherwise, acquiring a corresponding running abnormal result of the basic static array;
s1-4, carrying out iterative processing according to the abnormal operation result to obtain a data static array;
the recording time is the generation time of the data to be processed or the execution operation time of the data to be processed;
s2, carrying out integrity verification according to the data to be processed by utilizing the data static array to obtain a data static array verification result;
s2-1, judging whether the data static array has historical iterative processing, if so, executing S2-2, otherwise, verifying that the data static array is complete;
s2-2, judging whether the data static array corresponds to the memory stack area and whether adjustment exists, if so, executing S2-3, otherwise, executing S2-4;
s2-3, judging whether the corresponding internal stack area at the current moment is identical to the corresponding internal stack area at the adjacent last moment, if so, the data static array verification result is complete, otherwise, the data static array verification result is partially complete;
s2-4, judging whether the data static array is completely corresponding to the data to be processed, if so, the data static array verification result is completely complete, otherwise, the data static array verification result is partially complete;
s3, establishing a corresponding data dynamic array according to the data static array verification result;
s3-1, when the data static array verification result is complete, establishing a data dynamic memory by using the data static array verification result to correspond to a memory stack area to obtain a data dynamic array;
s3-2, when the data static array verification result is partially complete, dividing the dynamic execution memory and the dynamic management memory by utilizing the corresponding basic static array of the data static array verification result;
s3-3, obtaining a data dynamic array by utilizing the dynamic execution memory and the dynamic management memory;
the dynamic execution memory is an operation environment of a data dynamic array, and the dynamic management memory is a corresponding control dynamic execution memory;
s4, utilizing the data dynamic array to complete real-time dynamic processing of the data to be processed;
s4-1, judging whether the data to be processed at the current moment has change, if so, acquiring the change state of the data to be processed at the next moment, otherwise, reserving the data to be processed at the current moment to finish real-time dynamic processing;
s4-2, judging whether the change state of the data to be processed at the next time is active change, if so, using the data to be processed at the next time as the data to be processed at the current time and returning to S1, otherwise, executing S4-3;
s4-3, judging whether a data dynamic array of the data to be processed corresponding to the passive change is complete, if so, returning to S2-1, otherwise, returning to S3-2;
the change condition is that the data to be processed at the next time is different from the data to be processed at the current time, and the change state comprises active change and passive change.
2. The method for efficiently processing data based on a dynamic array as claimed in claim 1, wherein said obtaining the abnormal result of the corresponding operation of the basic static array comprises:
s1-3-1, judging whether the current time of the memory stack area is occupied, if yes, executing S1-3-2, otherwise, returning to S1-1;
s1-3-2, judging whether the memory stack area has a basic static array corresponding to the last time, if so, delaying the abnormal operation result, and otherwise, occupying the abnormal operation result.
3. The method for efficiently processing data based on a dynamic array according to claim 2, wherein performing iterative processing according to the operation anomaly result to obtain a data static array comprises:
when the abnormal operation result is delay, replacing the corresponding basic static array at the next previous time in the internal stack area by the corresponding basic static array at the current time, and returning to S1-3;
when the operation abnormal result is occupied, the corresponding basic static array at the current moment is utilized to update the internal stack area correspondingly to obtain a data static array;
wherein the updated memory stack region is an independent memory stack region.
4. The method for efficiently processing data based on a dynamic array according to claim 1, wherein creating a data dynamic memory using the data static array verification result to correspond to a memory stack area to obtain the data dynamic array comprises:
s3-1-1, acquiring a corresponding memory stack area of the data static array verification result as a standard processing memory;
s3-1-2, establishing a first data dynamic memory by using the standard processing memory;
s3-1-3, judging whether the data static array corresponding to the data static array verification result normally operates in a first data dynamic memory, if so, using the data static array in the first data dynamic memory as a data dynamic array, otherwise, executing S3-1-4;
s3-1-4, establishing a second data dynamic memory by utilizing the data static array;
s3-1-5, judging whether the data static array corresponding to the data static array verification result normally operates in a second data dynamic memory, if so, using the data static array in the second data dynamic memory as a data dynamic array, otherwise, returning to S2-1;
the standard processing memory is identical to the first data dynamic memory, and the normal operation is that the data static array operates without error reporting in the first data dynamic memory.
5. The method of claim 1, wherein obtaining the dynamic array of data using the dynamic execution memory and the dynamic management memory comprises:
s3-3-1, acquiring a data static array with a complete corresponding part of a data static array verification result as a verification-free data static array;
s3-3-2, obtaining a data static array to be verified from the data static array according to the verification-free data static array;
s3-3-3, obtaining a first data dynamic array by using the dynamic execution memory and the verification-free data static array;
s3-3-4, obtaining a second data dynamic array by utilizing the dynamic execution memory and the data static array to be verified;
s3-3-5, performing verification processing by using the dynamic management memory and the second data dynamic array to obtain a third data dynamic array;
s3-3-6, using the first data dynamic array and the third data dynamic array as data dynamic arrays;
and combining the verification-free data static array with the data static array to be verified to obtain data static data.
6. The method of claim 5, wherein performing verification processing with the dynamic management memory and the second dynamic array to obtain the third dynamic array of data comprises:
establishing synchronous time sequence mapping by utilizing a dynamic management memory and a dynamic execution memory;
obtaining a synchronous data dynamic array in a dynamic management memory by utilizing the second data dynamic array;
and judging whether the synchronous data dynamic array exists in the dynamic execution memory according to the synchronous time sequence mapping, if so, the second data dynamic array is used as a third data dynamic array through verification, otherwise, returning to S3-3-2.
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