CN116455195A

CN116455195A - Switching power supply and computing device

Info

Publication number: CN116455195A
Application number: CN202310283867.1A
Authority: CN
Inventors: 卓欢乐; 马成龙; 闫姚针; 曹量崟
Original assignee: XFusion Digital Technologies Co Ltd
Current assignee: XFusion Digital Technologies Co Ltd
Priority date: 2023-03-21
Filing date: 2023-03-21
Publication date: 2023-07-18

Abstract

The embodiment of the application provides a switching power supply and computing equipment, and relates to the technical field of power supplies. The switching power supply comprises a power factor correction circuit, a control circuit and a control signal adjusting circuit. The control signal adjusting circuit includes a sampling unit, a reference voltage generating unit, and a comparator. The control signal adjusting circuit is used for adjusting the first control signal and the second control signal based on the current signal of the first inductor. The reference compensation signal output end of the control circuit is electrically connected with the input end of the reference voltage generating unit. The control circuit is configured to generate a reference compensation signal, and adjust the reference voltage generated by the reference voltage generation unit based on the reference compensation signal. In the embodiment of the application, the control circuit is arranged to generate the reference compensation signal, the reference compensation signal can adjust the reference voltage generated by the reference voltage generating unit, and the voltage value of the second input end of the comparator can be adjusted to correct the zero offset of the comparator, so that the use reliability of the switching power supply is improved.

Description

Switching power supply and computing device

Technical Field

The application relates to the technical field of power supplies, in particular to a switching power supply and computing equipment.

Background

The switching unit may include a control signal adjustment circuit, and the control signal adjustment circuit may include a comparator. In the related art, a zero point offset is generally present in the comparator due to an error of hardware. The zero point offset affects the comparison result of the comparator, thereby affecting the use reliability of the switching power supply.

Disclosure of Invention

An embodiment of the application aims to provide a switching power supply and a computing device, which are used for correcting zero offset of a comparator and improving use reliability of the switching power supply.

In order to achieve the above object, the following technical scheme is provided:

in one aspect, embodiments of the present application provide a switching power supply. The switching power supply comprises a power factor correction circuit, a control circuit and a control signal adjusting circuit. The power factor correction circuit comprises a first inductor, a first switching tube, a second switching tube and a first capacitor. The first end of the first inductor is electrically connected with the first end of the external power supply. The second end of the first inductor, the first end of the first switching tube and the second end of the second switching tube are electrically connected. The second end of the first switch tube and the first end of the first capacitor are electrically connected with the second end of the external power supply. The first end of the second switch tube and the second end of the first capacitor are electrically connected with the second end of the external power supply. The control circuit comprises a first control signal output end, a second control signal output end, a reference compensation signal output end and a control signal adjustment input end. The first control signal output end is electrically connected with the control end of the first switch tube. The second control signal output end is electrically connected with the control end of the second switching tube. The first control signal output end is used for outputting a first control signal, and the first control signal is used for controlling the on or off of the first switching tube. The second control signal output end is used for outputting a second control signal, and the second control signal is used for controlling the on or off of the second switching tube. The control signal adjusting circuit includes a sampling unit, a reference voltage generating unit, and a comparator. The input end of the sampling unit is electrically connected with the first inductor. The output end of the sampling unit is electrically connected with the first input end of the comparator. The output end of the reference voltage generating unit is electrically connected with the second input end of the comparator. The output end of the comparator is electrically connected with the control signal adjustment input end of the control circuit. The control signal adjusting circuit is used for adjusting the first control signal and the second control signal based on the current signal of the first inductor. The reference compensation signal output end of the control circuit is electrically connected with the input end of the reference voltage generating unit. The control circuit is used for generating a reference compensation signal. The reference voltage generated by the reference voltage generating unit is adjusted based on the reference compensation signal.

In the embodiment of the application, the input of sampling unit is connected with first inductance electricity, and sampling unit's output is connected with the first input of comparator electricity for sampling unit can gather the current signal of first inductance, and can be when the negative current flows through first inductance, based on the negative current that flows through first inductance and generate voltage signal.

The first input end of the comparator is electrically connected with the output end of the sampling unit, and the second input end of the comparator is electrically connected with the output end of the reference voltage generating unit, so that the comparator can compare the voltage value of the voltage signal generated by the sampling unit based on the negative current value flowing through the first inductor with the voltage value of the reference voltage generated by the reference voltage generating unit, and different comparison results can be output according to the relation between the voltage value and the voltage value of the reference voltage.

The control signal adjustment input end of the control circuit is electrically connected with the output end of the comparator, so that the control circuit can acquire a comparison result of the comparator, and determine the relation between the negative current value flowing through the first inductor and a set negative current threshold (such as a first set negative current threshold or a second set negative current threshold) based on the comparison result, so that the first control signal can be adjusted when the negative current value flowing through the first inductor reaches the first set negative current threshold, and the first switching tube can be controlled to be disconnected; and when the negative current value flowing through the first inductor reaches a second set negative current threshold value, the second control signal can be adjusted to control the second switching tube to be switched off, so that the negative current value flowing through the first inductor can be controlled.

The reference compensation signal output end of the control circuit is electrically connected with the input end of the reference voltage generating unit, so that the reference compensation signal generated by the control circuit can adjust the reference voltage generated by the reference voltage generating unit, and therefore the voltage value of the second input end of the comparator can be adjusted, the comparison result of the comparator is adjusted, the zero point offset of the comparator is corrected, and the risk of hard turn-on of the first switching tube and the second switching tube is reduced on the basis of improving the power supply efficiency of the power factor correction circuit and reducing the THDi of the power factor correction circuit; and the negative current value flowing through the first inductor when the output voltage of the external power supply is in the positive half cycle can be equal to the negative current value flowing through the first inductor when the output voltage of the external power supply is in the negative half cycle, so that the direct current bias of the input current of the power factor correction circuit is reduced, and the use reliability of the power factor correction circuit is improved.

In one implementation, the control circuit is configured to generate the reference compensation signal and includes control circuitry configured to determine a duty cycle of the reference compensation signal based on a zero of the comparator. By the arrangement, the reference compensation signal generated by the control circuit can correct zero offset of the comparator, accuracy and reliability of the switching power supply are improved, power supply efficiency of the power factor correction circuit is improved, and the risk of DC offset of the power factor correction circuit is reduced.

In one implementation, the control circuit further includes a feedback signal input and a zero detection signal output. The output end of the comparator is electrically connected with the feedback signal input end of the control circuit. The zero point detection signal output end of the control circuit is electrically connected with the input end of the reference voltage generating unit. The control circuit is used for determining the duty ratio of the reference compensation signal based on the zero point of the comparator, and comprises: the control circuit is used for: a zero point detection signal is generated. And under the condition that the duty ratio of the control zero point detection signal is continuously increased from the minimum value to the maximum value and then continuously decreased from the maximum value to the minimum value in a preset duty ratio range, acquiring a first signal output by the comparator. A duty cycle of the reference compensation signal is determined based on the first signal. By the arrangement, the control circuit can automatically find the zero point of the comparator, the compensation requirements for different comparators are met, and the accuracy and the reliability of the switching power supply are improved. And moreover, the control circuit can automatically correct zero offset of the comparator, so that the use convenience of the switching power supply is improved. In addition, the control circuit searches the zero point of the comparator by controlling the change of the duty ratio of the zero point detection signal, a complex hardware structure is not needed, and the cost of the switching power supply is reduced.

In one implementation, a control circuit is configured to determine a duty cycle of a reference compensation signal based on a first signal, comprising: the control circuit is used for: in the case where the first signal is converted from the first level signal to the second level signal, a first duty ratio of the zero point detection signal is acquired. In the case where the first signal is converted from the second level signal to the first level signal, a second duty ratio of the zero point detection signal is acquired. The duty cycle of the reference compensation signal is calculated based on the first duty cycle of the zero detection signal and the second duty cycle of the zero detection signal. By the arrangement, the accuracy of the control circuit in determining the zero point of the comparator can be improved, so that the accuracy of the duty ratio of the obtained reference compensation signal is improved, the compensation effect of the reference compensation signal on zero point offset of the comparator is improved, and the use accuracy and reliability of the switching power supply are improved.

In one implementation, a control circuit for calculating a duty cycle of a reference compensation signal based on a first duty cycle and a second duty cycle includes: the control circuit is used for: an average value of the first duty ratio of the zero point detection signal and the second duty ratio of the zero point detection signal is calculated, and the average value is used as the duty ratio of the reference compensation signal. By the arrangement, the accuracy of the control circuit in determining the zero point of the comparator can be improved, so that the accuracy of the duty ratio of the obtained reference compensation signal is improved, the accuracy of the reference compensation signal in compensating the zero point offset of the comparator is improved, and the accuracy and the reliability of the switching power supply are improved.

In some examples, the absolute value of the difference of any one of the preset duty cycle ranges from the reference duty cycle is less than or equal to 20%. By the arrangement, the overlarge range of the preset duty ratio can be avoided, so that the time required by the control circuit for searching the zero point of the comparator is shortened, and the efficiency of the control circuit when searching the zero point of the comparator is improved.

In one possible approach, the preset duty cycle ranges from 30% to 70%. By the arrangement, the excessively large range of the preset duty ratio is avoided, so that the time required by the control circuit for searching the zero point of the comparator is shortened, and the efficiency of the control circuit when searching the zero point of the comparator is improved; in addition, the condition that the range of the preset duty ratio is too small is avoided, so that the condition that the duty ratio of the reference compensation signal cannot be determined in the range of the preset duty ratio by the control circuit is avoided, the zero offset of the comparator can be compensated by the control circuit, and the use reliability of the switching power supply is improved.

In one implementation, the control signal adjustment circuit further includes a filtering unit and a digital-to-analog conversion unit. The reference compensation signal output end of the control circuit is electrically connected with the input end of the filtering unit. The output end of the filtering unit is electrically connected with the input end of the digital-to-analog conversion unit. The output end of the digital-to-analog conversion unit is electrically connected with the input end of the reference voltage generation unit. The digital-to-analog conversion unit is arranged in the digital-to-analog conversion unit, the reference compensation signal output by the reference compensation signal output end of the control circuit can be filtered by the filtering unit, the filtered reference compensation signal can be sent to the digital-to-analog conversion unit, the influence of noise in the reference compensation signal on the digital-to-analog conversion unit and the comparator is reduced, and the reliability of the switching power supply is improved. Further, digital-analog conversion can be realized, so that the reference compensation signal can be converted into the reference compensation voltage, so that the reference compensation voltage or the zero point detection voltage can adjust the output voltage of the reference voltage generating unit.

In one implementation, the digital-to-analog conversion unit includes a first resistor and a second capacitor. The first end of the first resistor and the first end of the second capacitor are electrically connected with the input end of the reference voltage generating unit, and the second end of the first resistor and the second end of the second capacitor are grounded. The arrangement enables the first Resistor and the second capacitor to be connected in parallel to form an RC (Resistor-Capacitance circuit, chinese name: resistor-capacitor circuit) circuit, so that the RC circuit can convert an input reference compensation signal into an analog voltage (reference compensation voltage), and the reference compensation voltage can adjust the reference voltage generated by the reference voltage generating unit to correct zero offset of the comparator and improve the use reliability of the switching power supply.

In one implementation, the reference voltage generating unit includes a second resistor, a third resistor, a first voltage source, and a second voltage source. The first end of the second resistor is electrically connected with the first end of the third resistor. The second end of the second resistor is electrically connected with the output end of the first voltage source. The second end of the third resistor is electrically connected with the output end of the second voltage source. By the arrangement, the reference voltage generating unit can output the reference voltage in a resistor voltage division mode, and the circuit structure of the reference voltage generating unit is simplified.

In one implementation, the power factor correction circuit includes a second inductor, a third switching tube, and a fourth switching tube; the first end of the second inductor is electrically connected with the first end of the external power supply; the second end of the second inductor, the first end of the third switching tube and the second end of the fourth switching tube are electrically connected; the second end of the third switch tube and the first end of the first capacitor are electrically connected with the second end of the external power supply; the first end of the fourth switching tube and the second end of the first capacitor are electrically connected with the second end of the external power supply; the control circuit also comprises a third control signal output end and a fourth control signal output end; the third control signal output end is electrically connected with the control end of the third switching tube; the fourth control signal output end is electrically connected with the control end of the fourth switching tube; the third control signal output end is used for outputting a third control signal, and the third control signal is used for controlling the on or off of the third switching tube; the fourth control signal output end is used for outputting a fourth control signal, and the fourth control signal is used for controlling the on or off of the fourth switching tube. In the power factor correction circuit, the output power of the power factor correction circuit is increased by sampling the multiphase staggered parallel boost circuit, so that the output power of the switching voltage is improved, and the load capacity is improved.

In one implementation, the number of the first switches is two, and the two first switches are connected in parallel; the two second switches are connected in parallel; two third switches are connected in parallel; the number of the fourth switches is two, and the two fourth switches are connected in parallel. By arranging the circuit structure with the two switching tubes connected in parallel, the conduction loss of the switching tubes can be reduced, and therefore the efficiency of the power factor correction circuit is improved. In addition, the circuit structure that two switching tubes are connected in parallel is arranged, so that the two switches can share current. Compared with a switch tube with large current carrying capacity, the cost can be reduced by selecting two switch tubes with smaller current carrying capacity.

In yet another aspect, embodiments of the present application provide a computing device. The computing device includes a switching power supply and a load as described above. The switching power supply is electrically connected with the load and is used for supplying power to the load.

The computing device provided by the embodiment of the application includes the switching power supply described above, so that the computing device has all the beneficial effects described above, and is not described herein again.

Drawings

FIG. 1 is a schematic diagram of a computing device provided in some embodiments of the present application;

FIG. 2 is a schematic diagram of a computing device according to further embodiments of the present application;

Fig. 3 is a circuit configuration diagram of a first power factor correction circuit according to an embodiment of the present application;

fig. 4 is a schematic circuit diagram of a second power factor correction circuit according to an embodiment of the present application;

fig. 5 is a schematic circuit diagram of a third power factor correction circuit according to an embodiment of the present application;

fig. 6 is a schematic circuit diagram of a fourth power factor correction circuit according to an embodiment of the present application;

fig. 7 is a schematic circuit diagram of a fifth power factor correction circuit according to an embodiment of the present application;

FIG. 8 is a schematic diagram illustrating a relationship between inductor current and input voltage according to an embodiment of the present disclosure;

FIG. 9 is a schematic diagram illustrating a relationship between an inductor current and an input voltage according to another embodiment of the present disclosure;

fig. 10 is a schematic structural diagram of a switching power supply according to an embodiment of the present application;

fig. 11 is a schematic structural diagram of a switching power supply according to other embodiments of the present disclosure;

fig. 12 is a schematic structural diagram of a switching power supply according to still other embodiments of the present application;

fig. 13 is a schematic circuit diagram of a digital-to-analog conversion unit and a reference voltage generating unit according to some embodiments of the present application;

fig. 14 is a schematic diagram of correspondence between a zero detection signal and a first signal provided in an embodiment of the present application;

Fig. 15 is a schematic structural diagram of a switching power supply according to still other embodiments of the present application.

Detailed Description

The following description of some embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments provided herein are within the scope of the present application.

Throughout the specification and claims, unless the context requires otherwise, the word "comprise" and its other forms such as the third person referring to the singular form "comprise" and the present word "comprising" are to be construed as open, inclusive meaning, i.e. as "comprising, but not limited to. In the description of the specification, the terms "one embodiment", "some embodiments", "example embodiment", "example", "specific example", or "some examples" and the like are intended to indicate that a particular feature, structure, material, or characteristic related to the embodiment or example is included in at least one embodiment or example of the present application. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.

The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the embodiments of the present application, unless otherwise indicated, the meaning of "a plurality" is two or more.

At least one of "A, B and C" has the same meaning as at least one of "A, B or C," both include the following combinations of A, B and C: a alone, B alone, C alone, a combination of a and B, a combination of a and C, a combination of B and C, and a combination of A, B and C.

"A and/or B" includes the following three combinations: only a, only B, and combinations of a and B.

As used herein, "parallel", "perpendicular", "equal" includes the stated case as well as the case that approximates the stated case, the range of which is within an acceptable deviation range as determined by one of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., limitations of the measurement system). For example, "parallel" includes absolute parallel and approximately parallel, where the acceptable deviation range for approximately parallel may be, for example, a deviation within 5 °; "vertical" includes absolute vertical and near vertical, where the acceptable deviation range for near vertical may also be deviations within 5 °, for example. "equal" includes absolute equal and approximately equal, where the difference between the two, which may be equal, for example, is less than or equal to 5% of either of them within an acceptable deviation of approximately equal.

Fig. 1 is a schematic structural diagram of a computing device according to some embodiments of the present application. FIG. 2 is a schematic diagram of a computing device according to further embodiments of the present application.

As shown in fig. 1 and 2, embodiments of the present application provide a computing device 300. By way of example, computing device 300 has processing, computing, communication, and like functions. In some examples, computing device 300 is a server, a switch, a computer, or the like. Embodiments of the present application do not further limit the variety of computing devices 300.

In some examples, as shown in fig. 1 and 2, computing device 300 includes a load 310 and a switching power supply 200. The switching power supply 200 is electrically connected to the load 310, and the switching power supply 200 is configured to supply power to the load 310.

As illustrated in fig. 1, for example, an input terminal 200a of the switching power supply 200 is electrically connected to the external power supply 400, and an output terminal 200b of the switching power supply 200 is electrically connected to the load 310, so that the switching power supply 200 can supply power to the load 310. The external power source 400 is, for example, an ac power source, such as 220V or 380V mains.

By way of example, the load 310 includes processing chips such as a CPU (English full name: central Processing Unit, chinese name: central processor), a GPU (English full name: graphics Processing Unit, chinese name: graphics processor), memory, a network card, a fan, a hard disk, and the like. The switching power supply 200 can convert an ac voltage provided from the external power supply 400 into a stable dc voltage so that the load 310 can normally operate. In some examples, the voltage value at the output 200b of the switching power supply 200 can vary with the variation of the operating power of the load 310, meeting the operating requirements of the load 310 under different operating conditions.

In some examples, as shown in fig. 2, the switching power supply 200 includes a power factor correction circuit 210 (english: power Factor Correction, english: PFC), a control circuit 230, and a control signal adjustment circuit 240.

Illustratively, the input 210a of the pfc circuit 210 is electrically connected to the output of the external power supply 400, and the output 210b of the pfc circuit 210 is electrically connected to the load 310. It will be appreciated that the switching power supply 200 may also include an LLC conversion circuit 220, as shown in fig. 2. The output terminal 210b of the power factor correction circuit 210 is electrically connected to the input terminal 220a of the LLC conversion circuit 220, and the output terminal 220b of the LLC conversion circuit 220 is electrically connected to the load 310.

In the embodiment of the present application, one device is "electrically connected" to another device, which may be an electrical connection between one device and another device, or may be an electrical connection between one device and another device through a third device.

It will be appreciated that the pfc circuit 210 may be capable of AC (english full: alternating Current, chinese name: alternating Current) -DC (english name: direct Current), and the LLC conversion circuit 220 may be capable of DC-DC conversion. For example, the power factor correction circuit 210 can convert the received alternating current into 400V (units: volts) direct current and output to the LLC conversion circuit 220. The LLC conversion circuit 220 can convert direct current of about 400V into direct current of 48V or direct current of 12V, etc., and deliver the direct current to the load 310, so that the load 310 can operate normally.

A control output terminal of the control circuit 230 is electrically connected to a control terminal of the pfc circuit 210; the other control output is electrically connected to a control terminal of the LLC conversion circuit 220. The control circuit is used to control the operating states of the power factor correction circuit 210 and the LLC conversion circuit 220.

An input end of the control signal adjusting circuit 240 is electrically connected with a sampling output end of the power factor correction circuit 210; the output of the control signal adjustment circuit 240 is electrically connected to the control signal adjustment input of the control circuit 230.

Fig. 3 is a circuit configuration diagram of a first power factor correction circuit according to an embodiment of the present application. Referring now to fig. 3, a power factor correction circuit 210 is illustrated.

By way of example, as shown in fig. 3, in the first embodiment, the power factor correction circuit 210 includes a booster circuit, a filter circuit, and a synchronous rectification circuit.

Specifically, the booster circuit includes a first booster circuit including a first inductor L1 and a first switching circuit 211. The filter circuit comprises a first capacitor C1.

As illustrated in fig. 3, the first switching circuit 211 includes a first switching transistor Q1 and a second switching transistor Q2. A first terminal of the first inductor L1 is electrically connected to a first terminal of the external power supply 400. The second end of the first inductor L1, the first end Q11 of the first switching tube Q1, and the second end Q22 of the second switching tube Q2 are electrically connected. The second end Q12 of the first switching tube Q1 and the first end C11 of the first capacitor C1 are electrically connected to the second end of the external power supply 400, and the first end Q21 of the second switching tube Q2 and the second end C12 of the first capacitor C1 are electrically connected to the second end of the external power supply 400.

As illustrated in fig. 3, the power factor correction circuit 210 further includes a synchronous rectification circuit including a fifth switching tube Q5 and a sixth switching tube Q6. The first end Q51 of the fifth switching tube Q5 is electrically connected to the second end Q62 of the sixth switching tube Q6, and the second end of the external power supply 400 is electrically connected to the first end Q51 of the fifth switching tube Q5 and the second end Q62 of the sixth switching tube Q6.

The second terminal Q52 of the fifth switching tube Q5 is electrically connected to the second terminal Q12 of the first switching tube Q1, so that the second terminal Q12 of the first switching tube Q1 and the first terminal C11 of the first capacitor C1 can be electrically connected to the second terminal of the external power supply 400 through the fifth switching tube Q5. The first terminal Q61 of the sixth switching tube Q6 is electrically connected to the first terminal Q21 of the second switching tube Q2, so that the first terminal Q21 of the second switching tube Q2 and the second terminal C12 of the first capacitor C1 can be electrically connected to the second terminal of the external power source 400 through the sixth switching tube Q6.

It will be appreciated that the output voltage of the external power supply 400 includes a positive half-cycle and a negative half-cycle, the voltage direction of the positive half-cycle being opposite to the voltage direction of the negative half-cycle. When the output voltage of the external power supply 400 is at the positive half cycle, the current output from the external power supply 400 flows in a direction from the first end of the external power supply 400 to the second end of the external power supply 400. When the output voltage of the external power supply 400 is at the negative half cycle, the current output from the external power supply 400 flows in a direction from the second end of the external power supply 400 to the first end of the external power supply 400.

In one output period of the external power supply 400, the power factor correction circuit 210 operates as follows:

the sixth switching tube Q6 is turned on when the output voltage of the external power supply 400 is at the positive half cycle. At this time, the second switching tube Q2 may be controlled to be turned on, and current flows in sequence in a direction from the first end of the external power supply 400, the first inductor L1, the second switching tube Q2, and the sixth switching tube Q6 to the second end of the external power supply 400. During this time, the external power supply 400 charges the first inductor L1.

After the charging time of the first inductor L1 reaches the preset time (the output voltage of the external power supply 400 is still in the positive half cycle at this time), the second switching tube Q2 is controlled to be turned off, and the first switching tube Q1 is turned on. The current flows in sequence in a direction from the first terminal of the external power supply 400, the first inductor L1, the first switching tube Q1, the first capacitor C1, the sixth switching tube Q6 to the second terminal of the external power supply 400. During this time, the first inductor L1 is discharged, and the first inductor L1 and the external power source 400 jointly charge the first capacitor C1, so that the voltage value across the first capacitor C1 remains stable or approximately stable.

It can be appreciated that, when the output voltage of the external power supply 400 is in the positive half cycle, the sixth switching tube Q6 is always turned on, and the first switching tube Q1 and the second switching tube Q2 are alternately turned on multiple times, so that the first inductor L1 can be charged and discharged multiple times.

When the output voltage of the external power supply 400 is in the negative half cycle, the fifth switching transistor Q5 is turned on. At this time, the first switching tube Q1 may be controlled to be turned on, and current flows in a direction from the second end of the external power supply 400, the fifth switching tube Q5, the first switching tube Q1, the first inductor L1 to the first end of the external power supply 400 in sequence. During this time, the external power supply 400 charges the first inductor L1.

After the charging time of the first inductor L1 reaches the preset time (the output voltage of the external power supply 400 is still in the negative half cycle at this time), the first switching tube Q1 is controlled to be turned off, and the second switching tube Q2 is controlled to be turned on. The current flows in sequence in a direction from the second terminal of the external power supply 400, the fifth switching tube Q5, the first capacitor C1, the second switching tube Q2, the first inductor L1 to the first terminal of the external power supply 400. During this time, the first inductor L1 is discharged, and the first inductor L1 and the external power source 400 can jointly charge the first capacitor C1, so that the voltage value across the first capacitor C1 remains stable or approximately stable.

It can be appreciated that, when the output voltage of the external power supply 400 is in the negative half cycle, the fifth switching tube Q5 is always turned on, and the first switching tube Q1 and the second switching tube Q2 are alternately turned on multiple times, so that the first inductor L1 can be charged and discharged multiple times.

In the embodiment of the present application, taking the first switching tube Q1 as an example, the first switching tube Q1 is turned on, that is, the first end Q11 of the first switching tube Q1 is turned on with the second end Q12 of the first switching tube Q1; the first switching tube Q1 is turned off, that is, between the first end Q11 of the first switching tube Q1 and the second end Q12 of the first switching tube Q1.

In some examples, the boost circuit further comprises a second boost circuit. The second boost circuit includes a second inductor L2 and a second switching circuit 212. The second inductor L2 is connected in parallel with the first inductor L1.

As illustrated in fig. 3, the second switching circuit 212 includes a third switching tube Q3 and a fourth switching tube Q4. The first end of the second inductor L2 is electrically connected to the first end of the external power supply 400, and the second end of the second inductor L2, the first end Q31 of the third switching tube Q3, and the second end Q42 of the fourth switching tube Q4 are electrically connected.

The second end Q32 of the third switching tube Q3 and the first end C11 of the first capacitor C1 are electrically connected with the second end of the external power supply 400; the first terminal Q41 of the fourth switching tube Q4 and the second terminal C12 of the first capacitor C1 are electrically connected to the second terminal of the external power supply 400.

It will be appreciated that the second boost circuit operates on the same principle as the first boost circuit. The operation of the first phase booster circuit may be referred to specifically, and will not be described herein.

In some examples, the number of phases of the boost circuit may be greater than two, e.g., may be a three-phase boost circuit, a four-phase boost circuit, or the like. The number of phases of the boost circuit included in the pfc circuit 210 is not further limited in the embodiments of the present application.

In some examples, the LLC conversion circuit 220 is electrically connected with the first capacitor C1. It will be appreciated that the first capacitor C1 is capable of storing energy and filtering, and that when the external power supply 400 charges the inductors (e.g. the first inductor L1 and the second inductor L2), the first capacitor C1 is capable of powering the LLC conversion circuit 220 via its stored energy. When the inductor (e.g., the first inductor L1 or the second inductor L2) discharges, the external power supply 400 and the inductor (e.g., the first inductor L1 or the second inductor L2) can jointly charge the first capacitor C1, so that the first capacitor C1 can provide a stable dc voltage for the LLC conversion circuit 220, and the operation requirement of the load 310 is satisfied.

It can be seen that, by controlling the on or off of the switching transistors in the synchronous rectification circuit, for example, controlling the on or off of the fifth switching transistor Q5 and the sixth switching transistor Q6, the output voltage of the external power supply 400 can charge the inductor (for example, the first inductor L1 or the second inductor L2) when the output voltage is in the positive half cycle or the negative half cycle; and, the output voltage of the external power supply 400 can charge the first capacitor C1 together with the inductor when in the positive half cycle or the negative half cycle.

By controlling the on or off of the switching tubes in the first switching circuit 211 (including the first switching tube Q1 and the second switching tube Q2) and the switching tubes in the second switching circuit 212 (including the third switching tube Q3 and the fourth switching tube Q4), the charging and discharging of the inductor (e.g., the first inductor L1 or the second inductor L2) can be controlled, so that the inductor can charge the first capacitor C1 together with the external power supply 400.

In some examples, the switching transistors (e.g., the first switching transistor Q1, the second switching transistor Q2, the third switching transistor Q3, the fourth switching transistor Q4, the fifth switching transistor Q5, or the sixth switching transistor Q6) shown in fig. 3 are transistors, such as MOSFETs (english full name: metal-Oxide-Semiconductor Field-Effect Transistor, chinese name: metal-Oxide semiconductor field effect transistor), gallium nitride transistors, or silicon carbide transistors.

It will be appreciated that when the switching transistors (e.g., the first switching transistor Q1, the second switching transistor Q2, the third switching transistor Q3, the fourth switching transistor Q4, the fifth switching transistor Q5, or the sixth switching transistor Q6) shown in fig. 3 are MOSFETs, the switching transistors may be N-channel MOSFETs or P-channel MOSFETs. The types of the plurality of switching tubes, for example, the first switching tube Q1, the second switching tube Q2, the third switching tube Q3, the fourth switching tube Q4, the fifth switching tube Q5, and the sixth switching tube Q6 may be the same or different. In the embodiments of the present application, the switching transistors shown in fig. 3 are all N-channel MOSFETs.

In some examples, the control circuit 230 is electrically connected to the power factor correction circuit 210 and is configured to control on or off of switching transistors (e.g., the first switching transistor Q1, the second switching transistor Q2, the third switching transistor Q3, and the fourth switching transistor Q4) in the switching circuit (e.g., the first switching circuit 211 or the second switching circuit 212), and on or off of switching transistors (e.g., the fifth switching transistor Q5 and the sixth switching transistor Q6) in the synchronous rectification circuit.

The control circuit 230 includes a first control signal output terminal electrically connected to the control terminal Q13 of the first switching transistor Q1, and a second control signal output terminal electrically connected to the control terminal Q23 of the second switching transistor Q2. The first control signal output end is used for outputting a first control signal, and the first control signal is used for controlling the on or off of the first switching tube Q1. The second control signal output end is used for outputting a second control signal, and the second control signal is used for controlling the on or off of the second switching tube Q2.

As can be appreciated, the control circuit 230 can send a first control signal to the control terminal Q13 of the first switching tube Q1 through the first control signal output terminal to control the on or off of the first switching tube Q1; and, the control circuit 230 can send a second control signal to the control terminal Q23 of the second switching tube Q2 through the second control signal output terminal to control on or off of the second switching tube Q2.

For example, when the boost circuit includes the second boost circuit, the control circuit 230 further includes a third control signal output end and a fourth control signal output end, where the third control signal output end is electrically connected to the control end Q33 of the third switching tube Q3, and is configured to output a third control signal to control on or off of the third switching tube Q3. The fourth control signal output end is electrically connected with the control end Q43 of the fourth switching tube Q4 and is used for outputting a fourth control signal so as to control the on or off of the fourth switching tube Q4.

In some examples, the control circuit 230 further includes a fifth control signal output terminal and a sixth control signal output terminal, where the fifth control signal output terminal is electrically connected to the control terminal Q53 of the fifth switching tube Q5, and is configured to output a fifth control signal to control on or off of the fifth switching tube Q5. The sixth control signal output end is electrically connected with the control end Q63 of the sixth switching tube Q6 and is used for outputting a sixth control signal to control the on or off of the sixth switching tube Q6.

In order to simplify the structure of the drawings, in the description of the present application, taking fig. 3 as an example, only the electrical connection relationship between the control circuit 230 and the control terminals of the switching tubes (including the first switching tube Q1, the second switching tube Q2, the third switching tube Q3, the fourth switching tube Q4, the fifth switching tube Q5, and the sixth switching tube Q6) is shown, and the control signal output terminals (including the first control signal output terminal, the second control signal output terminal, the third control signal output terminal, the fourth control signal output terminal, the fifth control signal output terminal, and the sixth control signal output terminal) of the control circuit 230 are not shown.

In some examples, the control signals (e.g., first, second, third, fourth, fifth, or sixth control signals) output by the control signal outputs (including the first, second, third, fourth, fifth, and sixth control signal outputs) are pulsed signals.

In some examples, the control circuit 230 is an MCU (english full: microcontroller Unit, chinese name: micro control unit) for outputting PWM (english full: pulse Width Modulation, chinese name: pulse width modulation) control signals (e.g., first control signal, second control signal, third control signal, fourth control signal, fifth control signal, or sixth control signal). The switching tubes (including the first switching tube Q1, the second switching tube Q2, the third switching tube Q3, the fourth switching tube Q4, the fifth switching tube Q5, and the sixth switching tube Q6) are turned on or off based on the received PWM signal. In some examples, the switching tube may be turned on when the control terminal of the switching tube receives a high level signal and turned off when the control terminal of the switching tube receives a low level signal.

Fig. 4 is a schematic circuit diagram of a second power factor correction circuit according to an embodiment of the present application. Fig. 5 is a schematic circuit diagram of a third power factor correction circuit according to an embodiment of the present application. Fig. 6 is a schematic circuit diagram of a fourth power factor correction circuit according to an embodiment of the present application. Fig. 7 is a schematic circuit diagram of a fifth power factor correction circuit according to an embodiment of the present application. In order to simplify the structure of the drawings, the control circuit 230 and the control signal adjustment circuit 240 are not shown in fig. 4 to 7. The following describes the power factor correction circuit 210 with reference to fig. 4 to 7.

In the second embodiment, as shown in fig. 4, the main circuit structure of the power factor correction circuit 210 is the same as the structure of the power factor correction circuit 210 shown in fig. 3, except for the structures of the first switching tube Q1, the second switching tube Q2, the third switching tube Q3, and the fourth switching tube Q4.

As shown in fig. 4, the number of the first switching tubes Q1 is two, wherein the first switching tubes Q1 include a first switching tube Q1a and a second first switching tube Q1b, and the first switching tube Q1a and the second first switching tube Q1b are connected in parallel. It will be appreciated that when the first switching tube Q1 is turned on, both the first switching tube Q1a and the second first switching tube Q1b are turned on. When the first switching tube Q1 is turned off, both the first switching tube Q1a and the second first switching tube Q1b are turned off.

For example, the control terminal of the first switching tube Q1a and the control terminal of the second first switching tube Q1b are electrically connected to the first control signal output terminal (e.g., the first control signal output terminal and the second first control signal output terminal) of the control circuit (not shown in fig. 4), respectively, so that the control circuit can control the on or off of the first switching tube Q1a and the second first switching tube Q1b.

By providing the first switching tube Q1a and the second first switching tube Q1b in parallel, the conduction loss of the first switching tube Q1 can be reduced, thereby improving the efficiency of the power factor correction circuit 210. In addition, the first switching tube Q1a and the second first switching tube Q1b are arranged in parallel, so that the first switching tube Q1a and the second first switching tube Q1b can share the current flowing through the first switching tube Q1.

For example, when the current flowing through the first switching transistor Q1 is 10A (unit: ampere), two switching transistors having a current capacity of 5A may be selected as the first switching transistor Q1a and the second first switching transistor Q1b. Compared with selecting a switching tube with the current-carrying capacity of 10A as the first switching tube Q1, the cost can be reduced by selecting two switching tubes with smaller current-carrying capacities.

That is, the cost of the first switching tube Q1 can be relatively reduced by adopting two first switching tubes Q1 which receive a small current, compared to directly adopting one first switching tube Q1 which receives a large current.

Similarly, as shown in fig. 4, the second switching transistors Q2 are two, and the second switching transistor Q2 includes a first second switching transistor Q2a and a second switching transistor Q2b, and the first second switching transistor Q2a and the second switching transistor Q2b are connected in parallel. It will be appreciated that when the second switching transistor Q2 is turned on, both the first second switching transistor Q2a and the second switching transistor Q2b are turned on. When the second switching tube Q2 is turned off, both the first and second switching tubes Q2a and Q2b are turned off.

For example, the control terminal of the first second switching tube Q2a and the control terminal of the second switching tube Q2b are electrically connected to the second control signal output terminal (e.g., the first second control signal output terminal and the second control signal output terminal) of the control circuit (not shown in fig. 4), respectively, so that the control circuit can control the on or off of the first second switching tube Q2a and the second switching tube Q2 b.

Similarly, as shown in fig. 4, the third switching tube Q3 includes a first third switching tube Q3a and a second third switching tube Q3b, and the first third switching tube Q3a and the second third switching tube Q3b are connected in parallel. It will be appreciated that when the third switching tube Q3 is turned on, both the first third switching tube Q3a and the second third switching tube Q3b are turned on. When the third switching tube Q3 is turned off, both the first third switching tube Q3a and the second third switching tube Q3b are turned off.

For example, the control terminal of the first third switching tube Q3a and the control terminal of the second third switching tube Q3b are electrically connected to third control signal output terminals (e.g., the first third control signal output terminal and the second third control signal output terminal) of a control circuit (not shown in fig. 4), respectively, so that the control circuit can control on or off of the first third switching tube Q3a and the second third switching tube Q3 b.

Similarly, as shown in fig. 4, the fourth switching tube Q4 includes a first fourth switching tube Q4a and a second fourth switching tube Q4b, and the first fourth switching tube Q4a and the second fourth switching tube Q4b are connected in parallel. It will be appreciated that when the fourth switching tube Q4 is turned on, both the first fourth switching tube Q4a and the second fourth switching tube Q4b are turned on. When the fourth switching tube Q4 is turned off, both the first fourth switching tube Q4a and the second fourth switching tube Q4b are turned off.

For example, the control terminal of the first fourth switching tube Q4a and the control terminal of the second fourth switching tube Q4b are electrically connected to fourth control signal output terminals (e.g., the first fourth control signal output terminal and the second fourth control signal output terminal) of a control circuit (not shown in fig. 4), respectively, so that the control circuit can control on or off of the first fourth switching tube Q4a and the second fourth switching tube Q4 b.

In the third embodiment, as shown in fig. 5, the main circuit configuration of the power factor correction circuit 210 is the same as the power factor correction circuit 210 shown in fig. 4, except that the power factor correction circuit 210 further includes a thermistor Ra and a relay J.

As shown in fig. 5, the thermistor Ra is connected in series with the first capacitor C1, and the relay J is connected in parallel with the thermistor Ra. It is understood that the thermistor Ra has a positive temperature coefficient (english: positive Temperature Coefficient, english: PTC) and the resistance of the thermistor Ra can be increased as the temperature increases.

The power factor correction circuit 210 gradually increases current and can flow through the first capacitor C1 in an initial stage of starting. The temperature of the thermistor Ra increases due to the large current value, so that the resistance value of the thermistor Ra increases. At this time, the relay J is turned off so that the thermistor Ra can protect the first capacitor C1 and the device electrically connected between the external power supply 400 and the pfc circuit 210, reducing the risk of the first capacitor C1 and the device electrically connected between the external power supply 400 and the pfc circuit 210 being damaged. The power factor correction circuit 210 is capable of charging an inductor (e.g., the first inductor L1 or the second inductor L2) by the external power supply 400 or the inductor (e.g., the first inductor L1 or the second inductor L2) and the external power supply 400 are capable of jointly charging the first capacitor C1 in steady state operation. At this time, the relay J is closed so that the relay J can short-circuit the thermistor Ra, and a current flows through the line of the relay J, reducing the influence of the thermistor Ra on the efficiency of the power factor correction circuit 210.

When computing device 300 is struck by lightning, an inrush current may be generated. The surge protection circuit (not shown) has limited effect on absorbing surge energy, and residual energy flows to the pfc circuit 210. By way of example, the surge current may flow in either a direction from the first end of the external power supply 400 to the second end of the external power supply 400 (forward surge current) or a direction from the second end of the external power supply 400 to the first end of the external power supply 400 (reverse surge current).

In the fourth embodiment, as shown in fig. 6, the main circuit structure of the power factor correction circuit 210 is the same as the structure of the power factor correction circuit 210 shown in fig. 5, except that the power factor correction circuit 210 further includes a first diode D1 and a second diode D2.

As shown in fig. 6, the anode of the first diode D1 and the cathode of the second diode D2 are electrically connected to the first terminal of the external power supply 400, the cathode of the first diode D1 is electrically connected to the second terminal Q52 of the fifth switching tube Q5, and the anode of the second diode D2 is electrically connected to the second terminal of the external power supply 400.

In this way, when forward surge current flows into the pfc circuit 210, most of the surge current flows in sequence along the direction from the first end of the external power supply 400, the first diode D1, the first capacitor C1, and the sixth switching tube Q6 to the second end of the external power supply 400 under the blocking effect of the inductor (including the first inductor L1 and the second inductor L2), the first diode D1 can limit the flow path of the surge current, so that the risk that the surge current flows to other devices of the pfc circuit 210 is reduced, the first diode D1 can play an anti-surge role, the risk that other devices of the pfc circuit 210 are damaged is reduced, and the reliability of the pfc circuit 210 is improved.

When reverse surge current flows into the pfc circuit 210, most of the surge current flows in sequence along the direction from the second end of the external power supply 400, the fifth switching tube Q5, the first capacitor C1, and the second diode D2 to the first end of the external power supply 400 under the blocking effect of the inductor (including the first inductor L1 and the second inductor L2), the second diode D2 can limit the flow path of the surge current, so that the risk that the surge current flows to other devices of the pfc circuit 210 is reduced, the second diode D2 can play an anti-surge role, the risk that other devices of the pfc circuit 210 are damaged is reduced, and the use reliability of the pfc circuit 210 is improved.

In some examples, as shown in fig. 6, the power factor correction circuit 210 further includes a fourth resistor R4, one end of the fourth resistor R4 is electrically connected to the first end of the external power supply 400, and the other end is electrically connected to the anode of the first diode D1 and the cathode of the second diode D2. By way of example, the fourth resistor R4 is a sampling resistor, and by sampling the current flowing through the fourth resistor R4, the current value of the surge current (for example, the forward surge current or the reverse surge current) can be obtained in time, so that the power factor correction circuit 210 can reliably prevent the surge.

In the fifth embodiment, as shown in fig. 7, the main circuit configuration of the power factor correction circuit 210 is the same as that of the power factor correction circuit 210 shown in fig. 6, except that the fuse 201 and the common mode inductance 202 of the switching power supply 200 are shown.

Illustratively, as shown in fig. 7, the switching power supply 200 further includes a fuse 201 and a common mode inductance 202. A first end of the fuse 201 is electrically connected to a first end of the external power supply 400, and a second end of the fuse 201 is electrically connected to a first end of the common mode inductance 202; a second terminal of the common mode inductor 202 is electrically connected to a first input terminal of the pfc circuit 210; a third terminal of the common-mode inductor 202 is electrically connected to a second input terminal of the pfc circuit 210, and a fourth terminal of the common-mode inductor 202 is electrically connected to a second output terminal of the external power supply 400.

The fuse 201 plays a role of overcurrent protection, among others. The common mode inductor 202 is located between the fuse 201 and the pfc circuit 210, and functions as a filter, so that noise of an electrical signal input into the pfc circuit 210 can be reduced, and reliability of the pfc circuit 210 can be improved.

As can be appreciated, when the output voltage of the external power supply 400 is in the positive half cycle, the current charged by the inductor (e.g., the first inductor L1 or the second inductor L2) to the first capacitor C1 flows in the direction from the first end of the external power supply 400 to the second end of the external power supply 400; conversely, when the output voltage of the external power supply 400 is in the negative half cycle, the current that the inductor charges the first capacitor C1 flows in the direction from the second end of the external power supply 400 to the first end of the external power supply 400. That is, the direction of the current flowing through the inductor to charge the first capacitor C1 is the same as the direction of the current flowing through the external power supply 400. For example, the current flowing through the inductor when charging the inductor to the first capacitor C1 may be referred to as a positive current.

When the inductor (e.g., the first inductor L1 or the second inductor L2) discharges, the energy stored on the inductor gradually decreases and the energy stored on the first capacitor C1 gradually increases over time. It will be appreciated that when the energy on the inductor gradually decreases to zero, the first capacitor C1 will discharge to the inductor, and the current discharged by the first capacitor C1 to the inductor will flow through the inductor in the opposite direction (the direction opposite to the direction of the current output by the external power supply 400). For example, the current flowing through the inductor when the first capacitor C1 is discharged to the inductor may be referred to as a negative current.

As can be appreciated, when the output voltage of the external power supply 400 is at the negative half cycle, a negative current flows in a direction from the first end of the external power supply 400 to the second end of the external power supply 400; when the output voltage of the external power supply 400 is at the positive half cycle, a negative current flows in a direction from the second end of the external power supply 400 to the first end of the external power supply 400.

Fig. 8 is a schematic diagram of a relationship between inductor current and input voltage according to an embodiment of the present disclosure. Fig. 9 is a schematic diagram of a relationship between an inductor current and an input voltage according to another embodiment of the present disclosure.

As shown in fig. 8 and 9, the abscissa shows time t, and the ordinate shows voltage V and current I. It can be understood that the voltage V is positive and represents the output voltage of the external power supply 400 in the positive half cycle, and the voltage V is negative and represents the output voltage of the external power supply 400 in the negative half cycle. The current I represents positive current flowing through the inductor in the positive number time, and the current I represents negative current flowing through the inductor in the negative number time. The line a is the voltage value at both ends of the first capacitor C1, the curve b is the output voltage variation curve of the external power supply 400, and the curve C is the current variation curve of the inductor (first inductor L1).

The inductor is charged and discharged a plurality of times during one output period of the external power source 400. As shown in fig. 8, at the zero crossing point of the output voltage of the external power supply 400, the difference between the output voltage of the external power supply 400 and the voltage across the first capacitor C1 is the largest, resulting in the largest negative current value flowing through the inductor (first inductor L1) when the first capacitor C1 discharges to the inductor (first inductor L1). As the output voltage of the external power supply 400 gradually increases, the difference between the output voltage of the external power supply 400 and the voltage across the first capacitor C1 gradually decreases, so that the negative current flowing through the inductor (first inductor L1) when the first capacitor C1 discharges to the inductor gradually decreases. As shown in fig. 8, in one output period of the external power supply 400, a negative current value flowing through the inductor (first inductor L1) varies with a variation of the output voltage of the external power supply 400.

It will be appreciated that a negative current may flow through the switching tube (e.g., the first switching tube Q1, the second switching tube Q2, the third switching tube Q3, or the fourth switching tube Q4) in the switching circuit (including the first switching circuit 211 and the second switching circuit 212). When the negative current is large, the loss of the switching tube in the switching circuit is increased, thereby affecting the power efficiency of the pfc circuit 210, and the THDi (english full name: total Harmonic Current Distortion, chinese name: current harmonic total distortion rate) of the pfc circuit 210 is increased.

In some implementations, the control circuit 230 may control the operating states of the switching transistors (including the first switching transistor Q1 and the second switching transistor Q2) in the first switching circuit 211 and the switching transistors (including the third switching transistor Q3 and the fourth switching transistor Q4) in the second switching circuit 212, so as to control the negative current value flowing through the inductor (including the first inductor L1 and the second inductor L2).

Taking the example that the output voltage of the external power supply 400 is in the positive half cycle and the first inductor L1 is discharged, the sixth switching tube Q6 is turned on. When the first switching tube Q1 is turned on, the first capacitor C1 discharges to the first inductor L1, so that the control circuit 230 controls the first switching tube Q1 to be turned off when the negative current value flowing through the first inductor L1 reaches the first set negative current threshold value, so that the first capacitor C1 cannot continue to discharge to the first inductor L1, and the negative current value flowing through the first inductor L1 can be controlled.

Taking the example that the output voltage of the external power supply 400 is in the negative half cycle and the first inductor L1 is discharged, the fifth switching tube Q5 is turned on. When the second switching tube Q2 is turned on and the first capacitor C1 discharges to the first inductor L1, the control circuit 230 controls the second switching tube Q2 to be turned off when the negative current value flowing through the first inductor L1 reaches the second set negative current threshold value, so that the first capacitor C1 cannot continue to discharge to the first inductor L1, and the negative current value flowing through the first inductor L1 can be controlled.

Similarly, taking the example that the output voltage of the external power supply 400 is in the positive half cycle and the second inductor L2 is discharged, the sixth switching tube Q6 is turned on. Under the condition that the third switching tube Q3 is turned on, when the first capacitor C1 discharges to the second inductor L2, so that the negative current flowing through the second inductor L2 reaches the first set negative current threshold, the control circuit 230 controls the third switching tube Q3 to be turned off, so that the first capacitor C1 cannot continue to discharge to the second inductor L2, and thus the negative current flowing through the second inductor L2 can be controlled.

Taking the example that the output voltage of the external power supply 400 is in the negative half cycle and the second inductor L2 is discharged, the fifth switching tube Q5 is turned on. Under the condition that the fourth switching tube Q4 is turned on, when the first capacitor C1 discharges to the second inductor L2, so that the negative current value flowing through the second inductor L2 reaches the second set negative current threshold, the control circuit 230 controls the fourth switching tube Q4 to be turned off, so that the first capacitor C1 cannot continue to discharge to the second inductor L2, and thus the negative current value flowing through the second inductor L2 can be controlled.

Taking an example that the control circuit 230 controls the switching transistors (including the first switching transistor Q1 and the second switching transistor Q2) in the first switching circuit 211 to be turned off when the negative current value flowing through the first inductor L1 reaches the set negative current threshold (the first negative current threshold or the second negative current threshold), as shown in fig. 9, the negative current value flowing through the first inductor L1 can be equal in different charge-discharge cycles of the first inductor L1 (as shown by a curve c in fig. 9), so as to improve the power efficiency of the power factor correction circuit 210 and reduce the THDi of the power factor correction circuit 210.

It will be appreciated that when the output voltage of the external power supply 400 is at a positive half cycle, the negative current flows in the direction from the second end of the external power supply 400 to the first end of the external power supply 400, and the negative current is negative, the first set negative current threshold is also negative. When the output voltage of the external power supply 400 is in the positive half cycle, the negative current flows in the direction from the first end of the external power supply 400 to the second end of the external power supply 400, and at this time, the negative current is positive, and the second set negative current threshold is also positive. For example, the absolute value of the first set negative current threshold and the absolute value of the second set negative current threshold may be equal. The embodiment of the application does not further limit the value of the absolute value of the first set negative current threshold value and the absolute value of the second set negative current threshold value.

Fig. 10 is a schematic structural diagram of a switching power supply according to some embodiments of the present application. Fig. 11 is a schematic structural diagram of a switching power supply according to other embodiments of the present application. The control circuit 230 and the control signal adjustment circuit 240 in the switching power supply 200 are exemplified below with reference to fig. 10 and 11.

In some examples, as shown in fig. 10 and 11, the control signal adjustment circuit 240 includes a sampling unit 110, a reference voltage generation unit 120, and a comparator 130. Wherein the input 110a of the sampling unit 110 is electrically connected to a first inductance L1 (not shown in fig. 10). The output 110b of the sampling unit 110 is electrically connected to a first input 130a of the comparator 130. The output terminal 120b of the reference voltage generating unit 120 is electrically connected to the second input terminal 130b of the comparator 130.

In some examples, as shown in fig. 10, the switching power supply 200 further includes a zero-point offset compensation circuit 100, and it is understood that the zero-point offset compensation circuit 100 is used to compensate for the zero-point offset of the comparator 130. The zero-point offset compensation circuit 100 includes a control circuit 230. For example, as shown in fig. 11, the control circuit 230 of the switching power supply 200 may be multiplexed as the zero-point offset compensation circuit 100.

The control circuit 230 includes a control signal adjustment input, and the output 130c of the comparator 130 is electrically connected to the control signal adjustment input of the control circuit 230. The control signal adjustment circuit 240 is configured to adjust the first control signal and the second control signal based on the current signal of the first inductor L1.

In order to simplify the structure of the drawings, in the description of the present application, taking fig. 10 and 11 as examples, only the electrical connection relationship between the control circuit 230 and the output terminal 130c of the comparator 130 is shown, and the control signal adjustment input terminal of the control circuit 230 is not shown.

As can be appreciated, the input 110a of the sampling unit 110 is electrically connected to the first inductor L1, so that the sampling unit 110 can collect the current signal of the first inductor L1. For example, the sampling unit 110 can collect a current direction flowing through the first inductor L1 and a current value flowing through the first inductor L1.

When the power factor correction circuit 210 includes the first inductor L1 and the second inductor L2, the number of the sampling units 110 is two, wherein the input end 110a of one sampling unit 110 is electrically connected with the first inductor L1, and is used for collecting the current signal of the first inductor L1; the input end 110a of the other sampling unit 110 is electrically connected to the second inductor L2, and is configured to collect a current signal of the second inductor L2.

In some examples, the sampling unit includes a fifth resistor R5 and a sixth resistor R6 (see fig. 7). The fifth resistor R5 and the sixth resistor R6 are sampling resistors, for example. The fifth resistor R5 is connected in series with the first inductor L1, and the sixth resistor R6 is connected in series with the second inductor L2. In this way, the sampling unit 110 may be electrically connected to the first inductor L1 through the fifth resistor R5, and electrically connected to the second inductor L2 through the sixth resistor R6.

As can be appreciated, the sampling unit 110 may collect the current signal (the current direction and the current value flowing through the fifth resistor R5) of the fifth resistor R5, so as to obtain the current signal (the current direction and the current value flowing through the first inductor L1) of the first inductor L1; and the current signal (the current direction and the current value flowing through the sixth resistor R6) of the sixth resistor R6 may be collected, so as to obtain the current signal (the current direction and the current value flowing through the second inductor L2) of the second inductor L2. By the arrangement, convenience in collecting current signals of the first inductor L1 and the second inductor L2 can be improved.

The embodiment of the present application takes the sampling unit 110 to collect the current signal of the first inductor L1 as an example for illustration.

For example, the sampling unit 110 may determine that the negative current flows through the first inductor L1 when the current flowing through the first inductor L1 is opposite to the current outputted from the external power supply 400. At this time, the sampling unit 110 may generate a voltage signal based on a negative current value flowing through the first inductance L1. As can be appreciated, the voltage value of the voltage signal generated by the sampling unit 110 is different according to the magnitude of the negative current flowing through the first inductor L1.

For example, when the output voltage of the external power supply 400 is at a positive half cycle and a negative current flows along the second terminal of the external power supply 400 to the first terminal of the external power supply 400, the sampling unit 110 generates a negative voltage value based on the negative current flowing through the first inductor L1. Further, the larger the negative current value flowing through the first inductance L1, the smaller the voltage value of the voltage signal generated by the sampling unit 110 (the larger the absolute value of the voltage value).

When the output voltage of the external power supply 400 is in the negative half cycle and a negative current flows along the first terminal of the external power supply 400 to the second terminal of the external power supply 400, the sampling unit 110 generates a positive number of voltage values based on the negative current flowing through the first inductor L1. Further, the larger the negative current value flowing through the first inductor L1, the larger the voltage value of the voltage signal generated by the sampling unit 110.

Since the output terminal 110b of the sampling unit 110 is electrically connected to the first input terminal 130a of the comparator 130, the sampling unit 110 can transmit a voltage signal generated based on a negative current value flowing through the first inductor L1 to the first input terminal 130a of the comparator 130, and the first input terminal 130a of the comparator 130 can receive the voltage signal generated by the sampling unit 110 based on the negative current value flowing through the first inductor L1.

As shown in fig. 10 and 11, the output terminal 120b of the reference voltage generating unit 120 is electrically connected to the second input terminal 130b of the comparator 130. As will be appreciated, the reference voltage generating unit 120 is configured to output a reference voltage, and the second input 130b of the comparator 130 is capable of receiving the reference voltage output by the output 120b of the reference voltage generating unit 120.

In some examples, as shown in fig. 11, the reference voltage generating unit 120 includes a second resistor R2, a third resistor R3, a first voltage source VCC1, and a second voltage source VCC2. The first end of the second resistor R2 is electrically connected to the first end of the third resistor R3, the second end of the second resistor R2 is electrically connected to the output end of the first voltage source VCC1, and the second end of the third resistor R3 is electrically connected to the output end of the second voltage source VCC2. As illustrated in fig. 11, the input terminal 120a of the reference voltage generating unit 120 and the output terminal 120b of the reference voltage generating unit 120 are both first terminals of the second resistor R2 (or the third resistor R3).

In some examples, the first voltage source VCC1 is used to output a first voltage (e.g., +5v or +2.5v, etc., in volts), and the second voltage source VCC2 is used to output a second voltage (e.g., -5V or-2.5V, etc.), such that the reference voltage generating unit 120 may output the reference voltage by means of resistive voltage division.

It can be understood that, by adjusting the resistances of the second resistor R2 and the third resistor R3, or adjusting the voltage values of the first voltage source VCC1 and the second voltage source VCC2, or, further, adjusting the voltage value of the input terminal 120a of the reference voltage generating unit 120, the reference voltage output by the output terminal 120b of the reference voltage generating unit 120 can be adjusted, so that the reference voltage generating unit 120 can output the reference voltages with different voltage values.

In some examples, the reference voltage output by the output terminal 120b of the reference voltage generating unit 120 is 0. In other examples, the reference voltage output from the output terminal 120b of the reference voltage generating unit 120 may be greater than 0 or less than 0.

As can be appreciated, by providing the reference voltage generating unit 120 to include the second resistor R2 and the third resistor R3, the reference voltage generating unit 120 can output the reference voltage in a resistor-divided manner, simplifying the circuit structure of the reference voltage generating unit 120.

As can be appreciated, the comparator 130 is capable of comparing the voltage signal at the first input 130a of the comparator 130 with the voltage signal at the second input 130b of the comparator 130 and generating a comparison result. That is, the comparator 130 can compare the voltage value of the voltage signal generated by the sampling unit 110 based on the negative current value flowing through the first inductance L1 with the voltage value of the reference voltage output by the reference voltage generating unit 120, and generate the comparison result. In some examples, the comparison result generated by comparator 130 may be a level signal, such as a high level signal or a low level signal.

Since the output terminal 130c of the comparator 130 is electrically connected to the control signal adjustment input terminal of the control circuit 230, the control circuit 230 can obtain the comparison result output by the comparator 130 and adjust the first control signal and the second control signal based on the comparison result.

The comparison result generated by the comparator 130 when the negative current value flowing through the first inductor L1 reaches the set negative current threshold (the first negative current threshold or the second negative current threshold) is exemplified below.

For example, when the output voltage of the external power supply 400 is in a positive half cycle and the negative current flowing through the first inductor L1 flows in a direction from the second end of the external power supply 400 to the first end of the external power supply 400, the negative current is negative, and the voltage value generated by the sampling unit 110 based on the negative current value flowing through the first inductor L1 is also negative. When the negative current value flowing through the first inductor L1 reaches the first set negative current threshold, the voltage value of the first input terminal 130a of the comparator 130 is smaller than the voltage value of the second input terminal 130b of the comparator 130, and the comparator 130 generates a first comparison result.

When the output voltage of the external power supply 400 is in a negative half cycle and a negative current flowing through the first inductor L1 flows in a direction from the first end of the external power supply 400 to the second end of the external power supply 400, the negative current is positive, and the voltage value generated by the sampling unit 110 based on the negative current value flowing through the first inductor L1 is also positive. When the negative current value flowing through the first inductor L1 reaches the second set negative current threshold, the voltage value of the first input terminal 130a of the comparator 130 is greater than the voltage value of the second input terminal 130b of the comparator 130, and the comparator 130 generates a second comparison result.

As can be appreciated, the control circuit 230 can receive the first comparison result or the second comparison result generated by the comparator 130, and adjust the first control signal according to the first comparison result, so that the first control signal can control the first switching tube Q1 to be turned off; and, the control circuit 230 can adjust the second control signal according to the second comparison result, so that the second control signal can control the second switching tube Q2 to be turned off.

The control circuit 230 adjusts the first control signal to control the first switching tube Q1 to be turned off; alternatively, the control circuit 230 adjusts the second control signal to control the second switching tube Q2 to be turned off for illustration.

Taking the example that the output voltage of the external power supply 400 is in the positive half cycle and the first inductor L1 is discharged, the first switching tube Q1 and the sixth switching tube Q6 are turned on at this time. When the first capacitor C1 discharges to the first inductor L1, so that the negative current value flowing through the first inductor L1 reaches the first set negative current threshold value, the voltage value of the first input end 130a of the comparator 130 is smaller than the voltage value of the second input end 130b of the comparator 130, the comparator 130 generates a first comparison result, the control circuit 230 can adjust the first control signal based on the first comparison result, so that the first control signal can control the first switching tube Q1 to be disconnected, and the first capacitor C1 cannot continuously discharge to the first inductor L1, so that the control signal adjusting circuit 240 can control the negative current value flowing through the first inductor L1.

Taking the example that the output voltage of the external power supply 400 is in the negative half cycle and the first inductor L1 is discharged, the second switching tube Q2 and the fifth switching tube Q5 are turned on at this time. When the first capacitor C1 discharges to the first inductor L1, so that the negative current value flowing through the first inductor L1 reaches the set negative current threshold, the voltage value of the first input end 130a of the comparator 130 is greater than the voltage value of the second input end 130b of the comparator 130, the comparator 130 generates a second comparison result, and the control circuit 230 can adjust the second control signal based on the second comparison result, so that the second control signal can control the second switching tube Q2 to be turned off, and the first capacitor C1 cannot continue to discharge to the first inductor L1, so that the control signal adjusting circuit 240 can control the negative current value flowing through the first inductor L1.

Similarly, taking the example that the output voltage of the external power supply 400 is in the positive half cycle and the second inductor L2 is discharged, the third switching tube Q3 and the sixth switching tube Q6 are turned on. When the first capacitor C1 discharges to the second inductor L2, so that the negative current flowing through the second inductor L2 reaches the set negative current threshold, the voltage value of the first input end 130a of the comparator 130 is smaller than the voltage value of the second input end 130b of the comparator 130, the comparator 130 generates a first comparison result, the control circuit 230 can adjust the third control signal based on the first comparison result, so that the third control signal can control the third switching tube Q3 to be turned off, and the first capacitor C1 cannot continue to discharge to the second inductor L2, so that the control signal adjusting circuit 240 can control the negative current flowing through the second inductor L2.

Taking the example that the output voltage of the external power supply 400 is in the negative half cycle and the second inductor L2 discharges, the fourth switching tube Q4 and the fifth switching tube Q5 are turned on. When the first capacitor C1 discharges to the second inductor L2, so that the negative current flowing through the second inductor L2 reaches the set negative current threshold, the voltage value of the first input end 130a of the comparator 130 is greater than the voltage value of the second input end 130b of the comparator 130, the comparator 130 generates a second comparison result, the control circuit 230 can adjust the fourth control signal based on the second comparison result, so that the fourth control signal can control the fourth switching tube Q4 to be turned off, and the first capacitor C1 cannot continue discharging to the second inductor L2, so that the control signal adjusting circuit 240 can control the negative current flowing through the second inductor L2.

That is, the control signal adjusting circuit 240 can obtain the negative current value flowing through the first inductor L1 through the sampling unit 110, and can send the comparison result (including the first comparison result and the second comparison result) to the control circuit 230 through the comparator 130 when the negative current value flowing through the first inductor L1 reaches the set negative current threshold (including the first negative current threshold and the second negative current value), so that the control circuit 230 can adjust the first control signal based on the first comparison result to control the first switching tube Q1 to be turned off, and the control circuit 230 can adjust the second control signal based on the second comparison result to control the second switching tube Q2 to be turned off, thereby controlling the negative current value flowing through the first inductor L1, reducing the risk of the negative current value flowing through the first inductor L1 being excessively large, reducing the conduction loss of the first switching tube Q1 and the second switching tube Q2, thereby reducing the loss of the power factor correction circuit 210, improving the efficiency of the switching power supply 200, and reducing the THDi of the switching power supply 200.

The inventor of the application finds that the implementation manner has at least the following technical problems:

first, the sampling unit typically has zero-point offset. For example, when the current flowing through the inductor (e.g., the first inductor) is zero, the sampling result of the sampling unit may be non-zero, e.g., greater than zero or less than zero. It will be appreciated that the zero offset of the sampling unit may have an effect on the comparison result of the comparator, so that the comparator has a zero offset (or zero drift).

Secondly, when the comparator is an operational amplifier, especially a differential operational amplifier, the comparator usually has an Offset Voltage (or input Offset Voltage, english name: offset Voltage). It is understood that the offset voltage is the difference between the direct voltages of the two inputs (the non-inverting input and the inverting input) that make the output voltage of the operational amplifier constant to zero. In other words, the offset voltage is considered to be the input voltage that is applied to the input ports (non-inverting input and inverting input) forcing the output voltage to zero. It will be appreciated that the offset voltage will also affect the comparison result of the comparator, so that the zero offset of the comparator occurs.

Furthermore, an error of the electric signal output by the reference voltage generating unit also affects a comparison result of the comparator, so that the comparator has zero point offset.

Zero point offset of the comparator can cause the switching circuit to be delayed or opened in advance, so that the negative current value flowing through the inductor when the power supply is in the positive half cycle is unequal to the negative current value flowing through the inductor when the power supply is in the negative half cycle.

It will be appreciated that the zero point of the comparator may be offset either upwards or downwards. Referring again to fig. 9, taking the first inductor L1 as an example, if the zero point of the comparator 130 is shifted upward, the first switching circuit 211 delays to be turned off when the output voltage of the external power supply 400 is at the positive half cycle; the first switching circuit 211 is opened in advance when the output voltage of the external power supply 400 is in the negative half cycle. Conversely, if the zero point of the comparator 130 is shifted downward, the first switching circuit 211 is turned off in advance when the output voltage of the external power supply 400 is at the positive half cycle; the first switching circuit 211 is turned off with a delay when the output voltage of the external power supply 400 is in the negative half cycle.

Taking the upward offset of the zero point of the comparator 130 as an example, the value of the first preset negative current is-2A, and the value of the second preset negative current is 2A. When the comparator 130 does not generate the zero point offset, if the output voltage of the external power supply 400 is at a positive half cycle, the comparator 130 of the control signal adjusting circuit 240 can generate a first comparison result when the negative current value flowing through the first inductor L1 reaches-2A, so that the control circuit 230 can adjust the first control signal based on the first comparison result, thereby controlling the first switching transistor Q1 to be turned off. If the output voltage of the external power supply 400 is at the negative half cycle, the comparator 130 of the control signal adjusting circuit 240 can generate the second comparison result when the negative current value flowing through the first inductor L1 reaches 2A, so that the control circuit 230 can adjust the second control signal based on the second comparison result, thereby controlling the second switching transistor Q2 to be turned off.

Since the zero point of the comparator 130 is shifted upward (for example, shifted upward by 1.5A), the comparator 130 of the control signal adjusting circuit 240 generates a first comparison result after the external power supply 400 is at a positive half cycle and the negative current value flowing through the first inductor L1 is less than-2A (for example, -3.5A), thereby causing the first switching tube Q1 to be turned off with delay; when the external power supply 400 is in the negative half cycle and the negative current value flowing through the first inductor L1 does not reach 2A (e.g., 0.5A), the comparator 130 of the control signal adjusting circuit 240 generates a second comparison result, thereby causing the second switching tube Q2 to be opened in advance.

Taking the example that the negative current flows through the first switching tube Q1, when the negative current flowing through the first switching tube Q1 is large, the conduction loss of the first switching tube Q1 increases, the efficiency of the switching power supply 200 decreases, and the THDi of the switching power supply increases.

When negative current flows through the first inductor L1 and the first switching tube Q1, if the first switching tube Q1 is turned off, the negative current value flowing through the first inductor L1 is not immediately zero, but continues to flow through the first inductor L1 via the body diode of the second switching tube Q2. When the value of the negative current is too small, the value of the negative current is reduced to zero, but the voltage value at the two ends of the second switching tube Q2 is not reduced to zero, so that the second switching tube Q2 is turned on hard.

In addition, the zero offset of the comparator 130 causes the negative current value of the external power supply 400 flowing through the inductor in the positive half cycle to be unequal to the negative current value of the external power supply 400 flowing through the inductor in the negative half cycle, which also causes the sum of the negative current value of the external power supply 400 flowing through the inductor in the positive half cycle and the negative current value of the external power supply 400 flowing through the inductor in the negative half cycle to be non-zero (e.g., greater than zero or less than zero), so that the input current of the pfc circuit 210 has dc offset, and the reliability of the pfc circuit 210 is affected.

That is, the zero point offset of the comparator 130 not only increases the conduction loss of the switching tube (e.g., the first switching tube Q1 or the second switching tube Q2), resulting in the efficiency of the switching power supply 200 being reduced and the THDi being increased, but also results in the hard turn-on of the switching tube, increasing the risk of failure of the switching tube.

In some examples, TCM (english full name: triangular Current Mode, chinese name: triangle current mode) or CRM (english full name: critical Conduction Mode, chinese name: critical conduction mode) may be used to control the operating states of the switching tubes in the pfc circuit 210.

In TCM or CRM modes, the inductance of the inductor (e.g., the first inductor L1 and the second inductor L2) is typically small, and the negative current value flowing through the inductor is typically small. The zero point offset of the comparator 130 has a larger influence on the comparison result, resulting in a decrease in power efficiency of the switching power supply 200, which affects the reliability of the switching power supply 200.

Based on this, as shown in fig. 10 and 11, in the switching power supply 200 provided in the embodiment of the present application, the control circuit 230 includes a reference compensation signal output terminal. The reference compensation signal output terminal of the control circuit 230 is electrically connected to the input terminal 120a of the reference voltage generating unit 120, and the control circuit 230 is configured to generate a reference compensation signal. The reference voltage generated by the reference voltage generating unit 120 is adjusted based on the reference compensation signal.

In order to simplify the structure of the drawings, in the description of the present application, taking fig. 10 and 11 as examples, only the electrical connection relationship between the control circuit 230 and the input terminal 120a of the reference voltage generating unit 120 is shown, and the reference compensation signal output terminal of the control circuit 230 is not shown.

As can be appreciated, since the reference compensation signal output terminal of the control circuit 230 is electrically connected to the input terminal 120a of the reference voltage generating unit 120, the reference compensation signal generated by the reference control circuit 230 can be transmitted to the input terminal 120a of the reference voltage generating unit 120, so that the reference voltage generated by the reference voltage generating unit 120, that is, the voltage value of the second input terminal 130b of the comparator 130 can be adjusted to compensate for the zero point offset of the comparator 130.

In some examples, the reference compensation signal is a pulse signal. The reference compensation signal can be converted into a reference compensation voltage, and the reference compensation voltage can be superimposed with the voltage value of the first terminal of the second resistor R2, for example, so that the reference voltage generated by the reference voltage generation unit 120 can be adjusted.

Taking the example that the output voltage of the external power supply 400 is at a positive half cycle, the zero point of the comparator 130 is shifted upward, the shift amount is 0.2mV (unit: millivolt), the reference voltage outputted from the reference voltage generating unit 120 is-1.5 mV, if the voltage value of the voltage signal obtained by converting the reverse current value flowing through the first inductor L1 by the sampling unit 110 is-1.6 mV, the voltage value (-1.6 mV) of the first input terminal 130a of the comparator 130 is smaller than the voltage value (-1.5 mV) of the second input terminal 130b of the comparator 130, and the comparator 130 should generate the first comparison result.

However, since the zero point of the comparator 130 is shifted up by 0.2mV, the comparator 130 does not generate the first comparison result when the voltage value of the first input terminal 130a of the comparator 130 is-1.6 mV. When the voltage value of the first input terminal 130a of the comparator 130 is-1.8 mV (offset upward by 0.2 mV), the comparator 130 generates the first comparison result, so that the first switching tube Q1 is turned off in a delayed manner.

At this time, the reference compensation signal generated by the control circuit 230 may adjust the reference voltage output by the reference voltage generating unit 120 to-1.3 mV, so that when the voltage value of the first input terminal 130a of the comparator 130 reaches-1.6 mV, the comparator 130 may generate a first comparison result, so that the turn-off time of the first switching tube Q1 may be the same as the turn-off time of the first switching tube Q1 when the zero point of the comparator 130 is not offset, so that the reference compensation signal may correct the zero point offset of the comparator 130.

Taking the example that the output voltage of the external power supply 400 is in the negative half cycle, the zero point of the comparator 130 is shifted upward, the offset is 0.2mV, and the reference voltage outputted from the reference voltage generating unit 120 is 1.5mV, if the voltage value of the voltage signal obtained by converting the reverse current value flowing through the first inductor L1 by the sampling unit 110 is 1.6mV, the voltage value (1.6 mV) of the first input terminal 130a of the comparator 130 is greater than the voltage value of the second input terminal 130b of the comparator 130, and the comparator 130 should generate the second comparison result.

However, since the zero point of the comparator 130 is shifted up by 0.2mV, when the voltage value of the first input terminal 130a of the comparator 130 reaches 1.4mV (shifted up by 0.2 mV), the comparator 130 generates a second comparison result, thereby causing the second switching tube Q2 to be opened in advance.

At this time, the reference compensation signal generated by the control circuit 230 may adjust the reference voltage output from the reference voltage generating unit 120 to 1.7mV. In this way, when the voltage value of the first input end 130a of the comparator 130 reaches 1.6mV, the comparator 130 generates the second comparison result, so that the turn-off time of the second switching tube Q2 can be the same as the turn-off time of the second switching tube Q2 when the zero point of the comparator 130 is not shifted, so that the reference compensation signal can correct the zero point shift of the comparator 130.

Taking the example that the output voltage of the external power supply 400 is at a positive half cycle, the zero point of the comparator 130 is shifted downward, the shift amount is 0.2mV, the reference voltage outputted by the reference voltage generating unit 120 is-1.5 mV, if the voltage value of the voltage signal obtained by converting the reverse current value flowing through the first inductor L1 by the sampling unit 110 is-1.6 mV, the voltage value (-1.6 mV) of the first input terminal 130a of the comparator 130 is smaller than the voltage value (-1.5 mV) of the second input terminal 130b of the comparator 130, and the comparator 130 should generate the first comparison result.

However, since the zero of the comparator 130 is shifted down by 0.2mV, when the voltage value of the first input terminal 130a of the comparator 130 reaches-1.4 mV (shifted down by 0.2 mV), the comparator 130 generates a first comparison result, thereby causing the first switching tube Q1 to be opened in advance.

At this time, the reference compensation signal generated by the control circuit 230 may adjust the reference voltage output from the reference voltage generating unit 120 to-1.7 mV. In this way, when the voltage value of the first input terminal 130a of the comparator 130 reaches-1.6 mV, the comparator 130 generates a first comparison result, so that the turn-off time of the first switching tube Q1 can be the same as the turn-off time of the first switching tube Q1 when the zero point of the comparator 130 is not shifted, and the reference compensation signal can correct the zero point shift of the comparator 130.

Taking the example that the power supply voltage of the external power supply 400 is in the negative half cycle, the zero point of the comparator 130 is shifted downward, the shift amount is 0.2mV, and the reference voltage outputted from the reference voltage generating unit 120 is 1.5mV, if the voltage value of the voltage signal obtained by converting the reverse current value flowing through the first inductor L1 by the sampling unit 110 is 1.6mV, the voltage value of the first input end 130a of the comparator 130 is greater than the voltage value of the second input end 130b of the comparator 130, and the comparator 130 should generate the second comparison result.

However, since the zero of the comparator 130 is shifted down by 0.2mV, the comparator 130 does not generate the second comparison result when the voltage value of the first input 130a of the comparator 130 reaches 1.6 mV. When the voltage value of the first input terminal 130a of the comparator 130 is 1.8mV (offset downward by 0.2 mV), the comparator 130 generates a second comparison result, so that the second switching tube Q2 is turned off in a delayed manner.

At this time, the reference compensation signal generated by the control circuit 230 may adjust the reference voltage output from the reference voltage generating unit 120 to 1.3mV. In this way, when the voltage value of the first input end 130a of the comparator 130 reaches 1.6mV, the comparator 130 generates the second comparison result, so that the turn-off time of the second switching tube Q2 can be the same as the turn-off time of the second switching tube Q2 when the zero point of the comparator 130 is not shifted, so that the reference compensation signal can correct the zero point shift of the comparator 130.

Fig. 12 is a schematic structural diagram of a switching power supply according to still other embodiments of the present application. A method of converting the reference compensation signal into the reference compensation voltage will be described below with reference to fig. 12.

In some examples, as shown in fig. 12, the switching power supply 200 (the zero-point offset compensation circuit 100) further includes a digital-to-analog conversion unit 140. The input terminal 140a of the digital-to-analog conversion unit 140 is electrically connected to the reference compensation signal output terminal of the control circuit 230, and the output terminal 140b of the digital-to-analog conversion unit 140 is electrically connected to the input terminal 120a of the reference voltage generation unit 120.

It is understood that the digital-to-analog conversion unit 140 can convert digital signals into analog signals, and realize DA (english full name: digital to Analog, chinese name: digital signals to analog signals) conversion. Accordingly, the input terminal 140a of the digital-to-analog conversion unit 140 is electrically connected to the reference compensation signal output terminal of the control circuit 230, and the output terminal 140b of the digital-to-analog conversion unit 140 is electrically connected to the input terminal 120a of the reference voltage generation unit 120, so that the digital-to-analog conversion unit 140 can receive the reference compensation signal generated by the control circuit 230, convert the reference compensation signal into a reference compensation voltage signal, and then transmit the reference compensation signal to the input terminal 120a of the reference voltage generation unit 120, so that the reference voltage signal can adjust the reference voltage generated by the reference voltage generation unit 120.

Fig. 13 is a schematic circuit diagram of a digital-to-analog conversion unit and a reference voltage generating unit according to some embodiments of the present application.

As shown in fig. 13, the digital-to-analog conversion unit 140 includes a first resistor R1 and a second capacitor C2. The first terminal of the first resistor R1 and the first terminal of the second capacitor C2 are electrically connected to the input terminal 120a of the reference voltage generating unit 120, and the second terminal of the first resistor R1 and the second terminal of the second capacitor C2 are grounded.

By way of example, as shown in FIG. 13, the first Resistor R1 and the second capacitor C2 can be connected in parallel to form an RC (English full name: resistor-Capacitance circuit, chinese name: resistor-capacitor circuit) circuit.

As can be appreciated, the reference compensation signal output terminal generated by the control circuit 230 is electrically connected to the input terminal of the RC circuit, and the output terminal of the RC circuit is electrically connected to the input terminal 120a of the reference voltage generating unit 120, so that the RC circuit can convert the input reference compensation signal into an analog voltage (reference compensation voltage), thereby enabling the reference compensation voltage to adjust the reference voltage generated by the reference voltage generating unit 120, so as to correct the zero offset of the comparator 130, and improve the reliability of the switching power supply 200.

By way of example, the smaller the duty cycle of the reference compensation signal, the larger the voltage value of the input terminal 120a of the reference voltage generating unit 120, so that the larger the voltage value of the output terminal 120b of the reference voltage generating unit 120; the larger the duty ratio of the compensation signal, the smaller the voltage value of the input terminal 120a of the reference voltage generating unit 120, so that the voltage value of the output terminal 120b of the reference voltage generating unit 120 is smaller. In this way, the duty ratio of the reference compensation signal can be adjusted, which plays a role in adjusting the voltage value of the output terminal 120b of the reference voltage generating unit 120, thereby meeting the compensation requirements of different comparators 130 and correcting the zero offset of the comparators 130.

In the embodiment of the present application, the input end 110a of the sampling unit 110 is electrically connected to the first inductor L1, and the output end 110b of the sampling unit 110 is electrically connected to the first input end 130a of the comparator 130, so that the sampling unit 110 can collect the current signal of the first inductor L1, and can generate the voltage signal based on the negative current flowing through the first inductor L1 when the negative current flows through the first inductor L1.

The first input terminal 130a of the comparator 130 is electrically connected to the output terminal 110b of the sampling unit 110, and the second input terminal 130b of the comparator 130 is electrically connected to the output terminal 120b of the reference voltage generating unit 120, so that the comparator 130 can compare the voltage value of the voltage signal generated by the sampling unit 110 based on the negative current value flowing through the first inductor L1 with the voltage value of the reference voltage generated by the reference voltage generating unit 120, and output different comparison results according to the relationship therebetween.

The control signal adjustment input end of the control circuit 230 is electrically connected to the output end 130c of the comparator 130, so that the control circuit 230 can obtain a comparison result of the comparator 130, and determine a relationship between a negative current value flowing through the first inductor L1 and a set negative current threshold (for example, a first set negative current threshold or a second set negative current threshold) based on the comparison result, so as to adjust the first control signal when the negative current value flowing through the first inductor L1 reaches the first set negative current threshold, so as to control the first switching tube Q1 to be turned off; when the negative current value flowing through the first inductor L1 reaches the second set negative current threshold value, the second control signal can be adjusted to control the second switching transistor Q2 to be turned off, so that the negative current value flowing through the first inductor L1 can be controlled.

The reference compensation signal output end of the control circuit 230 is electrically connected to the input end 120a of the reference voltage generating unit 120, so that the reference compensation signal generated by the control circuit 230 can adjust the reference voltage generated by the reference voltage generating unit 120, thereby adjusting the voltage value of the second input end 130b of the comparator 130, so as to adjust the comparison result of the comparator 130, correct the zero offset of the comparator 130, and reduce the risk of hard turn-on of the first switching tube Q1 and the second switching tube Q2 on the basis of improving the power supply efficiency of the power factor correction circuit 210 and reducing the THDi of the power factor correction circuit 210; in addition, the negative current value flowing through the first inductor L1 when the output voltage of the external power supply 400 is in the positive half cycle can be equal to the negative current value flowing through the first inductor L1 when the output voltage of the external power supply 400 is in the negative half cycle, so that the dc bias of the input current of the pfc circuit 210 is reduced, and the use reliability of the pfc circuit 210 is improved.

It should be understood that the zero offset of the comparator 130 may be an error of a comparison result caused by the zero offset of the sampling unit 110, an error of a comparison result caused by an offset voltage of the comparator 130, or an error of a comparison result caused by an error of a reference electric signal output by the reference voltage generating unit 120. The reference compensation signal output terminal of the setting control circuit 230 outputs a reference compensation signal to adjust the reference voltage generated by the reference voltage generating unit 120, so that the zero point offset of the comparator 130 caused by different reasons can be adjusted, and the reliability of the switching power supply 200 is improved.

In some examples, control circuitry 230 is to generate a reference compensation signal, including: the control circuit 230 is configured to determine the duty cycle of the reference compensation signal based on the zero of the comparator 130.

It will be appreciated that the zero of comparator 130 may be offset upward or downward. Also, the zero point offset amount of the different comparators 130 may be different. In this way, if the control circuit 230 provides the reference compensation signals with the same duty ratio to different comparators 130, regardless of the hardware differences (such as the differences between the sampling unit 110, the comparator 130, and the reference voltage generating unit 120), the correction of the zero offset of the comparator 130 by the reference compensation signal is affected, resulting in that the zero offset of the comparator 130 still exists, thereby resulting in a reduced power efficiency of the pfc circuit 210, and making the switching transistor (such as the first switching transistor Q1 or the second switching transistor Q2) hard on.

Moreover, the zero offset of the comparator 130 may cause the negative current value flowing through the first inductor L1 when the output voltage of the external power supply 400 is in the positive half cycle to be unequal to the negative current value flowing through the first inductor L1 when the output voltage of the external power supply 400 is in the negative half cycle, thereby causing the input current of the pfc circuit 210 to have dc offset, and affecting the reliability of the pfc circuit 210.

Therefore, the control circuit 230 needs to be set to determine the duty ratio of the reference compensation signal according to the zero point of the comparator 130, so that the reference compensation signal generated by the control circuit 230 can correct the zero point offset of the comparator 130, improve the accuracy and reliability of the switching power supply 200, improve the power efficiency of the pfc circuit 210, and reduce the risk of dc offset of the pfc circuit 210.

For example, when the control signal adjusting circuit 240 is in the initialization stage, the auxiliary power supply (not shown in the figure) provides the operating voltage for the control signal adjusting circuit 240, and at this time, the pfc circuit 210 is not operated, and the control signal adjusting circuit 240 is operated in the zero offset auto-calibration mode.

It will be appreciated that in the zero offset auto-calibration mode, the control circuit 230 is capable of automatically looking for the zero point of the comparator 130 and determining the duty cycle of the reference compensation signal based on the zero point of the comparator 130. The manner in which the control circuit 230 looks for the zero of the comparator 130 is illustrated below.

In some examples, the control circuit 230 further includes a feedback signal input and a zero detection signal output. The output 130c of the comparator 130 is electrically connected to the feedback signal input of the control circuit 230. The zero point detection signal output terminal of the control circuit 230 is electrically connected to the input terminal 120a of the reference voltage generating unit 120.

In order to simplify the structure of the drawings, in the description of the present application, taking fig. 10 and 11 as examples, only the electrical connection relationship between the control circuit 230 and the output terminal 130c of the comparator 130 and the electrical connection relationship between the control circuit 230 and the input terminal 120a of the reference voltage generating unit 120 are shown, and the feedback signal input terminal and the zero point detection signal output terminal of the control circuit 230 are not shown.

Illustratively, the control circuit 230 for determining the duty cycle of the reference compensation signal based on the zero of the comparator 130 includes:

the control circuit 230 is configured to: a zero point detection signal is generated. The first signal output by the comparator 130 is acquired in a case where the duty ratio of the control zero point detection signal is continuously increased from the minimum value to the maximum value and then continuously decreased from the maximum value to the minimum value within the preset duty ratio range. A duty cycle of the reference compensation signal is determined based on the first signal.

For example, in the zero offset auto-calibration mode, the control circuit 230 can generate a zero point detection signal and send the part detection signal to the input 120a of the reference voltage generating unit 120 through a zero point detection signal output. In some examples, the zero detection signal is a square wave signal. It will be appreciated that the duty cycle of the zero point detection signal can be continuously varied within a preset duty cycle range.

It is understood that the zero point detection signal can play a role in adjusting the reference voltage generated by the reference voltage generating unit 120. In some examples, the zero detection signal output of the control circuit 230 is electrically connected to the input 140a of the digital-to-analog conversion unit 140, and the output 140b of the digital-to-analog conversion unit 140 is electrically connected to the input 120a of the reference voltage generation unit 120, so that the digital-to-analog conversion unit 140 can convert the zero detection signal into the zero detection voltage.

Fig. 14 is a schematic diagram of a correspondence relationship between a zero detection signal and a first signal provided in an embodiment of the present application.

By way of example, as shown in fig. 14, the straight line f1 represents the maximum value in the preset duty cycle range, and the straight line f2 represents the minimum value in the preset duty cycle range, it being understood that the duty cycle of the reference compensation signal is within the preset duty cycle range. The control circuit 230 can find the duty ratio of the reference compensation signal within a preset duty ratio range by controlling the duty ratio variation of the zero point detection signal.

As illustrated in fig. 14, the curve d represents the duty ratio of the zero point detection signal, and the duty ratio of the zero point detection signal is continuously increased from the minimum value to the maximum value and then continuously decreased from the maximum value to the minimum value within the preset duty ratio range. As can be appreciated, the zero point detection signal can be converted into the zero point detection voltage by the digital-to-analog conversion unit 140, so that the voltage value of the zero point detection voltage can be changed following the change of the duty ratio of the zero point detection signal since the duty ratio of the zero point detection signal is continuously changed within the preset duty ratio range.

For example, the zero point detection voltage converted by the digital-to-analog conversion unit 140 can be continuously reduced from the maximum value to the minimum value and then continuously increased from the minimum value to the maximum value within the zero point detection voltage range. It can be appreciated that the zero point detection voltage can adjust the voltage value of the output terminal 120b of the reference voltage generating unit 120, that is, the voltage value of the second input terminal 130b of the comparator 130, so that the comparator 130 can generate the first signal based on the zero point detection signal.

Since the output 130c of the comparator 130 is electrically connected to the feedback signal input of the control circuit 230, the control circuit 230 is able to obtain the first signal generated by the comparator 130 and determine the duty cycle of the reference compensation signal based on the first signal. In some examples, SYNC1 (Chinese name: synchronization signal pin) of the control circuit 230 may be set as a GPIO (General-Purpose Input/Output, english name: general Input/Output) interface, which is used as a feedback signal Input of the control circuit 230.

As can be appreciated, the control circuit 230 is configured to generate the zero detection signal, and control the duty ratio of the zero detection signal to continuously change within a preset duty ratio range to find the zero of the comparator 130, so that the control circuit 230 can automatically find the zero of the comparator 130, thereby meeting the compensation requirements of different comparators 130 and improving the accuracy and reliability of the switching power supply 200. In addition, the control circuit 230 is enabled to realize automatic compensation of the zero point offset of the comparator 130, namely, the control circuit 230 is enabled to realize automatic correction of the zero point offset of the comparator 130 (English: automatic correction), so that the use convenience of the switching power supply 200 is improved. In addition, the control circuit 230 searches for the zero point of the comparator 130 by controlling the duty ratio variation of the zero point detection signal, without requiring a complicated hardware structure, and reduces the cost of the switching power supply 200.

As can be appreciated, since the zero point detection voltage can be changed, the voltage value of the second input terminal 130b of the second comparator 130 can be changed, thereby enabling the level signal of the first signal to be changed. In some examples, the first signal may be changed from a first level signal to a second level signal and back from the second level signal to the first level signal; in other examples, the first signal may also be changed from the second level signal to the first level signal and back from the first level signal to the second level signal.

For example, when the first level signal is a high level signal, the second level signal may be a low level signal. When one level signal is a low level signal, the second level signal may be a high level signal.

In some examples, the control circuit 230 is to determine a duty cycle of the reference compensation signal based on the first signal, comprising:

the control circuit 230 is configured to: in the case where the first signal is converted from the first level signal to the second level signal, a first duty ratio of the zero point detection signal is acquired. In the case where the first signal is converted from the second level signal to the first level signal, a second duty ratio of the zero point detection signal is acquired. The duty cycle of the reference compensation signal is calculated based on the first duty cycle of the zero detection signal and the second duty cycle of the zero detection signal.

It will be appreciated that the level of the first signal may flip as it changes (e.g., is converted from a first level signal to a second level signal or vice versa). It will be appreciated that the inversion of the first signal level may be a rising edge or a falling edge.

For example, as shown in fig. 14, pulse g represents the first signal output from the output terminal 130c of the comparator 130, and pulse h represents the first signal received by the feedback signal input terminal of the control circuit 230. It will be appreciated that the waveforms of pulse g and pulse h are identical.

In some examples, as shown in fig. 14, in a process in which the duty ratio of the zero point detection signal continuously increases from the minimum value of the preset duty ratio range to the maximum value of the preset duty ratio range, the level of the first signal is converted from the first level signal to the second level signal, and the level is inverted. At this time, the control circuit 230 acquires a first duty ratio pwmduty1 of the zero point detection signal at the time of inversion of the level of the first signal (as shown by a point P1 in fig. 14).

As an example, as shown in fig. 14, in a process in which the duty ratio of the zero point detection signal continuously decreases from the maximum value in the preset duty ratio range to the minimum value in the preset duty ratio range, the level of the first signal is converted from the second level signal to the first level signal, and the level is inverted. At this time, the control circuit 230 acquires the second duty ratio pwmduty2 of the zero point detection signal at the time of inversion of the first signal (as shown by a point P2 in fig. 14).

It will be appreciated that the flip of the first signal corresponds to the zero of the comparator 130, and that when the zero detection signal is the first duty cycle pwmduty1, the comparator 130 determines that the electrical signal at the first input 130a of the comparator 130 is equal to the electrical signal at the second input 130b of the comparator 130. When the zero point detection signal is at the second duty ratio pwmduty2, the comparator 130 determines that the electric signal at the first input 130a of the comparator 130 is equal to the electric signal at the second input 130b of the comparator 130.

Setting the control circuit 230 to obtain the first duty cycle and the second duty cycle of the zero detection signal and calculate the duty cycle of the reference compensation signal according to the first duty cycle and the second duty cycle can improve the accuracy of the control circuit 230 in determining the zero of the comparator 130, thereby improving the accuracy of the duty cycle of the obtained reference compensation signal and the compensation effect of the reference compensation signal on the zero offset of the comparator 130, and improving the use accuracy and reliability of the switching power supply 200.

In some examples, the control circuit 230 is configured to calculate a duty cycle of the reference compensation signal based on the first duty cycle and the second duty cycle, comprising: the control circuit 230 is configured to: an average value of the first duty ratio of the zero point detection signal and the second duty ratio of the zero point detection signal is calculated, and the average value is used as the duty ratio of the reference compensation signal.

It can be appreciated that after the control circuit 230 obtains the first duty ratio pwmduty1 and the second duty ratio pwmduty2, the average value of the first duty ratio pwmduty1 and the first duty ratio pwmduty2 can be calculated to obtain the duty ratio of the reference compensation signal. That is, the duty ratio pwmduty= (pwmduty1+pwmduty2)/2 of the reference compensation signal. With this arrangement, the accuracy of the control circuit 230 in determining the zero point of the comparator 130 can be improved, and the accuracy of the reference compensation signal for compensation of the zero point offset of the comparator 130 can be improved, thereby improving the accuracy and reliability of the switching power supply 200.

In some examples, the absolute value of the difference of any one of the preset duty cycle ranges from the reference duty cycle is less than or equal to 20%.

In some examples, the reference duty cycle is a theoretical or empirical value of the duty cycle of the baseline compensation signal (see line e in fig. 14). The absolute value of the difference of any one of the preset duty cycle ranges from the reference duty cycle is less than or equal to 20%, that is, the absolute value of the difference of the maximum value in the preset duty cycle range from the reference duty cycle is less than or equal to 20%, and the absolute value of the difference of the minimum value in the preset duty cycle range from the reference duty cycle is less than or equal to 20%.

As can be appreciated, since the duty ratio of the reference compensation signal is within the preset duty ratio range, the absolute value of the difference between any one of the preset duty ratio ranges and the reference duty ratio is set to be less than or equal to 20%, so that the preset duty ratio range can be prevented from being excessively large, thereby reducing the time required for the control circuit 230 to find the zero point of the comparator 130 and improving the efficiency of the control circuit 230 in finding the zero point of the comparator 130.

In some examples, the absolute value of the difference between the maximum value in the preset duty cycle range and the reference duty cycle is equal to 20%, and the absolute value of the difference between the minimum value in the preset duty cycle range and the reference duty cycle is also equal to 20%.

It is understood that the absolute value of the difference between any one of the preset duty cycles and the reference duty cycle is set to be less than or equal to 20%, so that the absolute value of the difference between the duty cycle of the reference compensation signal and the preset duty cycle is set to be less than or equal to 20%.

For example, when the absolute value of the difference between the duty cycle of the reference compensation signal obtained by the control circuit 230 based on the zero point of the comparator 130 and the reference duty cycle is greater than 20% (i.e., when the duty cycle of the reference compensation signal cannot be determined within the preset duty cycle range), the control circuit 230 determines that the comparator 130 is abnormal, without compensating for the zero point offset of the comparator 130. In some examples, the control circuit 230 issues an alert signal to alert an operator to repair or replace after determining that the comparator 130 is abnormal.

For example, when the absolute value of the difference between the duty ratio of the reference compensation signal obtained by the control circuit 230 based on the zero point of the comparator 130 and the reference duty ratio is less than or equal to 5%, the control circuit 230 may output the reference compensation signal according to the reference duty ratio, and the control circuit 230 may also output the reference compensation signal according to the duty ratio of the reference compensation signal obtained based on the first signal.

In some examples, the reference duty cycle takes a value of 50%.

In some examples, the preset duty cycle ranges from 30% to 70%.

As can be appreciated, the range of the preset duty cycle is set to be 30% -70%, and the range of the preset duty cycle is prevented from being too large, so that the time required by the control circuit 230 to find the zero point of the comparator 130 is reduced, and the efficiency of the control circuit 230 in finding the zero point of the comparator 130 is improved; in addition, the range of the preset duty ratio is prevented from being too small, so that the control circuit 230 cannot determine the duty ratio of the reference compensation signal in the range of the preset duty ratio, the control circuit 230 can compensate the zero offset of the comparator 130, and the use reliability of the switching power supply 200 is improved.

In some examples, as shown in fig. 15, the switching power supply 200 (zero-point offset compensation circuit 100) further includes a filtering unit 150. The input terminal 150a of the filtering unit 150 is electrically connected to the reference compensation signal output terminal of the control circuit 230, and the output terminal 150b of the filtering unit 150 is electrically connected to the input terminal 140a of the digital-to-analog conversion unit 140. The filtering unit 150 is used for filtering the pulse signal.

As can be appreciated, the input terminal 150a of the filtering unit 150 is electrically connected to the reference compensation signal output terminal of the control circuit 230, and the output terminal 150b of the filtering unit 150 is electrically connected to the input terminal 140a of the digital-to-analog conversion unit 140, so that the filtering unit 150 can filter the reference compensation signal output by the reference compensation signal output terminal of the control circuit 230 and send the filtered reference compensation signal to the digital-to-analog conversion unit 140, thereby reducing the influence of noise in the reference compensation signal on the digital-to-analog conversion unit 140 and the comparator 130, and improving the reliability of the switching power supply 200.

In some examples, the input terminal 150a of the filtering unit 150 may be further electrically connected to the zero detection signal output terminal of the control circuit 230, so that the filtering unit 150 can filter the zero detection signal output by the control circuit 230, and send the filtered zero detection signal to the digital-to-analog conversion unit 140, thereby reducing the influence of noise in the zero detection signal on the digital-to-analog conversion unit 140 and the comparator 130, and improving the reliability of the switching power supply 200.

In some examples, as shown in fig. 15, the comparator 130 includes an operational amplifier. The non-inverting input of the operational amplifier is configured as a first input 130a of the comparator 130 and the inverting input of the operational amplifier is configured as a second input 130b of the comparator 130; or, the non-inverting input of the operational amplifier is configured as the second input 130b of the comparator 130 and the inverting input of the operational amplifier is configured as the first input 130a of the comparator 130.

It will be appreciated that the set comparator 130 comprises an operational amplifier that is capable of comparing an electrical signal at the non-inverting input with an electrical signal at the inverting input and generating a comparison result.

And, the non-inverting input of the operational amplifier is configured as the first input 130a of the comparator 130, and the inverting input of the operational amplifier is configured as the second input 130b of the comparator 130; or, the non-inverting input end of the operational amplifier is configured as the second input end 130b of the comparator 130, and the inverting input end of the operational amplifier is configured as the first input end 130a of the comparator 130, so that different use requirements can be met, and the use flexibility of the control signal adjusting circuit 240 is improved.

In summary, the embodiments of the present application have at least the following beneficial effects:

The foregoing is merely a specific embodiment of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art who is skilled in the art will recognize that changes or substitutions are within the technical scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. The switching power supply is characterized by comprising a power factor correction circuit, a control circuit and a control signal adjusting circuit;

the power factor correction circuit comprises a first inductor, a first switching tube, a second switching tube and a first capacitor; the first end of the first inductor is electrically connected with the first end of the external power supply; the second end of the first inductor, the first end of the first switching tube and the second end of the second switching tube are electrically connected; the second end of the first switch tube and the first end of the first capacitor are electrically connected with the second end of the external power supply; the first end of the second switch tube and the second end of the first capacitor are electrically connected with the second end of the external power supply;

the control circuit comprises a first control signal output end, a second control signal output end, a reference compensation signal output end and a control signal adjustment input end; the first control signal output end is electrically connected with the control end of the first switching tube; the second control signal output end is electrically connected with the control end of the second switching tube; the first control signal output end is used for outputting a first control signal, and the first control signal is used for controlling the first switching tube to be switched on or switched off; the second control signal output end is used for outputting a second control signal, and the second control signal is used for controlling the second switching tube to be switched on or switched off;

The control signal adjusting circuit comprises a sampling unit, a reference voltage generating unit and a comparator; the input end of the sampling unit is electrically connected with the first inductor; the output end of the sampling unit is electrically connected with the first input end of the comparator; the output end of the reference voltage generating unit is electrically connected with the second input end of the comparator; the output end of the comparator is electrically connected with the control signal adjustment input end of the control circuit; the control signal adjusting circuit is used for adjusting the first control signal and the second control signal based on the current signal of the first inductor;

the reference compensation signal output end of the control circuit is electrically connected with the input end of the reference voltage generation unit; the control circuit is used for generating a reference compensation signal; and adjusting the reference voltage generated by the reference voltage generating unit based on the reference compensation signal.

2. The switching power supply of claim 1 wherein said control circuit for generating said reference compensation signal comprises:

the control circuit is configured to determine a duty cycle of the reference compensation signal based on a zero point of the comparator.

3. The switching power supply of claim 2 wherein said control circuit further comprises a feedback signal input and a zero detection signal output; the output end of the comparator is electrically connected with the feedback signal input end of the control circuit; the zero detection signal output end of the control circuit is electrically connected with the input end of the reference voltage generation unit; the control circuit is configured to determine a duty cycle of the reference compensation signal based on a zero point of the comparator, and includes:

the control circuit is used for:

generating a zero detection signal;

under the condition that the duty ratio of the zero point detection signal is controlled to continuously increase from a minimum value to a maximum value and then continuously decrease from the maximum value to the minimum value in a preset duty ratio range, acquiring a first signal output by the comparator;

a duty cycle of the reference compensation signal is determined based on the first signal.

4. A switching power supply as claimed in claim 3, wherein the control circuit for determining the duty cycle of the reference compensation signal based on the first signal comprises:

the control circuit is used for:

acquiring a first duty ratio of the zero detection signal under the condition that the first signal is converted from a first level signal to a second level signal;

Acquiring a second duty ratio of the zero detection signal under the condition that the first signal is converted from the second level signal to the first level signal;

and calculating an average value of the first duty ratio of the zero point detection signal and the second duty ratio of the zero point detection signal, and taking the average value as the duty ratio of the reference compensation signal.

5. A switching power supply according to claim 3 or 4, wherein the preset duty cycle is in the range 30% to 70%.

6. The switching power supply according to any one of claims 1 to 5, wherein the control signal adjusting circuit further includes: a filtering unit and a digital-to-analog conversion unit;

the reference compensation signal output end of the control circuit is electrically connected with the input end of the filtering unit; the output end of the filtering unit is electrically connected with the input end of the digital-to-analog conversion unit; the output end of the digital-to-analog conversion unit is electrically connected with the input end of the reference voltage generation unit.

7. The switching power supply of claim 6 wherein said digital-to-analog conversion unit includes a first resistor and a second capacitor; the first end of the first resistor and the first end of the second capacitor are electrically connected with the input end of the reference voltage generating unit; a second end of the first resistor and a second end of the second capacitor are grounded.

8. The switching power supply according to any one of claims 1 to 7, wherein the reference voltage generating unit includes a second resistor, a third resistor, a first voltage source, and a second voltage source, wherein a first end of the second resistor is electrically connected to a first end of the third resistor; the second end of the second resistor is electrically connected with the output end of the first voltage source; the second end of the third resistor is electrically connected with the output end of the second voltage source.

9. The switching power supply according to any one of claims 1 to 8, wherein the power factor correction circuit includes a second inductor, a third switching tube, and a fourth switching tube; the first end of the second inductor is electrically connected with the first end of the external power supply; the second end of the second inductor, the first end of the third switching tube and the second end of the fourth switching tube are electrically connected; the second end of the third switch tube and the first end of the first capacitor are electrically connected with the second end of the external power supply; the first end of the fourth switch tube and the second end of the first capacitor are electrically connected with the second end of the external power supply;

the control circuit also comprises a third control signal output end and a fourth control signal output end; the third control signal output end is electrically connected with the control end of the third switching tube; the fourth control signal output end is electrically connected with the control end of the fourth switching tube; the third control signal output end is used for outputting a third control signal, and the third control signal is used for controlling the third switching tube to be switched on or switched off; the fourth control signal output end is used for outputting a fourth control signal, and the fourth control signal is used for controlling the fourth switching tube to be switched on or switched off.

10. The switching power supply of claim 9 wherein said first switches are two, two of said first switches being connected in parallel;

the number of the second switches is two, and the two second switches are connected in parallel;

the number of the third switches is two, and the two third switches are connected in parallel;

the number of the fourth switches is two, and the two fourth switches are connected in parallel.

11. A computing device, the computing device comprising:

a switching power supply as claimed in any one of claims 1 to 10

A load; the switching power supply is electrically connected with the load; the switching power supply is used for supplying power to the load.