CN116454976A - Low-voltage ride through control method of energy storage inverter - Google Patents

Low-voltage ride through control method of energy storage inverter Download PDF

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Publication number
CN116454976A
CN116454976A CN202310495468.1A CN202310495468A CN116454976A CN 116454976 A CN116454976 A CN 116454976A CN 202310495468 A CN202310495468 A CN 202310495468A CN 116454976 A CN116454976 A CN 116454976A
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voltage
current
power
low
loop
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CN116454976B (en
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于家文
杜刚强
刘可述
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Dongfang Electronics Co Ltd
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Dongfang Electronics Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/26—Arrangements for eliminating or reducing asymmetry in polyphase networks
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
    • H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/56—Power conversion systems, e.g. maximum power point trackers

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention belongs to the technical field of power electronic control, in particular relates to a low voltage ride through control algorithm of an energy storage inverter, and particularly focuses on quick judgment of entering/leaving of the inverter in a low voltage ride through state. The method comprises the following steps: sampling three-phase voltage output by a power grid, and calculating positive sequence voltage, voltage amplitude and instantaneous zero sequence voltage according to the three-phase voltage output by the power grid; calculating comprehensive drop voltage according to the instantaneous voltage amplitude and the instantaneous zero sequence voltage; when the instantaneous zero sequence voltage is lower than a threshold value, the method enters a suspected low-pass state, and the control mode is temporarily changed from a power closed loop to a pure electric loop; when the positive sequence voltage is lower than a threshold value one or the comprehensive drop voltage is higher than a threshold value two, entering a low-pass state, and controlling by using a pure electric current loop at the moment; when the positive sequence voltage is higher than the threshold value by one, or the instantaneous zero sequence voltage is higher than the threshold value by one, the zero sequence voltage is lower than 5% of the rated phase voltage peak value and lasts for 3ms, and the low-pass recovery state is entered.

Description

Low-voltage ride through control method of energy storage inverter
Technical Field
The invention belongs to the technical field of power electronic control, and particularly relates to a low voltage ride through (LVRT, low voltage ride through) control method of an energy storage inverter (PCS, power Conversion System).
Background
The energy storage inverter needs to have a low voltage ride through function, when the positive sequence voltage of the power grid is lower than 85% of the rated phase voltage peak value, the energy storage inverter should output corresponding reactive current according to the falling depth, and the response time is smaller than 30ms.
At low voltage ride through, a fast response is required to support the grid, and at the same time, control of the energy storage inverter may be impacted due to sudden changes in the grid voltage. Therefore, the detection of the entrance/exit of the low voltage crossing state is faster and better, which is more beneficial to early prevention of the impact of voltage abrupt change and rapid current response.
For the detection of low voltage ride through, a DSOGI (biquad generalized integrator) algorithm is generally used for separating out positive sequence voltage for judgment, but the DSOGI algorithm uses phase shift calculation, and delay exists actually, so that after a low-voltage ride through event occurs, the energy storage inverter cannot immediately find out, and the delay time is related to the falling depth and the system phase when the fault occurs, and is a plurality of milliseconds in most cases. If the positive sequence voltage is not used, the instantaneous voltage is used for judging, the voltage can be rapidly judged when the three-phase balance of the voltage drops, but when the three-phase balance of the voltage drops, the amplitude of the instantaneous voltage will be sinusoidal, and the erroneous judgment is caused.
Based on this, a low voltage ride through control method of an energy storage inverter is needed to quickly judge that the inverter enters/leaves a low voltage ride through state.
Disclosure of Invention
In order to overcome the problems in the prior art, the invention provides a low voltage ride through control method of an energy storage inverter, which improves the judgment speed of the inverter on entering/leaving low voltage ride through, improves the stability of the inverter when entering/leaving low voltage ride through, and enables the inverter to quickly respond and safely ride through when low-voltage ride through faults occur.
The technical scheme for solving the technical problems is as follows:
a low voltage ride through control method of an energy storage inverter comprises the following steps:
sampling three-phase voltage output by a power grid, and calculating positive sequence voltage, voltage amplitude and instantaneous zero sequence voltage according to the three-phase voltage output by the power grid; calculating comprehensive drop voltage according to the instantaneous voltage amplitude and the instantaneous zero sequence voltage;
when the instantaneous zero sequence voltage is lower than a threshold value, a suspected low-pass state is entered, and the control mode is temporarily changed from a power outer loop and a current inner loop double closed loop to a pure current loop control;
when the positive sequence voltage is lower than a threshold value one or the comprehensive drop voltage is higher than a threshold value two, entering a low-pass state, and controlling by using a pure electric current loop at the moment;
when the positive sequence voltage is higher than the threshold value, or the instantaneous zero sequence voltage is higher than the threshold value, the zero sequence voltage is 5% lower than the peak value of the rated phase voltage and lasts for 3ms, the low-pass recovery state is entered, the pure current loop control is still maintained in the power recovery process, the current instruction is calculated according to the power instruction and the rated voltage, after the current instruction is recovered, the power outer loop calculation is recovered, and the power and current double closed loop control is changed.
Further, calculating the instantaneous voltage amplitude in real time according to the three-phase voltage output by the power grid comprises the following steps:
clark conversion is carried out on three-phase voltage signals output by a power grid so as to obtain alpha and beta axis voltages;
U α ＝1/3*(2*U a -U b -U c )
wherein U is a 、U b 、U c Three-phase voltage signals output by a power grid;
calculating the instantaneous voltage amplitude U by using the obtained alpha and beta axis voltages amp :
Further, calculating the instantaneous zero sequence voltage U according to the three-phase voltage output by the power grid 0 ：
U 0 ＝(U a +U b +U c )/3
Wherein U is a 、U b 、U c And the three-phase voltage signal is output by the power grid.
Further, according to the instantaneous voltage amplitude U amp And instantaneous zero sequence voltage U 0 Calculate the comprehensive drop voltage U s Comprehensive drop voltage U s The method comprises the following steps:
U s ＝U n -U amp -0.5*|U 0 |
wherein U is n Is the nominal phase voltage peak.
Further, the method enters a suspected low-pass state, and the control mode is temporarily changed from a power and current double closed loop to a pure current loop control, specifically comprising the following steps:
stopping calculation of the power outer loop, calculating a current command according to the power command and the rated voltage, locking a current reference value of the current loop into output before the power loop is stopped, respectively adjusting and outputting difference values of the current reference value of the current loop and actually measured current feedback values id and iq through PI, and then calculating with respective decoupling compensation items to obtain reference voltages ud_m and uq_m; the reference voltages ud_m and uq_m are subjected to coordinate transformation and then SPWM modulation, and drive signals are generated to control the inverter.
Further, entering a low-pass state, wherein pure electric current loop control is used, specifically comprising:
the d-axis current command is made to be 0, the q-axis current command is calculated, the difference value between the current command and the actually measured current feedback values id and iq is output after PI adjustment, and then the difference value is calculated with the decoupling compensation term to obtain reference voltages ud_m and uq_m; the reference voltages ud_m and uq_m are subjected to coordinate transformation and then enter SPWM (sinusoidal pulse width modulation), and the control of the inverter is realized by a driving signal output by the SPWM.
Further, after entering the low-wear recovery state, the method specifically includes: stopping reactive current output, and firstly, not recovering the power loop; calculating a current command by dividing a rated voltage peak value according to a power set value, and gradually increasing the current command with time, wherein the speed is 50% of rated power per second; after the current is full, the power outer ring starts to operate, the first calculation period of the power ring and the integral initial value inherits the current instruction, so that the inverter completely recovers the normal operation state.
Further, the threshold one is 85% of the rated phase voltage peak value, and the threshold two is set to be 70V.
Compared with the prior art, the invention has the following technical effects:
(1) The invention calculates the comprehensive drop voltage by using the instantaneous voltage amplitude and the instantaneous zero sequence voltage, can accelerate the detection speed of the entry and the exit of the low voltage ride through, belongs to an increment algorithm, reserves the traditional positive sequence voltage judgment method, has higher comprehensive drop voltage judgment speed under most conditions, and does not influence the traditional positive sequence judgment under other conditions;
(2) When the low voltage ride through is entered, the judgment is very rapid when the voltage three-phase drop is lower than 75%, only 0.5ms is needed, and when the voltage unbalance drops, the judgment speed depends on the phase at the beginning of the fault, such as 40% single-phase ride through, and the time is between 0.5ms and 7 ms. The average judgment time is obviously better than that of the judgment by simply using the positive sequence voltage. When the low voltage ride through is left, if the balance degree after the voltage recovery is higher, the speed of the low voltage ride through is obviously accelerated, and only 0.6ms is needed, so that the inverter can respond early.
(3) And during the periods of suspected low penetration, low penetration and low penetration recovery, pure current loop control is used, so that the stability is enhanced, and the probability of overcurrent protection is reduced.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions and advantages of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are only some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
Fig. 1 is a basic control block diagram of an inverter in the present invention;
FIG. 2 is a logic flow diagram of the operation of the present invention for entering low voltage ride through;
FIG. 3 is a logic flow diagram of the operation of the present invention leaving a low voltage ride through;
FIG. 4 is a waveform diagram of the positive sequence voltage, the integrated drop voltage and the threshold when the single-phase voltage drops to 40% of the rated phase voltage peak value;
fig. 5 is a waveform diagram of the positive sequence voltage, the integrated drop voltage and the threshold when the three-phase voltage drops to 80% of the rated phase voltage peak value.
Detailed Description
In order to further describe the technical means and effects adopted by the present invention to achieve the preset purpose, the following detailed description is given below of the specific implementation, structure, features and effects of the technical solution according to the present invention with reference to the accompanying drawings and preferred embodiments. The particular features, structures, or characteristics of one or more embodiments may be combined in any suitable manner. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.
Considering that the positive sequence voltage has hysteresis, the instantaneous voltage amplitude can rapidly judge the low voltage crossing state, but when unbalanced crossing occurs, the instantaneous voltage fluctuates sinusoidally, and is lower than the actual positive sequence voltage, so that erroneous judgment is caused. Meanwhile, one of the voltage characteristics of unbalanced crossing is that zero sequence voltage exists. Therefore, the instantaneous voltage amplitude and the zero sequence voltage are taken into consideration, and a low voltage ride through control method of the energy storage inverter is provided.
The embodiment discloses a low voltage ride through control method of an energy storage inverter, comprising the following steps:
step 1, sampling three-phase voltage output by a power grid, and calculating positive sequence voltage U according to the three-phase voltage output by the power grid pos Amplitude U of voltage amp And instantaneous zero sequence voltage U 0 ；
Step 2, according to the instantaneous voltage amplitude U amp And instantaneous zero sequence voltage U 0 Calculate the comprehensive drop voltage U s ；
Step 3, when the instantaneous zero sequence voltage U 0 When the voltage is lower than the threshold value, the power-driven generator enters a suspected low-pass state, and the control mode is controlled by a power outer loop and a current inner loopThe loop double closed loop is temporarily converted into pure electric current loop control; calculating a current instruction as a voltage ring reference value according to a power instruction and rated voltage issued by the upper computer;
when the positive sequence voltage U pos Below a threshold value of one, or integrated drop voltage U s When the threshold value is higher than the threshold value II, the low-penetration state is entered, and pure electric current loop control is used at the moment;
when the positive sequence voltage U pos Above a threshold value of one, or instantaneous zero sequence voltage U 0 Above a threshold value of one, zero sequence voltage U 0 And the current command is calculated according to the power command and the rated voltage, and after the current command is restored to a preset value, the power outer loop calculation is restored, so that the power and current double closed loop control is realized.
The following detailed development of each step is performed:
in the embodiment of the invention, in step 1, an instantaneous voltage amplitude U is calculated in real time according to three-phase voltage output by a power grid amp This substep may include the steps of:
clark conversion is carried out on three-phase voltage signals output by a power grid so as to obtain alpha and beta axis voltages;
U α ＝1/3*(2*U a -U b -U c )
wherein U is a 、U b 、U c Three-phase voltage signals output by a power grid;
calculating the instantaneous voltage amplitude U by using the obtained alpha and beta axis voltages amp :
In the embodiment of the invention, in step 1, an instantaneous zero sequence voltage U is calculated according to three-phase voltage output by a power grid 0 ：
U 0 ＝(U a +U b +U c )/3
Wherein U is a 、U b 、U c And the three-phase voltage signal is output by the power grid.
In the embodiment of the invention, the DSOGI algorithm is adopted to calculate the positive sequence voltage U according to the three-phase voltage output by the power grid pos ；
The DSOGI algorithm formula is as follows:
wherein q is a phase shift factor representing a phase shift of 90 DEG, U αβ Obtained by Clark transformation, U + αβ Is a positive and negative sequence voltage under the alpha beta axis.
In the embodiment of the invention, in step 2, the instantaneous voltage amplitude U is used as a reference amp And instantaneous zero sequence voltage U 0 Calculate the comprehensive drop voltage U s Comprehensive drop voltage U s The method comprises the following steps:
U s ＝U n -U amp -0.5*|U 0 |
wherein U is n Is the nominal phase voltage peak, typically 311V.
In the embodiment of the invention, in order to detect and cope with low voltage ride through faults, positive sequence voltage, instantaneous voltage and zero sequence voltage are calculated in real time, and then comprehensive drop voltage is calculated. The action logic according to fig. 2 and 3 addresses the low voltage ride through situation.
As shown in fig. 1, fig. 1 is a basic inverter basic structure and control block diagram, wherein the main topology is a dc power supply V from left to right dc The inverter, the filter and the alternating current power grid; sampling voltage and current from the power grid side for phase locking and power calculation; sampling alternating current from the inversion side for current loop control; the control mode is power and current double closed-loop control, and during normal grid-connected operation, a power instruction is received from an upper computer, and the double closed-loop control accurately outputs power.
And the power and current double closed loop control is realized, wherein the outer loop is a power loop, and the inner loop is a current loop. Clark conversion is carried out on the three-phase voltage signals and the three-phase current signals output by the power grid side so as to obtain two-phase voltages and two-phase currents under an alpha beta coordinate system; park conversion is carried out on the two-phase voltage and the two-phase current under the alpha beta coordinate system to obtain a direct-axis voltage component and a current component i 1d And voltage component and current component i of quadrature axis 1q The method comprises the steps of carrying out a first treatment on the surface of the Based on the direct-axis voltage component, current component i 1d And voltage component and current component i of quadrature axis 1q Active power P and reactive power Q are calculated. The inversion side adopts a phase-locked loop (Phase Locked Loop, PLL for short) to synchronize with the power grid side, and the inversion side current detection signal I under a three-phase static coordinate system a 、I b 、I c Transformed into currents Id, iq in a two-phase coordinate system.
Active instruction value P output by upper computer ref The d-axis current command id_ref is output through PI adjustment with the actually measured active power P error; reactive command value Q ref The error with the actually measured reactive power Q outputs a Q-axis current instruction iq_ref through PI regulation; the difference value between idref and iqref and actually measured current feedback values id and iq is output after PI adjustment, and then the difference value is calculated with respective decoupling compensation terms omega L to obtain reference voltages ud_m and uq_m; the reference voltages ud_m and uq_m are subjected to coordinate transformation and then enter SPWM (sinusoidal pulse width modulation), and the SPWM outputs a driving signal to control the inverter.
When the inverter is operating normally, in order to react to the low voltage ride through as early as possible, the over-current caused by the voltage jump is prevented, and the voltage U is calculated as the instantaneous voltage amp Immediately entering a 'suspected low-pass' state when the current reference value is lower than a threshold value I, stopping calculation of a power outer loop, calculating a current instruction according to the power instruction and rated voltage, and locking the current reference value of the current loop to be the current reference value before the power loop stopsThe output, the difference value of the current reference value of the current loop and the actually measured current feedback values id, iq is output after PI adjustment, and then the reference voltages ud_m, uq_m are obtained after operation with the respective decoupling compensation items; the reference voltages ud_m and uq_m are subjected to coordinate transformation and then SPWM modulation, and drive signals are generated to control the inverter, so that the power control precision is sacrificed in a short time, and the stability is exchanged.
When the inverter operates normally, the following two conditions are met, and the inverter enters a 'low-pass' state: positive sequence voltage U pos Less than threshold one; or, the integrated drop voltage U s Greater than the second threshold, 0.5ms delay.
Typically, the inverter is already in a "suspected low pass" state before the condition occurs. After entering the "low through" state: the method comprises the steps of maintaining control mode to be pure electric current loop control, at the moment, using pure electric current loop control to enable a d-axis current instruction to be 0, calculating a q-axis current instruction according to a national standard formula, outputting difference values of the current instruction and actually measured current feedback values id and iq after PI adjustment, and obtaining reference voltages ud_m and uq_m after calculation with respective decoupling compensation items; the reference voltages ud_m and uq_m are subjected to coordinate transformation and then enter SPWM (sinusoidal pulse width modulation), and the control of the inverter is realized by a driving signal output by the SPWM.
The q-axis current command has the following calculation formula:
wherein Q is ref Is a power command (unit W), and t is time (unit s).
Determination of the entry into the low-pass state, in most cases, by the integrated drop voltage U s And judging that the voltage is faster than the positive sequence voltage. For example, when a single-phase ride through event occurs, the voltage drops to 50% of the rated phase voltage peak, and the positive sequence voltage and the integrated drop voltage are as shown in fig. 4, the judging speed is improved obviously by using the integrated drop voltage. If the voltage drop degree is smaller, the voltage is just under the condition that the positive sequence is slightly smaller than 85% of the rated phase voltage peak value, and the voltage is still judged by the positive sequence voltage. For example, a three-phase ride through time occurs, the voltage drops to 80% of the nominal phaseThe voltage peak value, the positive sequence voltage and the comprehensive drop voltage are shown in fig. 5, and the comprehensive drop voltage is invalid and still depends on the positive sequence voltage for judgment. Table 1 shows the judgment speeds of the present invention in various cases. After the low voltage crossing occurs, changing a current instruction, and outputting reactive current according to a national standard formula.
TABLE 1 comparison of judgment speeds when Low Voltage ride through occurs
When the inverter PCS is in the low-pass state, the following two conditions are met, and the inverter PCS enters a low-pass recovery state: positive sequence voltage U pos Greater than threshold one; or instantaneous voltage U amp And continues to be greater than threshold one, and the zero sequence voltage continues to be less than 15V for 3ms.
After entering the "low penetration recovery" state: the reactive current output is stopped but the power loop is not restored first. The current command is calculated from the power set point divided by the rated voltage and ramped over time to a 50% rated power per second. After the current is full, that is, after the actual current reaches the instruction value, the power outer loop starts to operate, the first calculation period of the power loop, the integral initial value inherits the current instruction, and thus, the inverter completely recovers the normal operation state.
Specifically, the low-pass event ends, and typically, the three-phase voltage is restored to a substantially balanced state, i.e., the zero-sequence voltage is about 0. Thus, if the instantaneous voltage is higher than the threshold one and the zero sequence voltage is less than 15V for 3ms, then the low pass is determined to be over, except that the positive sequence voltage is greater than the threshold one as a criterion. Although the zero sequence voltage is in a sine wave state when the unbalance passes through, and the zero sequence voltage is also less than 15V, the 3ms delay is enough to cover 30% of sine period and the valley is too low. After entering the 'low penetration recovery' state, the current command is calculated by dividing the rated voltage according to the power set value, and the current command is gradually increased along with time to 50% of rated power per second. After the current is full, the power outer ring starts to operate, the first calculation period of the power ring and the integral initial value inherits the current instruction, so that the inverter completely recovers the normal operation state.
The d and q-axis current command calculation can refer to the following formula:
wherein P is ref 、Q ref Is a power command (unit W), and t is time (unit s).
In an embodiment of the present invention, the threshold one is typically 264.35V. The peak phase voltage is multiplied by the drop depth required to enter the low pass, 220 x 1.4142 x 85% = 264.35V according to the current national standard requirement.
The value of the second threshold is at least 70V, and usually 70V is used, and the second threshold can be increased as appropriate. When the two-phase voltage drops, the transient voltage U will appear amp Wave to the lowest point, at this time just U 0 An extreme case of 0. Therefore, when two phases should be traversed to 85% of positive order, the threshold two is greater than U in this case s Is a maximum value of (a). Dropping the two-phase voltages to 77.5% of rated phase voltage peak value, U s The maximum value is exactly 70V. If the threshold two is less than 70V this situation is misjudged as low-crossing.
The two-phase voltage dip limits the minimum of threshold two to 70V. Therefore, consider adjusting the integrated sag voltage U s The calculation formula enables the crossing to the positive sequence of 85% under other conditions, and the judgment is not misjudged. When the single-phase voltage drops to 55%, U 0 Taking 0.5 coefficient exactly allows U s Peak value of (c) 70V. Therefore, the voltage drop in any form can not be misjudged, and the interval and judging speed for enabling the criterion to be effective are improved as much as possible.
In summary, the invention adopts DSOGI algorithm to separate three-phase voltage at the power grid side to obtain positive sequence voltage, which is used as the first criterion for entering/leaving low voltage ride through. On the basis, in order to make up the shortcoming of positive sequence voltage calculation speed lag, an additional criterion is added: considering that the instantaneous amplitude of the voltage causes misjudgment due to sinusoidal fluctuation when unbalanced crossing, and meanwhile, the unbalanced direct current component of the voltage is larger, the instantaneous voltage drop depth is subtracted from the absolute value of the zero sequence component by combining the instantaneous amplitude of the voltage with the unbalanced direct current component to obtain a new criterion, and the criterion is far faster than judgment based on positive sequence voltage under most conditions, particularly under the extreme conditions of three-phase low-pass and single-phase deep low-pass, the entry and the exit of the low-pass state can be rapidly judged, and the response speed is improved; under the condition of shallower voltage drop, the newly added criterion does not act, and low voltage crossing is still judged by means of positive sequence voltage. In order to prevent overcurrent caused by voltage abrupt change as much as possible, the states of 'suspected low-pass' and 'low-pass recovery' are added, when the voltage instantaneous value is smaller than the threshold value but is not determined to be low-voltage pass, the 'suspected low-pass' state is firstly entered, the power and current double closed loop control is switched into pure current loop control, and similarly, when the voltage is separated from low-voltage pass, the 'low-pass recovery' state is entered, the pure current loop control is still maintained in the power recovery process, the power control precision is sacrificed in a short time, and the anti-interference capability of the inverter is improved.
It should be understood that, although the steps in the flowcharts related to the embodiments described above are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.
The above embodiments are only for illustrating the technical solution of the present application, and are not limiting thereof; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims (8)

1. The low voltage ride through control method of the energy storage inverter is characterized by comprising the following steps of:
sampling three-phase voltage output by a power grid, and calculating positive sequence voltage, voltage amplitude and instantaneous zero sequence voltage according to the three-phase voltage output by the power grid; calculating comprehensive drop voltage according to the instantaneous voltage amplitude and the instantaneous zero sequence voltage;
when the instantaneous zero sequence voltage is lower than a threshold value, a suspected low-pass state is entered, and the control mode is temporarily changed from a power outer loop and a current inner loop double closed loop to a pure current loop control;
when the positive sequence voltage is lower than a threshold value one or the comprehensive drop voltage is higher than a threshold value two, entering a low-pass state, and controlling by using a pure electric current loop at the moment;
when the positive sequence voltage is higher than the threshold value, or the instantaneous zero sequence voltage is higher than the threshold value, the zero sequence voltage is lower than 5% of the peak value of the rated phase voltage and lasts for 3ms, the low-pass recovery state is entered, the pure current loop control is still maintained in the power recovery process, the current instruction is calculated according to the power instruction and the rated voltage, after the current instruction is recovered, the power outer loop calculation is recovered, and the power and current double closed loop control is changed.
2. The method of claim 1, wherein calculating the instantaneous voltage amplitude in real time from the three-phase voltage output by the power grid comprises:
clark conversion is carried out on three-phase voltage signals output by a power grid so as to obtain alpha and beta axis voltages;
U α ＝1/3*(2*U a -U b -U c )
wherein U is a 、U b 、U c Three-phase voltage signals output by a power grid;
calculating the instantaneous voltage amplitude U by using the obtained alpha and beta axis voltages amp :
3. The method of claim 2, wherein the instantaneous zero sequence voltage U is calculated from the three-phase voltage output from the grid 0 ：
U 0 ＝(U a +U b +U c )/3
Wherein U is a 、U b 、U c And the three-phase voltage signal is output by the power grid.
4. A low voltage ride through control method of an energy storage inverter as defined in claim 3, wherein the instantaneous voltage magnitude U is based on amp And instantaneous zero sequence voltage U 0 Calculate the comprehensive drop voltage U s Comprehensive drop voltage U s The method comprises the following steps:
U s ＝U n -U amp -0.5*U 0
wherein U is n Is the nominal phase voltage peak.
5. The method for controlling low voltage ride through of an energy storage inverter according to claim 1, wherein the method for controlling the low voltage ride through of the energy storage inverter is characterized by entering a suspected low-pass state and temporarily converting a control mode from a power and current double closed loop to a pure current loop control, and specifically comprises the following steps:
stopping calculation of the power outer loop, calculating a current command according to the power command and the rated voltage, locking a current reference value of the current loop into output before the power loop is stopped, respectively adjusting and outputting difference values of the current reference value of the current loop and actually measured current feedback values id and iq through PI, and then calculating with respective decoupling compensation items to obtain reference voltages ud_m and uq_m; the reference voltages ud_m and uq_m are subjected to coordinate transformation and then SPWM modulation, and drive signals are generated to control the inverter.
6. The method of claim 1, wherein the step-down state is entered, and wherein the step-down state is controlled by a pure current loop, and the method specifically comprises:
the d-axis current command is made to be 0, the q-axis current command is calculated according to the power command and the rated voltage, the difference value between the current command and the actually measured current feedback values id and iq is output after PI adjustment, and then the difference value is calculated with the decoupling compensation items to obtain reference voltages ud_m and uq_m; the reference voltages ud_m and uq_m are subjected to coordinate transformation and then enter SPWM (sinusoidal pulse width modulation), and the control of the inverter is realized by a driving signal output by the SPWM.
7. The method for controlling low voltage ride through of an energy storage inverter of claim 1, comprising, after entering a low-pass recovery state: stopping reactive current output, and firstly, not recovering the power loop; calculating a current command by dividing a rated voltage peak value according to a power set value, and gradually increasing the current command with time, wherein the speed is 50% of rated power per second; after the current command is recovered, the power outer loop starts to operate, the first calculation period of the power loop is the integral initial value inherits the current command, and the inverter is recovered to a normal operation state.
8. The method of claim 1, wherein the first threshold is 85% of the rated phase voltage peak and the second threshold is 70V.
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