CN116450244A

CN116450244A - Chip starting method, device, computer equipment and storage medium

Info

Publication number: CN116450244A
Application number: CN202310730891.5A
Authority: CN
Inventors: 王硕; 满宏涛; 刘刚; 陈贝
Original assignee: Suzhou Inspur Intelligent Technology Co Ltd
Current assignee: Suzhou Inspur Intelligent Technology Co Ltd
Priority date: 2023-06-20
Filing date: 2023-06-20
Publication date: 2023-07-18
Anticipated expiration: 2043-06-20
Also published as: CN116450244B

Abstract

The application relates to a chip starting method, a chip starting device, computer equipment and a storage medium. The method is applied to a chip comprising a processor, a first memory, a second memory and a third memory, the chip being connected to a remote device, the remote device comprising a fourth memory, the method comprising: when the starting mode of the chip is remote starting, the processor reads a first starting program stored in the first memory; executing a first starting program by the processor, and moving a second starting program from a fourth memory to a second memory through the first starting program; executing a second starting program by the processor, and moving a third starting program from the fourth memory to the third memory through the second starting program; and the processor executes the third starting program, and after the execution is successful, the chip is successfully started. The method optimizes the data transmission path of the starting program between the chip and the remote equipment, and cancels the read-write process of the chip mass storage equipment, thereby avoiding the extra low-efficiency communication time.

Description

Chip starting method, device, computer equipment and storage medium

Technical Field

The present disclosure relates to the field of computer technologies, and in particular, to a method and apparatus for starting a chip, a computer device, and a storage medium.

Background

Currently, system start-up of a chip can be largely classified into local start-up and remote start-up. The local boot refers to that the boot program of the chip is located in a local device at the chip end, such as a flash memory (flash), a mass storage device (sd, emmc) and the like at the chip end; remote start refers to the start-up procedure of the chip being located in a remote device, such as a current cloud computing center, a data center, a computer cluster system, etc., the hardware device being separate from the user, the hardware device being located in a centralized machine room, and the user being remotely accessed through a network. Under the application scene, the chip of the hardware equipment is started mainly in a remote starting mode for convenience in management and operation and maintenance, the starting program file of the chip is arranged on the user side, and the user updates the program at any time and starts the remote chip through a network without updating the computer room locally each time.

However, in the chip remote starting method in the prior art, the remote user side firstly transmits a starting program to the internal memory of the chip side through a network, then the chip burns the starting program in the internal memory to the flash memory/mass storage device, and then the chip resets to start and execute the program which is just updated.

The remote starting method has the disadvantages of low efficiency, the data path is a remote user-network-chip memory-chip local storage device-chip memory, the starting principle is basically the same as that of a local starting mode, the starting method is limited by the communication frequency of the chip local storage device, and the whole starting process is long.

Disclosure of Invention

Based on this, it is necessary to provide a method, an apparatus, a computer device and a storage medium for starting a chip, which optimize a data transmission path of a starting program between the chip and a remote device, cancel a read-write process of a chip mass storage device, and thereby avoid an additional inefficient communication time.

A method of chip activation, the method being applied to a chip comprising a processor, a first memory, a second memory and a third memory, the chip being connected to a remote device, the remote device comprising a fourth memory, the method comprising:

when the starting mode of the chip is remote starting, the processor reads a first starting program stored in the first memory;

executing a first starting program by the processor, and moving a second starting program from a fourth memory to a second memory through the first starting program;

Executing a second starting program by the processor, and moving a third starting program from the fourth memory to the third memory through the second starting program;

and the processor executes the third starting program, and after the execution is successful, the chip is successfully started.

In one embodiment, the chip further comprises a reset module, and the method further comprises: the processor sends a disabling instruction to the reset module so that the reset module disables the reset module according to the disabling instruction.

In one embodiment, the chip further includes a start module, and when the start mode of the chip is remote start, the method includes: after the chip is electrified, the processor sends a remote start instruction to the start module, so that the start module configures the start mode of the chip to be remote start according to the remote start instruction.

In one embodiment, the chip further includes a start module, and when the start mode of the chip is remote start, the method includes: before the chip is powered on, the processor configures the starting mode of the starting module to be remote starting through an external remote starting hardware switch.

In one embodiment, the chip further comprises a flash memory, and when the chip fails to start, the method further comprises: when the starting mode of the chip is local starting, the processor reads a fourth starting program stored in the flash memory, executes the fourth starting program, and after the execution is successful, the chip is started successfully.

In one embodiment, when the chip fails to start, the method includes: the processor executes the third starting program unsuccessfully, and determines that the chip is failed to start; and/or the processor executes the third starting program to generate abnormal operation, and determines that the chip is failed to start.

In one embodiment, the chip further includes a reset module and a start module, where when the start mode of the chip is local start, the method includes: after the preset time, the reset module resets the starting mode of the starting module to be local starting.

In one embodiment, the resetting module resets the start mode of the start module to a local start, including: the reset module resets the starting module and resets the starting mode of the starting module to local starting; or the processor sends a local starting instruction to the starting module so that the starting module configures the starting mode of the chip to be local starting according to the local starting instruction; or the processor configures the starting mode of the starting module to be local starting through an external local starting hardware switch.

In one embodiment, the method further comprises: and the reset module carries out soft reset operation on the chip.

In one embodiment, the fourth startup procedure is a procedure that is verified in advance and started normally, and is stored in the flash memory to be used as a backup startup.

In one embodiment, after executing the second start-up procedure, further comprises: initializing the third memory by the second starting program, and executing the step of moving the third starting program from the fourth memory to the third memory by the second starting program after the initialization is successful.

In one embodiment, after the second boot program is moved from the fourth memory to the second memory by the first boot program, the method further includes: the first starting program jumps the execution address of the processor to the address corresponding to the second memory.

In one embodiment, after the third boot program is moved from the fourth memory to the third memory by the second boot program, the method further includes: the second starting program jumps the execution address of the processor to the address corresponding to the third memory.

In one embodiment, the first start-up program is fixedly stored in the first memory and is an intermediate program specially designed for the remote loading function of the chip.

In one embodiment, the second boot program is stored in the fourth memory of the remote device and is an intermediate program specifically designed for the user-designed chip remote loading function.

In one embodiment, the third boot program is stored in the fourth memory of the remote device and is a conventional chip boot software program designed by the user.

In one embodiment, the first memory is a first rom, the second memory is a first ram, the third memory is a memory, and the fourth memory is a second rom or a second ram.

A chip activation device for use with a chip comprising a processor, a first memory, a second memory and a third memory, the chip being connected to a remote device, the remote device comprising a fourth memory, said device comprising:

the reading module is used for reading a first starting program stored in the first memory by the processor when the starting mode of the chip is remote starting;

the first execution module is used for executing a first starting program by the processor, and moving a second starting program from the fourth memory to the second memory through the first starting program;

the second execution module is used for executing a second starting program by the processor, and moving a third starting program from the fourth memory to the third memory through the second starting program;

and the third execution module is used for executing the third starting program by the processor, and after the execution is successful, the chip is started successfully.

A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of:

When the starting mode of the chip is remote starting, reading a first starting program stored in a first memory;

executing a first starting program, and moving a second starting program from a fourth memory to a second memory through the first starting program;

executing a second starting program, and moving a third starting program from the fourth memory to the third memory through the second starting program;

and executing the third starting program, and after the execution is successful, starting the chip successfully.

A computer readable storage medium having stored thereon a computer program which when executed by a processor performs the steps of:

According to the chip starting method, the device, the computer equipment and the storage medium, the processor, the first memory, the second memory and the third memory and the separated starting program design are designed in the chip, so that the starting program of the remote equipment can be directly transmitted to the high-speed memory in the chip through the network cable without passing through the large-capacity storage equipment, the data path is the remote equipment user-network-chip second memory/third memory, the chip starting speed is greatly improved, compared with the remote starting mode in the prior art, the data transmission path of the starting program between the chip and the remote equipment is optimized, and the reading and writing processes of the chip large-capacity storage equipment are cancelled, so that the extra low-efficiency communication time is avoided, and the chip starting efficiency is improved.

Drawings

FIG. 1 is a flow chart of a method for starting a chip in one embodiment;

FIG. 2 is a schematic diagram of a remote loading and starting device of a chip according to an embodiment;

FIG. 3 is a schematic diagram of a start-up procedure in one embodiment;

FIG. 4 is a schematic diagram of a chip start-up method in one embodiment;

FIG. 5 is a schematic diagram of a chip start-up failure in one embodiment;

FIG. 6 is a block diagram of a chip initiator apparatus in one embodiment;

FIG. 7 is an internal block diagram of a computer device in one embodiment;

fig. 8 is an internal structural diagram of a computer device in one embodiment.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.

In one embodiment, as shown in fig. 1, a method for starting a chip is provided, which is used for the chip to be connected with a remote device, wherein the chip includes a processor, a first memory, a second memory and a third memory, and the remote device includes a fourth memory, and the method includes the following steps:

Step 102, when the start mode of the chip is remote start, the processor reads the first start program stored in the first memory.

The start mode of the chip may be mainly divided into local start and remote start, where local start refers to that a start program of the chip is located in a local device of the chip, such as a flash memory of the chip, a mass storage device, and the like, and remote start refers to that a start program of the chip is located in a remote device, such as a cloud computing center, a data center, a computer cluster system, and the like.

The first Memory may be a Read-Only Memory (ROM) that operates in a non-destructive Read mode, and Only information that cannot be written to can be Read. The information is fixed once written, and even if the power supply is turned off, the information is not lost, so the information is also called a fixed memory. That is, the first start program is fixedly written into the read-only memory when the chip is produced, and cannot be read and written.

Specifically, the configuration of the chip in the remote start mode may be specifically configured by a hardware switch for remote start or by sending a remote start instruction, and when the chip in the remote start mode is configured, the processor of the chip reads the first start program stored in the first memory. The first memory is connected with the processor, a first starting program is stored under the condition that the starting mode of the chip is remote starting, and after the chip is powered on or reset, the processor of the chip reads the first starting program from the first memory first.

In one embodiment, the first boot program is fixedly stored in the first memory and is an intermediate program specially designed for the remote loading function of the chip. That is, the first start-up program is solidified in the first memory, and the chip is already writing the first start-up program into the first memory at the time of production.

Step 104, the processor executes the first startup procedure, and moves the second startup procedure from the fourth memory to the second memory through the first startup procedure.

The second memory may be a random access memory (RAM, random Access Memory), also called main memory, which is an internal memory that exchanges data directly with the processor. It can be read and written at any time (except when refreshed) and is fast, often as a temporary data storage medium for an operating system or other program in operation. RAM, when in operation, can write (store) or read (retrieve) information from any given address at any time, and its greatest difference from ROM (read only memory) is the volatility of data, i.e. the stored data will be lost upon power failure, RAM being used in computer and digital systems to temporarily store programs, data and intermediate results.

The fourth memory of the remote device may be, but is not limited to, a read only memory, a random access memory.

Specifically, the processor of the chip begins executing a first boot program that may be moved from the fourth memory to the second memory of the remote device over the network. The second memory is connected with the processor, and stores a second starting program when the starting mode of the chip is remote starting, and after the processor executes the first starting program, the processor jumps to the second memory to read the second starting program.

In one embodiment, the second boot program is stored in the memory of the remote device and is an intermediate program specifically designed for the user-designed chip remote loading function. That is, the user designs the second start program according to the actual service requirement, the actual product requirement or the actual application scene, and stores the second start program in the memory of the remote device.

Step 106, the processor executes the second start-up procedure, and moves the third start-up procedure from the fourth memory to the third memory through the second start-up procedure.

The third Memory may be a Memory, which is an important component of the computer, and is also called an internal Memory and a main Memory, and is used for temporarily storing operation data in the processor and data exchanged with an external Memory such as a hard disk. The method is a bridge for communicating the external memory with the processor, all programs in the computer are run in the internal memory, and the intensity of the internal memory performance affects the level of the whole exertion of the computer. As soon as the computer starts to run, the operating system will call the data to be operated from the memory to the processor to operate, and when the operation is completed, the processor will send out the result.

Specifically, the processor of the chip starts to execute the second starting program, the second starting program can be moved from the fourth memory of the remote equipment to the third memory through the network, wherein the third memory is connected with the processor, the third starting program is stored under the condition that the starting mode of the chip is remote starting, and after the processor executes the third starting program, the processor jumps to the third memory to read the third starting program.

In one embodiment, the third boot program is stored in the fourth memory of the remote device and is a conventional chip boot software program designed by the user. That is, the user designs the third start program according to the actual service requirement, the actual product requirement or the actual application scenario, and stores the third start program in the fourth memory of the remote device.

Step 108, the processor executes the third starting program, and after the execution is successful, the chip is started successfully.

Specifically, the processor of the chip jumps to the third memory to read the third starting program, and after the third starting program is executed successfully, the chip is started successfully. Compared with the remote starting method in the prior art, the technical scheme of the method optimizes the data transmission path of the starting program between the chip and the remote equipment, cancels the read-write process of the chip mass storage equipment, thereby avoiding the communication time with extra low efficiency and improving the efficiency of chip starting.

In the chip starting method, the processor, the first memory, the second memory and the third memory and the separated starting program design are designed in the chip, so that the starting program of the remote equipment can be directly transmitted to the high-speed memory in the chip through the network cable without passing through the large-capacity storage equipment, the data path is the remote equipment user-network-chip second memory/third memory, the chip starting speed is greatly improved, compared with the remote starting mode in the prior art, the data transmission path of the starting program between the chip and the remote equipment is optimized, the reading and writing process of the chip large-capacity storage equipment is canceled, the extra low-efficiency communication time is avoided, and the chip starting efficiency is improved.

In one embodiment, the chip further comprises a reset module, the method further comprising: the processor sends a disabling instruction to the reset module so that the reset module disables the reset module according to the disabling instruction.

The chip further comprises a reset module, wherein the reset module is used for resetting all functional modules of the chip, specifically, if the reset module is not disabled after the chip is successfully started, the reset module can trigger the chip to reset and restart after a certain time, so that the reset module is required to be disabled. Specifically, the processor of the chip sends a disabling instruction to the reset module, the disabling instruction is an instruction for disabling the reset module to reset and restart, and after receiving the disabling instruction, the reset module is disabled according to the disabling instruction, at this time, the reset module is disabled, and the chip is not triggered to reset and restart after a certain time.

The chip also comprises a starting module, wherein the starting module is used for managing the starting mode of the chip and can configure the starting mode of the chip to be local starting or remote starting. After the chip is powered on, the remote start instruction can be sent to the start module to perform the start mode configuration of the chip.

Specifically, after the chip is powered on, the processor of the chip sends a remote start instruction to the start module, the remote start instruction is used for indicating the start module to configure the start mode of the chip, after the start module receives the remote start instruction sent by the processor, the start module configures the start mode of the chip to be remote start according to the remote start instruction, and after the configuration is successful, the chip is in the remote start mode. Therefore, the processor configures the starting mode of the chip to be remote starting by sending the remote starting instruction, so that the configuration efficiency and convenience of the starting mode of the chip are improved.

Before the chip is powered on, the starting module can be configured to be a remote starting mode in a mode selected by an external hardware switch. Specifically, before the chip is detected to be not powered on, the starting mode of the starting module may be configured to be remote starting through an external remote starting hardware switch, where the external remote starting hardware switch is a hardware switch, for example, a pin or a pin, whose starting mode is remote starting. That is, by selecting the external remote start hardware switch, the start mode of the start module can be configured as remote start. Therefore, the processor configures the starting mode of the chip to be remote starting through the external remote starting hardware switch, and the situation that the starting mode of the chip cannot be configured due to network delay or network abnormality and the like can be avoided.

In one embodiment, the chip further comprises a flash memory, and when the chip fails to boot, the method further comprises: when the starting mode of the chip is local starting, the processor reads a fourth starting program stored in the flash memory, executes the fourth starting program, and after the execution is successful, the chip is started successfully.

Flash memory (flash memory), which is a form of electronically erasable programmable read-only memory, allows memory to be erased or written multiple times during operation, is mainly used for general data storage and data exchange and transmission between computers and other digital products, such as memory cards and U disks. The flash memory may be a special EPROM that is erased in macroblocks. While the early flash memory can be erased once, the data on the whole chip can be removed.

When the chip fails to start, the chip cannot start normally, and in order to avoid downtime of the chip, the chip needs to be started successfully, so that reloading work can be performed after the chip fails to start. Specifically, when the chip fails to start and cannot start normally, the chip is automatically switched back to local start, that is, the start mode of the chip is local start at this time, and the start program is located in the local equipment of the chip in the local start mode, so that the processor of the chip can read the fourth start program stored in the flash memory, and when the fourth start program is executed successfully, the chip is started successfully, and the chip is prevented from being down.

In one embodiment, the fourth boot program is a program that is authenticated in advance and is normally booted, stored in the flash memory, and used as a backup boot. That is, when the starting program provided by the remote equipment is wrong or the chip is abnormally operated, the chip is automatically switched back to the local starting mode if the remote starting of the chip fails, so that the chip is successfully started again, and the system downtime is avoided.

In one embodiment, when the chip fails to boot, the method includes: the processor executes the third starting program unsuccessfully, and determines that the chip is failed to start; and/or the processor executes the third starting program to generate abnormal operation, and determines that the chip is failed to start.

Wherein, the chip start failure can be determined when the third start program provided by the remote device is wrong or the chip is abnormally operated. Specifically, the failure of executing the third start-up procedure indicates that the third start-up procedure provided by the remote device has an error, and the chip cannot be started up, so that when the failure of executing the third start-up procedure is determined. And/or, in another embodiment, when the processor of the chip executes the third start-up procedure, an abnormal operation of the chip occurs, which may be that the chip itself has a problem or has a quality problem, so that the chip cannot be started up due to the problem of operation, and therefore, when the processor executes the third start-up procedure and the chip runs abnormally, it can be determined that the chip is started up and fails.

In one embodiment, the chip further includes a reset module and a start module, and when the start mode of the chip is local start, the method includes: after the preset time, the reset module resets the starting mode of the starting module to be local starting.

The chip also comprises a reset module and a starting module, wherein the reset module is used for resetting each functional module of the chip, the starting module is used for managing the starting mode of the chip, the starting mode of the chip can be configured to be local starting or remote starting, after the chip fails to start, the chip is automatically switched back to the local starting mode, and at the moment, the reset module of the chip works after a certain time to reset the starting module of the chip. Specifically, when the chip fails to start or is hung up, after the timeout of the preset time, the reset module resets the starting module, and the starting mode of the reset starting module is local starting. The default starting mode of the starting module is local starting, so that when the resetting module resets the starting module, the starting mode of the starting module is reset to the default mode. That is, after a certain time, the reset module of the chip resets, so that the chip recovers the default state, and loading protection of the chip with failed start-up is performed, thereby avoiding downtime of the system where the chip is located.

In one embodiment, the reset module resets the start mode of the start module to a local start, including: the reset module resets the starting module and resets the starting mode of the starting module to local starting; or the processor sends a local starting instruction to the starting module so that the starting module configures the starting mode of the chip to be local starting according to the local starting instruction; or the processor configures the starting mode of the starting module to be local starting through an external local starting hardware switch.

The starting mode of the resetting module resetting the starting module is that local starting can be performed through an external hardware switch, or the starting module is reset directly through the resetting module or through the processor sending a local starting instruction for resetting.

In one embodiment, the reset module resets the start module, directly restores the start mode of the start module to the default start mode, and the default start mode of the start module is local start, so the reset module can directly restore the start module to the default start mode. In another embodiment, the reset module may send a local start instruction to the start module through the processor, and after the start module receives the local start instruction, the start module configures a start mode of the start module to be local start according to the local start instruction. In yet another embodiment, the reset module may further reset the start-up module through an external local start-up hardware switch, such as a pin or a pin, by which the reset module may reset the start-up mode of the start-up module to the local mode.

Specifically, after the preset time is overtime, the reset starting module resets the starting module to be started locally, namely after the fixed time is overtime, the reset starting module resets the starting module, the starting mode of the starting module is started locally, and then the reset module triggers the chip to be reset softly.

In one embodiment, after the second start-up procedure is performed, further comprising: initializing the third memory by the second starting program, and executing the step of moving the third starting program from the fourth memory to the third memory by the second starting program after the initialization is successful.

Specifically, after the second starting program is executed by the processor of the chip, the second starting program may initialize the third memory, and after the initialization is successful, the step of moving the third starting program from the fourth memory to the third memory through the second starting program is executed. That is, the second boot program initializes the third memory of the chip and continuously moves the third boot program in the fourth memory of the remote device to the third memory of the chip for buffering. Therefore, the initialized third memory can better enable the third starting program to be moved to the third memory, and abnormal problems such as compatibility or incapability of writing when the third starting program is moved to the third memory are avoided.

In one embodiment, after the second boot program is moved from the fourth memory to the second memory by the first boot program, the method further comprises: the first starting program jumps the execution address of the processor to the address corresponding to the second memory.

In one embodiment, after the third boot program is moved from the fourth memory to the third memory by the second boot program, the method further comprises: the second starting program jumps the execution address of the processor to the address corresponding to the third memory.

Specifically, after the second boot program is moved from the fourth memory to the second memory by the first boot program, the first boot program needs to jump the execution address of the processor to the address corresponding to the second memory, so that the processor can only read the second boot program from the second memory. Further, after the third boot program is moved from the fourth memory to the third memory by the second boot program, the second boot program also needs to jump the execution address of the processor to the address corresponding to the third memory, so that the processor can only read the third boot program from the third memory. Therefore, after moving, the execution address of the processor is jumped to the corresponding address, so that the corresponding starting program can be quickly executed, and the starting speed of the chip is improved.

The first read-only memory and the second read-only memory are read-only memories and are located in different devices, the first read-only memory is located in a chip, the second read-only memory is located in a remote device, and similarly, the first random access memory and the second random access memory are random access memories and are located in different devices, the first random access memory is located in the chip, and the second random access memory is located in the remote device.

In a specific application scenario of remote loading and starting of a chip, as shown in fig. 2, a remote loading and starting device of the chip is provided, and is mainly divided into a chip end and a remote equipment end; referring to fig. 3, the starting program design proposed in the present application is divided into a starting program 1, a starting program 2, a starting program 3 and a starting program 4, and the four starting programs are stored in corresponding modules in fig. 2. The remote loading start-up architecture and start-up procedure of the chip of the present application are described below.

A processor: the processor module is responsible for the execution of the respective boot program and the configuration of the boot module.

And a starting module: the starting module manages the starting mode of the chip, and can configure the starting mode of the chip to be local starting and remote starting.

The net opening is as follows: and the interface module is connected with the chip end and the remote equipment end through a network cable.

Read only memory: and the processor is connected with the processor module, stores the starting program 1 in a remote starting mode, and reads the starting program 1 from the read-only memory for execution after power-on or chip reset.

Random access memory: and the processor module is connected with the processor module, stores the starting program 2 in a remote starting mode, and jumps to the random access memory to read the starting program 2 for execution after the starting program 1 is executed by the processor.

Memory: and the processor module is connected with the processor module, stores the starting program 3 in a remote starting mode, and jumps to the memory read starting program 3 for execution after the processor finishes executing the starting program 2.

Flash memory: and the processor is connected with the processor module, stores the starting program 4 in a local starting mode, and reads the starting program 4 from the flash memory to execute.

And a reset module: triggering the chip soft reset operation. When the chip is not successfully started or hung up, the reset module automatically triggers the soft reset of the chip after a certain time of overtime, and the starting module is configured into a local starting mode.

A memory: the storage device of the remote device stores the startup procedures 2 and 3 in the remote startup mode.

The application provides two chip starting modes of remote starting and local starting, wherein the local starting is used as a reload protection mechanism after the chip starting fails. When the starting program provided by the remote equipment end is wrong or the chip is abnormally operated, the remote starting of the chip fails, the local starting mode can be automatically switched back, so that the chip is successfully started again, and the system downtime is avoided.

According to the chip starting method, the starting module, the read-only memory, the random access memory, the memory and other modules are designed in the chip, and the separated starting program is designed, so that the program of the remote equipment can be directly transmitted to the high-speed memory in the chip through the network cable without passing through the large-capacity storage equipment, the data path is the remote user-network-chip random access memory/memory, and the starting speed is greatly improved. In particular, the starting program design of the present application may refer to fig. 4, where it should be noted that the starting program 1 and the starting program 2 may be understood as intermediate programs specially designed for the chip remote loading function, and the starting program 3 and the starting program 4 may be understood as conventional chip starting software programs.

Referring to fig. 4, a workflow is initiated for the chip of the present invention.

(1) And configuring the starting mode of the chip starting module to be remote starting. This step may occur before or after power-up of the chip. Before the chip is electrified, configuring a starting module into a remote starting mode through a mode selected by an external hardware switch; after the chip is powered on, the starting module is configured to be a remote starting mode by means of an internal software program.

(2) The processor executes the start-up procedure 1. The startup procedure 1 is solidified in the read-only memory, and after the chip is powered on or reset, the processor will first read the startup procedure 1 in the read-only memory and start executing.

(3) The starting program 1 moves the starting program 2 to the chip random access memory through the network. The start-up procedure 1 is a designed software program that initializes the network of chips and continuously moves the start-up procedure 2 in the remote device memory to the random access memory on the chip side for caching.

(4) The processor executes the start-up procedure 2. After the step (3) is completed, the starting program 1 finally jumps the execution address of the processor to the random access memory, and the processor starts to execute the starting program 2 therein.

(5) Start-up procedure 2 the memory is initialized and the memory is set up, the start-up procedure 3 is moved to the memory via the network. Similarly, the startup procedure 2 is a designed software program that initializes the memory of the chip and continuously moves the startup procedure 3 in the remote device memory to the memory of the chip for caching.

(6) And the processor executes the starting program 3, the chip is successfully started, and the reset module is disabled. After the moving in the step (5) is completed, the starting program 2 finally jumps the execution address of the processor to the memory, the processor starts to execute the starting program 3, the chip is started successfully at the moment, the reset module is required to be disabled later, and otherwise, the reset module triggers reset restarting after a certain time.

In addition, the invention also provides a reload protection mechanism after the remote start failure of the chip. Referring to fig. 5, a chip reload workflow is provided.

(7) The start-up procedure 3 is not successfully executed and the reset module is not disabled. After the processor executes the start-up procedure 3 in the above step (6), if the chip is not successfully started (for example, the start-up procedure 3 transmitted by the remote user is wrong or the start is abnormal), the reset module is not disabled and is in an enabled state.

(8) And the reset module resets the starting module to be started locally and triggers the chip to reset softly when overtime. After the fixed time is overtime, the reset module resets the starting module, the starting mode is local starting at the moment, and then the reset module triggers the chip to reset in a soft mode.

(9) The processor obtains the boot program 4 from flash memory for execution. After the chip is soft reset, the processor starts to read the boot program 4 from the flash memory and execute it. The startup procedure 4 is a validated normal startup procedure, and is solidified in the flash memory to be used as a backup startup. Store start-up program 4

The application provides a chip remote loading starting device and method and a reload protection mechanism. The method comprises the steps (1) - (6), wherein the steps are working procedures of remote starting and successful starting of a chip; and (7) to (9) are reloading work flows after the remote start failure of the chip.

It should be understood that, although the steps in the above-described flowcharts are shown in order as indicated by the arrows, these steps are not necessarily performed in order as indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described above may include a plurality of sub-steps or stages that are not necessarily performed at the same time, but may be performed at different times, and the order of execution of the sub-steps or stages is not necessarily sequential, but may be performed alternately or alternately with at least a part of the sub-steps or stages of other steps or other steps.

In one embodiment, a chip is provided that includes a processor that may perform the chip start-up method of any of the embodiments described above.

In one embodiment, as shown in fig. 6, there is provided a chip start-up apparatus 600, the apparatus being applied to a chip including a processor, a first memory, a second memory, and a third memory, the chip being connected to a remote device, the remote device including a fourth memory, comprising: a reading module 602, a first executing module 604, a second executing module 606, and a third executing module 608, wherein:

the reading module 602 is configured to read, by the processor, the first boot program stored in the first memory when the boot mode of the chip is remote boot.

The first execution module 604 is configured to execute a first startup procedure by the processor, and move a second startup procedure from the fourth memory to the second memory through the first startup procedure.

The second execution module 606 is configured to execute a second startup procedure by the processor, and move the third startup procedure from the fourth memory to the third memory through the second startup procedure.

The third execution module 608 is configured to execute the third startup procedure by the processor, and after the execution is successful, the chip is started successfully.

In one embodiment, the chip further includes a reset module, and the chip enable device 600 sends a disable instruction to the reset module, so that the reset module disables the reset module according to the disable instruction.

In one embodiment, the chip further includes a start module, and the read module 602 sends a remote start command to the start module after the chip is powered on, so that the start module configures a start mode of the chip to be remote start according to the remote start command.

In one embodiment, the chip further includes a start module, and the read module 602 configures the start mode of the start module to be remote start by an external remote start hardware switch before the chip is powered up.

In one embodiment, the chip further includes a flash memory, and when the chip is started up in a failed mode, the chip starting device 600 reads a fourth starting program stored in the flash memory, executes the fourth starting program, and after the execution is successful, the chip is started up successfully.

In one embodiment, the chip start-up device 600 performs the third start-up procedure unsuccessfully, determining that the chip start-up failed; and/or executing the third starting program to cause abnormal operation, and determining the failure of starting the chip.

In one embodiment, the chip further includes a reset module and a start module, where after a preset time, the chip start device 600 resets the start mode of the start module to local start.

In one embodiment, a reset module in the chip starting device 600 resets the starting module, and resets the starting mode of the starting module to local starting; or sending a local starting instruction to the starting module so that the starting module configures the starting mode of the chip to be local starting according to the local starting instruction; or the starting mode of the starting module is configured to be local starting through an external local starting hardware switch.

In one embodiment, a reset module in chip enable device 600 performs a soft reset operation on the chip.

In one embodiment, the chip initiator 600 initializes the third memory with the second initiator, and after the initialization is successful, the second execution module 606 performs a step of moving the third initiator from the fourth memory to the third memory with the second initiator.

In one embodiment, the chip initiator 600 jumps the processor execution address to the address corresponding to the second memory through the first initiator.

In one embodiment, the chip starting apparatus 600 jumps the processor execution address to the address corresponding to the third memory through the second starting procedure.

For specific limitations of the chip starting apparatus, reference may be made to the above limitations of the chip starting method, and no further description is given here. The above-described respective modules in the chip starting apparatus may be implemented in whole or in part by software, hardware, and combinations thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.

In one embodiment, a computer device is provided, which may be a server, the internal structure of which may be as shown in fig. 7. The computer device includes a processor, a memory, a network interface, and a database connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The database of the computer device is used to store a startup procedure. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a chip start-up method.

In one embodiment, a computer device is provided, which may be a terminal, and the internal structure thereof may be as shown in fig. 8. The computer device includes a processor, a memory, a network interface, a display screen, and an input device connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a chip start-up method. The display screen of the computer equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer equipment can be a touch layer covered on the display screen, can also be keys, a track ball or a touch pad arranged on the shell of the computer equipment, and can also be an external keyboard, a touch pad or a mouse and the like.

It will be appreciated by those skilled in the art that the structures shown in fig. 7 or 8 are merely block diagrams of portions of structures related to the aspects of the present application and are not intended to limit the computer devices to which the aspects of the present application may be applied, and that a particular computer device may include more or fewer components than shown, or may combine certain components, or may have a different arrangement of components.

In one embodiment, a computer device is provided comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the steps of when executing the computer program: when the starting mode of the chip is remote starting, reading a first starting program stored in a first memory; executing a first starting program, and moving a second starting program from a fourth memory to a second memory through the first starting program; executing a second starting program, and moving a third starting program from the fourth memory to the third memory through the second starting program; and executing the third starting program, and after the execution is successful, starting the chip successfully.

In one embodiment, the chip further comprises a reset module, and the processor when executing the computer program further performs the steps of: and sending a disabling instruction to the resetting module so that the resetting module disables the resetting module according to the disabling instruction.

In one embodiment, the chip further comprises a start-up module, the processor when executing the computer program further implementing the steps of: after the chip is electrified, a remote starting instruction is sent to the starting module, so that the starting module configures the starting mode of the chip to be remote starting according to the remote starting instruction.

In one embodiment, the chip further comprises a start-up module, the processor when executing the computer program further implementing the steps of: before the chip is electrified, the starting mode of the starting module is configured to be remote starting through an external remote starting hardware switch.

In one embodiment, the chip further comprises a flash memory, and the processor when executing the computer program further performs the steps of: when the starting mode of the chip is local starting, reading a fourth starting program stored in the flash memory, executing the fourth starting program, and after the execution is successful, starting the chip successfully.

In one embodiment, the processor when executing the computer program further performs the steps of: the third starting program is not successfully executed, and the failure of starting the chip is determined; and/or executing the third starting program to cause abnormal operation, and determining the failure of starting the chip.

In one embodiment, the chip further comprises a reset module and a start module, and the processor when executing the computer program further performs the following steps: after the preset time, the reset module resets the starting mode of the starting module to be local starting.

In one embodiment, the processor when executing the computer program further performs the steps of: the reset module resets the starting module and resets the starting mode of the starting module to local starting; or sending a local starting instruction to the starting module so that the starting module configures the starting mode of the chip to be local starting according to the local starting instruction; or the starting mode of the starting module is configured to be local starting through an external local starting hardware switch.

In one embodiment, the processor when executing the computer program further performs the steps of: and the reset module carries out soft reset operation on the chip.

In one embodiment, the processor when executing the computer program further performs the steps of: initializing the third memory by the second starting program, and executing the step of moving the third starting program from the fourth memory to the third memory by the second starting program after the initialization is successful.

In one embodiment, the processor when executing the computer program further performs the steps of: the first starting program jumps the execution address of the processor to the address corresponding to the second memory.

In one embodiment, the processor when executing the computer program further performs the steps of: the second starting program jumps the execution address of the processor to the address corresponding to the third memory.

In one embodiment, a computer readable storage medium is provided having a computer program stored thereon, which when executed by a processor, performs the steps of: when the starting mode of the chip is remote starting, reading a first starting program stored in a first memory; executing a first starting program, and moving a second starting program from a fourth memory to a second memory through the first starting program; executing a second starting program, and moving a third starting program from the fourth memory to the third memory through the second starting program; and executing the third starting program, and after the execution is successful, starting the chip successfully.

Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the various embodiments provided herein may include non-volatile and/or volatile memory. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), memory bus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.

The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The above examples merely represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the invention. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.

Claims

1. A method of chip activation, the method being applied to a chip comprising a processor, a first memory, a second memory and a third memory, the chip being connected to a remote device, the remote device comprising a fourth memory, the method comprising:

The processor executes the first starting program and moves a second starting program from the fourth memory to the second memory through the first starting program;

the processor executes the second starting program, and moves a third starting program from the fourth memory to the third memory through the second starting program;

and the processor executes the third starting program, and after the execution is successful, the chip is started successfully.

2. The method of claim 1, wherein the chip further comprises a reset module, the method further comprising:

and the processor sends a disabling instruction to the resetting module so that the resetting module disables the resetting module according to the disabling instruction.

3. The method of claim 1, wherein the chip further comprises a start-up module, the method comprising, when the start-up mode of the chip is a remote start-up:

after the chip is electrified, the processor sends a remote starting instruction to the starting module, so that the starting module configures a starting mode of the chip to be remote starting according to the remote starting instruction.

4. The method of claim 1, wherein the chip further comprises a start-up module, the method comprising, when the start-up mode of the chip is a remote start-up:

Before the chip is powered on, the processor configures the starting mode of the starting module to be remote starting through an external remote starting hardware switch.

5. The method of claim 1, wherein the chip further comprises a flash memory, and wherein when the chip fails to boot, the method further comprises:

when the starting mode of the chip is local starting, the processor reads a fourth starting program stored in the flash memory, executes the fourth starting program, and after the execution is successful, the chip is started successfully.

6. The method of claim 5, wherein said when said chip fails to boot, comprising:

the processor executes the third starting program unsuccessfully and determines that the chip fails to start; and/or

And the processor executes the third starting program to cause abnormal operation and determine that the chip fails to start.

7. The method of claim 5, wherein the chip further comprises a reset module and a start-up module, the method comprising, when the start-up mode of the chip is a local start-up:

after the preset time, the reset module resets the starting mode of the starting module to be local starting.

8. The method of claim 7, wherein the resetting module resetting the start-up mode of the start-up module to a local start-up comprises:

the reset module resets the starting module and resets the starting mode of the starting module to local starting; or (b)

The processor sends a local starting instruction to the starting module so that the starting module configures a starting mode of the chip to be local starting according to the local starting instruction; or (b)

The processor configures the starting mode of the starting module to be local starting through an external local starting hardware switch.

9. The method of claim 8, wherein the method further comprises:

and the reset module carries out soft reset operation on the chip.

10. The method according to any one of claims 5-9, wherein the fourth boot program is a program that is verified in advance and is normally booted, and is stored in the flash memory for use as a backup boot.

11. The method of claim 1, wherein after the executing the second boot program, further comprising:

initializing the third memory by the second starting program, and executing the step of moving the third starting program from the fourth memory to the third memory by the second starting program after the initialization is successful.

12. The method of claim 1, wherein after the second boot program is moved from the fourth memory to the second memory by the first boot program, further comprising:

and the first starting program jumps the execution address of the processor to the address corresponding to the second memory.

13. The method of claim 1, wherein after the third boot program is moved from the fourth memory to the third memory by the second boot program, further comprising:

and the second starting program jumps the execution address of the processor to the address corresponding to the third memory.

14. The method of claim 1, wherein the first boot program is fixedly stored in the first memory and is an intermediate program specifically designed for the chip remote loading function.

15. The method of claim 1, wherein the second boot program is stored in the fourth memory of the remote device as an intermediate program specifically designed for the remote loading function of the chip designed by a user.

16. The method of claim 1, wherein the third boot program stored in the fourth memory of the remote device is a custom designed legacy chip boot software program.

17. The method of claim 1, wherein the first memory is a first read-only memory, the second memory is a first random access memory, the third memory is a memory, and the fourth memory is a second read-only memory or a second random access memory.

18. A chip activation apparatus for use with a chip comprising a processor, a first memory, a second memory, and a third memory, the chip being coupled to a remote device, the remote device comprising a fourth memory, the apparatus comprising:

the first execution module is used for executing the first starting program by the processor, and moving a second starting program from the fourth memory to the second memory through the first starting program;

the second execution module is used for executing the second starting program by the processor, and moving a third starting program from the fourth memory to the third memory through the second starting program;

19. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method of any one of claims 1 to 17 when the computer program is executed.

20. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 17.