CN116436486A - Super-regenerative data transmission system and method - Google Patents
Super-regenerative data transmission system and method Download PDFInfo
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Abstract
The application relates to a super regenerative data transmission system, comprising: an antenna for receiving an external input signal; the super-regenerative receiving circuit is connected with the antenna and comprises a frequency selection element, is used for starting vibration under the control of the sudden stop oscillation control signal, performs frequency selection on an external input signal through the frequency selection element, enters a regenerative state based on the frequency selection signal and software control, and outputs a regenerative oscillation signal; a low-pass filter connected with a super-regenerative receiving circuit comprising a frequency selecting element and used for carrying out low-pass filtering on the regenerative oscillation signal and outputting a low-frequency data signal; a processor coupled to the super-regenerative receive circuit including the frequency selective element and the low pass filter for generating a quench oscillation control signal; and carrying out analog-to-digital conversion and sampling on the low-frequency data signal, and realizing data receiving according to the sampled data. The method and the device use software to control the RC circuit without hardware to generate the sudden stop oscillation control signal, and the signal period is stable and accurate, so that the sampling speed rate of the received signal can be accurately controlled.
Description
Technical Field
The present disclosure relates to integrated circuit design technology and computer operating system technology, and more particularly, to a super-regenerative data transmission system and method, a computing device, and a storage medium.
Background
At present, super-regenerative data transmission is widely applied, various data transmission modules and small-sized radios are all appeared, and commonly adopted super-regenerative data transmission methods are all LC frequency selection circuits consisting of capacitors and inductors, and the LC frequency selection circuits work in pure hardware to realize a physical layer of data transmission. The most common circuits are capacitive three-point circuits (also known as coopitts circuits) and inductive three-point circuits (also known as Hartley circuits), which are based on self-extinguishing super-regenerative receiver circuits, the circuit form of which is shown in fig. 1. The basic principle of the self-extinguishing super-regenerative receiving circuit is a capacitor three-point oscillator, an RC capacitance-resistance circuit is additionally charged and discharged, and sudden-stop oscillation (quenching oscillation) is generated by generating an RC capacitance/resistance self-extinguishing signal to control the switching and oscillation of a transistor. During oscillation, if an external on-frequency signal (external hardware quench signal) enters, the quenching oscillation frequency and waveform change, and the oscillation enters a regeneration state, so that the oscillation establishment speed is increased, and the output waveform changes. Finally, the signal is filtered by a hardware low-pass filter to remove the high-frequency carrier signal, and the low-frequency digital signal is reserved as a data signal and is output by an operational amplifier or a comparator (shown in figure 1).
The method has the advantages of complex debugging, high debugging difficulty, low instantaneity, high uncertainty, more debugging matched instruments, difficult debugging of LC frequency selection parameters, easy influence of temperature and materials on LC, overlarge frequency drift caused by temperature, close correlation of circuit and hardware parameters and large circuit debugging difference when the hardware difference is large.
The diagram of the super-regenerative circuit of the discrete element commonly used in the market at present is shown in fig. 2, the super-regenerative data transmission and the reception of the circuit are related to the self-extinction/self-extinction frequency of hardware, the self-extinction is determined by charging an RC capacitance-resistance circuit, the self-extinction is related to the difference of the hardware, and the receiving signal is related to the self-extinction speed, so that the sampling speed rate of the receiving signal cannot be accurately controlled due to the pure hardware, and the receiving signal is not controlled by software, and is uncontrollable in flexibility and instantaneity. And LC is susceptible to interference from signals of similar frequencies due to the low Q-factor.
Disclosure of Invention
In view of the above problems in the prior art, the present application provides a super-regenerative data transmission system and method, a computing device, and a storage medium, which use software control to generate a sudden-stop oscillation control signal without adopting RC circuit control of hardware, the period of the signal is very stable and precise, and the sampling speed rate of the received signal can be precisely controlled using software control.
To achieve the above object, a first aspect of the present application provides a super-regenerative data transmission system, including:
an antenna for receiving an external input signal;
the super-regenerative receiving circuit comprises a frequency-selecting element, is connected with the antenna and is used for starting oscillation under the control of a sudden stop oscillation control signal of the processor, selecting frequencies of the external input signals through the frequency-selecting element, and outputting regenerative oscillation signals based on the frequency-selecting signals;
the low-pass filter is connected with the super-regenerative receiving circuit comprising the frequency selection element and is used for carrying out low-pass filtering on the regenerative oscillation signal and outputting a low-frequency data signal;
a processor connected with the super-regenerative receiving circuit including a frequency selecting element and the low-pass filter and used for generating a sudden stop oscillation control signal; and carrying out analog-to-digital conversion and sampling on the low-frequency data signal, and realizing data receiving according to the sampled data.
From the above, the system uses the processor to generate the quenching oscillation control signal to control the super-regenerative receiving circuit to start oscillation, so that the quenching oscillation control signal is generated by using software control instead of using an RC circuit control of hardware, and the period of the quenching oscillation control signal is very stable and precise. The low-frequency data signal is subjected to analog-to-digital conversion and sampling by the processor, the sampling speed and the sampling rate of the received signal can be accurately controlled by using software control, the data acquisition interval and the data acquisition accuracy are improved, and the consistency is good.
To achieve the above object, a second aspect of the present application provides a super-regenerative data transmission method, including:
the processor generates a sudden-stop oscillation control signal to control the super-regenerative receiving circuit comprising the frequency-selective element to start oscillation;
the antenna receives an external input signal and sends the external input signal to the super-regenerative receiving circuit comprising the frequency selecting element;
the super-regenerative receiving circuit comprising the frequency selection element enters a regenerative state based on the frequency selection signal and outputs a regenerative oscillation signal;
the low-pass filter carries out low-pass filtering on the regenerated oscillation signal and outputs a low-frequency data signal;
and the processor performs analog-to-digital conversion and sampling on the low-frequency data signal, and realizes data reception according to the sampled data.
From the above, the system uses the processor to generate the quenching oscillation control signal to control the super-regenerative receiving circuit to start oscillation, so that the quenching oscillation control signal is generated by using software control instead of using an RC circuit control of hardware, and the period of the quenching oscillation control signal is very stable and precise. The low-frequency data signal is subjected to analog-to-digital conversion and sampling by the processor, the sampling speed and the sampling rate of the received signal can be accurately controlled by using software control, the data acquisition interval and the data acquisition accuracy are improved, and the consistency is good.
A third aspect of the present application provides a computing device comprising:
a communication interface;
at least one processor coupled to the communication interface; and
at least one memory coupled to the processor and storing program instructions that, when executed by the at least one processor, cause the at least one processor to perform the method of the first aspect described above.
A fourth aspect of the present application provides a computer readable storage medium having stored thereon program instructions which when executed by a computer cause the computer to implement the method of any of the first aspects described above.
Drawings
FIG. 1 is a schematic diagram of a basic self-extinguishing super-regenerative receiving circuit;
FIG. 2 is a schematic diagram of a discrete component super-regenerative circuit;
fig. 3 is a schematic diagram of a super-regenerative data transmission system according to a first embodiment of the present application;
fig. 4 is a schematic diagram of a super-regenerative data transmission system according to a second embodiment of the present application;
FIG. 5 is an equivalent circuit diagram of a crystal oscillator;
fig. 6 is a waveform schematic diagram of the super-regenerative signal reception principle;
fig. 7 is a schematic diagram (actual circuit diagram) of a super-regenerative data transmission system according to a third embodiment of the present application;
FIG. 8 is a schematic diagram of a waveform of a regenerative oscillation generated by the super-regenerative data transmission system provided herein;
fig. 9 is a flowchart of implementing data reception by the super-regenerative data transmission system provided in the present application;
FIG. 10 is a schematic diagram of a measured regenerated oscillation waveform of the actual circuit shown in FIG. 7;
FIG. 11 is a schematic diagram of a computing device provided by an embodiment of the present application.
It should be understood that in the foregoing structural schematic diagrams, the sizes and forms of the respective block diagrams are for reference only and should not constitute an exclusive interpretation of the embodiments of the present invention. The relative positions and inclusion relationships between the blocks presented by the structural diagrams are merely illustrative of structural relationships between the blocks, and are not limiting of the physical connection of embodiments of the present invention.
Detailed Description
The technical scheme provided by the application is further described below by referring to the accompanying drawings and examples. It should be understood that the system structures and service scenarios provided in the embodiments of the present application are mainly for illustrating possible implementations of the technical solutions of the present application, and should not be construed as the only limitation of the technical solutions of the present application. As one of ordinary skill in the art can know, with the evolution of the system structure and the appearance of new service scenarios, the technical scheme provided in the application is applicable to similar technical problems.
It should be understood that the super-regenerative data transmission scheme provided in the embodiments of the present application includes a super-regenerative data transmission system and method. Because the principles of solving the problems in these technical solutions are the same or similar, in the following description of the specific embodiments, some repetition is not described in detail, but it should be considered that these specific embodiments have mutual references and can be combined with each other.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. If there is a discrepancy, the meaning described in the present specification or the meaning obtained from the content described in the present specification is used. In addition, the terminology used herein is for the purpose of describing embodiments of the present application only and is not intended to be limiting of the present application. For the purpose of accurately describing the technical content of the present application, and for the purpose of accurately understanding the present invention, the terms used in the present specification are given the following explanation or definition before the explanation of the specific embodiments:
1. intermittent oscillations (also known as quench oscillations quenching oscillation) are generated during the oscillation of the high frequency oscillator, which in turn controls the oscillation and intermittence of the high frequency oscillator. Whereas the frequency of intermittent (sudden) oscillations is determined by the parameters of the circuit (typically 1 hundred to several hundred kilohertz).
The super-regenerative data transmission and reception of the super-regenerative circuit are related to the self-extinction/self-extinction frequency of hardware, the self-extinction is determined by charging an RC capacitance-resistance circuit, and is related to hardware difference and carrier frequency, and the received signal is related to the self-extinction speed, so that the sampling speed rate of the received signal cannot be accurately controlled due to the fact that the pure hardware is not used, and the flexibility and the instantaneity are uncontrollable. Based on this, the embodiment of the application provides a super-regenerative data transmission system, which uses a processor to generate a sudden-stop oscillation control signal to control a super-regenerative receiving circuit to start oscillation, so that the sudden-stop oscillation control signal is generated by using software control instead of RC circuit control of hardware, and the period of the sudden-stop oscillation control signal is very stable and accurate. The low-frequency data signal is subjected to analog-to-digital conversion and sampling by the processor, the sampling speed and the sampling rate of the received signal can be accurately controlled by using software control, the data acquisition interval and the data acquisition accuracy are improved, and the consistency is good.
The embodiment of the application can be applied to any scene using super regenerative circuits.
The present application provides a super regenerative data transmission system, as shown in fig. 3, the system includes:
an antenna for receiving an external input signal;
the super-regenerative receiving circuit comprises a frequency-selecting element, is connected with the antenna and is used for starting oscillation under the control of the sudden-stop oscillation control signal of the processor, selecting the frequency of an external input signal through the frequency-selecting element, entering a regenerative state based on the frequency-selecting signal and outputting a regenerative oscillation signal;
the low-pass filter is connected with the super-regenerative receiving circuit comprising the frequency selection element and is used for carrying out low-pass filtering on the regenerative oscillation signal and outputting a low-frequency data signal;
a processor connected with the super-regenerative receiving circuit including the frequency selecting element and the low-pass filter for generating the sudden stop oscillation control signal; and carrying out analog-to-digital conversion and sampling on the low-frequency data signal, and realizing data receiving according to the sampled data.
In some embodiments, the frequency selective element comprises a crystal oscillator or a ceramic filter. Thus, the super-regenerative receiving circuit including the frequency selective element may be a super-regenerative receiving circuit employing a crystal oscillator, as shown in fig. 4. The crystal oscillator can switch different frequencies according to the requirements of users.
In this embodiment, the super-regenerative receiving circuit (i.e., the local oscillation circuit) including the frequency-selective element adopts a crystal oscillator to stabilize the frequency, and since the Q value of the crystal oscillator is very high, there is no concern about LC temperature drift, and the equivalent circuit diagram of the crystal oscillator is shown in fig. 5, and the calculation formula of the Q value is as follows:
where f is the frequency, L is the equivalent inductance, and R is the equivalent resistance (characterizing the energy consumption). R is inversely proportional to the Q value.
In some embodiments, as shown in fig. 4, the low pass filter is a programmable filter, the filter frequency being set by processor control.
In some embodiments, the super-regenerative signal receiving principle is to judge the signal receiving according to the speed of the local oscillation signal establishment between sudden intermittent signals, as shown in fig. 6, when the wireless electromagnetic signal in the space is not or is weak, the dark part of the sine wave below in fig. 6 is the waveform generated by the local high-frequency oscillation during the sudden intermittent oscillation, the oscillation establishment speed is slower, so that the enclosed area is fixed and the jitter is less (THERMAL NOISE part). When an external RF signal is present, the local oscillation waveform is increased in the local oscillation waveform like the area surrounded by the light and dark portions, and the local oscillation waveform is increased in the local oscillation waveform (EXTERNAL RF signal area+HERMAL noise area) because the local oscillation waveform is increased in the local oscillation waveform.
Based on the above, the method adopts a processor (namely a CPU/MCU) to control a sudden stop signal (sequence signal), does not adopt RC circuit control of hardware, and has very stable and accurate signal period.
In this embodiment, the processor performs analog-to-digital conversion and sampling on the low frequency data signal, and implements data reception according to the sampled data, including:
and the processor performs integral operation on each sampling data in the regeneration period to obtain an integral result, compares the integral result with a preset threshold value, and when the integral result is larger than the preset threshold value, indicates that an external signal enters, so as to realize data receiving.
The CPU/MCU is adopted for ADC conversion and sampling of data, the data acquisition interval and the data acquisition accuracy are improved, the consistency is good, and the method is suitable for mass production.
In this embodiment, the preset threshold is determined as follows:
under the condition that no external input signal exists, the processor is started in a cold mode, a sudden stop oscillation control signal with a preset period is generated, the super-regenerative receiving circuit comprising the frequency selection element is controlled to start to vibrate, in the preset period, the processor carries out analog-to-digital conversion and sampling on the low-frequency data signal obtained through filtering of the low-pass filter, integrates and accumulates collected data, and then average value is obtained, and a preset threshold value is obtained.
The preset threshold is determined according to the following formula:
where Th is a threshold, vpp is a signal voltage, t is time, hs is a start of the quench control signal, and he is an end of the quench control signal. And the jitter of plus or minus 10% can be added on the basis of a preset threshold value.
In some embodiments, as shown in fig. 7, the super-regenerative receiving circuit including the frequency selective element includes: the frequency selecting element (namely a replaceable crystal oscillator), a first resistor R1, a second resistor R2, a transistor Q1 and a capacitor C1;
the frequency selecting element is connected between the base electrode and the collector electrode of the transistor after being connected with the first resistor in parallel, the collector electrode of the transistor is also connected with one end of the second resistor, the other end of the second resistor is connected with a power supply, the capacitor is connected between the collector electrode and the emitter electrode of the transistor, and the emitter electrode of the transistor is also grounded. Wherein, the frequency selecting element (i.e. the replaceable crystal oscillator) and the first resistor R1 form a crystal oscillator frequency selecting circuit.
As shown in fig. 7, the super-regenerative receiving circuit including the frequency selecting element may further include: a rectifier diode;
the rectifying diode is connected with the collector of the transistor and is used for half-wave rectifying the signal.
In this embodiment, the super-regenerative receiving circuit including the frequency-selective element is formed by using a transistor and a crystal oscillator with voltage feedback in parallel, the sudden-stop oscillation frequency is controlled by controlling the collector voltage of the transistor, when the collector voltage of the transistor is low (grounded), the oscillation stops, and when the collector voltage is not grounded, the oscillation works normally, and the oscillation starts and stabilizes gradually, so as to achieve a super-regenerative working process. For a crystal oscillator within a certain range, such as 6 Mhz-18 Mhz oscillation frequency, the actual measurement can be directly replaced and work normally. The rf signal is introduced into the base of the transistor through the antenna and into the circuit, and when the sudden stop signal controls the regeneration, the external co-frequency rf signal can allow the oscillation to build up more quickly, as shown in fig. 8. The waveform in the lower part of fig. 8 is a waveform after low-pass filtering is implemented by a programmable digital filter, and the filtering frequency can be controlled by software to change the setting of the programmable filter. The waveform in the upper half of fig. 8 is a waveform established by regenerative oscillation.
In some embodiments, the processor controls generation of the abrupt oscillation control signal, analog-to-digital conversion and sampling of the low frequency data signal, and specific process of implementing data reception according to the sampled data is shown in fig. 9, including:
a. in a cold start on state, it is ensured that there is no extraneous RF signal. The CPU controls the programmable filter to set a median value through SPI, I2C, UART and other control modes, and the low-pass mode, such as 10KHz, is lower than 10KHz to allow the programmable filter to pass.
The CPU controls the generation of sudden intermittent signals (high-low level signals) at 2ms periodic intervals. The circuit regenerates and oscillates at high level, stops oscillating at low level, and continuously and circularly reciprocates. In fig. 8, the rising edges of the left two waveforms are the sudden stop signal to control the start of reproduction. The falling edge on the right is the sudden rest signal off.
c. When the sudden stop signal starts (the high level of the CPU control signal), the waveform after the low-pass filtering of the programmable filter is controlled to perform ADC (analog-to-digital) conversion in a regeneration state, and the CPU is used for conversion at the fastest speed of the ADC. After each ADC conversion, the result is accumulated and stored in a variable x, which is actually the integration of the area enclosed by the upper part of the waveforms in fig. 8.
d. When the sudden rest signal stops turning off (i.e., the falling edge of the lower waveform on the right in fig. 8), oscillation stops, the ADC stops sampling, and the integration calculation stops. And c, storing the area integration result x of the low-frequency signal of the lower part waveform which is completed in the step c into an array B.
e. Step c and step d are cycled 100 times to obtain 100 ADC integration values in the array B, and since the ADC integration values are very close and stable due to no external signal when the ADC integration values are just powered up, the integration values are averaged by dividing the sum by 100, and the jitter of plus or minus 10% is added, namely the integration value is called a signal threshold Th when the ADC integration value is regenerated in a no-signal state.
f. Through the steps, after the threshold Th is obtained by averaging 100 integrals after power-on, the subsequent CPU enters a normal work receiving state, the CPU continuously samples low-frequency data waveforms during the regeneration period, the integral result is compared with the threshold Th every time the integral operation is carried out, if the integral result is larger than Th to indicate that an external signal enters, a radio-frequency data 1 is received, and software data receiving is realized.
Because the speed of each CPU to the ADC is different, the invention calculates the average value through the initialization of the early 100 integration results and then obtains the threshold value, so the threshold value which should be obtained by the series of CPUs can be calculated in an adaptive way each time when the CPU is electrified, the CPU is irrelevant to various CPU brands, meanwhile, the software anti-interference is realized because of more times, the adaptive initialization is realized, and the data is received in an adaptive way.
In some embodiments, as shown in fig. 7, a schematic diagram of an actual circuit of the super regenerative data transmission system proposed in the present application is shown, where the left part of the circuit is a schematic diagram, and constituent elements include: antenna Ant, crystal oscillator Xtal (crystal oscillator can be replaced according to user's demand), transistor Q1, positive feedback capacitor C1 constitute the colpitts oscillation circuit of a crystal oscillator version. The input is linked with a rectifier diode D1, a programmable filter chip U1 and a main control and operation chip CPU/MCU chip U2.
The detailed working principle and description are as follows:
a) The crystal oscillator is connected between the collector and the base to form a frequency selecting circuit, the frequency selecting frequency is the nominal frequency of the crystal oscillator, and the transistor works in an amplifying state to perform frequency stabilization and oscillation maintenance.
b) The antenna is connected to the Q1 base electrode and is used for receiving a radio signal in space, and meanwhile, electromagnetic wave signals in the same frequency in space are screened through the crystal oscillator, so that signals with large frequency offset cannot enter the circuit.
c) C1 is a positive feedback circuit of Q1, which can accelerate the circuit to start vibrating.
d) The data signal is output through the collector of Q1 and rectified by D1.
e) D1 is a half-wave rectifier diode, and the left output signal is sent to a programmable filter U1 after half-wave rectification, so as to filter high-frequency carrier signals and obtain low-frequency signals containing data.
f) And the low-frequency data signal from U1 is sent to U2, after analog-to-digital conversion (ADC) is carried out on the U2, software integration operation is carried out on the low-frequency data signal, after power-on, the integration threshold Th of each CPU judgment signal is obtained through software logic algorithm self-adaption, and then normal data receiving range can be carried out.
Fig. 10 is a schematic diagram of an actual measurement reproduced oscillation waveform of the actual circuit shown in fig. 7, in which the upper square wave is a spatial wireless waveform signal, the lower waveform is a data signal, and it is seen that during the period of the waveform, the integral area of the data signal corresponding to the lower waveform becomes large, exceeds the threshold Th, and it is determined that a signal is present, and the function is realized.
The circuit sudden stop signal, the low-pass filtering, the crystal oscillator, the ADC sampling threshold value and the like are flexible and expandable, are controlled by software, can be self-adaptive (self-adaptive algorithm logic is shown as figure 9), and have the advantages of high consistency, convenient debugging, strong instantaneity and obvious advantages compared with the traditional super-regeneration of hardware.
The super-regenerative data transmission system provided by the application uses the crystal oscillator or the ceramic filter with high Q value as the frequency selecting element, uses the high-frequency transistor for amplification and oscillation, does not use the traditional LC frequency selecting circuit, greatly stabilizes the working frequency of the received signal, and is beneficial to frequency selecting and interference filtering. The received frequency can be cut at will by switching the crystal oscillator, a software programmable filter is matched, a fixed hardware RC filter is not adopted, and the instantaneity and the controllability are improved.
The circuit of the super-regenerative data transmission system is simple to debug, a design scheme of a simplified receiving circuit and a CPU (or a micro controller unit MCU) is used, software is used for intervening signal acquisition and oscillation control and data filtering control, the signal acquisition is based on an acquisition method of an integral form of ADC conversion, software is adaptive to data receiving and transmitting, and the flexibility, consistency and expandability of data receiving are improved.
Based on the same inventive concept, the application also provides a super-regenerative data transmission method, which comprises the following steps:
s1: the processor generates a sudden-stop oscillation control signal to control the super-regenerative receiving circuit comprising the frequency-selective element to start oscillation;
s2: the antenna receives an external input signal and sends the external input signal to the super-regenerative receiving circuit comprising the frequency selecting element;
s3: the super-regenerative receiving circuit comprising the frequency selection element enters a regenerative state based on the frequency selection signal and outputs a regenerative oscillation signal;
s4: the low-pass filter carries out low-pass filtering on the regenerated oscillation signal and outputs a low-frequency data signal;
s5: and the processor performs analog-to-digital conversion and sampling on the low-frequency data signal, and realizes data reception according to the sampled data.
The functions of the processor, the antenna, the super-regenerative receiving circuit including the frequency selective element, and the low-pass filter may be specifically described in the above embodiments of the super-regenerative data transmission system, and will not be described herein.
Fig. 11 is a schematic diagram of a computing device 900 provided by an embodiment of the present application. The computing device may be used as a super-regenerative data transmission system to perform the various alternative embodiments of the super-regenerative data transmission method described above, where the computing device may be a terminal, or may be a chip or a chip system within the terminal. As shown in fig. 11, the computing device 900 includes: processor 910, memory 920, and communication interface 930.
It should be appreciated that the communication interface 930 in the computing device 900 shown in fig. 11 may be used to communicate with other devices and may include, in particular, one or more transceiver circuits or interface circuits.
Wherein the processor 910 may be coupled to a memory 920. The memory 920 may be used to store the program codes and data. Accordingly, the memory 920 may be a storage unit internal to the processor 910, an external storage unit independent of the processor 910, or a component including a storage unit internal to the processor 910 and an external storage unit independent of the processor 910.
Optionally, computing device 900 may also include a bus. The memory 920 and the communication interface 930 may be connected to the processor 910 through a bus. The bus may be a peripheral component interconnect standard (Peripheral Component Interconnect, PCI) bus or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, or the like. The buses may be classified as address buses, data buses, control buses, etc. For ease of illustration, an unbiased line is shown in FIG. 11, but does not represent only one bus or one type of bus.
It should be appreciated that in embodiments of the present application, the processor 910 may employ a central processing unit (central processing unit, CPU). The processor may also be other general purpose processors, digital signal processors (digital signal processor, DSP), application specific integrated circuits (application specific integrated circuit, ASIC), off-the-shelf programmable gate arrays (field programmable gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. Or the processor 910 may employ one or more integrated circuits for executing associated programs to perform the techniques provided in the embodiments of the present application.
The memory 920 may include read only memory and random access memory and provide instructions and data to the processor 910. A portion of the processor 910 may also include nonvolatile random access memory. For example, the processor 910 may also store information of the device type.
When the computing device 900 is running, the processor 910 executes computer-executable instructions in the memory 920 to perform any of the operational steps of the methods described above, as well as any of the alternative embodiments.
It should be understood that the computing device 900 according to the embodiments of the present application may correspond to a respective subject performing the methods according to the embodiments of the present application, and that the foregoing and other operations and/or functions of the respective modules in the computing device 900 are respectively for implementing the respective flows of the methods of the embodiments, and are not described herein for brevity.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Embodiments of the present application also provide a computer-readable storage medium having stored thereon a computer program for performing the above-described method when executed by a processor, the method comprising at least one of the aspects described in the above-described embodiments.
Any combination of one or more computer readable media may be employed as the computer storage media of the embodiments herein. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
The computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, either in baseband or as part of a carrier wave. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Computer program code for carrying out operations of the present application may be written in one or more programming languages, including an object oriented programming language such as Java, smalltalk, C ++ and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider).
In addition, the terms "first, second, third, etc." or module a, module B, module C, etc. in the description and the claims are used solely for distinguishing between similar objects and not necessarily for a specific ordering of objects, it being understood that a specific order or sequence may be interchanged if allowed to enable the embodiments of the application described herein to be practiced otherwise than as specifically illustrated and described herein.
In the above description, reference numerals indicating steps such as S110, S120, … …, etc. do not necessarily indicate that the steps are performed in this order, and the order of the steps may be interchanged or performed simultaneously as the case may be.
The term "comprising" as used in the description and claims should not be interpreted as being limited to what is listed thereafter; it does not exclude other elements or steps. Thus, it should be interpreted as specifying the presence of the stated features, integers, steps or components as referred to, but does not preclude the presence or addition of one or more other features, integers, steps or components, or groups thereof. Thus, the expression "a device comprising means a and B" should not be limited to a device consisting of only components a and B.
Reference in the specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. Thus, appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment, but may. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments as would be apparent to one of ordinary skill in the art from this disclosure.
Note that the above is only a preferred embodiment of the present application and the technical principle applied. Those skilled in the art will appreciate that the present application is not limited to the particular embodiments described herein, but is capable of numerous obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the present application. Thus, while the present application has been described in terms of the foregoing embodiments, the present application is not limited to the foregoing embodiments, but may include many other equivalent embodiments without departing from the spirit of the present application, all of which fall within the scope of the present application.
Claims (10)
1. A super-regenerative data transmission system, comprising:
an antenna for receiving an external input signal;
the super-regenerative receiving circuit comprises a frequency-selecting element, is connected with the antenna and is used for starting oscillation under the control of a sudden stop oscillation control signal of the processor, selecting frequencies of the external input signals through the frequency-selecting element, and outputting regenerative oscillation signals based on the frequency-selecting signals;
the low-pass filter is connected with the super-regenerative receiving circuit comprising the frequency selection element and is used for carrying out low-pass filtering on the regenerative oscillation signal and outputting a low-frequency data signal;
a processor connected with the super-regenerative receiving circuit including a frequency selecting element and the low-pass filter and used for generating a sudden stop oscillation control signal; and carrying out analog-to-digital conversion and sampling on the low-frequency data signal, and realizing data receiving according to the sampled data.
2. The system of claim 1, wherein the frequency selective element comprises a crystal oscillator or a ceramic filter.
3. The system of claim 1, wherein the super-regenerative receive circuit comprising the frequency selective element comprises: the circuit comprises a frequency selecting element, a first resistor, a second resistor, a transistor and a capacitor;
the frequency selecting element is connected between the base electrode and the collector electrode of the transistor after being connected with the first resistor in parallel, the collector electrode of the transistor is also connected with one end of the second resistor, the other end of the second resistor is connected with a power supply, the capacitor is connected between the collector electrode and the emitter electrode of the transistor, and the emitter electrode of the transistor is also grounded.
4. The system of claim 3, wherein the super-regenerative receive circuit comprising the frequency selective element further comprises: a rectifier diode;
the rectifying diode is connected with the collector electrode of the transistor and is used for half-wave rectifying signals.
5. The system of claim 1, wherein the low pass filter is a programmable filter, the filter frequency being set by the processor control.
6. The system of claim 1, wherein the processor performs analog-to-digital conversion and sampling of the low frequency data signal, and wherein the data reception is performed based on the sampled data, comprising:
and the processor performs integral operation on each sampling data in the regeneration period to obtain an integral result, compares the integral result with a preset threshold value, and when the integral result is larger than the preset threshold value, indicates that an external signal enters, so as to realize data receiving.
7. The system of claim 6, wherein the preset threshold is determined as follows:
and under the condition that no external input signal exists, the processor is started in a cold mode, a sudden stop oscillation control signal with a preset period is generated, the super-regenerative receiving circuit comprising the frequency selection element is controlled to start to vibrate, in the preset period, the processor carries out analog-to-digital conversion and sampling on the low-frequency data signal obtained by filtering the low-pass filter, integrates and accumulates collected data, and then takes an average value to obtain a preset threshold value.
8. The system of claim 6 or 7, wherein the preset threshold is determined according to the following formula:
where Th is a threshold, vpp is a signal voltage, t is time, hs is a start of the quench control signal, and he is an end of the quench control signal.
9. A super-regenerative data transmission method, comprising:
the processor generates a sudden-stop oscillation control signal to control the super-regenerative receiving circuit comprising the frequency-selective element to start oscillation;
the antenna receives an external input signal and sends the external input signal to the super-regenerative receiving circuit comprising the frequency selecting element;
the super-regenerative receiving circuit comprising the frequency selection element enters a regenerative state based on the frequency selection signal and outputs a regenerative oscillation signal;
the low-pass filter carries out low-pass filtering on the regenerated oscillation signal and outputs a low-frequency data signal;
and the processor performs analog-to-digital conversion and sampling on the low-frequency data signal, and realizes data reception according to the sampled data.
10. A computing device, comprising:
a communication interface;
at least one processor coupled to the communication interface; and
at least one memory coupled to the processor and storing program instructions that, when executed by the at least one processor, cause the at least one processor to perform the method of claim 9.
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| CN117118468A (en) * | 2023-08-07 | 2023-11-24 | 长春理工大学 | Self-adaptive receiving device based on oscillation control signal |
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| CN117118468A (en) * | 2023-08-07 | 2023-11-24 | 长春理工大学 | Self-adaptive receiving device based on oscillation control signal |
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