CN116430715A - Finite time synchronous control method of time-varying time-delay memristor recurrent neural network - Google Patents

Finite time synchronous control method of time-varying time-delay memristor recurrent neural network Download PDF

Info

Publication number
CN116430715A
CN116430715A CN202211569429.3A CN202211569429A CN116430715A CN 116430715 A CN116430715 A CN 116430715A CN 202211569429 A CN202211569429 A CN 202211569429A CN 116430715 A CN116430715 A CN 116430715A
Authority
CN
China
Prior art keywords
time
response system
memristor
neural network
recurrent neural
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202211569429.3A
Other languages
Chinese (zh)
Other versions
CN116430715B (en
Inventor
李小凡
黄鑫
李慧媛
王建冈
张春富
何佳昊
姚金泽
陈洁
王一舟
朱昊冬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuxi Xiangyuan Information Technology Co ltd
Original Assignee
Yancheng Institute of Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yancheng Institute of Technology filed Critical Yancheng Institute of Technology
Priority to CN202211569429.3A priority Critical patent/CN116430715B/en
Publication of CN116430715A publication Critical patent/CN116430715A/en
Application granted granted Critical
Publication of CN116430715B publication Critical patent/CN116430715B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B13/00Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion
    • G05B13/02Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric
    • G05B13/04Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric involving the use of models or simulators
    • G05B13/042Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric involving the use of models or simulators in which a parameter or coefficient is automatically adjusted to optimise the performance

Abstract

The invention belongs to the technical field of new generation information, and particularly relates to a finite time synchronization control method of a time-varying time-delay memristor recurrent neural network. The method comprises the following steps: step S1: establishing a time-varying time-delay memristor recurrent neural network driving system and a response system; step S2: setting synchronous errors of a driving system and a response system according to the time-varying time-delay memristor recurrent neural network driving system and the response system established in the step S1, and establishing a synchronous error system; step S3: and (2) designing a state feedback synchronous controller according to the synchronous error set in the step (S2), and acting the state feedback synchronous controller on the response system to enable the response system to be synchronous with the driving system for a limited time. The invention can realize the finite time synchronization of the time-varying time-delay memristor recurrent neural network.

Description

Finite time synchronous control method of time-varying time-delay memristor recurrent neural network
Technical Field
The invention relates to the technical field of new generation information, in particular to a finite time synchronization control method of a time-varying time-delay memristor recurrent neural network.
Background
Memristors are novel nano devices which are paid attention to in recent years, have wide application prospects in the technical field of new generation information, and are particularly applied to new generation information technologies such as low-power-consumption brain-like calculation, data storage, nonvolatile logic and the like. Memristors have the characteristics of high speed, low power consumption, information storage, information functions and the like, and are considered as a fourth circuit basic element after resistance, capacitance and inductance. In addition, memristors, unlike resistances, have a very important characteristic: it can memorize the amount of charge flowing through it, i.e. there is a hysteresis-like loop in the volt-ampere characteristic of the memristor. This characteristic is similar to the memory characteristics of biological neuron synapses, so memristors are often used to simulate synapses in artificial neural networks.
The recurrent neural network is an artificial neural network with a tree-shaped hierarchical structure and the network nodes recursively carry out input information according to the connection sequence, has memory, parameter sharing and complete graphics, and therefore has certain advantages in learning the nonlinear characteristics of the sequence. Therefore, the memristor is introduced into the recurrent neural network to study the dynamic behavior of the memristive recurrent neural network.
In practical applications, it is always desirable that the system achieve synchronization as soon as possible. The finite time control method is a frequently adopted effective control method, and the finite time control method proves better interference suppression performance, robustness and the like. Currently, there are many synchronization criteria including time-lapse neural networks, but the problem of limited time synchronization control of memristive recurrent neural networks including time-lapse is often not fully considered.
Disclosure of Invention
Therefore, the invention aims to provide a limited time synchronization control method of a time-varying time-delay memristor recurrent neural network, which can realize limited time synchronization of the time-varying time-delay memristor recurrent neural network.
The invention is realized by adopting the following scheme: a finite time synchronous control method of a time-varying time-delay memristor recurrent neural network comprises the following steps:
step S1: establishing a time-varying time-delay memristor recurrent neural network driving system and a response system;
step S2: setting synchronous errors of a driving system and a response system according to the time-varying time-delay memristor recurrent neural network driving system and the response system established in the step S1, and establishing a synchronous error system;
step S3: and (2) designing a state feedback synchronous controller according to the synchronous error set in the step (S2), and acting the state feedback synchronous controller on the response system to enable the response system to be synchronous with the driving system for a limited time.
Further, the step S1 specifically includes the following steps:
step S11: the established time-varying time-delay memristor recurrent neural network driving system is as follows:
Figure BDA0003987407780000021
step S12: the established time-varying time-delay memristor recurrent neural network response system is as follows:
Figure BDA0003987407780000022
in the driving system and the response system, p, q=1, 2, …, n; n represents the number of neurons in the driving system and the response system; the time t is more than or equal to 0; v p(t) and wp (t) representing the state variables of the p-th neuron of the drive system and response system, respectively, at time t; d, d p Is a self-feedback connection weight and satisfies d p ≥0;g q (v q(t)) and gq (w q (t)) represents an activation function in which the q-th neuron in the driving system and the response system, respectively, does not contain a time lag; h is a q (v q (t-δ qp (t))) and h q (w q (t-δ qp (t)) representing an activation function in which the q-th neuron in the drive system and the response system, respectively, comprises a time-varying time-lag; the activation function g q (v q (t))、g q (w q (t))、h q (v q (t-δ qp (t))) and h q (w q (t-δ qp (t))) is a monotonically non-decreasing function and satisfies g q (0)=h q (0)=0、
Figure BDA0003987407780000023
Figure BDA0003987407780000024
wherein />
Figure BDA0003987407780000025
Is a positive constant; for any real numbers a and b, the activation function satisfies |g q (a)-g q (b)|≤η q A-b and +.>
Figure BDA0003987407780000027
wherein ηq and />
Figure BDA0003987407780000028
Is a positive constant; delta qp (t) represents a time-varying time lag; j (J) p Is an external input; u (u) p Representing a state feedback synchronous controller; />
Figure BDA0003987407780000026
Respectively represent v p (t)、w p (t) a derivative of time t; a, a pq (v q (t))、g q (w q (t))、b pq (v q (t-δ qp (t)))、h q (w q (t-δ qp (t))) represents memristor connection weights, respectively satisfying:
Figure BDA0003987407780000031
Figure BDA0003987407780000032
Figure BDA0003987407780000033
Figure BDA0003987407780000034
wherein ,D- (g q (v q (t))-v p (t)) represents g q (v q (t))-v p (t) solving for dini Zuo Daoshu for time t; d (D) - (g q (w q (t))-w p (t)) represents g q (w q (t))-w p (t) solving for dini Zuo Daoshu for time t; d (D) - (h q (v q (t-δ qp (t)))-v p (t)) represents h q (v q (t-δ qp (t)))-v p (t) solving for dini Zuo Daoshu for time t; d (D) - (h q (w q (t-δ qp (t)))-w p (t)) represents h q (w q (t-δ qp (t)))-w p (t) solving for dini Zuo Daoshu for time t;
Figure BDA0003987407780000035
are all constant;
since the right side of the equal sign of the driving system and the response system is discontinuous, solutions of the driving system and the response system need to be considered in the Filipply ov sense, and then the driving system and the response system are respectively rewritten as follows by adopting a set value mapping and differential inclusion theory:
Figure BDA0003987407780000041
Figure BDA0003987407780000042
in the formula ,
Figure BDA0003987407780000043
Figure BDA0003987407780000044
co[a pq (v q (t))]、co[v q (t-δ qp (t))]、co[a pq (w q (t))]、co[w q (t-δ qp (t))]the following respectively satisfy:
Figure BDA0003987407780000045
Figure BDA0003987407780000046
Figure BDA0003987407780000047
Figure BDA0003987407780000048
wherein ,
Figure BDA0003987407780000049
Figure BDA0003987407780000051
further, the step S2 specifically includes the following steps:
step S21: according to the time-varying time-delay memristor recurrent neural network driving system and the response system established in the step S1, setting the synchronous error of the driving system and the response system as follows:
e p (t)=v p (t)-w p (t)
step S22: according to the driving system, the response system and the synchronization error set in the step S21, a synchronization error system is established as follows:
Figure BDA0003987407780000052
wherein ,
Figure BDA0003987407780000053
representing the synchronization error e p (t) derivative with respect to time t.
Further, the step S3 specifically includes the following:
step S31: the design state feedback synchronous controller is as follows:
Figure BDA0003987407780000054
wherein p, q=1, 2, …, n; lambda (lambda) p 、θ p 、κ p 、γ p Gain for controller, where lambda p >0、θ p >0;v∈(0,1);sign(e p (t)) is expressed as a synchronization error e p A sign function of (t); e, e q (t-δ qp (t))=v q (t-δ qp (t))-w q (t-δ qp (t)); controller gain lambda p 、κ p 、γ p The following inequality is satisfied:
Figure BDA0003987407780000055
Figure BDA0003987407780000056
Figure BDA0003987407780000057
wherein ,
Figure BDA0003987407780000058
step S32: and the state feedback synchronous controller acts on the response system so that the response system is synchronous with the driving system for a limited time.
Further, according to the finite time synchronization control method of the time-varying time-delay memristor recurrent neural network, the response system is synchronized with the driving system in finite time, and the finite time range is as follows:
Figure BDA0003987407780000061
wherein e (0) = (e) 1 (0),e 2 (0),…,e n (0)) T ;θ=min{θ 1 ,θ 2 ,…,θ n };||e(0)|| 2 Is the 2-norm of e (0).
The invention provides a finite time synchronous control method of a time-varying time-delay memristor recurrent neural network, which has the beneficial effects that compared with the prior art, the method is as follows:
1. in the invention, a memristor is adopted to simulate synapses in the neural network, so that the memristor recurrent neural network is constructed.
2. In the invention, the influence of time-varying time lag on the neural network model is considered, so that the finite time synchronous control method of the time-varying time lag memristor recurrent neural network has wider application.
3. The invention realizes the finite time synchronous control method of the time-varying time-delay memristor recurrent neural network, and compared with an asymptotic synchronous control method, the synchronous control method is a more practical synchronous control method, because the asymptotic synchronous control method has infinite synchronous time in theory, and the finite time synchronous control method ensures that a response system is synchronous with a driving system in finite time.
Drawings
FIG. 1 is a flow chart of a finite time synchronization control method of a time-varying time-lapse memristive recurrent neural network of the present invention;
FIG. 2 is a diagram showing a variation trace of a synchronization error without a controller in embodiment 2 of the present invention;
FIG. 3 shows the driving system state v without the controller in embodiment 2 of the present invention 1 (t) and responsive System status w 1 A trace map of (t);
FIG. 4 shows the driving system state v without the controller in embodiment 2 of the present invention 2 (t) and responsive System status w 2 A trace map of (t);
FIG. 5 is a diagram showing a variation trace of synchronization error under the action of a state feedback synchronization controller in embodiment 2 of the present invention;
FIG. 6 shows a driving system state v under the action of a state feedback synchronous controller in embodiment 2 of the present invention 1 (t) and responsive System status w 1 A trace map of (t);
FIG. 7 shows a driving system state v under the action of a state feedback synchronous controller in embodiment 2 of the present invention 2 (t) and responsive System status w 2 Trace map of (t).
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail with reference to the accompanying drawings and examples.
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the present application. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments in accordance with the present application. As used herein, the singular is also intended to include the plural unless the context clearly indicates otherwise, and furthermore, it is to be understood that the terms "comprises" and/or "comprising" when used in this specification are taken to specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof.
Example 1:
as shown in fig. 1, the present embodiment provides a finite time synchronization control method of a time-varying time-lapse memristive recurrent neural network. The synchronous control method comprises the following steps:
step S1: establishing a time-varying time-delay memristor recurrent neural network driving system and a response system;
step S2: setting synchronous errors of a driving system and a response system according to the time-varying time-delay memristor recurrent neural network driving system and the response system established in the step S1, and establishing a synchronous error system;
step S3: and (2) designing a state feedback synchronous controller according to the synchronous error set in the step (S2), and acting the state feedback synchronous controller on the response system to enable the response system to be synchronous with the driving system for a limited time.
In this embodiment, step S1 specifically includes the following:
step S11: the established time-varying time-delay memristor recurrent neural network driving system is as follows:
Figure BDA0003987407780000071
step S12: the established time-varying time-delay memristor recurrent neural network response system is as follows:
Figure BDA0003987407780000072
in the driving system and the response system, p, q=1, 2, …, n; n represents the number of neurons in the driving system and the response system; the time t is more than or equal to 0; v p(t) and wp (t) representing the state variables of the p-th neuron of the drive system and response system, respectively, at time t; d, d p Is a self-feedback connection weight and satisfies d p ≥0;g q (v q(t)) and gq (w q (t)) represents an activation function in which the q-th neuron in the driving system and the response system, respectively, does not contain a time lag; h is a q (v q (t-δ qp (t))) and h q (w q (t-δ qp (t)) representing an activation function in which the q-th neuron in the drive system and the response system, respectively, comprises a time-varying time-lag; the activation function g q (v q (t))、g q (w q (t))、h q (v q (t-δ qp (t))) and h q (w q (t-δ qp (t))) is a monotonically non-decreasing function and satisfies g q (0)=h q (0)=0、
Figure BDA0003987407780000081
Figure BDA0003987407780000082
wherein />
Figure BDA0003987407780000083
Is a positive constant; for any real numbers a and b, the activation function satisfies |g q (a)-g q (b)|≤η q A-b and +.>
Figure BDA0003987407780000084
wherein ηq and />
Figure BDA0003987407780000089
Is a positive constant; delta qp (t) represents a time-varying time lag; j (J) p Is an external input; u (u) p Representing a state feedback synchronous controller; />
Figure BDA0003987407780000085
Respectively represent v p (t)、w p (t) a derivative of time t; a, a pq (v q (t))、g q (w q (t))、b pq (v q (t-δ qp (t)))、h q (w q (t-δ qp (t))) represents memristor connection weights, respectively satisfying:
Figure BDA0003987407780000086
Figure BDA0003987407780000087
Figure BDA0003987407780000088
Figure BDA0003987407780000091
wherein ,D- (g q (v q (t))-v p (t)) represents g q (v q (t))-v p (t) solving for dini Zuo Daoshu for time t; d (D) - (g q (w q (t))-w p (t)) represents g q (w q (t))-w p (t) solving for dini Zuo Daoshu for time t; d (D) - (h q (v q (t-δ qp (t)))-v p (t)) represents h q (v q (t-δ qp (t)))-v p (t) solving for dini Zuo Daoshu for time t; d (D) - (h q (w q (t-δ qp (t)))-w p (t)) represents h q (w q (t-δ qp (t)))-w p (t) solving for dini Zuo Daoshu for time t;
Figure BDA0003987407780000092
are all constant;
since the right side of the equal sign of the driving system and the response system is discontinuous, solutions of the driving system and the response system need to be considered in the Filipply ov sense, and then the driving system and the response system are respectively rewritten as follows by adopting a set value mapping and differential inclusion theory:
Figure BDA0003987407780000093
Figure BDA0003987407780000094
in the formula ,
Figure BDA0003987407780000095
Figure BDA0003987407780000096
co[a pq (v q (t))]、co[v q (t-δ qp (t))]、co[a pq (w q (t))]、co[w q (t-δ qp (t))]the following respectively satisfy:
Figure BDA0003987407780000101
Figure BDA0003987407780000102
Figure BDA0003987407780000103
Figure BDA0003987407780000104
wherein ,
Figure BDA0003987407780000105
Figure BDA0003987407780000106
in this embodiment, the step S2 specifically includes the following steps:
step S21: according to the time-varying time-delay memristor recurrent neural network driving system and the response system established in the step S1, setting the synchronous error of the driving system and the response system as follows:
e p (t)=v p (t)-w p (t)
step S22: according to the driving system, the response system and the synchronization error set in the step S21, a synchronization error system is established as follows:
Figure BDA0003987407780000111
wherein ,
Figure BDA0003987407780000112
representing the synchronization error e p (t) derivative with respect to time t.
In this embodiment, the step S3 specifically includes the following steps:
step S31: the design state feedback synchronous controller is as follows:
Figure BDA0003987407780000113
wherein p, q=1, 2, …, n; lambda (lambda) p 、θ p 、κ p 、γ p Gain for controller, where lambda p >0、θ p >0;v∈(0,1);sign(e p (t)) is expressed as a synchronization error e p A sign function of (t); e, e q (t-δ qp (t))=v q (t-δ qp (t))-w q (t-δ qp (t)); controller gain lambda p 、κ p 、γ p The following inequality is satisfied:
Figure BDA0003987407780000114
Figure BDA0003987407780000115
Figure BDA0003987407780000116
wherein ,
Figure BDA0003987407780000117
step S32: and the state feedback synchronous controller acts on the response system so that the response system is synchronous with the driving system for a limited time.
In this embodiment, according to the finite time synchronization control method of the time-varying time-delay memristor recurrent neural network, the response system is synchronized with the driving system in a finite time, and the finite time ranges are as follows:
Figure BDA0003987407780000118
wherein e (0) = (e) 1 (0),e 2 (0),…,e n (0)) T ;θ=min{θ 1 ,θ 2 ,…,θ n };||e(0)|| 2 Is the 2-norm of e (0).
It is worth to say that, according to the characteristics of the memristor, the influence of time-varying time delay on the memristor recurrent neural network model is particularly considered, so that the limited time synchronization control method of the time-varying time delay memristor recurrent neural network has wider application. In the invention, the memristor is adopted to simulate the synapse in the neural network, and in the neural network, the synapse is responsible for information storage and calculation, so that the memristor has similar memory characteristics as the synapse, and can better simulate the synapse. The invention realizes the finite time synchronous control method of the time-varying time-delay memristor recurrent neural network, and compared with an asymptotic synchronous control method, the synchronous control method is a more practical synchronous control method, because the asymptotic synchronous control method has infinite synchronous time in theory, and the finite time synchronous control method ensures that a response system is synchronous with a driving system in finite time.
Example 2:
the embodiment mainly comprises two parts of contents:
one is to carry out theoretical demonstration on the effectiveness of a finite time synchronization control method of a time-varying time-lapse memristor recurrent neural network proposed in embodiment 1.
Secondly, the synchronous performance of the time-varying time-delay memristor recurrent neural network driving system and the response system in the embodiment 1 is simulated and verified by a numerical simulation method.
(neither theoretical demonstration nor simulation experiment is intended to limit the invention, in other embodiments, simulation experiments may be omitted, or other experimental schemes may be used to verify the performance of the neural network system.)
1. Proof of theory
The definitions and quotients that will be employed in the attestation process are given below:
definition 1: for the driving system and the response system of the invention, if there is a time T, for t+.t, there is e (T) =v (T) -w (T) = (0, …, 0) T And
Figure BDA0003987407780000121
then the response system is said to be time-synchronized to the drive system for a limited period of time, where e (t) = (e) 1 (t),e 2 (t),…,e n (t)) T ,v(t)=(v 1 (t),v 2 (t),…,v n (t)) T ,w(t)=(w 1 (t),w 2 (t),…,w n (t)) T
Lemma 1: for the synchronization error e (t) of the drive system and the response system, if there is a positive definite continuous function V (t, e (t)), the inequality is satisfied: d (D) + V (T, e (T)). Ltoreq. -beta (V (T, e (T))), then the drive system and response system achieve limited time synchronization, and the limited time T satisfies
Figure BDA0003987407780000122
Further, if β (V (t, e (t))) =fv ε (T, e (T)), the finite time T satisfies:
Figure BDA0003987407780000131
wherein, for any χ>0, have
Figure BDA0003987407780000132
e (0) represents an initial value of a synchronization error; d (D) + An identification representing a derivative of the function diy; f (F)>0、0<ε<1。
And (4) lemma 2: if z 1 、z 2 、…、z n Are all nonnegative numbers, a 2 >a 1 >0, the following inequality holds:
Figure BDA0003987407780000133
according to embodiment 1, the synchronization error system is as follows:
Figure BDA0003987407780000134
order the
Figure BDA0003987407780000135
Figure BDA0003987407780000136
The synchronization error system can be rewritten as:
Figure BDA0003987407780000137
then, the following relationship can be obtained according to the condition satisfied by the activation function:
Figure BDA0003987407780000138
Figure BDA0003987407780000139
e p (t)sign(e p (t))=|e p (t)|
next, the lyapunov functional is constructed:
Figure BDA0003987407780000141
the established lyapunov functional is then solved for the dily derivative:
Figure BDA0003987407780000142
again because:
Figure BDA0003987407780000143
then D + V (t, e (t)) can be further obtained:
Figure BDA0003987407780000144
/>
Figure BDA0003987407780000151
and because of the controller gain lambda p 、κ p 、γ p The following three inequalities are satisfied:
Figure BDA0003987407780000152
Figure BDA0003987407780000153
Figure BDA0003987407780000154
then it is further possible to obtain:
Figure BDA0003987407780000155
then according to lemma 2, since v+1 ε (1, 2), we can get:
Figure BDA0003987407780000161
thus, it is possible to further obtain:
Figure BDA0003987407780000162
wherein θ=min { θ 1 ,θ 2 ,…,θ n };v∈(0,1)。
According to lemma 1, for any χ e (0, ++ infinity a) of the above-mentioned components, can obtain
Figure BDA0003987407780000163
It can thus be derived that the finite time T satisfies:
Figure BDA0003987407780000164
wherein e (0) = (e) 1 (0),e 2 (0),…,e n (0)) T ;||e(0)|| 2 Is the 2-norm of e (0).
Thus, as can be seen from definition 1 and quotation 1, the response system is synchronized with the driving system for a limited time and within a limited time range under the action of the state feedback synchronous controller
Figure BDA0003987407780000165
2. Numerical simulation
In this embodiment, taking a time-varying time-lapse memristive recurrent neural network system containing two neurons as an example, the driving system is determined as:
Figure BDA0003987407780000166
the response system corresponding to the driving system is as follows:
Figure BDA0003987407780000167
wherein t is more than or equal to 0; g q (v q (t))=tanh(v q (t))、h q (v q (t-δ qp (t)))=tanh(v q (t-δ qp (t)))、g q (w q (t))=tanh(w q (t))、h q (w q (t-δ qp (t)))=tanh(w q (t-δ qp (t)));d 1 =1.2、d 2 =0.9; constant (constant)
Figure BDA0003987407780000171
δ qp (t)=0.76-0.24cos(t);J 1 =J 2 =0; p=1, 2; q=1, 2; memristor connection weights are selected as: />
Figure BDA0003987407780000172
Figure BDA0003987407780000173
Figure BDA0003987407780000174
Figure BDA0003987407780000175
Figure BDA0003987407780000176
Figure BDA0003987407780000177
Figure BDA0003987407780000178
Figure BDA0003987407780000181
/>
Figure BDA0003987407780000182
Figure BDA0003987407780000183
Figure BDA0003987407780000184
Figure BDA0003987407780000185
Figure BDA0003987407780000186
Figure BDA0003987407780000187
Figure BDA0003987407780000188
Figure BDA0003987407780000191
According to the above parameter settings, and inequality
Figure BDA0003987407780000192
Figure BDA0003987407780000193
and />
Figure BDA0003987407780000194
The parameter value ranges of the available state feedback synchronous controller are respectively as follows: lambda (lambda) 1 >3.25、λ 2 >2.85、κ 1 >2.7、κ 2 >2.4、γ 1 >2.05、γ 2 >2.15, the state feedback synchronous controller parameter may take the value: lambda (lambda) 1 =3.3、λ 2 =2.9、κ 1 =2.8、κ 2 =2.5、γ 1 =2.1、γ 2 =2.2; other state feedback synchronous controller parameters take the value of theta 1 =θ 2 =1。
And the driving system, the response system and the state feedback synchronous controller carry out numerical simulation experiments on the driving system, the response system and the state feedback synchronous controller under the set parameters. The initial values of the drive system and the response system are set as follows: v 1 (0)=2.3,v 2 (0)=0.5,w 1 (0)=-2.1,w 2 (0) = -1.1, the specific simulation experiment results are as follows: FIG. 2 is a graph of the variation of synchronization error without the action of a controller; FIG. 3 shows the state v of the drive system without the action of a controller 1 (t) and responsive System status w 1 A trace map of (t); fig. 4 shows the driving system state v without the action of the controller 2 (t) and responsive System status w 2 A trace map of (t); FIG. 5 is a graph of the variation trace of synchronization error under the action of a state feedback synchronization controller; FIG. 6 shows a state feedback synchronous controllerUnder action drive system state v 1 (t) and responsive System status w 1 A trace map of (t); FIG. 7 shows the driving system state v under the action of the state feedback synchronous controller 2 (t) and responsive System status w 2 A trace map of (t); 2-4 show that the driving system and the response system cannot realize synchronization under the action of the controller; the traces of fig. 6-7 demonstrate that the response system is synchronized with the drive system within a finite time under the action of the state feedback synchronization controller, and the synchronization performance is verified.
Finally, it should be noted that: the foregoing is merely a preferred example of the present invention, and the present invention is not limited thereto, but it is to be understood that modifications and equivalents of some of the technical features described in the foregoing embodiments may be made by those skilled in the art, although the present invention has been described in detail with reference to the foregoing embodiments. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (5)

1. The finite time synchronous control method of the time-varying time-delay memristor recurrent neural network is characterized by comprising the following steps of:
step S1: establishing a time-varying time-delay memristor recurrent neural network driving system and a response system;
step S2: setting synchronous errors of a driving system and a response system according to the time-varying time-delay memristor recurrent neural network driving system and the response system established in the step S1, and establishing a synchronous error system;
step S3: and (2) designing a state feedback synchronous controller according to the synchronous error set in the step (S2), and acting the state feedback synchronous controller on the response system to enable the response system to be synchronous with the driving system for a limited time.
2. The finite time synchronization control method of a time-varying time-lapse memristor recurrent neural network according to claim 1, wherein step S1 specifically comprises the steps of:
step S11: the established time-varying time-delay memristor recurrent neural network driving system is as follows:
Figure FDA0003987407770000011
step S12: the established time-varying time-delay memristor recurrent neural network response system is as follows:
Figure FDA0003987407770000012
in the driving system and the response system, p, q=1, 2, …, n; n represents the number of neurons in the driving system and the response system; the time t is more than or equal to 0; v p(t) and wp (t) representing the state variables of the p-th neuron of the drive system and response system, respectively, at time t; d, d p Is a self-feedback connection weight and satisfies d p ≥0;g q (v q(t)) and gq (w q (t)) represents an activation function in which the q-th neuron in the driving system and the response system, respectively, does not contain a time lag; h is a q (v q (t-δ qp (t))) and h q (w q (t-δ qp (t)) representing an activation function in which the q-th neuron in the drive system and the response system, respectively, comprises a time-varying time-lag; the activation function g q (v q (t))、g q (w q (t))、h q (v q (t-δ qp (t))) and h q (w q (t-δ qp (t))) is a monotonically non-decreasing function and satisfies g q (0)=h q (0)=0、
Figure FDA0003987407770000013
Figure FDA0003987407770000014
wherein />
Figure FDA0003987407770000015
Is a positive constant; for any real numbers a and b, the activation function satisfies |g q (a)-g q (b)|≤η q A-b and +.>
Figure FDA0003987407770000027
wherein ηq and />
Figure FDA0003987407770000028
Is a positive constant; delta qp (t) represents a time-varying time lag; j (J) p Is an external input; u (u) p Representing a state feedback synchronous controller; />
Figure FDA0003987407770000021
Respectively represent v p (t)、w p (t) a derivative of time t; a, a pq (v q (t))、g q (w q (t))、b pq (v q (t-δ qp (t)))、h q (w q (t-δ qp (t))) represents memristor connection weights, respectively satisfying:
Figure FDA0003987407770000022
Figure FDA0003987407770000023
Figure FDA0003987407770000024
Figure FDA0003987407770000025
wherein ,D- (g q (v q (t))-v p (t)) represents g q (v q (t))-v p (t) solving for dini Zuo Daoshu for time t; d (D) - (g q (w q (t))-w p (t)) represents g q (w q (t))-w p (t) solving for dini Zuo Daoshu for time t; d (D) - (h q (v q (t-δ qp (t)))-v p (t)) represents h q (v q (t-δ qp (t)))-v p (t) solving for dini Zuo Daoshu for time t; d (D) - (h q (w q (t-δ qp (t)))-w p (t)) represents h q (w q (t-δ qp (t)))-w p (t) solving for dini Zuo Daoshu for time t;
Figure FDA0003987407770000026
are all constant;
since the right side of the equal sign of the driving system and the response system is discontinuous, solutions of the driving system and the response system need to be considered in the Filipply ov sense, and then the driving system and the response system are respectively rewritten as follows by adopting a set value mapping and differential inclusion theory:
Figure FDA0003987407770000031
Figure FDA0003987407770000032
in the formula ,
Figure FDA0003987407770000033
Figure FDA0003987407770000034
co[a pq (v q (t))]、co[v q (t-δ qp (t))]、co[a pq (w q (t))]、co[w q (t-δ qp (t))]the following respectively satisfy:
Figure FDA0003987407770000035
Figure FDA0003987407770000036
Figure FDA0003987407770000037
Figure FDA0003987407770000041
wherein ,
Figure FDA0003987407770000042
Figure FDA0003987407770000043
3. the finite time synchronization control method of a time-varying time-lapse memristor recurrent neural network according to claim 1, wherein step S2 specifically comprises the following steps:
step S21: according to the time-varying time-delay memristor recurrent neural network driving system and the response system established in the step S1, setting the synchronous error of the driving system and the response system as follows:
e p (t)=v p (t)-w p (t)
step S22: according to the driving system, the response system and the synchronization error set in the step S21, a synchronization error system is established as follows:
Figure FDA0003987407770000044
wherein ,
Figure FDA0003987407770000045
representing the synchronization error e p (t) derivative with respect to time t.
4. The finite time synchronization control method of a time-varying time-lapse memristor recurrent neural network according to claim 1, wherein step S3 specifically comprises the following steps:
step S31: the design state feedback synchronous controller is as follows:
Figure FDA0003987407770000046
wherein p, q=1, 2, …, n; lambda (lambda) p 、θ p 、κ p 、γ p Gain for controller, where lambda p >0、θ p >0;v∈(0,1);sign(e p (t)) is expressed as a synchronization error e p A sign function of (t); e, e q (t-δ qp (t))=v q (t-δ qp (t))-w q (t-δ qp (t)); controller gain lambda p 、κ p 、γ p The following inequality is satisfied:
Figure FDA0003987407770000051
Figure FDA0003987407770000052
Figure FDA0003987407770000053
wherein ,
Figure FDA0003987407770000054
step S32: and the state feedback synchronous controller acts on the response system so that the response system is synchronous with the driving system for a limited time.
5. The method of finite time synchronization control of a time-varying time-lapse memristive recurrent neural network of claim 1, wherein the response system is synchronized to the drive system for a finite time, and the finite time ranges from:
Figure FDA0003987407770000055
wherein e (0) = (e) 1 (0),e 2 (0),…,e n (0)) T ;θ=min{θ 1 ,θ 2 ,…,θ n };||e(0)|| 2 Is the 2-norm of e (0).
CN202211569429.3A 2022-12-08 2022-12-08 Finite time synchronous control method of time-varying time-delay memristor recurrent neural network Active CN116430715B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211569429.3A CN116430715B (en) 2022-12-08 2022-12-08 Finite time synchronous control method of time-varying time-delay memristor recurrent neural network

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211569429.3A CN116430715B (en) 2022-12-08 2022-12-08 Finite time synchronous control method of time-varying time-delay memristor recurrent neural network

Publications (2)

Publication Number Publication Date
CN116430715A true CN116430715A (en) 2023-07-14
CN116430715B CN116430715B (en) 2023-11-03

Family

ID=87087815

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211569429.3A Active CN116430715B (en) 2022-12-08 2022-12-08 Finite time synchronous control method of time-varying time-delay memristor recurrent neural network

Country Status (1)

Country Link
CN (1) CN116430715B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117031962A (en) * 2023-09-08 2023-11-10 盐城工学院 Fixed time synchronous control method for time-lapse memristor cell neural network
CN117195558A (en) * 2023-09-08 2023-12-08 盐城工学院 Memristor-based finite time synchronization control method for cellular neural network

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170017879A1 (en) * 2015-07-13 2017-01-19 Denso Corporation Memristive neuromorphic circuit and method for training the memristive neuromorphic circuit
CN108762067A (en) * 2018-04-28 2018-11-06 南京理工大学 A kind of the networking Synchronizing Control Devices and acquisition methods of memristor neural network
CN113095497A (en) * 2021-05-06 2021-07-09 安徽大学 Finite time synchronization method and device for fractional order quaternary memristor neural network
CN113219836A (en) * 2021-05-19 2021-08-06 安徽大学 Projection synchronization method of fractional order complex value memristor neural network and application of projection synchronization method
CN114819081A (en) * 2022-04-20 2022-07-29 集美大学 Method for adjusting synchronous energy consumption of memristor neural network in preset time
CN115145156A (en) * 2022-07-28 2022-10-04 盐城工学院 Self-adaptive anti-synchronization method of inertia memristor neural network
CN115169539A (en) * 2022-07-28 2022-10-11 盐城工学院 Secret communication method based on inertia complex value memristor neural network

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170017879A1 (en) * 2015-07-13 2017-01-19 Denso Corporation Memristive neuromorphic circuit and method for training the memristive neuromorphic circuit
CN108762067A (en) * 2018-04-28 2018-11-06 南京理工大学 A kind of the networking Synchronizing Control Devices and acquisition methods of memristor neural network
CN113095497A (en) * 2021-05-06 2021-07-09 安徽大学 Finite time synchronization method and device for fractional order quaternary memristor neural network
CN113219836A (en) * 2021-05-19 2021-08-06 安徽大学 Projection synchronization method of fractional order complex value memristor neural network and application of projection synchronization method
CN114819081A (en) * 2022-04-20 2022-07-29 集美大学 Method for adjusting synchronous energy consumption of memristor neural network in preset time
CN115145156A (en) * 2022-07-28 2022-10-04 盐城工学院 Self-adaptive anti-synchronization method of inertia memristor neural network
CN115169539A (en) * 2022-07-28 2022-10-11 盐城工学院 Secret communication method based on inertia complex value memristor neural network

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
程雨虹等: "分数阶时滞忆阻神经网络的有限时间投影同步", 安庆师范大学学报(自然科学版), vol. 28, no. 3, pages 31 - 32 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117031962A (en) * 2023-09-08 2023-11-10 盐城工学院 Fixed time synchronous control method for time-lapse memristor cell neural network
CN117195558A (en) * 2023-09-08 2023-12-08 盐城工学院 Memristor-based finite time synchronization control method for cellular neural network
CN117031962B (en) * 2023-09-08 2024-01-02 盐城工学院 Fixed time synchronous control method for time-lapse memristor cell neural network
CN117195558B (en) * 2023-09-08 2024-02-09 盐城工学院 Memristor-based finite time synchronization control method for cellular neural network

Also Published As

Publication number Publication date
CN116430715B (en) 2023-11-03

Similar Documents

Publication Publication Date Title
CN116430715B (en) Finite time synchronous control method of time-varying time-delay memristor recurrent neural network
Huang et al. Finite-time synchronization of inertial memristive neural networks with time-varying delays via sampled-date control
CN115755621B (en) Finite time self-adaptive synchronous control method for memristor recurrent neural network
Stroud et al. Motor primitives in space and time via targeted gain modulation in cortical networks
Chen et al. Globally stable adaptive backstepping neural network control for uncertain strict-feedback systems with tracking accuracy known a priori
Fang et al. Adaptive fuzzy control for nontriangular stochastic high-order nonlinear systems subject to asymmetric output constraints
Hu et al. Finite-time synchronization of delayed neural networks with Cohen–Grossberg type based on delayed feedback control
Wu et al. Exponential stabilization of memristive neural networks with time delays
Ren et al. Fixed-time synchronization of stochastic memristor-based neural networks with adaptive control
Wang et al. Fixed-time synchronization of fractional order memristive MAM neural networks by sliding mode control
Li et al. Finite-time synchronization of time-delayed neural networks with unknown parameters via adaptive control
Chen et al. Associate learning and correcting in a memristive neural network
Carvalho On the semantics and the use of fuzzy cognitive maps in social sciences
Wang et al. Finite/fixed-time synchronization of delayed memristive reaction-diffusion neural networks
Yuan et al. Finite-time anti-synchronization of memristive stochastic BAM neural networks with probabilistic time-varying delays
Cai et al. Aperiodic intermittent pinning control for exponential synchronization of memristive neural networks with time-varying delays
CN115860075B (en) Synchronous control method of fractional order memristor neural network
CN116203838B (en) Finite time synchronization control method for fractional order memristor neural network
de Jesus Rubio et al. Uniform stable radial basis function neural network for the prediction in two mechatronic processes
CN115903470B (en) Hysteresis synchronous control method of inertial complex value memristor neural network
CN115857349B (en) Index synchronous control method of memristive neural network
Fu et al. Exponential synchronization of memristive neural networks with inertial and nonlinear coupling terms: Pinning impulsive control approaches
Qin et al. Finite-time modified projective synchronization of memristor-based neural network with multi-links and leakage delay
Li et al. Robust synchronization of memristive neural networks with strong mismatch characteristics via pinning control
Qin et al. Finite-time projective synchronization of memristor-based neural networks with leakage and time-varying delays

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
EE01 Entry into force of recordation of patent licensing contract
EE01 Entry into force of recordation of patent licensing contract

Application publication date: 20230714

Assignee: DONGTAI GAOKE TECHNOLOGY INNOVATION PARK Co.,Ltd.

Assignor: YANCHENG INSTITUTE OF TECHNOLOGY

Contract record no.: X2024980001259

Denomination of invention: A Finite Time Synchronous Control Method for a Recurrent Neural Network with Time Varying Delay Memory

Granted publication date: 20231103

License type: Common License

Record date: 20240123

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20240318

Address after: Building A 2081, No. 88 Jianghai West Road, Liangxi District, Wuxi City, Jiangsu Province, 214063

Patentee after: Wuxi Xiangyuan Information Technology Co.,Ltd.

Country or region after: China

Address before: 224051 No. 1 hope road middle road, Ting Hu District, Yancheng City, Jiangsu

Patentee before: YANCHENG INSTITUTE OF TECHNOLOGY

Country or region before: China