CN1164295A

CN1164295A - Polycrystalline ferroelectric capacitor heterostructure employing hybrid electrodes

Info

Publication number: CN1164295A
Application number: CN 95196323
Authority: CN
Inventors: R·雷米西
Original assignee: Bell Communications Research Inc
Current assignee: Iconectiv LLC
Priority date: 1994-11-18
Filing date: 1995-11-03
Publication date: 1997-11-05

Abstract

Ferroelectric capacitor heterostructures exhibiting exceptional reliability and resistance to fatigue and imprinting comprise hybrid electrodes of highly conductive platinum (14) with polycrystalline metallic oxide (15) and ferroelectric materials (16) deposited on Si-CMOS-compatible substrates (11) without the requirement for interposed crystallographic orientation templates.

Description

Use the polycrystalline ferroelectric capacitor heterostructure of mixed electrode

The field of the invention

Recently, the ferroelectric thin film with high crystallization grade grows up on silicon substrate, the composition that has wherein used resilient coating and template with cause crystallization and formation required by the material of specific crystalline orientation mutually.For example, on [100] of chemical washing Si wafer, used zirconia (YSZ) with stabilized with yttrium oxide as resilient coating so that a kind of crystalline template to be provided, for the growth of cuprates superconductors succeeding layer (as yttrium-barium-coppevapor hydrochlorate (YBCO)).In U.S. Patent No. 5155658, be stay in place form with a kind of YBCO of C-axle orientation of high crystallization grade, the growth of the YBCO electrode layer that covers for false cube lead zirconium titanate (PZT) the perovskite ferroelectric layer of follow-up one deck and one deck draws the ferroelectric memory element.Yet, in the Si-CMOS processing procedure, present the such problem of high growth temperature.

Later, the crystal growth of the lower temperature of cubic metal oxide (as lanthanum-strontium-cobalt/cobalt oxide (LSCO)) has obtained success, wherein used the C-axle orientation in one deck perovskite (for example bismuth titanates (BTO)) template layer initiation LSCO and the ferroelectric coating of PZT, as person described in the U.S. Patent No. 5270298.The further improvement of the generation of ferro-electric device has then obtained realization in U.S. Patent No. 5248564, wherein use lead-lanthanum-zirconium-titanate (PLZT) in the LSCO/PLZT/LSCO heterostructure, the latter can pass through one deck BTO, or similar bismuth tungstate (BWO) template, be formed at CMOS SiO consistently ₂On/Si the substrate.

The compatibility that however can overcome the restricted of temperature and accomplish CMOS, but at SiO ₂The electrical conductance of the heterostructure the on/Si substrate still is not enough to needing for effective integrated circuit application.According to as yet not the serial number of authorization be that (on October 5th, 1994 proposed for 08/318587 U.S. Patent application, and transfer the possession of jointly with the application) disclosed operation, by means of the middle epitaxial diposition of the directed platinum on one deck perovskite template, this shortcoming is eliminated.The operation of, extra template and crystallizing layer growth has obviously prolonged the processed time of device.

General introduction of the present invention

The present invention was surprised to find already, and one deck perovskite of formation (for example BTO) template interlayer can give abolishment, and is grown in the Ti that felt secure routinely, Ta or TiO ₂Have an amorphous Si O ₂Thin metal (as platinum) film on the commerical grade silicon wafer substrate on surface can provide required electricity layer conductivity, can support as LSCO LaSrCrO again ₃, RuOx and SrRuO ₃And so on the good polycrystalline growth of any several metal capacitor oxide electrode material, at least a middle perovskite ferroelectric layer of equally also can growing subsequently as PLZT or PZT and so on.The desired ferroelectric properties of this class material especially with regard to the antifatigue and the marking (imprint), is not influenced by polycrystal growth institute and can further make it perfect as far as possible by doping %-10% lanthanum and niobium.

The summary of accompanying drawing

The present invention is narrated with reference to following accompanying drawing, wherein:

Fig. 1 is the representative elevational sectional view of ferroelectric heterostructure of the present invention;

Fig. 2 is of the present invention for pressing, by growing in Si/SiO ₂The representative X-ray diffraction figure of the strong ferroelectric heterostructure of gained on the substrate;

Fig. 3 lacks one deck SiO for growing in ₂The representative X-ray diffraction figure of weak ferroelectric heterostructure of substrate gained;

Fig. 4 is the representative X-ray diffraction figure at the strong ferroelectric heterostructure of LSCO electrode bottom growth gained;

Fig. 5 is the representative X-ray diffraction figure of the weak ferroelectric heterostructure of no LSCO electrode bottom growth gained;

Fig. 6 is the contrast hysteresis loop figure that the heterostructure of feature obtains for test with Fig. 2 and Fig. 3; With

Fig. 7 is the contrast hysteresis loop figure that the heterostructure of feature obtains for test with Fig. 4 and Fig. 5.

Detailed Description Of The Invention

Fig. 1 has shown the ferroelectric heterostructure memory cell of making by the present invention 10 of a typical case, and it comprises monocrystalline orientation [001] silicon chip 11 as substrate, and the overheated wet oxidation in its surface is to form one deck electron level amorphous Si O ₂Layer 12, thick about 100nm.Useful especially another kind of silicon covering layer material is silicon nitride Si in piezoelectric device ₃N ₄Using excimer laser (248nm), is 2-2.5J/cm with the scope ²Energy density, with the pulsed laser deposition method (PLD) at SiO ₂Laminar surface about 50nm titanium prime coat 13 of under 600-680 ℃ temperature, growing, growth one deck 50-150nm metal platinum layer on Ti layer 13 equally then.The growing technology that other is general, as sputtering method, chemical vapor deposition processes (CVD), and means of electron beam deposition equally all can be used.

Employing has the target of suitable component, with PLD equipment carry out subsequently electrode and the deposit of ferroelectric layer.The typical temperature scope be 550 °-700 ℃ and partial pressure of oxygen under about 13.3Pa atmosphere, make first electrode layer of LSCO grow on the Pt layer 14 extremely thick approximately 50-150nm, be preferably about 100nm; The composition of LSCO is generally L _1-xSr _xCoO ₃, wherein X is about 0.15-0.85, is preferably about 0.5.The metal oxide electrode material that other is known is as RuO _x, SrRuO ₃And LaSrCrO ₃Be feasible equally.

Then grow PLZT ferroelectric layer 16 to reaching about 100-500nm, be generally 300nm, in this example, the PLZT material consist of Pb _0.9La _0.1Zr _0.2Ti _0.8O ₃, but visual desired application and make wide cut and change.Again, doping lanthanum or niobium 1%-10% are preferably 4%-6%, are useful for making the ferroelectric properties optimization.Other ferroelectric or para-electric, as barium titanate, barium strontium, lead titanates, bismuth titanates, bismuth tantalate strontium, niobic acid bismuth strontium and potassium tantalate niobate can be used as layer 16 equally in the capacitor application of high-k and in thermoelectric and piezoelectric device.The about 100nm LSCO of one deck top electrode layer 17 of growing then also is about 1 * 10 with the heterostructure of finishing in partial pressure of oxygen ²To about 1 * 10 ⁵Iptimum speed with about 5-20 ℃/min in the atmosphere of Pa is chilled to room temperature.The X-ray diffraction of the polycrystalline heterostructure of finishing is measured and has been confirmed that ferroelectric folded formula lamination is in the perovskite phase fully.

Make the test capacitor electrode 18 of 50 μ m diameters with common photoetching process by top LSCO layer 17, be deposited with Pt/Au on it and electrically contact 19.Contacting system with the compatibility of bottom electrode layer 15 is set up via a big conductive spacer (not shown) in somewhere on the body structure surface by capacitive coupling.The typical ferroelectric test card of capacitor heterostructure shows very desirable fatigue, aging and retention properties, is particularly suitable for over a long time the application scenario of nonvolatile memory.The shown remanent polarization value of device is about 15-20 μ c/cm at 5V ², be well suited for this purpose.In the same satisfied result of further test demonstration under the temperature that promotes and under the more extreme condition in the presence of the dc bias voltage.For example, at about 100 ℃, device demonstrates good reading-write durability at least 1011 circulations.

Some heterostructures of having grown other are with sampling, for the validity of test technical process of the present invention.In one group of this type of sample, first heterostructure is according to comprising SiO as mentioned above ₂ Layer 12 and make then saves this SiO in second sample ₂Layer.The corresponding X-ray diffraction figure that is shown in this two sample among Fig. 2 and Fig. 3 shows that SiO is arranged ₂The ferroelectric orientation of the PLZT layer (Fig. 2) of growth is preponderated during interlayer 12, and by no SiO ₂The layer elder that gives birth to then accounts for weak tendency and the diffraction maximum (Fig. 3) of impurity phase arranged.The intensity out of the ordinary of two figures is remarkable especially.

These two contrasts of Fig. 4 and Fig. 5 X-ray diffraction figure system derives from second group of sample, the difference of two samples in this group is it is respectively to comprise and omitted LSCO layer 15, and the latter is that the Pt layer 14 under the PLZT ferroelectric layer 16 with the heterostructure lamination forms the required persons of hybrid metal/metal oxide electrode (Fig. 1).The effect of LSCO electrode layer 15 can be found out (Fig. 4) from the X-ray diffraction peak of PLZT ferroelectric perovskite phase the most significantly, also can find out from the intensity of diffraction.During no LSCO electrode layer, the Jiao Lvshi phase (pyro) that only forms non-ferroelectric PLZT (Fig. 5).

Ferroelectric properties is subsequently measured and has been shown the SiO that is present on the Si wafer substrates highlightedly ₂The important function of layer, this can observe (Fig. 6) from the contrast hysteresis loop figure of these samples.This class is measured and has also been confirmed significant advantage, promptly the LSCO electrode layer not only provided can make ferroelectric perovskite mutually preferential nucleation characteristic but also outstanding ferroelectric reliability characteristic is provided.Illustrated with example with the contrast hysteresis loop figure (Fig. 7) of the heterostructure that has LSCO electrode layer and no LSCO electrode layer to make and not had ferroelectric property in back a kind of sample basically.

Operation of the present invention and ferroelectric heterostructure capacitor material can be applicable to far-ranging device, as the dielectric of using for DRAM (dynamic random access memory) capacitor, ferroelectric FET (field-effect transistor) element of using for NDRO storage, for integrated optics instrument, pyroelectric detector use at SiO ₂The electrical-optical perovskite of growing on/Si the substrate, or the like.Using another importance of these ferroelectric thin films of hybrid metal/metal oxide electrode is their application in the non-volatile memory storage medium such as FRAM (ferroelectric RAM).

Integrated by the ferromagnetic element that is achieved by the present invention and transistor circuit can be made into the other device of magnetoresistive RAM (MRAM) and magnetic recording and detecting element form.This class formation also is valuable especially for being used for integrated MEMS (micro electro mechanical system) (this has used the piezoelectric property of ferroelectric material).According to noted earlier, these and other application will become apparent those skilled in the art, so be considered to all within the scope of the present invention defined in appended claims.

Claims

1. one kind comprises the silicon substrate and the ferroelectric condenser heterostructure that is grown in described lip-deep at least a crystallization ferroelectric material layer that has with the surface of silicon compound bottoming, it is characterized in that growth one deck provides the metal of conductivity for described heterostructure on described heterostructure, and the layer of metal oxide skin(coating) of growing again is that described ferroelectric layer forms a mixed capacitor electrode substrate thereon.

2. structure as claimed in claim is characterized in that described silicon compound is selected from the group be made up of silicon dioxide and silicon nitride and feels secure with the compound that is selected from the group of being made up of titanium, tantalum and titanium dioxide.

3. structure as claimed in claim 1 is characterized in that described metal level mainly is made up of platinum.

4. structure as claimed in claim is characterized in that described metal oxide layer comprises a kind of polycrystalline growth of material, and described material is selected from one group of material of being made up of lanthanum-strontium-cobalt-oxygen thing, lanthanum strontium chromated oxide, ru oxide and strontium ruthenium oxide.

5. structure as claimed in claim 1, it is characterized in that described ferroelectric layer comprises a kind of polycrystalline growth of material, described material is selected from the material of being made up of load lanthanium titanate zirconium, barium titanate, barium strontium, lead titanates, bismuth titanates, bismuth tantalate strontium, niobic acid bismuth strontium and potassium tantalate niobate.

6. structure as claimed in claim 4 is characterized in that described ferroelectric layer material comprises 1% to 10% dopant material, and described material is selected from one group of material of being made up of lanthanum and niobium.

7. method for preparing the ferroelectric condenser heterostructure, be included in one deck crystallization ferroelectric material layer at least of growing on the silicon substrate with the silicon compound surface layer that felt secure, it is characterized in that providing conductivity for described heterostructure in described superficial layer growth layer of metal, and the layer of metal oxide of growing on described metal forms a mixed capacitor electrode substrate for described ferroelectric layer with it.

8. method as claimed in claim 7 is characterized in that described silicon compound uses a kind of compound of selecting in the group of being made up of titanium, tantalum and titanium dioxide to feel secure, and described metal level then mainly is made up of platinum.

9. method as claimed in claim 7 is characterized in that described metal oxide series of strata form by the polycrystalline growth of a kind of material of selecting in the group of being made up of lanthanum-strontium-cobalt-oxygen thing, lanthanum strontium chromated oxide, ru oxide and strontium ruthenium oxide.

10. method as claimed in claim 7 is characterized in that described ferroelectric layer is formed by the polycrystalline growth on described metal oxide layer.

11. method as claimed in claim 10 is characterized in that described ferroelectric layer material is selected from one group of compound being made up of load lanthanium titanate zirconium, barium titanate, barium strontium, lead titanates, bismuth titanates, bismuth tantalate strontium, niobic acid bismuth strontium and potassium tantalate niobate.

12. method as claimed in claim 10 is characterized in that on described ferroelectric layer the electrode layer of the described metal oxide of growth one deck.

13. method as claimed in claim 7 is characterized in that in partial pressure of oxygen be about 1 * 10 ²-1 * 10 ⁵Under the atmosphere of Pa, the temperature range of the described ferroelectric layer of growth is about 550 ℃-700 ℃ on described mixed capacitor electrode substrate, and is 5 ℃ of-25 ℃/min from the speed that described growth temperature is chilled to the operating environment temperature.