CN116416947A

CN116416947A - Device for driving electronic paper display and system thereof

Info

Publication number: CN116416947A
Application number: CN202210259950.0A
Authority: CN
Inventors: 陈永俊; 孔祥洪
Original assignee: Individual
Current assignee: Individual
Priority date: 2021-12-30
Filing date: 2022-03-16
Publication date: 2023-07-11
Also published as: GB202119113D0

Abstract

The present invention relates to an apparatus for driving an Electronic Paper Display (EPD). The apparatus includes a logic circuit and a common Voltage (VCOM) generator that modulates a direct current common voltage signal or an alternating current common voltage signal for driving a common voltage electrode of an electronic paper display using a constant voltage. By using a constant voltage, the analog unit of the device no longer needs to install a common voltage regulator and a common voltage buffer, thereby achieving the purpose of simplifying the analog unit. Image data displayed on the electronic paper display is compensated using the source compensation factor and a set of mapping profiles stored in a look-up table.

Description

Device for driving electronic paper display and system thereof

Technical Field

The present invention relates to the field of display technology for Electronic Paper Displays (EPDs), and more particularly, to a device for driving an electronic paper display using ground as a common Voltage (VCOM) electrode and a display system equipped with the same.

Background

An electronic paper display is a display panel that can simulate paper, and can continuously display characters and images on paper for several weeks without continuously refreshing the content of the paper. The preferred application for electronic paper displays is for Electronic Shelf Labels (ESLs), but may also be used in a variety of other applications, such as digital books and electronic billboards. Typically, the display element has a storage capacity, so that the power consumption of the display can be minimized when the content is in a static state. Since it is very necessary for electronic paper displays to be thin, small and low power consumption, it is desirable to simplify the circuit. Further, other attractive features and characteristics will become more clearly apparent from the following detailed description and appended claims, taken in conjunction with the accompanying drawings and the background of the invention.

The above information disclosed in the background section is only for the purpose of facilitating a better understanding of the background section of the invention and, therefore, some of the information contained therein may not be prior art information.

Disclosure of Invention

Various embodiments of the present invention relate to an apparatus for driving an electronic paper display and a system equipped with the same. The apparatus includes a logic circuit and a VCOM generator that modulates a DCVCOM signal or an ACVCOM signal for driving VCOM electrodes of an electronic paper display using a constant voltage. By using a constant voltage, the analog unit of the device can eliminate the need to install a VCOM regulator and VCOM buffer, thereby simplifying the analog unit. More particularly, the apparatus includes a source compensation circuit for storing a source compensation factor that the logic circuit uses to generate compensated image data for updating the electronic paper display based on the received image data.

According to certain embodiments of the present disclosure, the analog unit is configured to connect the constant voltage node to the VCOM generator. The constant voltage node may be a power supply Voltage (VS) or a ground voltage of the device.

According to some embodiments of the present disclosure, the waveform simulation unit is further configured to generate a data high Voltage (VDH) and a data low Voltage (VDL), the ACVCOM signal is characterized in that the waveform characteristics of the ACVCOM signal are as follows: alternating between VDH, VDL and ground voltage. Alternatively, the waveform of the ac common voltage signal is alternately switched between a first sum of VDH and VS, a second sum of VDH and VS, and VS.

According to certain embodiments of the present disclosure, the VCOM electrode is electrically connected to VS or ground voltage for generating the DCVCOM signal.

According to certain embodiments of the present disclosure, the apparatus includes a gate driving circuit and a source driving circuit. The source driving circuit is configured to receive a gate start pulse signal and compensated image data; generating a plurality of source signals based on the compensated image data; and coupling a plurality of source signals to the plurality of source lines for updating the electronic paper display.

According to some embodiments of the present disclosure, the source driving circuit is further configured to clear the display electrode capacitor of the pixel cell prior to updating the electronic paper display with the plurality of source signals.

According to certain embodiments of the present disclosure, the gate start pulse is received from a logic circuit or a gate driving circuit for synchronizing the gate line and the source line.

According to certain embodiments of the present disclosure, the apparatus includes a look-up table (LUT) circuit configured to store a set of mapping profiles selectable by the source compensation factor for compensating the image data.

According to certain embodiments of the present disclosure, the set of mapping profiles includes a plurality of mapping curves selectable by the source compensation factor. The plurality of mapping curves are nonlinear curves used for nonlinear color adjustment. When the VCOM electrode is centered on a constant voltage, the multiple mapping curves can be selected to compensate for individual panel variations of the electronic paper display and minimize image retention.

According to some embodiments of the present disclosure, the logic circuit is to dynamically adjust the pixel values of the image data according to the gradation levels of the pixel values and the selected mapping profile.

According to certain embodiments of the present disclosure, the source compensation circuit includes a programmable memory for storing a source compensation factor. The programmable memory may be a flash memory or a one-time programmable (OTP) memory, wherein the OTP memory includes a plurality of fuse cells and a fuse address for locating one fuse cell storing a source compensation factor.

This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the subject matter described in the claims, nor is it intended to be used as an aid in determining the scope of the subject matter described in the claims. Further aspects and advantages of the invention are illustrated by the following examples.

Drawings

The drawings comprise figures for further illustrating and clarifying the above and other aspects, advantages and features of the present invention. It should be noted that these drawings depict only some embodiments of the invention and are not intended to limit the scope of the invention. It should also be noted that these drawings are presented for purposes of making the invention more concise and understandable and, therefore, they are not necessarily drawn to scale. The present invention will now be described in more detail with reference to the accompanying drawings:

FIG. 1 is a schematic diagram of a conventional apparatus for driving an electronic paper display;

FIG. 2 is a schematic diagram of a VCOM circuit in a conventional electronic paper display with corresponding external capacitors;

FIG. 3 is a waveform at the VCOM electrode while clearing and updating content in a conventional electronic paper display;

FIG. 4 is a detailed schematic diagram of a single pixel unit of an electronic paper display;

FIG. 5 is a driving waveform and Cpixel waveform for interpreting a transition voltage in an electronic paper display;

FIG. 6 is a schematic diagram of an apparatus for driving an electronic paper display according to a first embodiment of the present invention;

FIG. 7 is a system block diagram of an electronic paper display driver according to a first embodiment of the present invention;

FIG. 8 is a waveform of an ACVCOM signal when clearing and updating content in an electronic paper display in accordance with a first embodiment of the present invention; and

fig. 9 is a waveform of actom when clearing and updating contents in an electronic paper display according to a second embodiment of the present invention.

Abbreviation list

ACVCOM AC VCOM

Cap capacitor

Cgs gate to source capacitor

Cpixel pixel capacitor

Cst storage capacitor

DCVCOM DC VCOM

EPD electronic paper display

ESL electronic shelf label

GIP panel internal grid

GND ground

I/O input/output

IC integrated circuit

LUT look-up table

MCU micro-controller unit

TFT thin film transistor

VBD boundary voltage

VCOM common voltage

VCOMC common voltage compensation

VDH data high voltage

VDL data low voltage

VGH grid high voltage

VGL grid low voltage

Vpixel pixel voltage

VS supply voltage

Detailed Description

The present invention relates generally to an apparatus for driving an electronic paper display and a display system equipped with the same. More particularly, but not exclusively, the invention relates to an Integrated Circuit (IC) device for driving an electronic paper display using ground as a common Voltage (VCOM). The object of the invention is to simplify the circuit so that the current consumption can be reduced to a maximum extent.

The following detailed description is merely exemplary in nature and is not intended to limit the invention or the application and/or uses thereof. It should be noted that there are many variations that are taught by the present invention. The detailed description will enable those skilled in the art to practice the exemplary embodiments of the invention without undue experimentation, and it is well known that various changes or modifications can be made to the functions and constructions described in the exemplary embodiments without departing from the scope of the invention as set forth in the appended claims.

The present disclosure relates to a display panel for driving an electronic paper display or other non-volatile type. The apparatus is further a semiconductor device mounted on the electronic paper display for driving the electronic paper display. The term "display panel" shall have the same meaning as an electronic paper display. In addition to electronic paper displays, the present invention may also be used in other applications, including transient display panels, which may be liquid crystal displays, organic light emitting diode displays, plasma panel displays, field emission displays, electrophoretic displays, flexible displays, or other display devices composed of a plurality of pixels that may display images and/or video. In a preferred embodiment, the electronic paper display is a black/white monochromatic electronic paper display or a red monochromatic electronic paper display.

The terms "gate electrode", "source electrode" and "drain electrode", as used herein, collectively define three terminals of a Thin Film Transistor (TFT) in each pixel cell, the TFT having an active channel region controllable by the gate electrode for electrically connecting the source electrode and the drain electrode.

The term "gate line" as used herein refers to a gate electrode of a TFT for driving a pixel cell connected to a row bus (row-bus) of an electronic paper display. The term "source line" as used in the present invention refers to a column bus (column-bus) connected to an electronic paper display for providing data to the pixel cells. Generally, the Gate driving circuit is configured to generate Gate control signals (Gate [ n-1:0 ]) coupled to the Gate lines, and the Source driving circuit is configured to generate Source control signals (Source [ m-1:0 ]) coupled to the Source lines.

The benefits, advantages, solutions to problems, and any element(s) that may cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, or essential feature or element of any or all the claims of the invention. The scope of the invention is defined solely by the appended claims including any amendments made during the pendency of this application and all equivalents of those claims as issued.

Prior to describing embodiments of the present invention, a prior art electronic paper display technology will be described in connection with fig. 1-3. The display module 10 generally includes a display panel 20 and a device for driving the display panel 20. In one embodiment, the display panel 20 is a permanent display comprising a plurality of pixel cells arranged in rows and columns. Preferably, the display panel 20 is an electronic paper display capable of displaying images without power, which is more energy efficient than all other alternative display technologies. Each pixel cell includes a TFT 23. Alternatively, a color filter is mounted on the TFT, which may enable the display panel 20 to have a feature that the display panel 20 can support a color image. The gate driving circuit 250 is used for generating gate control signals (gate [ n-1:0 ]) coupled to the gate lines, and the source driving circuit 260 is used for generating source control signals (source [ m-1:0 ]) coupled to the source lines. The gate driving circuit 250 and the source driving circuit 260 are controlled by the logic circuit 210. An analog unit 270 is also provided for powering the VCOM electrode 110, the gate driver circuit 250, and the source driver circuit 260. Connecting a large-size stabilizing capacitor 112 to the VCOM electrode 110 is critical to stability. Turning to fig. 2, the capacitance of the stabilizing capacitor 112 is typically 1 μf or more, and the total capacitance of all the storage capacitors 21A at the pixel position of the TFT 23 is only 1nF to 100nF. Inside the analog unit 270, a VCOM adjuster 113 and a VCOM buffer 111 are required to be installed for adjusting the power supplied to the VCOM electrode 110. The VCOM regulator 113 and VCOM buffer 111 are not complex circuits, but rather are very large in size, and the present invention aims to reduce the size of the device by eliminating the need to install the VCOM regulator 113 and VCOM buffer 111.

Fig. 3 shows waveforms at the VCOM electrode 110 when driving an electronic paper display according to the present technology. The electronic paper display may be driven by a DCVCOM signal or an actom signal. If the DCVCOM signal is used, a non-alternating signal is generated and coupled to the VCOM electrode 110. If an ACVCOM signal is used, the signal has the following waveform characteristics: the signal is commutated every frame and has a compensation voltage (commonly referred to as VCOMDC) to compensate for the jump voltage that occurs due to the parasitic capacitance of the TFTs 23. By using a negative compensation voltage, the VCOM electrode 110 can be set to calibrate the asymmetric potential drift of the liquid crystal. The value of VCOMDC may be selected by software code or preprogrammed registers, typically in the range of-0.2V to-3V. Accordingly, the VCOM electrode 110 may be moved down by 0.2V to 3V. As shown, the waveform at the VCOM electrode 110 is characterized by: alternate between VDH+VCOMDC, VDL+VCOMDC, and VCOMDC, where VCOMDC is less than 0V, VDH is a data high voltage and VDL is a data low voltage.

For the purpose of demonstrating the present invention, the physical structure of the display panel 100 is shown in fig. 4. The display panel 100 may be divided into three layers: a TFT array substrate (lower substrate 110B), a microencapsulated electrophoretic layer, and an upper substrate 110A. The TFT array substrate is a back plate on which the transistor array is mounted. The microencapsulated electrophoretic layer is located above the TFT array substrate, on which tiny microcapsules are mounted, which are filled with a transparent liquid and charged color pigment chips suspended in the transparent liquid. The microencapsulated electrophoretic layer can be switched back and forth between a light state and a dark state by applying a voltage. The upper substrate 110A is a cover glass having a conductive layer formed of Indium Tin Oxide (ITO) on the inner side thereof. ITO is a composition that is not only conductive but also transparent. Also, the lower substrate 112 has a conductive layer formed of ITO. Since the ITO conductive layers of the upper and

lower substrates

110A and 110B are electrically connected together, the upper and

lower substrates

110A and 110B may be regarded as VCOM electrodes 110. Thus, the upper substrate 110A and the lower substrate 110B are disposed opposite to each other, and the microencapsulated electrophoretic layer is sandwiched between the upper substrate 110A and the lower substrate 110B, so that a parallel plate capacitor array can be formed.

The pixel unit of the display panel 20 includes a TFT (labeled M1) 23; display electrode capacitor 21, which includes storage capacitor (Cst) 21A and pixel capacitor (Cpixel) 21B, wherein Cpixel 21B is preferably used to model the pixel using parallel plate capacitors. Between the gate electrode and the source electrode, parasitic capacitance is modeled by a capacitor (Cgs) 22. The gate electrode of the TFT 23 is connected to the gate line 41, and the drain electrode of the TFT 23 is connected to the source line 51. The source electrode of the TFT 101 is connected to one end of the display electrode capacitor 21, while the other end of the display electrode capacitor 21 is connected to the VCOM electrode 110, and the storage capacitor 21A and the pixel capacitor 21B are connected to the lower substrate 110B and the upper substrate 110A of the VCOM electrode 110, respectively. The lower substrate 110B and the upper substrate 110A are electrically connected together by an external connector, although they are physically isolated. Accordingly, the storage capacitor 21A and the pixel capacitor 21B are connected to the VCOM electrode 110 in the equivalent circuit. In some embodiments, the storage capacitor 21A is mounted in the nearest vicinity of the TFT 23 of the pixel cell, with a capacitance of about 0.5pF. The storage capacitor 21A not only maintains a stable voltage across the pixel cell, but also helps to stabilize the source control signal source [ m-1:0]. Cpixel 103 is a capacitor formed between upper substrate 111 and lower substrate 112.

Fig. 5 shows the corresponding waveforms for driving the TFTs 23 of the display panel 20, which are used for interpreting the hopping voltage 60. The waveform characteristics of the gate control signal at the position of the gate line 41 are: alternating between VGH level and VGL level. The waveform characteristics of the source control signal at the position of the source line 51 are: alternating between VDH level, VDL level, and VCOM level. Typically, VCOMDC is set to a negative voltage, typically between-0.2V and-3V, the VGH level may range from 10V to 20V, the VGL level may range from-10V to-20V, the VDH level may range from 9V to 17V, and the VDL level may range from-9V to-17V. When the gate is turned off, the gate voltage applied to the gate line 41 may drop from VGH to VGL, the TFT 23 may be turned off, and the pixel voltage may become a floating state. Parasitic capacitance between the gate terminal and the source terminal (Cgs) 22 may cause the gate voltage to vary. Then, the pixel voltage across Cpixel 21B is reduced by the transition voltage DeltaVkb 60. A conventionally used strategy to solve the image problem caused by the step voltage 60 is to apply negative VCOMDC for compensation. Thus, for an ACVCOM application, the waveform characteristics of VCOM electrode 110 are: alternate between VDH+VCOMDC (e.g., +13V), VDL+VCOMDC (e.g., -17V), and VCOMDC (e.g., -2V) for updating the contents of the display panel 20, the display panel 20 being configured to switch between positive and negative frames. For DCVCOM applications, the VCOM electrode 110 has a signal at the same voltage as VCOMDC.

When the positive and negative frames alternate to provide different voltage levels to the VCOM electrode 110, the VCOM electrode 110 of the present invention is centered on GND voltage, and at the same time, high and low voltages are defined by VDH and VDL, respectively. Therefore, when the screen content of the electronic paper display is updated using the m-column bus and the n-row bus, the VCOM electrode 110 has the waveform characteristics of: alternate between VDH, VDL and GND voltages.

According to the present invention, as shown in fig. 6 and 7, the apparatus for driving an electronic paper display having a simplified circuit can reduce the chip size and the overall power consumption. The apparatus includes a logic circuit 210, an analog unit 230, a gate driving circuit 250, a source driving circuit 260, a VCOM generator 270, a VBD generator 280, an MCU interface 240, and a source compensation circuit 220. The analog unit 230 is used for outputting voltages to the gate driving circuit 250, wherein the VGH level is 10V to 20V, the VGL level is-10V to-20V, and the VDH level is 6V to 17V, and the VDL level is-9V to-20V. The VDH level and VDL level are then shifted to compensate for the trip voltage 60. All the power generated by the analog unit 230 is stabilized by an external capacitor. The analog unit 230 is used to generate VDH and VDL while VCOM is not boosted or regulated by the supply Voltage (VS) of the device. Instead, a constant voltage node is connected to the VCOM generator 270 for modulating the DCVCOM signal or the actcom signal sent to the VCOM electrode 110. Therefore, the VCOM regulator 113, VCOM buffer 111, and other related circuits are no longer required to be installed, resulting in simplification of the analog unit 230. In some embodiments, the constant voltage node may be a ground voltage of the device or a VS of the device. In another embodiment, VS may be an analog power supply or a digital power supply. Typically, the ground voltage is least sensitive to voltage fluctuations and is therefore more suitable for use as a common voltage node.

The gate driving circuit 250 and the source driving circuit 260 are controlled by the logic circuit 210. The row bus line is a gate line 41 connecting the gate driving circuit 250 and the gate electrodes of the TFTs 23. The gate driving circuit 250 may be a circuit for generating a plurality of gate control signals gates [ n-1:0] transmitted to the gate lines 41, each of which has a waveform characteristic of: alternating between VGH level and VGL level. The column bus line is a source line 51 connecting the source driver circuit 260 and the source electrodes of the TFTs 23. The source driving circuit 260 may be a circuit for generating a plurality of source control signals source [ m-1:0] transmitted to the source lines 51. When the DCVCOM signal transmitted to the VCOM electrode 110 is selectively modulated using the VCOM generator 270, the VCOM electrode 110 is electrically connected to VS or a ground voltage for generating the DCVCOM signal. When the VCOM generator 270 is selected to modulate the aclcom signal transmitted to the VCOM electrode 110, the waveform characteristics of the aclcom signal transmitted at the position of the VCOM electrode 110 are: alternate between VDH level, VDL level, and constant voltage (which may be ground or VS). Since both VS and ground are constant voltage nodes, no regulator or booster is required.

The device may also include a boundary Voltage (VBD) generator 280 for generating a drive signal for the source boundary 52. VBD is a constant voltage and may be ground, VDH, VDL or VS.

The image data used to update the electronic paper display is provided by the MCU 300 or other external circuitry, processor, data processor, etc. The apparatus includes an MCU interface 240 for connecting and communicating with the MCU 300 to receive image data. In certain embodiments, the MCU interface 240 includes a 4-wire serial peripheral interface and a 3-wire serial peripheral interface that are selectable by pin configuration. In one embodiment, the maximum write speed of the MCU interface is 20MHz.

Logic circuitry 210 is capable of receiving image data and generating compensated image data for driving an electronic paper display. The compensated image data is calculated based on the configuration in which the constant voltage is connected to the VCOM generator 270. The compensation of the image data may not be linear, depending on the liquid crystal characteristics. Instead, the pixel values of the image data may be dynamically adjusted according to the gradation level of the pixel values. In an embodiment of a conventional black electronic paper display, the darker the fade level, the smaller the adjustment. Also, the brighter the fade level, the greater the adjustment. It is apparent that if the electronic paper display is a normally white electronic paper display, the degree of adjustment may be reversed.

By using the compensated image data, the source driving circuit 260 may be used to drive the electronic paper display accordingly. The logic circuit 210 supplies a gate start pulse signal to the gate driving circuit 250 and the source driving circuit 260, and each frame for synchronizing the gate line 41 and the source line 51 is also started substantially at this time. In some embodiments, the source driving circuit 260 may receive a gate start pulse signal from the gate driving circuit 250. The compensated image data is also transferred to the source driving circuit 260. Then, the source driving circuit 260 generates a plurality of source signals based on the compensated image data. The number of source signals is selected by pin configuration or software code that defines the size of the electronic paper display. The source signals are coupled to the source lines 51 for refreshing the display panel 20. In some embodiments, the source drive circuit is further configured to clear the display electrode capacitor 21 of the pixel cell prior to updating the electronic paper display with the plurality of source signals.

The apparatus further comprises a look-up table (LUT) circuit 211 configured to store a set of mapping profiles selectable by the source compensation factor for compensating the image data. In some embodiments, LUT circuit 211 is integrated into a logic circuit or provided as a discrete component in the device. LUT circuit 211 may be pre-programmed or re-optimized. The set of mapping profiles includes a plurality of mapping curves for determining the degree of adjustment for each gradation level, such that the pixel values of the image data can be dynamically adjusted. By using the plurality of mapping curves, the apparatus can store a plurality of nonlinear curves used when performing nonlinear color adjustment. Accordingly, the LUT circuit 211 makes it possible to drive electronic paper displays having different liquid crystal characteristics. By selecting an appropriate mapping curve from among a plurality of mapping curves, it is possible to compensate for a single panel variation of the electronic paper display, and when the VCOM electrode 110 is centered on a constant voltage, it is possible to minimize image sticking.

The source compensation circuit 220 includes a programmable memory for storing source compensation factors for selecting a mapping profile from a set of mapping profiles. The programmable memory may be a flash memory or a one-time programmable (OTP) memory. If it is an OTP, the OTP memory includes a plurality of fuse cells and a fuse address for locating one fuse cell storing a source compensation factor.

Referring to the waveforms of fig. 8, the waveforms of the ACVCOM signal when clearing and updating the contents in the electronic paper display described in the first embodiment of the invention are described. The waveform characteristics of the ACVCOM signal are: each frame is alternately switched between VDH, VDL and ground voltage. Thus, the VCOM electrode 110 is centered around the ground voltage.

Referring to the waveforms of fig. 9, the waveforms of the ACVCOM signal when the content in the electronic paper display is cleared and updated in the second embodiment of the invention are described. The waveform characteristics of the ACVCOM signal are: each frame is alternately switched between a first sum of VDH and VS, a second sum of VDH and VS, and VS. Thus, the VCOM electrode 110 is centered at VS.

This shows the basic structure of the apparatus for driving an electronic paper display described in the present invention. It will be apparent that the above-described variations of the invention, as well as other features and functions, or alternatives thereof, may be desirably combined into many other different methods or devices. Accordingly, the present embodiments should be considered in all respects as illustrative only and not limiting on the invention described in the claims. The scope of the invention is indicated by the appended claims rather than by the foregoing description. Therefore, all changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.

Claims

1. An apparatus for driving an Electronic Paper Display (EPD) comprising a plurality of pixel cells, each pixel cell comprising a Thin Film Transistor (TFT), a display electrode capacitor, a gate line coupled to a gate electrode of the thin film transistor, a source line coupled to a drain electrode of the thin film transistor, a source electrode of the thin film transistor coupled to a first end of the display electrode capacitor, and a common Voltage (VCOM) electrode coupled to a second end of the display electrode capacitor, the apparatus comprising:

a source compensation circuit for storing a source compensation factor;

the logic circuit is configured to:

capable of receiving image data for updating the electronic paper display; and

generating compensated image data based on the source compensation factor;

a common voltage generator for modulating a direct current common voltage (DCVCOM) signal or an alternating current common voltage (ACVCOM) signal used for driving the common voltage electrode; and

the analog unit is configured to connect the constant voltage node to the common voltage generator, and thus, it is no longer necessary to install a common voltage regulator or a common voltage buffer, simplifying the analog unit.

2. The apparatus of claim 1, wherein the constant voltage node is selectable from a supply Voltage (VS) or a ground voltage of the apparatus.

3. The apparatus of claim 2, wherein the analog unit is further configured to generate one data high Voltage (VDH) and one data low Voltage (VDL), wherein the waveform of the ac common voltage signal is alternately switched between VDH, VDL, and ground voltage.

4. The apparatus of claim 2, wherein the analog unit is further configured to generate one data high Voltage (VDH) and one data low Voltage (VDL), wherein a waveform of the alternating common voltage signal is alternately switched between a first sum of VDH and VS, a second sum of VDH and VS, and VS.

5. The apparatus of claim 2, wherein the common voltage electrode is electrically connected to the VS or ground voltage for generating a direct current common voltage signal.

6. The apparatus of claim 1, further comprising a gate drive circuit and a source drive circuit, wherein the source drive circuit is configured to:

receiving a gate start pulse signal and the compensated image data;

generating a plurality of source signals based on the compensated image data; and

the plurality of source signals are coupled to a plurality of source lines for updating the electronic paper display.

7. The apparatus of claim 6, wherein the source drive circuit is further configured to clear the display electrode capacitor of the pixel cell prior to updating the electronic paper display with the plurality of source signals.

8. The apparatus of claim 6, wherein the gate start pulse is received from the logic circuit or the gate drive circuit to synchronize the gate line and the source line.

9. The apparatus of claim 1, further comprising a look-up table (LUT) circuit configured to store a set of mapping profiles selectable by the source compensation factor for compensating the image data.

10. The apparatus of claim 9, wherein the set of mapping profiles includes a plurality of mapping curves selectable by the source compensation factor.

11. The apparatus of claim 10, wherein the plurality of mapping curves are nonlinear curves for nonlinear color adjustment.

12. The apparatus of claim 10, wherein the plurality of mapping curves are selectable to compensate for individual panel variations of the electronic paper display and to minimize image retention when the common voltage electrode is centered at a constant voltage.

13. The apparatus of claim 9, wherein the logic circuit is to dynamically adjust pixel values of the image data based on a gradation level of pixel values and a selected mapping profile.

14. The apparatus of claim 9, wherein the look-up table circuit is integrated into the logic circuit.

15. The apparatus of claim 1, wherein the source compensation circuit comprises a programmable memory to store the source compensation factor.

16. The apparatus of claim 15, wherein the programmable memory is a flash memory.

17. The apparatus of claim 15, wherein the programmable memory is a one-time programmable (OTP) memory.

18. The apparatus of claim 17, wherein the one-time programmable memory comprises a plurality of fuse cells and a fuse address of one fuse cell for locating the storage source compensation factor.

19. A display system, comprising:

a display panel including a plurality of pixel units, each pixel unit including a Thin Film Transistor (TFT), a display electrode capacitor, a gate line coupled to a gate electrode of the thin film transistor, a source line coupled to a drain electrode of the thin film transistor, the thin film transistor source electrode coupled to a first end of the display electrode capacitor, and a common Voltage (VCOM) electrode coupled to a second end of the display electrode capacitor; and

a semiconductor device mounted on the display panel for driving the display panel, comprising:

a source compensation circuit for storing a source compensation factor;

the logic circuit is configured to:

capable of receiving image data for updating the display panel; and

generating compensated image data based on the source compensation factor;

20. The display system of claim 19, wherein the constant voltage node is selectable from the following voltages: the supply Voltage (VS) or the ground voltage of the device.

21. The display system of claim 20, wherein the analog unit is further configured to generate one data high Voltage (VDH) and one data low Voltage (VDL), wherein the waveform of the ac common voltage signal is alternately switched between VDH, VDL, and ground voltage.

22. The display system of claim 20, wherein the analog unit is further configured to generate one data high Voltage (VDH) and one data low Voltage (VDL), wherein a waveform of the alternating common voltage signal is alternately switched between a first sum of VDH and VS, a second sum of VDH and VS, and VS.

23. The display system of claim 20, wherein the common voltage electrode is electrically connected to VS or ground voltage for generating a dc common voltage signal.

24. The display system of claim 19, wherein the display panel is selectable from the following displays: electronic Paper Displays (EPDs), liquid crystal displays, organic light emitting diode displays, plasma panel displays, field emission displays, electrophoretic displays, and flexible displays.

25. The display system of claim 24, wherein the electronic paper display is a black/white monochrome electronic paper display or a red monochrome electronic paper display.