CN116413677B - Anode addressing driving circuit, addressable driving circuit and laser emitting circuit - Google Patents

Anode addressing driving circuit, addressable driving circuit and laser emitting circuit Download PDF

Info

Publication number
CN116413677B
CN116413677B CN202111643093.6A CN202111643093A CN116413677B CN 116413677 B CN116413677 B CN 116413677B CN 202111643093 A CN202111643093 A CN 202111643093A CN 116413677 B CN116413677 B CN 116413677B
Authority
CN
China
Prior art keywords
cathode
anode
addressing
reverse bias
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202111643093.6A
Other languages
Chinese (zh)
Other versions
CN116413677A (en
Inventor
李彦民
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suteng Innovation Technology Co Ltd
Original Assignee
Suteng Innovation Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suteng Innovation Technology Co Ltd filed Critical Suteng Innovation Technology Co Ltd
Priority to CN202111643093.6A priority Critical patent/CN116413677B/en
Priority to EP22216883.3A priority patent/EP4207950A1/en
Priority to US18/090,414 priority patent/US20230208099A1/en
Publication of CN116413677A publication Critical patent/CN116413677A/en
Application granted granted Critical
Publication of CN116413677B publication Critical patent/CN116413677B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
    • G01S7/483—Details of pulse systems
    • G01S7/484—Transmitters
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
    • G01S7/491—Details of non-pulse systems
    • G01S7/4911—Transmitters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
    • H01S5/042—Electrical excitation ; Circuits therefor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The application discloses an anode addressing driving circuit, an addressable driving circuit and a laser emitting circuit, wherein the anode addressing driving circuit comprises an anode addressing switching circuit and an anode addressing switching element; the first end of the anode addressing switch element is connected with the transmitting power supply, the second end of the anode addressing switch element is connected with the anode energy storage circuit, and the anode addressing enabling end is connected with an anode addressing signal; the anode addressing switch element is turned on or off under the control of an anode addressing signal; and an anode energy storage circuit comprising an anode energy storage element and a current limiting element; the anode energy storage element is used for charging energy by utilizing the current output by the emission power supply when the anode addressing switch element is turned on; the current limiting element is used for limiting the current when the anode energy storage element is charged; when the energy storage of the anode energy storage element is controlled, the current flowing through the laser through the parasitic capacitance is smaller than the light-emitting threshold current of the laser, so that the situation that the parallel parasitic capacitance causes light leakage of the laser in the energy charging stage to cause light to be misemitted is avoided, and the light-emitting control accuracy of the laser array is improved.

Description

Anode addressing driving circuit, addressable driving circuit and laser emitting circuit
Technical Field
The embodiment of the invention relates to the technical field of laser emission, in particular to an anode addressing driving circuit, an addressable driving circuit and a laser emission circuit.
Background
As lidar technology evolves towards integration, laser technology integrates from discrete single tubes into one-dimensional arrays and then further into two-dimensional arrays. In the application of the laser array, the design of the narrow pulse driver is a core point of the whole application, which determines the feasibility of the application to a certain extent.
At present, a driver usually adopts a switching element to select addresses, and parasitic capacitance existing in the switching element easily causes light leakage of a laser, so that mislight of the laser occurs.
Disclosure of Invention
In view of the above problems, the present application provides an anode address driving circuit, an addressable driving circuit and a laser emitting circuit, which are used for solving the problem in the prior art that due to parasitic capacitance in a switching element, light leakage of a laser occurs, and error light emission occurs, so that the accuracy of light emission control of a laser array is reduced.
In a first aspect, the present application provides an anode addressing driving circuit for a laser array, one end of the anode addressing driving circuit is connected to a transmitting power source, and the other end of the anode addressing driving circuit is connected to an anode of a laser connected to a common anode in the laser array, including:
An anode addressing switch circuit comprising an anode addressing switch element; the anode addressing switch element comprises a first end, a second end and an anode addressing enabling end; the first end of the anode addressing switch element is connected with the transmitting power supply, the second end of the anode addressing switch element is connected with the anode energy storage circuit, and the anode addressing enabling end is connected with an anode addressing signal; the anode addressing switch element is turned on or turned off under the control of the anode addressing signal, so that the anode energy storage circuit charges energy by utilizing the current output by the transmitting power supply when the anode addressing switch element is turned on; the method comprises the steps of,
an anode energy storage circuit comprising an anode energy storage element and a current limiting element; the anode energy storage element is used for charging energy by utilizing the current output by the emission power supply when the anode addressing switch element is turned on; the current limiting element is used for limiting the current when the anode energy storage element is charged.
As a specific embodiment, the anode energy storage element comprises an energy storage capacitor; the first end of the current limiting element is connected with the second end of the anode addressing switch element, and the second end of the current limiting element is connected with the first end of the energy storage capacitor and the corresponding common anode end; the second end of the energy storage capacitor is grounded;
As a specific embodiment, the current limiting element includes a current limiting resistor; the first end of the current limiting resistor is connected with the second end of the anode addressing switch element, and the second end of the current limiting resistor is connected with the first end of the anode energy storage element and the corresponding common anode end; the second end of the anode energy storage element is grounded.
In a second aspect, the present application provides an anode addressable driving circuit for use in a laser array, comprising a plurality of anode addressing driving circuits as described above; one end of each of the anode addressing driving circuits is connected with the emission power supply, and the other end of each of the anode addressing driving circuits is correspondingly connected with anodes of a plurality of rows of lasers connected to the common anode ends in the laser array.
In a second aspect, the present application provides an addressable driver circuit for use in a laser array, comprising:
a cathode addressable drive circuit comprising a plurality of cathode addressing drive circuits; one end of each cathode address driving circuit corresponds to cathodes of a plurality of rows of lasers connected to the common cathode ends in the laser array one by one, and the other end of each cathode address driving circuit is grounded;
the cathode addressing driving circuit comprises a cathode addressing switching circuit, and the cathode addressing switching circuit comprises a cathode addressing switching element; the cathode addressing switch element comprises a first end, a second end and a cathode addressing enabling end, one of the first end and the second end of the cathode addressing switch element is grounded, the other end of the cathode addressing switch element is connected with a corresponding common cathode end, and the cathode addressing enabling end is connected with a cathode addressing signal; the cathode addressing switch element is turned on or off under the control of the cathode addressing signal; the anode addressable driving circuit.
Further, the cathode addressing switch circuit further comprises a cathode unidirectional conduction element, the cathode unidirectional conduction element is connected between the corresponding common cathode terminal and the cathode addressing switch element, the first end is connected with the corresponding common cathode terminal, and the second end is connected with the second end of the cathode addressing switch;
when the cathode addressing switch element is in a conducting state, the cathode unidirectional conducting element is in a forward conducting state so as to allow current to pass through the cathode addressing switch circuit;
when the cathode addressing switch element is in an off state, the cathode unidirectional conducting element is in a reverse bias state to inhibit current from passing through the cathode addressing switch circuit.
Further, the cathode addressing switch circuit also comprises a cathode reverse bias switch element; the cathode reverse bias switching element comprises a first end, a second end and a cathode reverse bias enabling end, the first end of the cathode reverse bias switching element is connected with the second end of the cathode unidirectional conducting element, the second end of the cathode reverse bias switching element is connected with a second preset voltage, and the cathode reverse bias enabling end is connected with a reverse bias control signal;
the cathode reverse bias control signal is used for switching off the cathode reverse bias switching element when the cathode address selection signal switches on the cathode address selection switching element, so that the second end of the cathode unidirectional switching element is grounded through the cathode address selection switch, and the cathode unidirectional switching element is in a forward conduction state;
The cathode reverse bias control signal is further used for conducting the cathode reverse bias switching element when the cathode address selection signal turns off the cathode address selection switching element, so that the second end of the cathode unidirectional conducting element is connected with the second preset voltage, and the cathode unidirectional conducting element is in a reverse bias state.
Further, the cathode addressing switch circuit also comprises a cathode inverter; the input end of the cathode inverter is connected with the cathode address selection enabling end, the output end of the cathode inverter is connected with the cathode reverse bias enabling end, or the input end of the cathode inverter is connected with the cathode reverse bias enabling end, and the output end of the cathode inverter is connected with the cathode address selection enabling end.
As a specific implementation manner, the cathode unidirectional conducting element includes a seventh NMOS transistor, where a source of the seventh NMOS transistor is connected to the second end of the cathode addressing switch element, a drain of the seventh NMOS transistor is connected to the corresponding common cathode end, and a gate of the seventh NMOS transistor is connected to the cathode addressing enable end of the cathode addressing switch element.
As another specific embodiment, the cathode unidirectional conducting element includes a seventh diode, the cathode of the seventh diode is connected to the second terminal of the cathode addressing switch element, and the anode is connected to the corresponding common cathode terminal.
An addressable driving circuit for a laser array, comprising:
the anode addressing driving circuit comprises an anode addressing switching circuit and an anode energy storage circuit; one end of the anode addressing switch circuit is connected with a transmitting power supply, and the other end of the anode addressing switch circuit is connected with the anode energy storage circuit and the anode of the laser connected to a common anode end; when the anode addressing switch circuit is conducted, the anode energy storage circuit charges energy by utilizing the current output by the transmitting power supply;
a cathode address driving circuit comprising a cathode address switching circuit; the cathode addressing switch circuit comprises a cathode addressing switch element and a cathode unidirectional conduction element; the cathode addressing switch element comprises a first end, a second end and a cathode addressing enabling end; the first end of the cathode addressing switch element is grounded, the second end of the cathode addressing switch element is connected with the second end of the cathode unidirectional conducting element, and the cathode addressing enabling end is connected with a cathode addressing signal; the first end of the cathode guiding conducting element is connected with the cathode of the laser connected with a common cathode end;
when the cathode addressing switch element is in a conducting state, the cathode unidirectional conducting element is in a forward conducting state so as to allow current to pass through the cathode addressing switch circuit;
When the cathode addressing switch element is in an off state, the cathode unidirectional conducting element is in a reverse bias state to inhibit current from passing through the cathode addressing switch circuit.
In a fourth aspect, the present application provides a laser emitting circuit comprising a laser array and an addressable driver circuit as claimed in any one of the preceding claims; the positive address driving circuits are used for performing positive address driving on the multi-row lasers connected to the common anode ends, and the negative address driving circuits are used for performing negative address driving on the multi-column lasers connected to the common cathode ends.
In a fifth aspect, the present application provides a lidar comprising the laser emitting circuit described above.
In a sixth aspect, the present application further provides a switching circuit for improving isolation.
Specifically, the switch circuit comprises a first end, a second end and an enabling end, wherein the first end of the switch circuit is connected with a first voltage, the second end of the switch circuit is connected with a second voltage, and the second voltage is larger than the first voltage; the switch circuit is used for forming a forward conduction loop between the second end and the first end of the switch circuit under the control of the signal of the enabling end so as to allow current to flow through the switch circuit; and the circuit is also used for forming a reverse bias circuit between the second end and the first end of the switch circuit under the control of the signal of the enabling end so as to inhibit current from flowing through the switch circuit.
Further, the switching circuit is provided with a unidirectional conducting element at a first end or a second end thereof; when the unidirectional conducting element is in a forward conducting state, the switching circuit forms the forward conducting loop between the second end and the first end; the switching circuit forms the reverse bias circuit between the second and first terminals when the unidirectional conductive element is in a reverse bias state
As an alternative, the switching circuit is provided with a unidirectional conducting element at its second end; specifically, the switching circuit comprises a second switching element, a second unidirectional conducting element and a second reverse-biased switching element, wherein the second switching element comprises a first end, a second end and an enabling end; the first end of the second unidirectional conducting element is used as a second end of the switching circuit to be connected with a second voltage, and the second end of the second unidirectional conducting element is connected with the second end of the second switching element; the first end of the second switching element is used as the first end of the switching circuit to be connected with the first voltage, the enabling end of the second switching element is connected with the second switching control signal, and the second switching element is turned on or turned off under the control of the switching control signal;
the second reverse bias switching element comprises a first end, a second end and a second reverse bias enabling end, the first end of the second reverse bias switching element is connected with the second end of the second unidirectional conducting element, the second end is connected with a second preset voltage, and the second reverse bias enabling end is connected with a second reverse bias control signal;
The second reverse bias control signal is used for switching off the second reverse bias switching element when the switching element is switched on by the second switching control signal, and the first end of the second unidirectional conduction element is connected with the first voltage by the second switching element so that the second unidirectional conduction element is in a forward conduction state, and a forward conduction loop is formed between the second end and the first end of the switching circuit so as to allow current to flow through the switching circuit;
the second reverse bias control signal is further used for conducting the second reverse bias switching element when the second switching element is disconnected by the second switching control signal, and the second end of the second unidirectional conducting element is connected with a second preset voltage by the second reverse bias switching element, wherein the voltage value of the second preset voltage is greater than or equal to the first voltage, so that the second unidirectional conducting element is in a reverse bias state, current is forbidden to flow through the second switching element, and isolation of the second switching element is improved.
Preferably, the second preset voltage is equal to the first voltage.
In an exemplary scheme, the second switching element is a fifth NMOS transistor, a drain electrode of the fifth NMOS transistor is used as a first end of the second switching element to be connected to the first voltage, a source electrode of the fifth NMOS transistor is used as a second end of the second switching element to be connected to a second end of the second unidirectional conducting element, and a gate electrode of the fifth NMOS transistor is used as an enabling end of the second switching element to be connected to the second switching control signal; the fifth NMOS tube is turned on or off under the control of the second switch control signal.
In an exemplary aspect, the second unidirectional conductive element is a seventh NMOS transistor; the second reverse bias switching element is a sixth NMOS tube; the drain electrode of the seventh NMOS tube is used as the second end of the second unidirectional conduction element to be connected with the second voltage, the source electrode of the seventh NMOS tube is used as the second end of the second unidirectional conduction element to be connected with the second end of the second switching element and the first end of the sixth NMOS tube, and the grid electrode of the seventh NMOS tube is connected with the enabling end of the second switching element.
Specifically, when the fifth NMOS tube is conducted under the enabling of the second switch control signal, the seventh NMOS tube is conducted under the enabling of the switch control signal, the source electrode of the seventh NMOS tube is connected with the first voltage through the fifth NMOS tube, and the seventh NMOS tube is in a forward conduction state; when the fifth NMOS tube is disconnected under the control of the second switch control signal, the seventh NMOS tube is disconnected under the control of the second switch control signal, the sixth NMOS tube is conducted under the enabling of the second control signal, the source electrode of the seventh NMOS tube is connected with a second preset voltage through the sixth NMOS tube, the voltage value of the second preset voltage is larger than or equal to the first voltage, and the seventh NMOS tube is switched to a reverse bias state.
In another exemplary aspect, the second unidirectional conducting element is a seventh diode; the second reverse bias switching element is a sixth NMOS tube; the anode of the seventh diode is used as the second end of the second unidirectional conduction element to be connected with the second voltage, and the cathode of the seventh diode is used as the second end of the second unidirectional conduction element to be connected with the second end of the fifth NMOS tube and the first end of the sixth NMOS tube; when the fifth NMOS tube is conducted under the enabling of the second switch control signal, the cathode of the seventh diode is connected with the first voltage through the fifth NMOS tube, and the seventh NMOS tube is in a forward conduction state; when the fifth NMOS tube is disconnected under the control of the second switch control signal, the sixth NMOS tube is conducted under the enabling of the second control signal, the cathode of the seventh diode is connected with a second preset voltage through the sixth NMOS tube, the voltage value of the second preset voltage is larger than or equal to the first voltage, and the seventh diode is switched to a reverse bias state.
Specifically, when the second switch control signal enables to turn on the fifth NMOS transistor, the second switch control signal is at a high level higher than the first voltage, and when the second switch control signal controls the fifth NMOS transistor to turn off, the second switch control signal is at a low level lower than or the first voltage.
In some exemplary aspects, the switching circuit further includes a second inverter, an input terminal of the second inverter is connected to an enable terminal of the fifth NMOS transistor, and an output terminal of the second inverter is connected to a second reverse bias enable terminal of the sixth NMOS transistor, so that states of the sixth NMOS transistor and the fifth NMOS transistor are opposite.
When the second switching element is disconnected, the switching circuit provided by the alternative scheme uses the second unidirectional conducting element to be in a reverse bias state, so that current is forbidden to flow through the second switching element, and the isolation degree of the switching circuit is improved.
In another alternative, the switching circuit is provided with a unidirectional conducting element at a first end thereof; specifically, the switching circuit comprises a first switching element, a first unidirectional conducting element and a first reverse-biased switching element, wherein the first switching element comprises a first end, a second end and an enabling end; the first end of the first switch element is used as the second end of the switch circuit to be connected with the second end of the first unidirectional conduction element, and the first end of the first unidirectional conduction element is used as the first end of the switch circuit to be connected with the first voltage; the first reverse bias switching element comprises a first end, a second end and a first reverse bias enabling end, the first end of the first reverse bias switching element is connected with the second end of the first unidirectional conducting element, the second end of the first reverse bias switching element is connected with a first preset level, and the first reverse bias enabling end is connected with a first switch control signal; wherein the first preset level is less than or equal to the first voltage;
The first reverse bias control signal is used for switching off the first reverse bias switching element when the first switching control signal turns on the first switching element, and the first switching element connects the second end of the first unidirectional conduction element with the second voltage so as to enable the first unidirectional conduction element to be in a forward conduction state;
the first reverse bias control signal is further used for conducting the first reverse bias switching element when the first switching control signal turns off the first switching element, and the first reverse bias switching element connects the second end of the first unidirectional conducting element with a first preset level.
Preferably, the voltage value of the first preset level is equal to the second voltage.
Specifically, the second end of the first reverse bias switching element is connected to the first end of the first switching element.
In an exemplary scheme, the first switching element is a second NMOS tube, the drain electrode of the second NMOS tube is used as a first end of the first switching element to be connected with a second voltage, the source electrode of the second NMOS tube is used as a second end of the first switching element to be connected with a second end of the first unidirectional conducting element, and the grid electrode of the second NMOS tube is used as an enabling end of the first switching element to be connected with a first switching control signal; the second NMOS tube is turned on or off under the control of the first switch control signal.
In an exemplary scheme, the first unidirectional conducting element is a fourth NMOS transistor; the first reverse bias switching element is a third NMOS tube; the source electrode of the fourth NMOS tube is connected with the source electrode of the second NMOS tube and the drain electrode of the third NMOS tube, the drain electrode of the fourth NMOS tube is connected with the first voltage, and the grid electrode of the fourth NMOS tube is connected with the grid electrode of the second NMOS tube; when the second NMOS tube is conducted under the enabling of the first switch control signal, the fourth NMOS tube is conducted under the enabling of the first switch control signal, the third NMOS tube is disconnected under the control of the first reverse bias control signal, the source electrode of the fourth NMOS tube is connected with the second voltage through the second NMOS tube, and the fourth NMOS tube is in a forward conducting state; when the second NMOS tube is disconnected under the control of the first switch control signal, the third NMOS tube is conducted under the enabling of the first reverse bias control signal, the source electrode of the fourth NMOS tube is connected with a first preset level through the third NMOS tube, and the fourth NMOS tube is in a reverse bias state.
Specifically, the source electrode of the third NMOS tube is connected with the drain electrode of the second NMOS tube.
Further, when the first switch control signal enables the second NMOS transistor to be turned on, the first switch control signal is at a high level higher than the second voltage, and when the first switch control signal turns the second NMOS transistor off, the first switch control signal is at a low level lower than or equal to the second voltage.
In one exemplary aspect, the first unidirectional conducting element is a fourth diode; the first reverse bias switching element is a third NMOS tube; the anode of the fourth diode is connected with the source electrode of the second NMOS tube and the drain electrode of the third NMOS tube, and the cathode of the fourth diode is connected with the first voltage; when the second NMOS tube is conducted under the enabling of the first switch control signal, the third NMOS tube is disconnected under the control of the first reverse bias control signal, the anode of the fourth diode is connected with the second voltage through the second NMOS tube, and the fourth diode is in a forward conducting state; when the second NMOS tube is disconnected under the control of the first switch control signal, the third NMOS tube is conducted under the enabling of the first reverse bias control signal, the anode of the fourth diode is connected with a first preset level through the third NMOS tube, and the fourth NMOS tube is in a reverse bias state.
Further, when the first switch control signal enables to turn on the second NMOS transistor, the first switch control signal is at a high level higher than the second voltage, and when the first switch control signal controls the second NMOS transistor to turn off, the first switch control signal becomes at a low level lower than or equal to the second voltage.
In some exemplary aspects, the switching circuit further includes a first inverter having an input coupled to the enable of the second NMOS transistor and an output coupled to the first reverse bias enable of the third NMOS transistor to reverse states of the third NMOS transistor and the second NMOS transistor.
When the first switching element is disconnected, the switching circuit provided by the alternative scheme uses the first unidirectional conducting element to be in a reverse bias state, so that current is forbidden to flow through the first switching element, and the isolation degree of the switching circuit is improved.
When the anode energy storage element is charged by the emission power supply output current in the anode address selection driving circuit, the current output by the emission power supply is mainly used for charging the anode energy storage element, the current on the parallel parasitic capacitance is smaller, and the probability of light leakage and false light emission of the laser due to the existence of the parallel parasitic capacitance of the switching element can be reduced. Further, the anode addressing driving circuit limits the current of the anode energy storage element during charging through the current limiting element, so that the current of the anode energy storage element during charging is smaller than the luminous current threshold of the laser, the phenomenon that the laser leaks light and emits light by mistake due to the existence of parallel parasitic capacitance in the charging stage of the anode energy storage element is avoided, and the luminous control accuracy of the laser array is improved. Further, the anode addressable driving circuit of the embodiment of the invention charges by utilizing the charging current output by the emission power supply, and the current-limiting element is used for limiting the current when the anode energy storage element charges, so that the current flowing through the laser is smaller than the light-emitting threshold current of the laser, thereby avoiding the false light emission of the laser in the charging stage of the anode energy storage element caused by parasitic capacitance and improving the light-emitting control accuracy of the laser array. Furthermore, the unidirectional conducting element is connected in series in the addressing switch element, so that the isolation degree of the addressing switch element is improved by utilizing the unidirectional conducting property of the unidirectional conducting element, and the probability of crosstalk and luminescence of the electric signals of the lasers which emit light and are not selected to emit light by the lasers which are selected to emit light is reduced.
Drawings
The drawings are only for purposes of illustrating embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to designate like parts throughout the figures. In the drawings:
fig. 1 is a schematic diagram showing a circuit configuration of a laser emission circuit in the related art;
fig. 2 is a schematic diagram showing a partial circuit configuration of a laser emission circuit in the related art;
FIG. 3 is a schematic diagram showing a related art switching element and parallel parasitic capacitance
FIG. 4 is a schematic diagram of a laser transmitter circuit according to a first embodiment of the present application;
FIG. 5 is a schematic diagram of an anode addressing driving circuit according to an embodiment of the present application;
FIG. 6 is a schematic diagram of a cathode address driving circuit according to an embodiment of the present application;
FIG. 7 is a schematic diagram showing a circuit configuration of an anode address driving circuit according to the first embodiment of the present application;
FIG. 8 is a schematic diagram showing a circuit configuration of a cathode address switch circuit according to an embodiment of the present application;
FIG. 9 is a schematic diagram showing another circuit configuration of the cathode address switch circuit according to the first embodiment of the present application;
FIG. 10 is a schematic diagram of a circuit configuration of an anode addressing switch circuit according to a second embodiment of the present application;
FIG. 11 is a schematic diagram showing another circuit configuration of an anode addressing switch circuit in a second embodiment of the present application;
fig. 12 is a schematic circuit diagram of an anode address driving circuit in the third embodiment of the present application.
Detailed Description
Exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present invention are shown in the drawings, it should be understood that the present invention may be embodied in various forms and should not be limited to the embodiments set forth herein.
It will be understood that when an element is referred to as being "connected" or "electrically connected" to another element, it can be directly connected or indirectly connected to the other element.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature.
Prior to the description of the laser emission circuit of the embodiment of the present invention, the related art will be described.
First, referring to fig. 1, a laser emission circuit includes a laser array including a plurality of lasers arranged in one or two dimensions and a laser array addressable driving circuit; taking a two-dimensional laser array as an example, a plurality of lasers in the laser array are arranged in two dimensions, namely the laser array is a two-dimensional laser array; anodes of lasers in the same row in the laser array are electrically connected and led out of a common anode terminal, and cathodes of lasers in the same column in the laser array are electrically connected and led out of a common cathode terminal; the laser array addressable driving circuit comprises an anode addressable driving circuit and a cathode addressable driving circuit, wherein the anode addressable driving circuit is connected with a plurality of common anode ends corresponding to the plurality of rows of lasers, and anode address selection driving is carried out on anodes of the plurality of rows of lasers in a scanning mode through externally connecting anode address selection signals; the cathode addressable driving circuit is connected with a plurality of common cathode ends corresponding to the plurality of rows of lasers, and then the cathodes of the plurality of rows of lasers in the laser array are driven in a cathode address selection mode in a scanning mode through an external cathode address selection signal.
In one exemplary scenario, as shown in fig. 1 and 2, the anode addressable driving circuit includes a plurality of anode addressing driving circuits, each of which is respectively connected to a common anode terminal and includes an anode switching element K1, where the anode switching element K1 includes a first terminal, a second terminal, and an addressing enable terminal; wherein, the first end of the anode switch element K1 is connected with the emission power supply E, and the second end is connected with the corresponding common anode end; the anode addressing signal is connected with addressing enabling ends of a plurality of anode switching elements K1 in a plurality of anode addressing driving circuits, and the anode switching elements K1 are enabled to be controlled to be turned on or off in a scanning mode, so that the anodes of the multi-row lasers are driven in an addressing mode; the cathode addressable driving circuit comprises a plurality of cathode addressing driving circuits, each cathode addressing driving circuit is correspondingly connected with a common cathode end and comprises a cathode switch element K2, and the cathode switch element K2 comprises a first end, a second end and an addressing enabling end; wherein, the first end of the cathode switch element K2 is connected with the corresponding common cathode end, and the second end is grounded; the cathode address signal is connected with address enabling ends of a plurality of cathode switching elements K2 in a plurality of cathode address driving circuits, and the plurality of cathode switching elements K2 are enabled to be controlled to be turned on or off in a scanning mode, so that the cathodes of the multi-row lasers are driven to be addressed.
Specifically, when the anode switching element corresponding to the anode and the cathode switching element corresponding to the cathode of any laser are enabled to be conducted under the driving of the anode address signal and the cathode address signal, the laser is conducted and connected with the emission power supply E, and can emit light under the driving of the emission power supply E.
As shown in fig. 3, the related art has the following technical problems: (1) The switch element has parallel parasitic capacitance, and the parasitic capacitance causes the laser to leak light and misemit light; (2) The parallel parasitic capacitance exists in the switching element, so that the isolation degree of the switching element is reduced, and the laser which is not selected to emit light emits light when the electrical signal of the laser which is selected to emit light emits light in a crosstalk manner.
In the first aspect, in order to solve the problem that the parallel parasitic capacitance exists in the switching element, the parasitic capacitance causes light leakage of the laser and light is emitted by mistake. Referring to fig. 4, the present application provides an addressable driving circuit for a laser array, comprising an anode addressable driving circuit 100 and a cathode addressable driving circuit 200; anodes of lasers in the same row in the laser array are electrically connected and led out of a common anode terminal, and cathodes of lasers in the same column in the laser array are electrically connected and led out of a common cathode terminal; the anode addressable driving circuit 100 is connected with a plurality of common anode ends corresponding to the multi-row lasers, and anode addressing driving is carried out on anodes of the multi-row lasers in a scanning mode through externally connecting anode addressing signals; the cathode addressable driving circuit 200 is connected with a plurality of common cathode terminals corresponding to the plurality of columns of lasers, and performs cathode address driving on the cathodes of the plurality of columns of lasers in the laser array in a scanning manner through externally connecting a cathode address driving signal.
In one exemplary scenario, the laser array includes m rows and n columns of lasers; the anode addressable driving circuit 100 includes m anode addressing driving circuits 120, and the cathode addressable driving circuit 200 includes n cathode addressing driving circuits 220; one end of the x-th anode addressing driving circuit 120 is connected with the emission power supply E, the other end of the x-th anode addressing driving circuit is connected with the x-th common anode end in the laser array and then is connected with anodes of lasers LDxy in the laser array, x represents a certain row of lasers, x is a positive integer, x=1, 2 … m and m are the total number of the anode addressing driving circuits and the total number of the common anode ends in the laser array; one end of the y-th cathode address driving circuit 220 is grounded, and the other end of the y-th cathode address driving circuit is connected with the y-th common cathode end in the laser array and then connected with the cathode of the laser LDxy in the laser array; y represents a certain row of lasers, y is a positive integer, and y=1, 2 … n, n is the total number of cathode address driving circuits and is also the total number of common cathode terminals in the laser array.
Referring to fig. 4 and 5, the anode addressing driving circuit 120 includes an anode addressing switching circuit 121 and an anode energy storage circuit 122, the anode addressing switching circuit 121 is connected with the emission power source E and the anode energy storage circuit 122, and the anode energy storage circuit 122 is connected with an anode of the laser LDxy connected to the corresponding common anode terminal; the anode addressing switch circuit 121 is turned on or off under the control of an anode addressing signal, so that the anode energy storage circuit 122 charges energy by using the current output by the emission power supply E when the anode addressing switch circuit 121 is turned on, and the current output by the anode energy storage circuit 122 drives the laser LDxy to emit light.
Referring to fig. 7, in an exemplary scenario, the anode addressing switching circuit 121 includes an anode addressing switching element Q2, the anode addressing switching element Q2 including a first terminal, a second terminal, and an anode addressing enable terminal; the first end of the anode addressing switch element Q2 is connected with the emission power supply E, the second end is connected with the anode energy storage circuit 122, the anode addressing enable end is connected with an anode addressing signal HS, and the anode addressing signal HS is used for enabling the anode addressing switch element Q2 to be switched on or off; when the anode addressing switch element Q2 is turned on, the anode energy storage circuit 122 stores electric energy by using the output current of the emission power source E, and the output current of the anode energy storage circuit 122 drives the laser LDxy to emit light.
Preferably, in this embodiment, the anode addressing switch element Q2 is a second NMOS transistor, a drain electrode of the second NMOS transistor is connected to the emission power source E as a first end of the anode addressing switch element Q2, a source electrode of the second NMOS transistor is connected to the anode tank circuit 122 as a second end of the anode addressing switch element Q2, and a gate electrode of the second NMOS transistor is an anode addressing enable end connected to the anode addressing signal HS; the second NMOS tube is turned on or off under the control of the anode address signal.
In another exemplary scheme, the anode addressing switch element Q2 is a second PMOS transistor, a drain electrode of the second PMOS transistor is connected to the emission power source E as a first end of the anode addressing switch element Q2, a source electrode of the second PMOS transistor is connected to the anode tank circuit 122 as a second end of the anode addressing switch element Q2, and a gate electrode of the second PMOS transistor is connected to the anode addressing signal as an addressing enable end of the anode addressing switch element Q2; the second PMOS tube is connected or disconnected under the control of the anode address signal.
Wherein, the anode address signal drives V when the second PMOS tube is conducted GS V when the voltage condition and the anode address signal drive the second NMOS tube to be conducted GS Voltage conditions are opposite, V GS ＝V G -V S ，V G Is the gate voltage of the MOS tube (the second NMOS tube or the second PMOS tube), V S The source voltage of the MOS tube (the second NMOS tube or the second PMOS tube); for example, the condition for conducting the second NMOS transistor is V of the second NMOS transistor GS ≥V th At this time, the anode address signal is high when the second NMOS transistor is turned on, and the anode is turned off when the second NMOS transistor is turned offThe address signal is low; the condition of the second PMOS tube is that the second PMOS tube is conducted GS ≤V th At this time, the anode address signal when the second PMOS transistor is turned on is at a low level, and the anode address signal when the second PMOS transistor is turned off is at a high level.
Referring to fig. 7, in an exemplary embodiment, the anode energy storage circuit 122 includes an anode energy storage element C and a current limiting element R, wherein a first end of the current limiting element R is connected to a second end of the anode addressing switching element Q2, the second end is connected to the first end of the anode energy storage element C and an anode of the laser connected to a corresponding common anode end, and the second end of the anode energy storage element C is grounded; the anode energy storage element C is used for forming a second energy charging loop by the emission power supply E-the anode addressing switching element Q2-the current limiting element R-the anode energy storage element C-when the anode addressing switching element Q2 is turned on, the anode energy storage element C stores electric energy by utilizing the output current of the emission power supply E, and the laser is driven to emit light by releasing the output current of the electric energy stored by the anode energy storage element C; and the current limiting element is used for current when the anode energy storage element C is charged.
Preferably, the anode energy storage element C comprises an energy storage capacitor; the current limiting element R comprises a current limiting resistor.
Referring to fig. 4 and 6, the cathode address driving circuit 220 includes a cathode address switching circuit 222, one end of the cathode address switching circuit 222 is connected to the cathode of the laser connected to the corresponding common cathode terminal, and the other end is grounded; as shown in fig. 8, in an exemplary embodiment, the cathode addressing switch circuit 222 includes a cathode addressing switch element Q5, where the cathode addressing switch element Q5 includes a first terminal, a second terminal, and a cathode addressing enable terminal, the first terminal of the cathode addressing switch element Q5 is connected to the cathode of the laser, the second terminal is grounded, the cathode addressing enable terminal is connected to a cathode addressing signal, and the cathode addressing switch element Q5 is turned on or off under control of the cathode addressing signal.
Preferably, in this embodiment, the cathode addressing switch element Q5 is a fifth NMOS transistor, the drain electrode of the fifth NMOS transistor is connected to the cathode of the laser as the first end of the cathode addressing switch element Q5, the source electrode of the fifth NMOS transistor is grounded as the second end of the cathode addressing switch element Q5, and the gate electrode of the fifth NMOS transistor is connected to the cathode addressing signal LS as the cathode addressing enable end; the cathode address switching element Q5 is turned on or off under control of a cathode address signal.
In the related art, because parasitic capacitances exist on the anode addressing switch K1 and the cathode addressing switch K2, and the parasitic capacitances are generally connected in parallel with the anode addressing switch K1 and the cathode addressing switch K2, when the emission power source outputs current, even if the anode addressing switch K1 and the cathode addressing switch K2 are selected to be turned on, a loop is formed between the parallel parasitic capacitances of the emission power source E-the anode addressing switch K1 and the parallel parasitic capacitances of the anode-cathode addressing switch K2 of the laser, and the current directly output by the emission power source E is larger, once the current output by the emission power source E on the loop reaches the light-emitting current threshold of the laser, the laser can emit light by mistake.
When the anode addressing driving circuit 120 provided in the embodiment of the present application charges the energy storage capacitor in the anode energy storage circuit 122 through the emission power source E, two loops exist, namely, a loop one: the second charging loop formed by the transmitting power supply E-anode addressing switch element Q2-anode energy storage element C-ground is loop two: the parallel parasitic capacitance-ground of the emission power supply E-anode addressing switching element Q2-laser LDxy-cathode switching element Q5 together form a current loop. Because the capacitance value of the energy storage capacitor is far greater than that of the parallel parasitic capacitor, the current output by the emission power supply E is mainly used for charging the energy storage capacitor, and the current on the parallel parasitic capacitor is smaller, so that the probability of light leakage and false light emission of the laser due to the parallel parasitic capacitor can be reduced.
In order to further reduce the probability of light leakage and false light emission of the laser caused by the parallel parasitic capacitance, the anode address driving circuit 120 provided in this embodiment of the present application is configured to limit the current when the anode address driving circuit 121 is turned on and the emission power source E charges the anode energy storage element C by setting the current limiting element R in the anode energy storage circuit 122, so as to reduce the current value on the parallel parasitic capacitance on the second loop when the anode energy storage element C charges, so that the current of the parallel parasitic capacitance when the anode energy storage element C charges is smaller than the light emission current threshold of the laser, and the laser will not emit false light in the charging stage of the anode energy storage element C.
It will be appreciated that the greater the resistance of the restriction element R, the greater the restriction capability of the restriction element R and the greater the pressure drop across the restriction element R. Of course, in the present application, the specific resistance of the current limiting element R is not limited, and may be set reasonably according to actual requirements.
In one embodiment of the invention, the laser may be a laser diode; the specific process of selecting the x-th row and y-th column lasers (denoted as LDxy) in the two-dimensional laser array to emit light is as follows:
in the first stage, the anode addressing switch element Q2 of the x-th row is conducted under the control of an anode addressing signal, the cathode addressing switch element Q5 of the y-th row is disconnected under the control of a cathode addressing signal, and the anode energy storage element C enters an energy charging stage;
In theory this stage forms only loop one: the transmitting power supply-anode addressing switch element Q2-current limiting element-anode energy storage element C-anode ground, but parasitic capacitance exists on the cathode addressing switch element Q5, and the parasitic capacitance is connected with the cathode addressing switch element Q5 in parallel; in practice, this stage forms a loop two in addition to the loop one: the parasitic capacitance of the emission power supply E-anode addressing switching element Q2-current limiting element-laser LDxy-cathode addressing switching element Q5-cathode ground.
In this embodiment, the current limiting element limits the current when the emission power source E charges the anode energy storage element C, so that the current flowing through the laser LDxy through the parasitic capacitance of the cathode address switch element Q5 when the anode energy storage element C charges is smaller than the light-emitting current threshold of the laser LDxy, and the laser LDxy will not misemit light due to the existence of the parallel parasitic capacitance in the charging stage of the anode energy storage element C;
in the second stage, the cathode addressing switch element Q5 of the y-th row is conducted under the control of the cathode addressing signal, and the anode energy storage element C enters an energy release stage; the anode energy storage element C-the laser LDxy-the cathode addressing switching element Q5-the cathode forms a loop (5), and the anode energy storage element C discharges through the loop (5) to drive LDxy to emit light;
At this stage, the parasitic capacitance of the cathode address switching element Q5 is discharged through the cathode ground.
In the second aspect, in order to solve the problem that the parasitic capacitance exists in the cathode address switch element Q5, the isolation of the cathode address switch circuit 121 is reduced, and the electric signals of the lasers which are not selected to emit light are crossly emitted.
Referring to fig. 8 and 9, in another exemplary implementation, the cathode addressing switch circuit 221 provided in this embodiment of the present application further includes a cathode unidirectional conducting element and a cathode reverse bias switch element Q6, where the cathode unidirectional conducting element is connected between the cathode of the laser and the cathode addressing switch element Q5, a first end of the cathode unidirectional conducting element is connected to the cathode of the laser, a second end of the cathode unidirectional conducting element is connected to the second end of the cathode addressing switch element Q5, and a first end of the cathode addressing switch element Q5 is grounded; the cathode reverse bias switching element Q6 comprises a first end, a second end and a cathode reverse bias enabling end, the first end of the cathode reverse bias switching element Q6 is connected with the second end of the cathode unidirectional conducting element, the second end is connected with a second preset voltage, and the cathode reverse bias enabling end is connected with a cathode reverse bias control signal; the cathode reverse bias control signal is used for turning off the cathode reverse bias switching element Q6 when the cathode addressing signal turns on the cathode addressing switching element Q5, and the second end of the cathode unidirectional conducting element is grounded by the cathode addressing switching element Q5 so that the cathode unidirectional conducting element is in a forward conducting state; the cathode reverse bias control signal is further used for turning on the cathode reverse bias switching element Q6 when the cathode address switching element Q5 is turned off by the cathode address selection signal, and the second end of the cathode unidirectional conducting element is connected to a second preset voltage by the cathode reverse bias switching element Q6, wherein the voltage value of the second preset voltage is greater than or equal to the voltage value of the cathode ground, so that the cathode unidirectional conducting element is in a reverse bias state, current is prohibited from flowing through the cathode address switching element Q5, and the isolation degree of the cathode address switching circuit 221 is improved.
The cathode reverse bias control signal is opposite to the state of the cathode address signal, specifically, when the cathode address signal is at a high level, the cathode reverse bias control signal is at a low level, and when the cathode address signal is at a low level, the cathode reverse bias control signal is at a high level.
Preferably, in an exemplary embodiment, the second preset voltage to which the second end of the cathode unidirectional conducting element is connected is equal to the anode driving level; specifically, the second end of the cathode unidirectional conducting element is connected with the first end of the Q2 of the anode addressing switching element; the anode driving level is the voltage output by the emission power supply E to the anode addressing switch element Q2, that is, the voltage of the emission power supply E.
In this embodiment, when the laser LDxy is selected to emit light, in the energy release stage of the anode energy storage element C, the cathode addressing switch element Q5 is turned on under the enabling of the cathode addressing signal, the cathode unidirectional conduction element is in a forward conduction state, the anode energy storage element C-the laser LDxy-the cathode unidirectional conduction element-the cathode addressing switch element Q5-the cathode form an energy release loop, and the anode energy storage element C outputs current to the laser LDxy by using the energy stored by itself to drive the laser LDxy to emit light; when the laser LDxy stops being selected to emit light, the cathode address switch element Q5 is turned off under the control of the cathode address signal, and the cathode reverse bias switch element Q6 is turned on under the enabling of the cathode reverse bias control signal, so that the cathode unidirectional conduction element is in a reverse bias state, and current is inhibited from flowing through the cathode address switch element Q2, so that the laser LDxy stopping being selected to emit light cannot be cross-linked by electrical signals of other lasers being selected to emit light, and the isolation degree of the cathode address switch circuit 221 is improved.
Preferably, referring to fig. 8, in an exemplary embodiment, the cathode unidirectional conducting element is a seventh NMOS transistor Q7; the cathode reverse bias switching element Q6 is a sixth NMOS tube; the drain electrode of the seventh NMOS tube Q7 is used as the first end of the cathode unidirectional conducting element to be connected with the cathode of the laser, the source electrode of the seventh NMOS tube Q7 is used as the second end of the cathode unidirectional conducting element to be connected with the second end of the cathode addressing switch element Q5 and the first end of the sixth NMOS tube, and the grid electrode of the seventh NMOS tube Q7 is connected with the cathode addressing enabling end of the cathode addressing switch element Q5; when the laser LDxy is selected to emit light, in the energy release stage of the anode energy storage element C, the cathode addressing switch element Q5 and the seventh NMOS transistor Q7 are turned on under the enabling of the cathode addressing signal, the source electrode of the seventh NMOS transistor Q7 is grounded to the cathode through the cathode addressing switch element Q5, the seventh NMOS transistor Q7 is in a forward conduction state, and the voltage drop between the cathode addressing switch element Q5 and the seventh NMOS transistor Q7 in the conduction state is smaller, so that the drain voltage of the seventh NMOS transistor Q7 is close to the cathode ground voltage value; when the laser LDxy stops being selected to emit light, the cathode address switch element Q5 and the seventh NMOS transistor Q7 are turned off under the control of the cathode address signal, the sixth NMOS transistor is turned on under the enabling of the cathode reverse bias control signal, and the source of the seventh NMOS transistor Q7 is connected to the second preset voltage through the sixth NMOS transistor, wherein the seventh NMOS transistor Q7 is switched to the reverse bias state because the voltage value of the second preset voltage is greater than or equal to the voltage value of the cathode ground.
Specifically, when the cathode address signal enables the fifth NMOS transistor Q5 and the seventh NMOS transistor Q7 to be turned on, the cathode address signal is at a high level higher than the cathode ground voltage value, and when the cathode address signal controls the fifth NMOS transistor Q5 and the seventh NMOS transistor Q7 to be turned off, the cathode address signal is at a low level lower than or equal to the cathode ground voltage value.
Referring to fig. 10, in another exemplary embodiment, the cathode unidirectional conducting element is a seventh diode D7; the cathode reverse bias switching element Q6 is a sixth NMOS tube; the anode of the seventh diode D7 is connected with the cathode of the laser, and the cathode of the seventh diode D7 is connected with the second end of the cathode addressing switch element Q5 and the first end of the sixth NMOS tube; when the laser LDxy is selected to emit light, in the energy release stage of the anode energy storage element C, the cathode addressing switch element Q5 is turned on under the enabling of the cathode addressing signal, the cathode of the seventh diode D7 is grounded through the cathode addressing switch element Q5, the seventh diode D7 is in a forward conduction state, and the voltage drop between the cathode addressing switch element Q5 and the seventh diode D7 in the conduction state is smaller, so that the anode voltage of the seventh diode D7 is close to the cathode ground voltage value; when the laser LDxy stops being selected to emit light, the cathode address switching element Q5 is turned off under the control of the cathode address signal, the cathode reverse bias switching element Q6 is turned on under the enabling of the cathode reverse bias control signal, the cathode of the seventh diode D7 is connected to the second preset voltage through the cathode reverse bias switching element Q6, and at this time, the cathode voltage of the seventh diode D7 is greater than or equal to the anode voltage thereof, and the seventh diode D7 is switched to the reverse bias state.
Specifically, when the cathode address signal enables turning on the cathode address switching element Q5, the cathode address signal is at a high level higher than the cathode ground voltage value, and when the cathode address signal controls turning off the cathode address switching element Q5, the cathode address signal is at a low level lower than or equal to the cathode ground voltage value.
Preferably, in the present embodiment, the cathode address switch circuit 221 further includes a cathode inverter I2, and an input terminal of the cathode inverter I2 is connected to a cathode address enable terminal of the cathode address switch element Q5, and an output terminal is connected to a cathode reverse bias enable terminal of the cathode reverse bias switch element Q7, so that the states of the cathode reverse bias switch element Q7 and the cathode address switch element Q5 are opposite.
Of course, in other embodiments, the input terminal of the cathode inverter I2 may be connected to the cathode reverse bias enabling terminal of the cathode reverse bias switching element Q7, and the output terminal may be connected to the cathode address enabling terminal of the cathode address switching element Q5, where the states of the cathode reverse bias switching element Q7 and the cathode address switching element Q5 may be reversed.
The addressable driving circuit provided by the embodiment of the application comprises a plurality of anode addressing driving circuits 120, which are in one-to-one correspondence with a plurality of common anode terminals in a two-dimensional laser array, wherein each anode addressing driving circuit is used for performing anode addressing driving on lasers connected to the common anode terminals; a plurality of cathode address driving circuits 220, which are in one-to-one correspondence with a plurality of common cathode terminals in the two-dimensional laser array, each of which is used for performing cathode address driving on the lasers connected to the common cathode terminal; the anode addressing driving circuit 120 comprises an anode addressing switching circuit 121 and an anode energy storage circuit 122; the anode energy storage circuit 122 comprises an anode energy storage element C and a current limiting element, wherein the anode energy storage element C is used for charging by utilizing the current output by the emission power supply E when the anode addressing switch circuit 121 is conducted; the current limiting element is used for current when the anode energy storage element C charges, so that when the anode energy storage element C is in a charging stage, the current flowing through the laser is smaller than the light-emitting threshold current of the laser, and therefore the problem that the parallel parasitic capacitance exists in the cathode addressing switch element Q5 to cause light leakage of the laser in the charging stage of the anode energy storage element C to cause false light emission is avoided, and the light-emitting control accuracy of the two-dimensional laser array is improved.
The embodiment of the application also provides a laser emitting circuit, which comprises a laser array and the addressable driving circuit, wherein the laser array comprises a plurality of lasers, and the lasers are arranged in two dimensions, namely the laser array is a two-dimensional laser array; anodes of lasers in the same row in the laser array are electrically connected and led out of a common anode terminal, and cathodes of lasers in the same column in the laser array are electrically connected and led out of a common cathode terminal; the addressable driving circuit comprises an anode addressable driving circuit and a cathode addressable driving circuit, the anode addressable driving circuit is connected with a plurality of common anode ends corresponding to the multiple rows of lasers, and anode addressing driving is carried out on anodes of the multiple rows of lasers in a scanning mode through externally connecting anode addressing signals; the cathode addressable driving circuit is connected with a plurality of common cathode ends corresponding to the plurality of rows of lasers, and then the cathodes of the plurality of rows of lasers in the laser array are driven in a cathode address selection mode in a scanning mode through an external cathode address selection signal.
In this embodiment, the laser emission circuit concentrates the anode addressable driving circuit and the cathode addressable driving circuit on one side of the two-dimensional laser array, so that the reliability capabilities of the two-dimensional laser array ldm×n, such as voltage withstand current performance, electrostatic protection performance, and the like, can be increased.
Meanwhile, the anode addressable driving circuit is connected with the anodes of the lasers positioned in the same row through the common anode end and connected with the cathodes of the lasers positioned in the same column through the common cathode end, so that the number of channels of the two-dimensional laser array is reduced, and the manufacturing cost of the laser emitting circuit is further saved.
In this embodiment, the process of the addressable driving circuit for performing address driving on the laser array is as follows:
the first stage, the anode addressing signal controls the anode addressing switch element Q2 of the row where the selected light-emitting laser is located to be conducted, and the anode energy storage element C charges energy by utilizing the current output by the emission power supply E; the cathode address signal controls the cathode address switching element Q5 of the column in which the selected light-emitting laser is located to be turned off, more specifically, the cathode unidirectional conductive element is in a reverse bias state, and the cathode address switching circuit 221 is in a reverse bias state;
in the third stage, the cathode address signal controls the cathode address switching element Q5 of the column in which the selected light-emitting laser is located to be turned on, more specifically, the cathode unidirectional conduction element is in a forward conduction state, and the cathode address switching circuit 221 is in a forward conduction state; the anode energy storage element C outputs current to the selected light-emitting laser by utilizing the electric energy stored by the anode energy storage element C, and drives the laser to emit light.
When the light emission of the laser which is currently selected to emit light is finished, the cathode address signal controls the cathode address switching element Q5 of the row where the laser which is selected to emit light is positioned to be disconnected; if the laser of the next selected light emission and the laser of the previous selected light emission are the same row of lasers, the anode addressing signal controls the anode addressing switch element Q2 of the row of the laser of the previous selected light emission to be continuously conducted, and the cathode addressing switch element Q5 of the column of the laser of the next selected light emission is enabled to be conducted only by the cathode addressing signal.
Further, when the plurality of rows of anode address driving circuits corresponding to the plurality of lasers are enabled to be conducted by the anode address signals, and the plurality of columns of cathode address driving circuits corresponding to the plurality of lasers are enabled to be conducted by the cathode address signals, the plurality of lasers can emit light at the same time.
Furthermore, the anode address signal can drive two or more anode switch elements corresponding to the common anode terminal to be turned on simultaneously, and the cathode address signal can drive two or more cathode switch elements corresponding to the common cathode terminal to be turned on simultaneously, so that two or more lasers can emit light simultaneously.
The addressable driving circuit in the laser emission circuit provided by the embodiment of the application comprises a plurality of anode addressing driving circuits 120 which are in one-to-one correspondence with a plurality of common anode ends in the two-dimensional laser array, wherein each anode addressing driving circuit is used for performing anode addressing driving on lasers connected to the common anode ends; a plurality of cathode address driving circuits 220, which are in one-to-one correspondence with a plurality of common cathode terminals in the two-dimensional laser array, each of which is used for performing cathode address driving on the lasers connected to the common cathode terminal; the anode addressing driving circuit 120 comprises an anode addressing switching circuit 121 and an anode energy storage circuit 122; the anode energy storage circuit 122 comprises an anode energy storage element C and a current limiting element, wherein the anode energy storage element C is used for charging by utilizing the current output by the emission power supply E when the anode addressing switch circuit 121 is conducted; the current limiting element is used for current when the anode energy storage element C charges, so that when the anode energy storage element C is in a charging stage, the current flowing through the laser is smaller than the light-emitting threshold current of the laser, thereby avoiding light leakage of the laser caused by the existence of parallel parasitic capacitance in the cathode addressing switch element Q5 and error light emission in the charging stage of the anode energy storage element C, and improving the control accuracy of laser emission.
The embodiment of the application also provides a laser radar, the laser radar includes above-mentioned laser emission circuit, the laser radar produces laser through above-mentioned laser emission circuit, and with laser direction detection region, rethread cooperates with the laser receiving arrangement in the laser radar, receive the echo light beam that returns from the target by laser receiving arrangement, then carry out suitable processing by signal processing system to the data, can obtain information such as distance, speed, position, gesture or even shape of target, and then can be applied to the navigation of products such as car, robot, commodity circulation car, inspection car and avoid, obstacle discernment, range finding, speed measuring, autopilot etc. scene.
By adopting the laser emission circuit, the addressable driving circuit in the laser emission circuit comprises a plurality of anode address driving circuits 120 which are in one-to-one correspondence with a plurality of common anode terminals in the two-dimensional laser array, and each anode address driving circuit is used for performing anode address driving on the laser connected to the common anode terminal; a plurality of cathode address driving circuits 220, which are in one-to-one correspondence with a plurality of common cathode terminals in the two-dimensional laser array, each of which is used for performing cathode address driving on the lasers connected to the common cathode terminal; the anode addressing driving circuit 120 comprises an anode addressing switching circuit 121 and an anode energy storage circuit 122; the anode energy storage circuit 122 comprises an anode energy storage element C and a current limiting element, wherein the anode energy storage element C is used for charging by utilizing the current output by the emission power supply E when the anode addressing switch circuit 121 is conducted; the current limiting element R is used for current when the anode energy storage element C is charged, so that when the anode energy storage element C is in a charging stage, the current flowing through the laser is smaller than the light-emitting threshold current of the laser, thereby avoiding false light emission of the laser in the charging stage of the anode energy storage element caused by parasitic capacitance in the cathode address selection driving circuit and improving the performance of the laser radar.
Example two
Referring to fig. 10 and 11, in order to solve the problem that the parasitic capacitance exists in the anode addressing switch circuit 121, which results in a decrease in isolation of the anode addressing switch circuit 121, the electric signal of the laser whose light emission is selected by the laser whose light emission is not selected is crosstalk-emitted, the difference between this embodiment and the first embodiment is that: the anode addressing switch circuit 121 further comprises an anode unidirectional conducting element and an anode reverse bias switch element Q3, wherein the anode unidirectional conducting element is connected between the second end of the anode addressing switch element Q2 and the current limiting element, the second end of the anode unidirectional conducting element is connected with the second end of the anode addressing switch element Q2, and the first end is connected with the first end of the current limiting element; the anode reverse bias switching element Q3 comprises a first end, a second end and an anode reverse bias enabling end, wherein the first end of the anode reverse bias switching element Q3 is connected with the second end of the unidirectional conducting element, the second end of the anode reverse bias switching element Q3 is connected with a first preset level, and the anode reverse bias enabling end is connected with an anode reverse bias control signal; the anode reverse bias control signal is used for turning off the anode reverse bias switch element Q3 when the anode addressing switch element Q2 is turned on by the anode addressing signal, the second end of the anode unidirectional switch element is connected with the transmitting power supply E by the anode addressing switch element Q2 so that the anode unidirectional switch element is in a forward conduction state, the transmitting power supply E-the anode addressing switch element Q2-the anode unidirectional switch element-the anode energy storage element C-form a second energy charging loop, and the transmitting power supply E charges the anode energy storage element C through the second energy charging loop; the anode reverse bias control signal is further used for turning on the anode reverse bias switching element Q3 when the anode addressing switching element Q2 is turned off by the anode addressing signal, and the anode reverse bias switching element Q3 connects the second end of the anode unidirectional conduction element to the first preset level, so that the anode unidirectional conduction element is in a reverse bias state, so that current is inhibited from flowing through the anode addressing switching element Q2, and isolation of the anode addressing switching circuit 121 is improved. Preferably, in the exemplary scheme, the voltage value of the first preset level is equal to the anode driving level; specifically, the second terminal of the anode reverse bias switching element Q3 is connected to the first terminal of the anode addressing switching element Q2.
In other exemplary aspects, the voltage value of the first preset level is less than the anode drive level.
Preferably, in an exemplary scheme, the anode addressing switch element Q2 is a second NMOS transistor, and the anode reverse bias switch element Q3 is a third NMOS transistor; the anode reverse bias control signal is opposite to the anode address signal; when the anode addressing signal controls the second NMOS tube to be conducted, the anode reverse bias control signal controls the third NMOS tube to be disconnected, and the second end of the anode unidirectional conduction element is connected with the emission power supply E through the anode addressing switch element Q2 so that the anode unidirectional conduction element is in a forward conduction state; when the anode addressing signal controls the second NMOS tube to be disconnected, the anode reverse bias control signal controls the third NMOS tube to be conducted, and the anode reverse bias switch element Q3 connects the second end of the anode unidirectional conduction element to the first preset level, so that the anode unidirectional conduction element is in a reverse bias state.
Specifically, the anode addressing switch circuit 121 further includes an anode inverter I1, where an input terminal of the anode inverter I1 is connected to an anode addressing enable terminal of the second NMOS transistor, and an output terminal of the anode inverter I1 is connected to an anode reverse bias enable terminal of the third NMOS transistor, so that states of the third NMOS transistor and the second NMOS transistor are opposite.
Of course, in other embodiments, the input terminal of the anode inverter I1 may be connected to the anode reverse bias enable terminal of the third NMOS transistor, and the output terminal is connected to the anode addressing enable terminal of the second NMOS transistor, where the state of the third NMOS transistor and the state of the second NMOS transistor may be opposite.
Specifically, when the anode address signal is at a high level, the anode reverse bias control signal is at a low level, the second NMOS tube is turned on, and the third NMOS tube is turned off; when the anode address signal is at a low level, the anode reverse bias control signal is at a high level, the second NMOS tube is disconnected, and the third NMOS tube is connected. In this embodiment, when the laser LDxy is selected to emit light, in the energy charging stage of the anode energy storage element C, the anode addressing switch element Q2 is turned on under the enable of the anode addressing signal, the anode unidirectional conduction element is in a forward conduction state, the emission power source E-anode addressing switch element Q2-anode unidirectional conduction element-anode energy storage element C-forms a second energy charging loop, the anode energy storage element C charges energy by using the current output by the emission power source E, and the anode energy storage element C drives the laser LDxy to emit light by using the energy output current stored by itself; when the laser LDxy stops the selected light emission, the anode addressing switch element Q2 is turned off under the control of the anode addressing signal, and the anode reverse bias switch element Q3 is turned on under the enabling of the anode reverse bias control signal, so that the anode unidirectional conduction element is in a reverse bias state, the current is inhibited from flowing through the anode addressing switch element Q2, and the laser LDxy stopping the selected light emission cannot be cross-linked by the electrical signals of other selected light emission lasers.
Referring to fig. 10, in an exemplary implementation of the present embodiment, the anode unidirectional conductive element is a fourth NMOS transistor; the reverse bias switching element Q3 is a third NMOS tube; the source electrode of the fourth NMOS tube is connected with the source electrode of the second NMOS tube and the drain electrode of the third NMOS tube, the drain electrode of the fourth NMOS tube is connected with the first end of the current limiting element, and the grid electrode of the fourth NMOS tube is connected with the grid electrode (namely the anode addressing enabling end) of the second NMOS tube; the source electrode of the third NMOS tube is connected with a first preset level, and the grid electrode (namely an anode reverse bias enabling end) of the third NMOS tube is connected with the grid electrode (namely an anode addressing enabling end) of the second NMOS tube through an anode inverter I1; when the laser LDxy is selected to emit light, in the energy charging stage of the anode energy storage element C, the anode addressing switch element Q2 and the fourth NMOS tube are conducted under the enabling of an anode addressing signal, the source electrode of the fourth NMOS tube is connected with the emission power supply E through the second NMOS tube, and the fourth NMOS tube is in a forward conduction state; when the laser LDxy stops being selected to emit light, the second NMOS tube and the fourth NMOS tube are disconnected under the control of the anode address signal, the third NMOS tube is conducted under the enabling of the anode reverse bias control signal, the source electrode of the fourth NMOS tube is connected with a first preset level through the third NMOS tube, and the fourth NMOS tube is in a reverse bias state.
Further, when the anode addressing signal enables the second NMOS tube and the fourth NMOS tube to be conducted, the anode addressing signal is at a high level higher than the anode driving level, and when the anode addressing signal enables the second NMOS tube and the fourth NMOS tube to be disconnected, the anode addressing signal is at a low level lower than or equal to the anode driving level.
Referring to fig. 11, in another exemplary implementation of the present embodiment, the anode unidirectional conductive element is a fourth diode D4; the anode reverse bias switching element Q3 is a third NMOS tube; the anode of the fourth diode D4 is connected with the source electrode of the second NMOS tube and the drain electrode of the third NMOS tube, and the cathode of the fourth diode D4 is connected with the first end of the current limiting element R; the source electrode of the third NMOS tube is connected with a first preset level, and the grid electrode (namely an anode reverse bias enabling end) of the third NMOS tube is connected with the grid electrode (namely an anode addressing enabling end) of the second NMOS tube through an anode inverter I1; when the laser LDxy is selected to emit light, in the energy charging stage of the anode energy storage element C, the second NMOS tube is conducted under the enabling of the anode address signal, the anode of the fourth diode D4 is connected with the emission power supply E through the second NMOS tube, and the fourth diode D4 is in a forward conduction state; when the laser LDxy stops being selected to emit light, the second NMOS tube is disconnected under the control of the anode address signal, the third NMOS tube is conducted under the enabling of the anode reverse bias control signal, the anode of the fourth diode D4 is connected with the first preset level through the third NMOS tube, and the fourth diode D4 is in a reverse bias state.
When the anode addressing switch circuit 121 provided in this embodiment is turned off by the anode addressing switch element Q2, the anode unidirectional conducting element is in a reverse bias state, so that current is inhibited from flowing through the anode addressing switch element Q2, the isolation of the anode addressing switch circuit 121 is improved, and the probability that the laser LDxy which stops selected to emit light cannot be cross-linked by the electrical signals of other selected lasers is reduced.
Example III
The difference between this embodiment and the second embodiment is that: the anode addressing switch element Q2 is a second PMOS tube; the drain electrode of the second PMOS tube is used as the first end of the anode addressing switch element Q2 to be connected with the emission power supply E, the source electrode of the second PMOS tube is used as the second end of the anode addressing switch element Q2 to be connected with the anode energy storage circuit 122, and the grid electrode of the second PMOS tube is used as the addressing enabling end of the anode addressing switch element Q2 to be connected with the anode addressing signal; the second PMOS tube is connected or disconnected under the control of the anode address signal.
Wherein, the anode address signal drives V when the second PMOS tube is conducted GS V when the voltage condition and the anode address signal drive the second NMOS tube to be conducted GS Voltage conditions are opposite, V GS ＝V G -V S ，V G Is the gate voltage of the MOS tube (the second NMOS tube or the second PMOS tube), V S The source voltage of the MOS tube (the second NMOS tube or the second PMOS tube); for example, the condition for conducting the second NMOS transistor is V of the second NMOS transistor GS ≥V th At this time, the anode address signal when the second NMOS transistor is turned on is at a high level, and the anode address signal when the second NMOS transistor is turned off is at a low level; the condition of the second PMOS tube is that the second PMOS tube is conducted GS ≤V th At this time, the anode address signal when the second PMOS transistor is turned on is at a low level, and the anode address signal when the second PMOS transistor is turned off is at a high level.
In an exemplary scheme, the anode reverse bias switching element Q3 is a third NMOS transistor, and the anode unidirectional conducting element is a fourth NMOS transistor; the drain electrode of the second PMOS tube is used as the first end of the anode addressing switch element Q2 to be connected with a transmitting power supply, the source electrode of the second PMOS tube is used as the second end of the anode addressing switch element Q2 to be connected with the source electrode of the fourth NMOS tube and the drain electrode of the third NMOS tube, and the grid electrode of the second PMOS tube is connected with the grid electrode of the fourth NMOS tube through a second anode reverser; the source electrode of the third NMOS tube is connected with a first preset level, and the grid electrode of the third NMOS tube is connected with the grid electrode of the second PMOS tube; when the laser LDxy is selected to emit light, in the energy charging stage of the anode energy storage element C, the second PMOS tube is conducted under the control of the anode address signal after the phase inversion, the fourth NMOS tube is conducted under the control of the anode address signal after the phase inversion, the third NMOS tube is disconnected under the control of the anode reverse bias control signal, the source electrode of the fourth NMOS tube is connected with the emission power supply E through the second PMOS tube, and the fourth NMOS tube is in a forward conduction state; when the laser LDxy stops being selected to emit light, the second PMOS tube is disconnected under the control of the anode addressing signal, the third NMOS tube is conducted under the enabling of the anode reverse bias control signal, the source electrode of the fourth NMOS tube is connected with the first preset level through the third NMOS tube, and the fourth NMOS tube is in a reverse bias state.
In one exemplary scheme, when the anode addressing signal enables the second PMOS transistor to be turned on, the anode addressing signal is at a low level less than the anode driving level, and when the anode addressing signal controls the second PMOS transistor to be turned off, the anode addressing signal is at a high level greater than the anode driving level.
In this embodiment, the gate of the third NMOS transistor is connected to the gate of the second PMOS transistor, so that the state of the third NMOS transistor is opposite to the state of the second PMOS transistor.
In this embodiment, the anode addressing switch circuit 121 further includes a second anode inverter, where an input end of the second anode inverter is connected to a gate of the second PMOS transistor, and an output end of the second anode inverter is connected to a gate of the fourth NMOS transistor, so that states of the fourth NMOS transistor and the second PMOS transistor are the same.
Of course, in other embodiments, the input end of the second anode inverter may be connected to the gate of the fourth NMOS transistor, and the output end of the second anode inverter may be connected to the gate of the second PMOS transistor, where the same states of the fourth NMOS transistor and the second PMOS transistor may be implemented.
When the anode addressing signal and the anode reverse bias control signal are both at low level, the anode addressing signal controls the second PMOS tube to be conducted, the anode addressing signal (high level) after the phase inversion controls the fourth NMOS tube to be conducted, the anode reverse bias control signal controls the third NMOS tube to be disconnected, and the source electrode of the fourth NMOS tube is connected with the emission power supply E through the second PMOS tube so that the fourth NMOS tube is in a forward conducting state; when the anode addressing signal and the anode reverse bias control signal are both in high level, the anode addressing signal controls the second PMOS tube to be disconnected, the anode reverse bias control signal controls the third NMOS tube to be conducted, and the source electrode of the fourth NMOS tube is connected with the first preset level through the third NMOS tube so that the fourth NMOS tube is in a reverse bias state.
In another exemplary scheme of this embodiment, the anode addressing switch element Q2 is a second PMOS transistor, the anode reverse bias switch element Q3 is a third NMOS transistor, and the anode unidirectional conducting element is a fourth diode D4; the drain electrode of the second PMOS tube is used as the first end of the anode addressing switch element Q2 to be connected with a transmitting power supply, the source electrode of the second PMOS tube is used as the second end of the anode addressing switch element Q2 to be connected with the anode of the fourth diode D4 and the drain electrode of the third NMOS tube, and the grid electrode of the second PMOS tube is connected with an anode addressing signal; the source electrode of the third NMOS tube is connected with a first preset level, and the grid electrode of the third NMOS tube is connected with the grid electrode of the second PMOS tube; when the laser LDxy is selected to emit light, in the energy charging stage of the anode energy storage element C, the second PMOS tube is disconnected under the control of an anode reverse bias control signal under the control of the anode address selection signal, the anode of the fourth diode D4 is connected with the emission power supply E through the second PMOS tube, and the fourth diode D4 is in a forward conduction state; when the laser LDxy stops being selected to emit light, the second PMOS tube is disconnected under the control of the anode address signal, the third NMOS tube is conducted under the enabling of the anode reverse bias control signal, the anode of the fourth diode D4 is connected with the first preset level through the third NMOS tube, and the fourth diode D4 is in a reverse bias state.
In one exemplary scheme, when the anode addressing signal enables the second PMOS transistor to be turned on, the anode addressing signal is at a low level less than the anode driving level, and when the anode addressing signal controls the second PMOS transistor to be turned off, the anode addressing signal is at a high level greater than the anode driving level.
When the anode addressing signal and the anode reverse bias control signal are both at low level, the anode addressing signal controls the second PMOS tube to be conducted, the anode reverse bias control signal controls the third NMOS tube to be disconnected, and the anode of the fourth diode D4 is connected with the emission power supply E through the second PMOS tube so that the fourth diode D4 is in a forward conduction state; when the anode addressing signal and the anode reverse bias control signal are both in high level, the second PMOS tube is controlled to be disconnected by the anode addressing signal, the third NMOS tube is controlled to be connected by the anode reverse bias control signal, and the anode of the fourth diode D4 is connected with a first preset level by the third NMOS tube, so that the fourth diode D4 is in a reverse bias state.
When the anode addressing switch circuit 121 provided in this embodiment is turned off, the anode unidirectional conducting element is in a reverse bias state, so that current is prohibited from flowing through the anode addressing switch element Q2, the isolation of the anode addressing switch circuit 121 is improved, and the laser LDxy which stops being selected to emit light cannot be cross-linked by the electrical signals of other lasers which are selected to emit light.
Example IV
As shown in fig. 12, the present embodiment is different from the first or second embodiment in that: the anode energy storage circuit 122 does not include a current limiting element, and when the emission power source E charges the anode energy storage element, the current through the parallel parasitic capacitance of the cathode switching element is less than the emission current threshold of the laser.
Example five
The embodiment provides a switching circuit for improving isolation, which is used for solving the problem that the isolation of a switching element is reduced due to parasitic capacitance in the switching element.
Specifically, the switching circuit comprises a first end, a second end and an enabling end, wherein the first end of the switching circuit is connected with a first voltage, the second end of the switching circuit is connected with a second voltage, and the second voltage is larger than the first voltage; the switch circuit is used for forming a forward conduction loop between the second end and the first end of the switch circuit under the control of an enabling signal of the enabling end so as to allow current to flow through the switch circuit; and the switching circuit is also used for forming a reverse bias circuit between the second end and the first end of the switching circuit under the control of an enabling signal of the enabling end so as to inhibit current from flowing through the switching circuit.
In an alternative way, the switching circuit is provided with a second unidirectional conducting element at its second end; specifically, the switching circuit comprises a second switching element, a second unidirectional conducting element and a second reverse-biased switching element, wherein the second switching element comprises a first end, a second end and an enabling end; the first end of the second unidirectional conducting element is used as a second end of the switching circuit to be connected with a second voltage, and the second end of the second unidirectional conducting element is connected with the second end of the second switching element; the first end of the second switching element is used as the first end of the switching circuit to be connected with the first voltage, the enabling end of the second switching element is connected with the second switching control signal, and the second switching element is turned on or turned off under the control of the switching control signal; the second reverse bias switching element comprises a first end, a second end and a second reverse bias enabling end, the first end of the second reverse bias switching element is connected with the second end of the second unidirectional conducting element, the second end is connected with a second preset voltage, and the second reverse bias enabling end is connected with a second reverse bias control signal; the second reverse bias control signal is used for switching off the second reverse bias switching element when the switching element is switched on by the second switching control signal, and the first end of the second unidirectional conduction element is connected with the first voltage by the second switching element so that the second unidirectional conduction element is in a forward conduction state, and a forward conduction loop is formed between the second end and the first end of the switching circuit so as to allow current to flow through the switching circuit; the second reverse bias control signal is further used for conducting the second reverse bias switching element when the second switching element is disconnected by the second switching control signal, and the second end of the second unidirectional conducting element is connected with a second preset voltage by the second reverse bias switching element, wherein the voltage value of the second preset voltage is greater than or equal to the first voltage, so that the second unidirectional conducting element is in a reverse bias state, current is forbidden to flow through the second switching element, and isolation of the second switching element is improved.
In an exemplary scheme, the second switching element is a fifth NMOS transistor, a drain electrode of the fifth NMOS transistor is used as a first end of the second switching element to be connected to the first voltage, a source electrode of the fifth NMOS transistor is used as a second end of the second switching element to be connected to a second end of the second unidirectional conducting element, and a gate electrode of the fifth NMOS transistor is used as an enabling end of the second switching element to be connected to the second switching control signal; the fifth NMOS tube is turned on or off under the control of the second switch control signal. In an exemplary scheme, the second unidirectional conducting element is a seventh NMOS transistor Q7; the second reverse bias switching element is a sixth NMOS tube; the drain electrode of the seventh NMOS tube is used as the second end of the second unidirectional conduction element to be connected with the second voltage, the source electrode of the seventh NMOS tube is used as the second end of the second unidirectional conduction element to be connected with the second end of the second switch element and the first end of the sixth NMOS tube, and the grid electrode of the seventh NMOS tube is connected with the grid electrode of the fifth NMOS tube; the grid electrode of the sixth NMOS tube is connected with the grid electrode of the fifth NMOS tube through a second inverter, and the source electrode of the sixth NMOS tube is connected with a second preset voltage; when the fifth NMOS tube is conducted under the enabling of the second switch control signal, the seventh NMOS tube is conducted under the enabling of the second switch control signal, the source electrode of the seventh NMOS tube is connected with the first voltage through the fifth NMOS tube, and the seventh NMOS tube is in a forward conducting state; when the fifth NMOS tube is disconnected under the control of the second switch control signal, the sixth NMOS tube is conducted under the enabling of the second switch control signal, the source electrode of the seventh NMOS tube is connected with a second preset voltage through the sixth NMOS tube, the voltage value of the second preset voltage is larger than or equal to the first voltage, and the seventh NMOS tube is switched to a reverse bias state.
Specifically, when the second switch control signal enables to turn on the fifth NMOS transistor, the second switch control signal is at a high level greater than the first voltage, and when the second switch control signal controls the fifth NMOS transistor to turn off, the second switch control signal is at a low level lower than or equal to the first voltage.
In another exemplary aspect, the second unidirectional conducting element is a seventh diode; the second reverse bias switching element is a sixth NMOS tube; the anode of the seventh diode is used as the second end of the second unidirectional conduction element to be connected with the second voltage, and the cathode of the seventh diode is used as the second end of the second unidirectional conduction element to be connected with the second end of the fifth NMOS tube and the first end of the sixth NMOS tube; the grid electrode of the sixth NMOS tube is connected with the grid electrode of the fifth NMOS tube through a second inverter, and the source electrode of the sixth NMOS tube is connected with a second preset voltage; when the fifth NMOS tube is conducted under the enabling of the second switch control signal, the cathode of the seventh diode is connected with the first voltage through the fifth NMOS tube, and the seventh NMOS tube is in a forward conduction state; when the fifth NMOS tube is disconnected under the control of the second switch control signal, the sixth NMOS tube is conducted under the enabling of the second control signal, the cathode of the seventh diode is connected with a second preset voltage through the sixth NMOS tube, the voltage value of the second preset voltage is larger than or equal to the first voltage, and the seventh diode is switched to a reverse bias state.
Specifically, when the second switching control signal enables the second switching element to be turned on, the second switching control signal is at a high level higher than the first voltage, and when the second switching control signal turns the second switching element off, the second switching control signal is at a low level lower than or the first voltage.
In some exemplary aspects, the switching circuit further includes a second inverter, an input terminal of the second inverter is connected to an enable terminal of the fifth NMOS transistor, and an output terminal of the second inverter is connected to a gate of the sixth NMOS transistor, so that states of the sixth NMOS transistor and the fifth NMOS transistor are opposite.
Of course, in other embodiments, the input end of the second inverter may be connected to the second reverse bias enable end of the sixth NMOS tube, and the output end of the second inverter may be connected to the enable end of the fifth NMOS tube, where the states of the sixth NMOS tube and the fifth NMOS tube may be opposite.
When the second switching element is disconnected, the switching circuit provided by the alternative scheme uses the second unidirectional conducting element to be in a reverse bias state, so that current is forbidden to flow through the second switching element, and the isolation degree of the switching circuit is improved.
In another alternative, the switching circuit is provided with a unidirectional conducting element at a first end thereof; specifically, the switching circuit comprises a first switching element, a first unidirectional conducting element and a first reverse-biased switching element, wherein the first switching element comprises a first end, a second end and an enabling end; the first end of the first switch element is used as the second end of the switch circuit to be connected with the second end of the first unidirectional conduction element, and the first end of the first unidirectional conduction element is used as the first end of the switch circuit to be connected with the first voltage; the first reverse bias switching element comprises a first end, a second end and a first reverse bias enabling end, the first end of the first reverse bias switching element is connected with the second end of the first unidirectional conducting element, the second end of the first reverse bias switching element is connected with a first preset level, the first reverse bias enabling end is connected with a first switch control signal, the state of the first reverse bias control signal is opposite to that of the first switch control signal, specifically, when the first switch control signal is in a high level, the first reverse bias control signal is in a low level, and when the first switch control signal is in a low level, the first reverse bias control signal is in a high level; the first reverse bias control signal is used for switching off the first reverse bias switching element when the first switching control signal turns on the first switching element, and the first switching element connects the second end of the first unidirectional conduction element with the second voltage so as to enable the first unidirectional conduction element to be in a forward conduction state; the first reverse bias control signal is further used for conducting the first reverse bias switching element when the first switching control signal turns off the first switching element, and the first reverse bias switching element connects the second end of the first unidirectional conducting element with a first preset level.
Preferably, the voltage value of the first preset level is equal to the second voltage; specifically, the source electrode of the third NMOS tube is connected with the drain electrode of the second NMOS tube.
In other embodiments, the voltage value of the first preset level is smaller than the second voltage.
In an exemplary scheme, the first switching element is a second NMOS transistor, the drain electrode of the second NMOS transistor is used as the second end of the first switching element to be connected with the second end of the first unidirectional conducting element, the source electrode of the second NMOS transistor is used as the second end of the first switching element to be connected with the second end of the first unidirectional conducting element, and the gate electrode of the second NMOS transistor is used as the enabling end of the first switching element to be connected with the first switching control signal; the second NMOS tube is turned on or off under the control of the first switch control signal.
In an exemplary scheme, the first unidirectional conducting element is a fourth NMOS transistor; the first reverse bias switching element is a third NMOS tube; the source electrode of the fourth NMOS tube is connected with the source electrode of the second NMOS tube and the drain electrode of the third NMOS tube, the drain electrode of the fourth NMOS tube is connected with the first voltage, and the grid electrode of the fourth NMOS tube is connected with the enabling end of the first switching element; when the first switching element is conducted under the enabling of the first switching control signal, the fourth NMOS tube is conducted under the enabling of the first switching control signal, the third NMOS tube is disconnected under the control of the first reverse bias control signal, the source electrode of the fourth NMOS tube is connected with the second voltage through the first switching element, and the fourth NMOS tube is in a forward conducting state; when the first switching element is disconnected under the control of a first switching control signal, the third NMOS tube is conducted under the enabling of the first reverse bias control signal, the source electrode of the fourth NMOS tube is connected with a first preset level through the third NMOS tube, and the fourth NMOS tube is in a reverse bias state.
Further, when the first switch control signal enables the second NMOS transistor to be turned on, the first switch control signal is at a high level higher than the second voltage, and when the first switch control signal turns the second NMOS transistor off, the first switch control signal is at a low level lower than or equal to the second voltage.
In another exemplary aspect, the first unidirectional conducting element is a fourth diode; the first reverse bias switching element is a third NMOS tube; the anode of the fourth diode is connected with the source electrode of the second NMOS tube and the drain electrode of the third NMOS tube, and the cathode of the fourth diode is connected with the first voltage; when the first switching element is turned on under the enabling of the first switching control signal, the third NMOS tube is turned off under the control of the first reverse bias control signal, the cathode of the fourth diode is connected with the second voltage through the second NMOS tube, and the fourth diode is in a forward conduction state; when the first switching element is disconnected under the control of a first switching control signal, the third NMOS tube is conducted under the enabling of the first reverse bias control signal, the cathode of the fourth diode is connected with a first preset level through the third NMOS tube, and the fourth NMOS tube is in a reverse bias state.
Further, when the first switching control signal enables the first switching element to be turned on, the first switching control signal is at a high level higher than the second voltage, and when the first switching control signal turns the first switching element off, the first switching control signal becomes at a low level lower than or equal to the second voltage.
In some exemplary aspects, the switching circuit further includes a first inverter having an input connected to the enable terminal of the first switching element and an output connected to the first reverse bias enable terminal of the first reverse bias switching element such that the first reverse bias switching element is in an opposite state to the first switching element.
Of course, in other embodiments, the input terminal of the first inverter may be connected to the first reverse bias enable terminal of the first reverse bias switching element, and the output terminal of the first inverter may be connected to the enable terminal of the first switching element, where the state of the first reverse bias switching element and the state of the first switching element may be opposite.
When the first switching element is disconnected, the switching circuit provided by the alternative scheme uses the first unidirectional conducting element to be in a reverse bias state, so that current is forbidden to flow through the first switching element, and the isolation degree of the switching circuit is improved.
When the second switching element, the second unidirectional conducting element and the second reverse bias switching element in the present embodiment are applied to the cathode address selecting switching circuit, the second address selecting switching element, the cathode unidirectional single-pass element and the cathode reverse bias switching element in the first embodiment are respectively corresponding.
When the first switching element, the first unidirectional conducting element and the first reverse bias switching element in the embodiment are applied to the anode addressing switching circuit, the cathode addressing switching element, the cathode unidirectional single-way element and the cathode reverse bias switching element in the second embodiment are respectively corresponding.
Accordingly, in other embodiments, the first switching element may also be a second PMOS transistor, and the case that the first switching element is the second PMOS transistor may be obtained by the same method as that of the anode addressing switching element in the third embodiment.
In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Similarly, it should be appreciated that in the above description of exemplary embodiments of the invention, various features of the embodiments of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. However, the disclosed method should not be construed as reflecting the intention that: i.e., the claimed invention requires more features than are expressly recited in each claim.
Those skilled in the art will appreciate that the modules in the apparatus of the embodiments may be adaptively changed and disposed in one or more apparatuses different from the embodiments. The modules or units or components of the embodiments may be combined into one module or unit or component, and they may be divided into a plurality of sub-modules or sub-units or sub-components. Any combination of all features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or units of any method or apparatus so disclosed, may be used in combination, except insofar as at least some of such features and/or processes or units are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of the words first, second, third, etc. do not denote any order. These words may be interpreted as names. The steps in the above embodiments should not be construed as limiting the order of execution unless specifically stated.

Claims (9)

1. An addressable driver circuit for use with a laser array, comprising:
a cathode addressable drive circuit comprising a plurality of cathode addressing drive circuits; one end of each cathode address driving circuit corresponds to cathodes of a plurality of rows of lasers connected to the common cathode ends in the laser array one by one, and the other end of each cathode address driving circuit is grounded;
The cathode addressing driving circuit comprises a cathode addressing switching circuit, and the cathode addressing switching circuit comprises a cathode addressing switching element; the cathode addressing switch element comprises a first end, a second end and a cathode addressing enabling end, one of the first end and the second end of the cathode addressing switch element is grounded, the other end of the cathode addressing switch element is connected with a corresponding common cathode end, and the cathode addressing enabling end is connected with a cathode addressing signal; the cathode addressing switch element is turned on or off under the control of the cathode addressing signal; the cathode addressing switch circuit also comprises a cathode reverse bias switch element; the cathode reverse bias switching element comprises a first end, a second end and a cathode reverse bias enabling end, the first end of the cathode reverse bias switching element is connected with the second end of the cathode unidirectional conducting element, the second end of the cathode reverse bias switching element is connected with a second preset voltage, and the cathode reverse bias enabling end is connected with a reverse bias control signal; the voltage value of the second preset voltage is larger than or equal to the voltage value of the cathode ground, so that the cathode unidirectional conducting element is in a reverse bias state, and current is prevented from flowing through the cathode addressing switching element;
the cathode reverse bias control signal is used for switching off the cathode reverse bias switching element when the cathode address selection signal switches on the cathode address selection switching element, so that the second end of the cathode unidirectional switching element is grounded through the cathode address selection switch, and the cathode unidirectional switching element is in a forward conduction state;
The cathode reverse bias control signal is further used for conducting the cathode reverse bias switching element when the cathode address selection signal turns off the cathode address selection switching element, so that the second end of the cathode unidirectional conducting element is connected with the second preset voltage, and the cathode unidirectional conducting element is in a reverse bias state;
the method comprises the steps of,
an anode addressable drive circuit; the anode addressable driving circuit is applied to a laser array, one end of the anode addressable driving circuit is connected with a transmission power supply, the other end of the anode addressable driving circuit is connected with an anode of a laser connected with a common anode end in the laser array, and the anode addressable driving circuit comprises:
an anode addressing switch circuit comprising an anode addressing switch element; the anode addressing switch element comprises a first end, a second end and an anode addressing enabling end; the first end of the anode addressing switch element is connected with the transmitting power supply, the second end of the anode addressing switch element is connected with the anode energy storage circuit, and the anode addressing enabling end is connected with an anode addressing signal; the anode addressing switch element is turned on or turned off under the control of the anode addressing signal, so that the anode energy storage circuit charges energy by utilizing the current output by the transmitting power supply when the anode addressing switch element is turned on; the method comprises the steps of,
An anode energy storage circuit comprising an anode energy storage element and a current limiting element; the anode energy storage element is used for charging energy by utilizing the current output by the emission power supply when the anode addressing switch element is turned on; the current limiting element is used for limiting the current when the anode energy storage element is charged.
2. The addressable drive circuit of claim 1, wherein: the anode energy storage element comprises an energy storage capacitor; the first end of the current limiting element is connected with the second end of the anode addressing switch element, and the second end of the current limiting element is connected with the first end of the energy storage capacitor and the corresponding common anode end; the second end of the energy storage capacitor is grounded;
and/or the current limiting element comprises a current limiting resistor; the first end of the current limiting resistor is connected with the second end of the anode addressing switch element, and the second end of the current limiting resistor is connected with the first end of the anode energy storage element and the corresponding common anode end; the second end of the anode energy storage element is grounded.
3. An anode addressable driving circuit for use in a laser array comprising a plurality of addressable driving circuits according to claim 1 or 2; one end of each of the anode addressing driving circuits is connected with the emission power supply, and the other end of each of the anode addressing driving circuits is correspondingly connected with anodes of a plurality of rows of lasers connected to the common anode ends in the laser array.
4. The addressable drive circuit of claim 1, wherein the cathode addressing switch circuit further comprises a cathode unidirectional conductive element coupled between a corresponding common cathode terminal and the cathode addressing switch element, a first terminal coupled to the corresponding common cathode terminal, and a second terminal coupled to the second terminal of the cathode addressing switch;
when the cathode addressing switch element is in a conducting state, the cathode unidirectional conducting element is in a forward conducting state so as to allow current to pass through the cathode addressing switch circuit;
when the cathode addressing switch element is in an off state, the cathode unidirectional conducting element is in a reverse bias state to inhibit current from passing through the cathode addressing switch circuit.
5. The addressable drive circuit of claim 1, wherein the cathodic addressing switch circuit further comprises a cathodic inverter; the input end of the cathode inverter is connected with the cathode address selection enabling end, the output end of the cathode inverter is connected with the cathode reverse bias enabling end, or the input end of the cathode inverter is connected with the cathode reverse bias enabling end, and the output end of the cathode inverter is connected with the cathode address selection enabling end.
6. The addressable driving circuit of any of claims 4-5, wherein the cathode unidirectional conductive element comprises a seventh NMOS transistor having a source connected to the second terminal of the cathode addressing switch element, a drain connected to a corresponding common cathode terminal, and a gate connected to a cathode addressing enable terminal of the cathode addressing switch element; or, the cathode unidirectional conduction element comprises a seventh diode, the cathode of the seventh diode is connected with the second end of the cathode addressing switch element, and the anode is connected with the corresponding common cathode end.
7. An addressable driver circuit for use with a laser array, comprising:
the anode addressing driving circuit comprises an anode addressing switching circuit and an anode energy storage circuit; one end of the anode addressing switch circuit is connected with a transmitting power supply, and the other end of the anode addressing switch circuit is connected with the anode energy storage circuit and the anode of the laser connected to a common anode end; when the anode addressing switch circuit is conducted, the anode energy storage circuit charges energy by utilizing the current output by the transmitting power supply;
a cathode address driving circuit comprising a cathode address switching circuit; the cathode addressing switch circuit comprises a cathode addressing switch element and a cathode unidirectional conduction element; the cathode addressing switch element comprises a first end, a second end and a cathode addressing enabling end; the first end of the cathode addressing switch element is grounded, the second end of the cathode addressing switch element is connected with the second end of the cathode unidirectional conducting element, and the cathode addressing enabling end is connected with a cathode addressing signal; the first end of the cathode guiding conducting element is connected with the cathode of the laser connected with a common cathode end; the cathode addressing switch circuit also comprises a cathode reverse bias switch element; the cathode reverse bias switching element comprises a first end, a second end and a cathode reverse bias enabling end, the first end of the cathode reverse bias switching element is connected with the second end of the cathode unidirectional conducting element, the second end of the cathode reverse bias switching element is connected with a second preset voltage, and the cathode reverse bias enabling end is connected with a reverse bias control signal; the voltage value of the second preset voltage is larger than or equal to the voltage value of the cathode ground, so that the cathode unidirectional conducting element is in a reverse bias state, and current is prevented from flowing through the cathode addressing switching element;
The cathode reverse bias control signal is used for switching off the cathode reverse bias switching element when the cathode address selection signal switches on the cathode address selection switching element, so that the second end of the cathode unidirectional switching element is grounded through the cathode address selection switch, and the cathode unidirectional switching element is in a forward conduction state;
the cathode reverse bias control signal is further used for conducting the cathode reverse bias switching element when the cathode address selection signal turns off the cathode address selection switching element, so that the second end of the cathode unidirectional conducting element is connected with the second preset voltage, and the cathode unidirectional conducting element is in a reverse bias state;
when the cathode addressing switch element is in a conducting state, the cathode unidirectional conducting element is in a forward conducting state so as to allow current to pass through the cathode addressing switch circuit;
when the cathode addressing switch element is in an off state, the cathode unidirectional conducting element is in a reverse bias state to inhibit current from passing through the cathode addressing switch circuit.
8. A laser emitting circuit comprising an array of lasers and an addressable driver circuit according to any of claims 1-2, 4-7; the cathode addressable driving circuits are used for performing cathode address driving on a plurality of columns of lasers connected to a plurality of common cathode terminals.
9. A lidar, characterized in that: comprising the laser emitting circuit of claim 8.
CN202111643093.6A 2021-12-29 2021-12-29 Anode addressing driving circuit, addressable driving circuit and laser emitting circuit Active CN116413677B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN202111643093.6A CN116413677B (en) 2021-12-29 2021-12-29 Anode addressing driving circuit, addressable driving circuit and laser emitting circuit
EP22216883.3A EP4207950A1 (en) 2021-12-29 2022-12-28 Anode addressing drive circuit, addressable drive circuit and laser emission circuit
US18/090,414 US20230208099A1 (en) 2021-12-29 2022-12-28 Anode addressing drive circuit, addressable drive circuit, and laser emission circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111643093.6A CN116413677B (en) 2021-12-29 2021-12-29 Anode addressing driving circuit, addressable driving circuit and laser emitting circuit

Publications (2)

Publication Number Publication Date
CN116413677A CN116413677A (en) 2023-07-11
CN116413677B true CN116413677B (en) 2024-02-06

Family

ID=87058123

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111643093.6A Active CN116413677B (en) 2021-12-29 2021-12-29 Anode addressing driving circuit, addressable driving circuit and laser emitting circuit

Country Status (1)

Country Link
CN (1) CN116413677B (en)

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6522061B1 (en) * 1995-04-04 2003-02-18 Harry F. Lockwood Field emission device with microchannel gain element
CN101859980A (en) * 2009-04-13 2010-10-13 索尼公司 Laser driver
JP2016152336A (en) * 2015-02-18 2016-08-22 株式会社豊田中央研究所 Laser diode driving circuit and laser radar device
CN110676688A (en) * 2019-08-27 2020-01-10 上海禾赛光电科技有限公司 Drive circuit, laser radar system and drive method
CN111342339A (en) * 2020-03-04 2020-06-26 常州纵慧芯光半导体科技有限公司 Vertical cavity surface emitting laser and manufacturing method and application thereof
CN112544020A (en) * 2018-08-10 2021-03-23 欧姆龙株式会社 Method for manufacturing laser diode array device, laser light emitting circuit and distance measuring device
WO2021051466A1 (en) * 2019-10-17 2021-03-25 深圳市速腾聚创科技有限公司 Laser emission circuit and lidar
CN112805587A (en) * 2019-10-17 2021-05-14 深圳市速腾聚创科技有限公司 Laser emission circuit and laser radar
CN113287237A (en) * 2019-12-20 2021-08-20 深圳市速腾聚创科技有限公司 Laser emission circuit and laser radar
CN113454421A (en) * 2018-12-26 2021-09-28 奥斯特公司 Solid state electronically scanned laser array with high and low side switches for increased channel
CN113692540A (en) * 2019-04-09 2021-11-23 欧普赛斯技术有限公司 Solid-state LIDAR transmitter with laser control

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008062544B4 (en) * 2007-12-20 2017-11-09 Denso Corporation Laser array circuit

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6522061B1 (en) * 1995-04-04 2003-02-18 Harry F. Lockwood Field emission device with microchannel gain element
CN101859980A (en) * 2009-04-13 2010-10-13 索尼公司 Laser driver
JP2016152336A (en) * 2015-02-18 2016-08-22 株式会社豊田中央研究所 Laser diode driving circuit and laser radar device
CN112544020A (en) * 2018-08-10 2021-03-23 欧姆龙株式会社 Method for manufacturing laser diode array device, laser light emitting circuit and distance measuring device
CN113454421A (en) * 2018-12-26 2021-09-28 奥斯特公司 Solid state electronically scanned laser array with high and low side switches for increased channel
CN113692540A (en) * 2019-04-09 2021-11-23 欧普赛斯技术有限公司 Solid-state LIDAR transmitter with laser control
CN110676688A (en) * 2019-08-27 2020-01-10 上海禾赛光电科技有限公司 Drive circuit, laser radar system and drive method
WO2021051466A1 (en) * 2019-10-17 2021-03-25 深圳市速腾聚创科技有限公司 Laser emission circuit and lidar
CN112805587A (en) * 2019-10-17 2021-05-14 深圳市速腾聚创科技有限公司 Laser emission circuit and laser radar
CN112805586A (en) * 2019-10-17 2021-05-14 深圳市速腾聚创科技有限公司 Laser emission circuit and laser radar
CN113287237A (en) * 2019-12-20 2021-08-20 深圳市速腾聚创科技有限公司 Laser emission circuit and laser radar
CN111342339A (en) * 2020-03-04 2020-06-26 常州纵慧芯光半导体科技有限公司 Vertical cavity surface emitting laser and manufacturing method and application thereof

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Power Efficient Current Driver Based on Negative Boosting for High-Speed Lasers;arslan et al.;electronics;第8卷(第11期);全文 *
一种新型二维X射线探测器;侯瑶;光子学报(09);全文 *

Also Published As

Publication number Publication date
CN116413677A (en) 2023-07-11

Similar Documents

Publication Publication Date Title
US20230358887A1 (en) Solid-State LIDAR Transmitter with Laser Control
US9633625B2 (en) Pixel circuit and method for driving the same
US10321533B2 (en) Driving several light sources
CN108877611B (en) Pixel driving circuit sensing method and pixel driving circuit
US9824630B2 (en) Pixel unit structure having a reset circuit and driving mechanism of organic light emitting diode display panel
US20170132975A1 (en) Organic light emitting display device and driving method thereof
US20150170562A1 (en) Organic light-emitting display apparatus and pixel
EP1580720A2 (en) Self light emitting display module, electronic equipment into which the same module is loaded, and inspection method of defect state in the same module
KR101987434B1 (en) Organic light emitting diode display device and test method thereof
US9391125B2 (en) Organic light emitting diode display including dummy circuit portions
US10490131B2 (en) Driving control circuit for driving pixel driving circuit and display apparatus thereof
US9018947B2 (en) Pixel and array test method for the same
CN115004053A (en) Matrix-addressable VCSEL for solid state LiDAR
US9548019B2 (en) Organic light emitting display device
CN116413677B (en) Anode addressing driving circuit, addressable driving circuit and laser emitting circuit
CN110570809B (en) Display panel and test method thereof
CN116413678A (en) Cathode addressing driving circuit, addressable driving circuit and laser emitting circuit
CN116418057B (en) Anode addressable driving circuit, addressable driving circuit and laser emitting circuit
US8547301B2 (en) Light emitting display apparatus and driving method thereof
EP4207950A1 (en) Anode addressing drive circuit, addressable drive circuit and laser emission circuit
CN113808536A (en) Display panel and display terminal
US20190057656A1 (en) Driving circuit and display device
CN215575642U (en) Laser emission circuit and laser radar
CN114446242B (en) Pixel circuit, driving method thereof and display panel
US10395592B2 (en) Pixel unit structure of organic light emitting diode display panel and driving mechanism thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant