CN116405996A - Optimization method and device of clock synchronization network, electronic equipment and storage medium - Google Patents
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Abstract
The disclosure provides a method, a device, an electronic device and a storage medium for optimizing a clock synchronization network, comprising the following steps: acquiring clock synchronization information between a target node and a time service terminal; calculating an error value of the clock synchronization information, and carrying out complement processing on the clock synchronization information according to the error value to obtain the clock synchronization information after the complement processing; generating a resource allocation countermeasure based on the clock synchronization information after the completion processing, and optimizing the clock synchronization process of the clock synchronization network through the resource allocation countermeasure. In the method, firstly, clock synchronization information in a clock synchronization process is acquired, then an error value of the acquired clock synchronization information is calculated, further the clock synchronization information is complemented by using the calculated error value, then a resource allocation countermeasure is generated through the complemented clock synchronization information, and finally, the synchronization process which is a clock synchronization network is optimized through the resource allocation countermeasure.
Description
Technical Field
The present invention relates to the field of wireless communications technologies, and in particular, to a method and apparatus for optimizing a clock synchronization network, an electronic device, and a storage medium.
Background
Fifth generation mobile communication network (5th generation mobile network,5G) technology can provide low latency and ultra-reliable deterministic functions for grid control systems and data traffic, and wireless technology can provide flexibility for system connections throughout power manufacturing facilities and substations. With the development of smart grids, a wireless communication technology is increasingly required for information interconnection by mass sensors and intelligent power terminal (IED) devices, so that 5G technology is considered as an important connection means for meeting the requirement. Some core production control services of the smart grid, such as transformers, data collectors, etc., not only require the 5G network to provide ultra-reliable low-latency communication (ultra reliable low latency communications, URLLC) capability, but also require the timing to be completed by a synchronous clock provided by a 5G air interface, which puts high demands on the deterministic communication capability of the wireless network.
In the prior art, problems generated in the synchronous clock timing process provided by a 5G air interface in the past are mostly solved based on the optimization theory of a Lyapunov equation (Lyapunov). In general, lyapunov converts a problem and then decomposes the problem into a plurality of sub-problems, and then solves the problem by using an optimization algorithm or a heuristic algorithm. However, for multi-user clock synchronization networks, the problems caused by the multi-user clock synchronization networks are too complex to solve by using the optimization algorithm. At the same time, the deep reinforcement learning algorithm consumes a great deal of resources and time cost, which is unacceptable for the wireless network to ensure high-precision time service.
Disclosure of Invention
In view of the foregoing, an object of the present disclosure is to provide a method, an apparatus, an electronic device, and a storage medium for optimizing a clock synchronization network.
As one aspect of the present disclosure, there is provided a method for optimizing a clock synchronization network, including:
acquiring clock synchronization information between a target node and a time service terminal;
calculating an error value of the clock synchronization information, and carrying out complement processing on the clock synchronization information according to the error value to obtain the clock synchronization information after the complement processing;
generating a resource allocation countermeasure based on the clock synchronization information after the completion processing, and optimizing the clock synchronization process of the clock synchronization network through the resource allocation countermeasure.
Optionally, the calculating the error value of the clock synchronization information includes:
determining first time information of the clock synchronization information sent by the time service terminal to the target node, and determining fixed time delay and random time delay in the current clock synchronization process based on the first time information;
determining second time information of the clock synchronization information fed back by the target node to the time service terminal based on the fixed time delay and the random time delay;
An error value of the clock synchronization information is determined based on the first time information and the second time information.
Optionally, the determining the error value of the clock synchronization information based on the first time information and the second time information includes:
generating a clock information observation model based on the first time information and the second time information;
determining an error value of the clock synchronization information based on the clock information observation model;
wherein the first time information is expressed as:
T 1 i,j ＝t+t i (k)
wherein T is 1 i,j Represents first time information, t represents ideal reference time, θ i (k) Phase offset denoted as clock synchronization information;
the second time information is expressed as:
wherein T is 2 i,j Expressed as second time information, t represents ideal reference time, θ i (k) Phase shift, d, representing clock synchronization information i,j Indicating a fixed time delay, the time delay is,
representing random time delay;
the clock information observation model is expressed as:
y i,k ＝Cx i (k)+v i (k)
wherein y is i,k Represents clock information observation model Cx i (k) Representing the observation matrix of the clock information,
representing gaussian random variables that obey the N (0, r) distribution.
Optionally, the determining the error value of the clock synchronization information based on the clock information observation model includes:
Correcting the clock information observation model based on the Bernoulli equation to obtain a corrected clock information observation model;
determining an error covariance of the clock synchronization process based on the corrected clock information observation model;
updating the error covariance based on a Kalman filtering algorithm, and calculating the updated error covariance to obtain an error value of the clock synchronization information;
wherein the corrected clock information observation model is expressed as:
z i,k ＝γ k [Cx i (k)+v i (k)]
wherein z is i,k Represents the corrected clock information observation model, gamma k The representation being a binary Bernoulli random variable, cx i (k) Representing the observation matrix of the clock information,
representing a gaussian random variable subject to an N (0, r) distribution;
the error covariance is expressed as:
P k ＝E[e k e k T ]
wherein P is k Representing error covariance e k Representing the estimation error of the clock synchronization process, E represents the channel matrix.
Optionally, the generating a resource allocation countermeasure based on the clock synchronization information after the completion processing includes:
determining the length of a time keeping band of the clock synchronization information after the completion processing;
determining a total throughput in the clock synchronization process based on the guard band length;
determining users participating in the clock synchronization process, and grouping the users based on a clustering algorithm to obtain a plurality of user groups;
Determining a group throughput allocated to each of the plurality of user groups based on the total throughput and the number of the plurality of user groups;
the resource allocation countermeasure includes a group throughput allocated to each user group.
Optionally, the method is characterized by comprising the following steps:
determining a total throughput in the clock synchronization process based on the following formula;
wherein U (B) k ,p k ) Representing the total throughput of transmitted data during clock synchronization, W B (B k ) Representing equivalent bandwidth considering guard band length, V k Representing the dispersion of the channel,
is an inverse function of Q (x), 1-lambda k Representing the probability of packet loss, i.e. transmission error rate, snr k (p k ) Representing the signal-to-noise ratio at the time of transmitting the data, L represents the length of the transmitted data packet.
Optionally, the determining, based on the total throughput and the number of the plurality of user groups, a group throughput allocated to each of the plurality of user groups is expressed as:
wherein U (B) k ,p k ) Representing the total throughput of transmitted data during clock synchronization, R total Group throughput is expressed, M denotes the number of user groups, u denotes the number of users in each user group, and k denotes the total number of users.
Optionally, the optimizing the clock synchronization process of the clock synchronization network through the resource allocation countermeasure includes:
Generating precision error covariances of the plurality of user groups during the clock synchronization based on the group throughput;
optimizing the clock synchronization process based on the precision error covariance;
wherein the precision error covariance is expressed as:
wherein P is avg Precision error covariance, M denotes the number of user groups, u denotes the number of users in each user group, k denotes the total number of users, tr (E [ P ] k,t (p m )]) Representing E [ P ] k,t (p m )]E [ P ] k,t (p m )]Representing a fixed error in the clock synchronization process, P k,t Is the synchronization error covariance matrix of the kth terminal at the time t.
As a second aspect of the present disclosure, the present disclosure also provides an optimizing apparatus of a clock synchronization network, including:
a clock information acquisition module configured to: acquiring clock synchronization information between a target node and a time service terminal;
an error value calculation module configured to: calculating an error value of the clock synchronization information, and carrying out complement processing on the clock synchronization information according to the error value to obtain the clock synchronization information after the complement processing;
an optimization processing module configured to: generating a resource allocation countermeasure based on the clock synchronization information after the completion processing, and optimizing the clock synchronization process of the clock synchronization network through the resource allocation countermeasure.
As a third aspect of the present disclosure, the present disclosure further provides an electronic device, including a memory, a processor, and a computer program stored on the memory and capable of running on the processor, where the processor executes the program to implement the method for optimizing the clock synchronization network provided by the present disclosure.
As a fourth aspect of the disclosure, the disclosure also provides a non-transitory computer-readable storage medium storing computer instructions for causing a computer to perform the method of any one of the above.
As described above, the present disclosure provides a method, an apparatus, an electronic device, and a storage medium for optimizing a clock synchronization network. In the method, firstly, clock synchronization information transmitted between a target node and a time service terminal is acquired in a clock synchronization process, and then an error value between the acquired clock information of the target node and the clock information of the time service terminal is calculated. And then the clock synchronization information is complemented by using the error value obtained by the calculation, so that the clock information of the target node and the clock information of the time service terminal are synchronized, then a resource allocation countermeasure is generated by the complemented clock synchronization information, and finally the clock synchronization process of the clock synchronization network is optimized by the resource allocation countermeasure, thereby realizing high-precision time service (synchronization of the clock information) in a low-delay communication environment, and simultaneously greatly reducing the waste of resources and time cost.
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In order to more clearly illustrate the technical solutions of the present disclosure or related art, the drawings required for the embodiments or related art description will be briefly described below, and it is apparent that the drawings in the following description are only embodiments of the present disclosure, and other drawings may be obtained according to these drawings without inventive effort to those of ordinary skill in the art.
Fig. 1A is a schematic diagram of an optimization method of a clock synchronization network according to an embodiment of the disclosure.
Fig. 1B is a schematic diagram of a method for calculating an error value according to an embodiment of the disclosure.
Fig. 1C is a schematic diagram of a method for generating a resource allocation countermeasure according to an embodiment of the disclosure.
Fig. 2 is a schematic structural diagram of an optimizing apparatus of a clock synchronization network according to an embodiment of the present disclosure.
Fig. 3 is a schematic structural diagram of an electronic device according to an optimization method of a clock synchronization network according to an embodiment of the present disclosure.
Detailed Description
For the purposes of promoting an understanding of the principles and advantages of the disclosure, reference will now be made to the embodiments illustrated in the drawings and specific language will be used to describe the same.
It should be noted that unless otherwise defined, technical or scientific terms used in the embodiments of the present disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which the present disclosure pertains. The terms "first," "second," and the like, as used in embodiments of the present disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.
The time sensitive network (Time Sensitive Network, TSN) is a series of IEEE 802 ethernet standards set by the IEEE 802.1TSN task group, which can provide the network with the ability to have low latency, low jitter, and extremely low data loss rate, making the ethernet suitable for time sensitive applications where reliability and latency requirements are stringent. As a wireless communication means, the 5G connects power equipment such as a sensor and an actuator to the TSN network in a wireless manner, so that flexibility of the 5G and extremely low delay of the TSN can be fully exerted, and functions of effectively reducing cable laying, wide application of mobile equipment and the like are achieved.
With the development of smart grids, a wireless communication technology is increasingly required for a mass sensor and an intelligent power terminal (IED) device to implement information interconnection, and a fifth generation mobile communication network (5th generation mobile network,5G) technology is considered as an important connection means for meeting the requirement. Some core production control services of the smart grid, such as transformers, data collectors, etc., not only require the 5G network to provide ultra-reliable low-latency communication (ultra reliable low latency communications, URLLC) capability, but also require the timing to be completed by a synchronous clock provided by a 5G air interface, which puts high demands on the deterministic communication capability of the wireless network.
In the prior art, problems generated in the synchronous clock timing process provided by a 5G air interface in the past are mostly solved based on the optimization theory of a Lyapunov equation (Lyapunov). In general, lyapunov converts a problem and then decomposes the problem into a plurality of sub-problems, and then solves the problem by using an optimization algorithm or a heuristic algorithm. However, for multi-user clock synchronization networks, the problems caused by the multi-user clock synchronization networks are too complex to solve by using the optimization algorithm. At the same time, the deep reinforcement learning algorithm consumes a great deal of resources and time cost, which is unacceptable for the wireless network to ensure high-precision time service.
In order to solve the above problems, the present disclosure provides a method, an apparatus, an electronic device, and a storage medium for optimizing a clock synchronization network. According to the method, in the clock synchronization process, clock synchronization information transmitted between a target node and a time service terminal is firstly acquired, then an error value of the acquired clock synchronization information is calculated, the clock synchronization information is complemented by the calculated error value, then a resource allocation countermeasure is generated through the complemented clock synchronization information, and finally the synchronization process of the clock synchronization network is optimized through the resource allocation countermeasure.
Having described the basic principles of the present disclosure, various non-limiting embodiments of the present disclosure are specifically described below.
In some optional embodiments, when the clock synchronization network time service is performed through the foregoing 5G network, there may be multiple situations such as network line complexity, transmission data collision, transmission data packet loss (loss), etc. in the actual time service process, so that the transmitted clock synchronization information may have inaccurate situations between the target node and the time service terminal. Therefore, in the present embodiment, an optimization method of a clock synchronization network is proposed, by which such inaccurate timing can be corrected, and the entire timing process (clock synchronization process) can be optimized to prevent the above-described situation from occurring again.
Fig. 1A is a schematic diagram of an optimization method of a clock synchronization network according to an embodiment of the disclosure.
The optimization method of the clock synchronization network shown in fig. 1A further includes the following steps:
step S10: and acquiring clock synchronization information between the target node and the time service terminal.
In some alternative embodiments, when the above inaccurate time service condition needs to be corrected and before the whole time service process (clock synchronization process) is optimized, clock synchronization information transferred between the target node (i.e. any user that needs to receive the network time service) and the time service terminal in the network time service process may be acquired first.
Step S20: and calculating an error value of the clock synchronization information, and carrying out complement processing on the clock synchronization information according to the error value to obtain the clock synchronization information after the complement processing.
Fig. 1B is a schematic diagram of a method for calculating an error value according to an embodiment of the disclosure.
In some alternative embodiments, step S20 shown in fig. 1B specifically includes:
s201: and determining first time information of the clock synchronization information sent by the time service terminal to the target node, and determining fixed time delay and random time delay in the current clock synchronization process based on the first time information.
S202: and determining second time information of the clock synchronization information fed back by the target node to the time service terminal based on the fixed time delay and the random time delay.
S203: an error value of the clock synchronization information is determined based on the first time information and the second time information.
In some optional embodiments, step S203 further specifically includes:
s2031: and generating a clock information observation model based on the first time information and the second time information.
S2032: and determining an error value of the clock synchronization information based on the clock information observation model.
In some optional embodiments, step S2032 further specifically includes:
s20321: and correcting the clock information observation model based on the Bernoulli equation to obtain a corrected clock information observation model.
S20322: and determining the error covariance of the clock synchronization process based on the corrected clock information observation model.
S20323: and updating the error covariance based on a Kalman filtering algorithm, and calculating the updated error covariance to obtain an error value of the clock synchronization information.
In some alternative embodiments, the error value generated in the clock synchronization process may be calculated first, and the obtained clock synchronization information may be complemented by using the calculated error value, so that the complemented clock synchronization information may be obtained finally. It will be appreciated that the complemented processed clock synchronization information is error free compared to the originally obtained clock synchronization information. Therefore, it can be more regarded as accurate clock information to be transferred between the target node and the time service terminal.
In some alternative embodiments, the target node gNB may pre-generate a clock synchronization system for each individual link in the clock synchronization network prior to calculating the error value i Time service terminal node UE i The recurrence equation of the clock state variable can be expressed as:
x i (k)＝ax i (k-1)+w i (k)+b
where k represents the kth period of the clock synchronization process; x is x i (k)＝[β i (k) θ i (k)] T Wherein beta is i (k) And theta i (k) Respectively target node gNB i Is a matrix of offset coefficients for instantaneous clock offset and accumulated clock offset, i.e., frequency offset and phase offset of an instantaneous clock synchronization signal
τ 0 Representing a sampling period; w (w) i (k) Represents gaussian process noise, and w i (k) Satisfies a mean value of 0, covariance matrix E [ w ] i (k)w i T (k)]＝Q；ax i Represents the bus function, b represents the constant matrix b= [ 0- τ ] 0 ] T 。
In some alternative embodiments, based on the above definition of the clock synchronization state variables, a timestamp observation model based on a two-way information exchange mechanism may be built and the first time information (T 1 i，j ) And second time information (T 2 i ，j )。
In some alternative embodiments, first time information (T 1 i，j ) And second time information (T 2 i，j ) The procedure of (1) may be embodied by first assuming the target node gNB i And time service terminal node UE j The time stamp set in one bidirectional clock synchronization process is { T } 1 i，j ，T 2 i，j }, T therein 1 i，j And T 2 i，j Respectively represent target nodes gNB i Time service terminal node (UE) to Time Sensitive Network (TSN) j Time of transmitting time synchronization variable and target node gNB i Receiving time service terminal node UE j The time of day of the clock variable is recovered. Therefore, the aforementioned first time information and second time information may be specifically expressed as:
T 1 i，j ＝t+θ i (k) And (b)
Wherein T is 1 i，j Representing the first time information, T 2 i，j Expressed as second time information, t=kτ 0 Representing an ideal reference time, the reference time t can be considered to be in one round of bidirectional information exchange since the time taken for bidirectional information exchange is relatively short compared to the time required for the whole clock synchronization algorithmRemain unchanged, d i，j Representing the fixed time delay created during the synchronization process,
due to random time delay generated by randomness of wireless channels, researches show that the time delay can be modeled as a Gaussian random process with independent same distribution, and theta i (k) Representing the phase offset of the clock synchronization information.
In some alternative embodiments, after obtaining the above two first time information and second time information, the two time information may be added and formulated (reduced) to obtain the base station node gNB i Is provided. Finally, the formula x is as follows i (k)＝[β i (k) θ i (k)] T Substituting base station node gNB i The clock information observation model is subjected to simplification calculation, and the clock information observation model after final deformation can be obtained, which can be specifically expressed as:
y i，k ＝Cx i (k)+v i (k)
Wherein y is i，k Represents clock information observation model Cx i (k) Representing the observation matrix of the clock information,
representing gaussian random variables that obey the N (0, r) distribution.
In some alternative embodiments, after the clock information observation model is obtained, the link transmission is no longer reliable due to the influence of the wireless channel fading random variable in the power wireless 5G network (i.e. during the bidirectional information exchange process of clock synchronization, the gNB is used for transmitting the clock information i Transmitting to UE j Clock information of (d) and UE j Replying to gNB i Cannot guarantee a certain arrival). Therefore, the clock information observation model can be corrected through the Bernoulli equation, and the corrected clock information observation model is obtained, therebyAnd the method can be more suitable for modeling a clock synchronization mechanism in a 5G-TSN wireless network scene. The foregoing modified clock observation model may be specifically expressed as:
z i，k ＝γ k [Cx i (k)+v i (k)]
wherein z is i，k Represents the corrected clock information observation model, gamma k The representation being a binary Bernoulli random variable, cx i (k) Representing the observation matrix of the clock information,
representing gaussian random variables that obey the N (0, r) distribution.
In some alternative embodiments, the Bernoulli random variable γ k Is a probability distribution reflecting the value of the time delay in a specified interval based on the probability of the time delay falling in the wireless network, namely gamma k -b (1, λ), wherein λ is defined as follows:
λ′＝p{t l ＜x+w＜t u }，t l ＜t u
wherein x represents a random variable of transmission delay, and randomness of the random variable is mainly caused by fading variable of a wireless channel; w is a queuing delay random variable of a node in the network, and is a joint random variable which is determined by the arrival process of a data packet and the random process of channel fading together; t is t l And t u Representing the lower and upper bounds of the delay, respectively. I.e., lambda' indicates that the value of x+w falls within the interval (t l ，t u ) Probability values between.
In general, the transmission delay and queuing delay of a data packet are main components of the delay of a node of a communication system, so that the value of lambda can more accurately describe the confidence of delay certainty estimation in a wireless deterministic network. Since w is a joint random process, it is difficult to directly solve the above formula about λ, so the formula of λ can be updated as follows:
λ＝p{t l ＜x＜αt u }p{0＜w＜(1-α)t u }
wherein alpha (0 < alpha < t) l /t u ) Is a random variable of which the time delay scale factor x represents the transmission time delay, and the randomness is mainly caused by fading variables of a wireless channel; w is a queuing delay random variable of a node in the network, and is a joint random variable which is determined by the arrival process of a data packet and the random process of channel fading together; t is t l And t u Representing the lower and upper bounds of the delay, respectively. I.e. lambda indicates that the value of x+w falls within the interval (t l ，t u ) Probability values between.
The above process shows that the updated time delay boundary condition of λ is a sufficiently unnecessary condition of λ ', that is, when the time delay random variable satisfies the probability condition of λ, the time delay boundary of λ ' is necessarily satisfied, otherwise, the time delay boundary condition of λ ' cannot be satisfied. The degree of certainty of the delay estimate is thus reflected in the following calculation using λ as λ', and γ is determined k Is a distributed feature of (a).
In some alternative embodiments, the solution of λ may be divided into x and w, and since x is a function of the channel fading random variable, for a rayleigh random channel with parameter σ, the interval probability of x in λ formula may be obtained from shannon channel capacity formula and the cumulative distribution function of the channel random variable as follows:
wherein z (t) = (2) L/(Wt )-1)/snr k L is the length of the transmitted data packet; w is the channel bandwidth; snr k ＝p k G/(WN 0 ) Is the received signal-to-noise ratio, p, of the kth terminal k Is the transmit power allocated by the base station to the kth terminal,
is a distance dis k And a path loss index of d, N 0 Is the power spectral density of gaussian white noise.
In some alternative embodiments, the interval probability for w in the λ formula may be solved using a random network algorithm based on a moment generating function (moment generating function, MGF), the upper boundary of w satisfying the following formula for arrival and service processes that are independent of each other and all have independent co-distributed increments and finite MGFs:
Wherein the constraint condition θ satisfies the following, E [ E ] θA(t) ]E[e -θs(t) ]And less than or equal to 1, wherein A (t) and s (t) respectively represent an arrival process and a service process in the (0, t) period.
In some alternative embodiments E [ E ] is the sum of the Poisson arrival procedure and the service procedure under the Rayleigh channel θA(t) ]And E [ E ] -θs(t) ]The calculation formula of (2) is as follows:
in some alternative embodiments, when the constraint θ is valued such that equation E [ E ] θA(t) ]E[e -θS(t) ]When 1 is less than or equal to 1, then the formula
The equal sign of (c) is approximately true. From this, the interval probability of w in the lambda equation can be found, and the value of lambda can be found, thereby completing the gamma-correction k And (5) determining distribution.
In some alternative embodiments, the expression for the derivable λ is derived from the above analysis as follows:
in some alternative embodiments, the method is based on the definition of the time information observation model and the time information of lambda and lambda (p k ) The error covariance (i.e., the overall error between the two first time information and the second time information) in the clock synchronization process can be defined as follows:
P k ＝E[e k e k T ]
wherein P is k Representing error covariance e k Representing the estimation error of the clock synchronization process, E represents the channel matrix.
In some of the alternative embodiments of the present invention,
wherein->
Is to x under the condition that the observed value is known k Estimate of->
In some alternative embodiments, after obtaining the above-mentioned error covariance formula, the error covariance P of the clock synchronization accuracy in each period of clock synchronization can also be obtained based on a kalman filtering algorithm in the case that there is a loss of the time observation variable value k And updating, and calculating an error value through the updated error covariance consensus. Wherein, the recurrence of updating the error covariance formula can be expressed as:
P k+1 ＝AP k A T +Q-γ k AP k C T (CP k C T +R) -1 CP k A T
wherein P is k Is the error covariance before update (also understood to be subject to gamma k Random variables of influence), thus for P k Analysis in a statistical sense is necessary. Meanwhile, E [ P ] can be obtained on the premise that the Kalman filtering algorithm is operated for a limited number of times k ]Recurrence at steady state:
E[P k ]＝AXA T +Q-λAXC T (CXC T +R) -1 CXA T
wherein x=e [ P ] k-1 ]，λ＝E[γ k ]。
In some alternative embodiments, after obtaining the updated error covariance formula, the error value in the clock synchronization process may be calculated according to the formula, and then the clock synchronization information may be complemented by the error value obtained by calculation, so as to finally obtain the clock synchronization information after the complemented process. Then, a resource allocation policy can be generated by supplementing the processed clock synchronization information, and the clock synchronization process is optimized by the resource allocation policy.
Step S30: generating a resource allocation countermeasure based on the clock synchronization information after the completion processing, and optimizing the clock synchronization process of the clock synchronization network through the resource allocation countermeasure.
Fig. 1C is a schematic diagram of a method for generating a resource allocation countermeasure according to an embodiment of the disclosure.
In some alternative embodiments, step S30 shown in fig. 1C specifically includes:
s301: and determining the length of the guard time band of the clock synchronization information after the completion processing.
S302: and determining the total throughput in the clock synchronization process based on the guard band length.
S303: and determining a plurality of users participating in the clock synchronization process, and grouping the plurality of users based on a clustering algorithm to obtain a plurality of user groups.
S304: based on the total throughput and the number of the plurality of user groups, a group throughput assigned to each of the plurality of user groups is determined.
S305: and generating precision error covariance of the plurality of user groups in the clock synchronization process based on the group throughput.
S306: and optimizing the clock synchronization process based on the precision error covariance.
In some alternative embodiments, since the 5G-TSN high precision time service has sensitivity to the time delay of wireless communication, in order to prevent the collision of the data packet in the data transmission process caused by the clock synchronization error, a guard time band may be added to the clock synchronization information after the completion processing in the 5G OFDMA time domain, so as to protect each clock information transmission time slot, that is, a part of the gap between every two adjacent time slots is set as a guard interval.
It will be appreciated that the longer the guard band length, the less data can be transmitted per slot. On the other hand, the probability of collision of data can be increased by the excessively small time keeping band, so that the length of the time keeping band needs to be reasonably set, and meanwhile, the communication efficiency is also considered, and meanwhile, the high reliability of the clock synchronization precision is ensured.
In some alternative embodiments, the system guard band length B k The following constraints are satisfied for the setting of (a):
B k ≥ΔE k +Tr(E[P k ])
wherein ΔE is k Represents a fixed error in the synchronization process, tr (E [ P ] k ]) Is E [ P ] k ]Is a trace of (1).
In some alternative embodiments, after determining the guard band length range of the clock synchronization information after the completion of the processing, the total throughput generated during the transmission of the data (when the data packet is transmitted) in this clock synchronization process can be determined accordingly.
In some alternative embodiments, in a 5G-TSN deterministic communication scenario, reliability has a greater impact on network performance than in a general scenario, reflecting the impact on overall throughput that is primarily manifested in the packet transmission error rate. Therefore, the adoption of a transmission rate calculation method taking into account the transmission error rate to obtain a high reliability total throughput can be expressed as:
Wherein U (B) k ，p k ) Representing the total throughput of transmitted data during clock synchronization, W B (B k ) Representing equivalent bandwidth considering guard band length, V k Representing the dispersion of the channel,
is an inverse function of Q (x), 1-lambda k Representing the probability of packet loss, i.e., the transmission error rate, snrk (pk) represents the signal-to-noise ratio when transmitting data, and L represents the length of the transmitted packet.
In some optional embodiments, for the multi-user terminal time service in the 5G power cellular network scenario, because the time service information transmitted from the base station to each terminal is the same, a grouping mechanism of a multicast user can be considered to be introduced into the network, so as to reduce the overhead of communication resources in the network, and further improve the utilization rate of the network resources. Meanwhile, the time delay certainty of each user is also considered, so that the clock synchronization precision of each user in the packet is ensured. Based on this, the disclosure proposes grouping a plurality of users in a clock synchronization process by a clustering algorithm based on two indexes of an arrival rate of a user data packet and a wireless channel environment as dimensions for dividing a multicast subgroup.
In some alternative embodiments, K users may participate in the clock synchronization process, and thus a cellular network of multi-user high-precision clock timing service may be formed by K users. Multicast mechanism based on 5G network transmits time service, K users are divided into M multicast subgroups, and each group of users u= { u 1 ，u 2 ，...u m ...u M Transmission power p= { p for each group allocation 1 ，p 2 ，...p m ...p M }. The guard band length of each user in the clock synchronization process can be expressed as b= { B 1 ，B 2 ，..B m ..B M Rate R of the kth user in the mth subgroup thus during clock synchronization m，k Then it can be calculated from the above-mentioned total throughput formula, and the group throughput R of the mth subgroup where the user is located total (i.e., a plurality of user groups) can then be expressed as:
wherein U (B) k ，p k ) Representing the total throughput of transmitted data during clock synchronization, R total The group throughput is expressed, M represents the number of a plurality of user groups, u represents the number of users in each user group, and k represents the total number of users.
In some alternative embodiments, after obtaining the group throughput of the plurality of user groups, the precision error covariance of the plurality of user groups in the clock synchronization process may be generated through a formula of the group throughput. And then the clock synchronization process is optimized according to the result of the precision error covariance, so that the clock synchronization information synchronized in the clock synchronization process can be more accurate, and the phenomena of data loss, data collision and the like are not easy to occur in the clock synchronization process.
In some alternative embodiments, the precision error covariance P during clock synchronization avg (mean error covariance of the clock synchronization system) can be expressed as:
wherein P is avg Precision error covariance, M denotes the number of user groups, u denotes the number of users in each user group, k denotes the total number of users, tr (E [ P ] k，t (p m )]) Representing E [ P ] k，t (p m )]E [ P ] k，t (p m )]Representing a fixed error in the clock synchronization process, P k，t Is the synchronization error covariance matrix of the kth terminal at the time t.
In some alternative embodiments, after the precision error covariance is obtained, it may be calculated using specific values during clock synchronization, and the clock synchronization information may be corrected again using the result of the calculation. Meanwhile, the clock synchronization process is optimized by using the precision error covariance result, so that the clock synchronization information synchronized in the clock synchronization process can be more accurate, and the phenomena of data loss, data collision and the like are not easy to occur in the clock synchronization process.
In some alternative embodiments, in addition to the above-mentioned indicators reflecting clock synchronization accuracy and total throughput, resource allocation fairness among different users in the clock synchronization network should also be considered, so as to meet the service demands of the users as much as possible. Thus, the index sf measuring system fairness can be expressed as:
Wherein, the value range of sf is [0,1 ]]When the maximum value 1 is taken, the resource allocation of each user in the system reaches the most fair state; θ m Is a preset value for ensuring the fairness of each user in a group, which is related to the channel condition and the transmission rate of each link, and is calculated by the following method
In some alternative embodiments, based on the above analysis of the deterministic network considering clock synchronization accuracy, in the case of balancing the overhead of radio resources under the condition of guaranteeing the constraint of clock synchronization accuracy, it is possible to achieve that the network (total) throughput can be maximized while taking into account the fairness of the system by the fairness index sf.
In summary, in the present disclosure, clock synchronization information transmitted between a target node and a time service terminal in a clock synchronization process is first obtained, then an error value of the obtained clock synchronization information is calculated, the clock synchronization information is complemented by using the calculated error value, then a resource allocation countermeasure is generated by the complemented clock synchronization information, and finally a synchronization process of a clock synchronization network is optimized by the resource allocation countermeasure.
Based on the same technical concept, the disclosure also provides an optimizing device of the clock synchronization network, which corresponds to the method of any embodiment, and the optimizing method of the clock synchronization network can be realized by the optimizing device of the clock synchronization network.
Fig. 2 is a schematic structural diagram of an optimizing apparatus of a clock synchronization network according to an embodiment of the present disclosure.
The optimization device of the clock synchronization network shown in fig. 2 further comprises the following modules:
a clock information acquisition module 10, an error value calculation module 20, and an optimization processing module 30;
wherein the clock information acquisition module 10 is configured to: is configured to: and acquiring clock synchronization information between the target node and the time service terminal.
The error value calculation module 20 is configured to: is configured to: and calculating an error value of the clock synchronization information, and carrying out complement processing on the clock synchronization information according to the error value to obtain the clock synchronization information after the complement processing.
An optimization processing module 30 configured to: generating a resource allocation countermeasure based on the clock synchronization information after the completion processing, and optimizing the clock synchronization process of the clock synchronization network through the resource allocation countermeasure.
Optionally, the error value calculating module 20 specifically performs the following steps:
determining first time information of the clock synchronization information sent by the time service terminal to the target node, and determining fixed time delay and random time delay in the current clock synchronization process based on the first time information;
Determining second time information of the clock synchronization information fed back by the target node to the time service terminal based on the fixed time delay and the random time delay;
determining an error value of the clock synchronization information based on the first time information and the second time information, including:
generating a clock information observation model based on the first time information and the second time information;
determining an error value of the clock synchronization information based on the clock information observation model;
wherein the first time information is expressed as:
wherein T is 1 i,j Represents first time information, t represents ideal reference time, θ i (k) Phase offset denoted as clock synchronization information;
the second time information is expressed as:
wherein T is 2 i,j Expressed as second time information, t represents ideal reference time, θ i (k) Phase shift, d, representing clock synchronization information i,j Indicating a fixed time delay, the time delay is,
representing random time delay;
the clock information observation model is expressed as:
y i,k ＝Cx i (k)+v i (k)
wherein y is i,k Represents clock information observation model Cx i (k) Representing the observation matrix of the clock information,
representing a gaussian random variable subject to an N (0, r) distribution;
correcting the clock information observation model based on the Bernoulli equation to obtain a corrected clock information observation model;
Determining an error covariance of the clock synchronization process based on the corrected clock information observation model;
updating the error covariance based on a Kalman filtering algorithm, and calculating the updated error covariance to obtain an error value of the clock synchronization information;
wherein the corrected clock information observation model is expressed as:
z i,k ＝γ k [Cx i (k)+v i (k)]
wherein z is i,k Represents the corrected clock information observation model, gamma k The representation being a binary Bernoulli random variable, cx i (k) Representing the observation matrix of the clock information,
representing a gaussian random variable subject to an N (0, r) distribution;
the error covariance is expressed as:
P k ＝E[e k e k T ]
wherein P is k Representing error covariance e k Representing the estimation error of the clock synchronization process, E represents the channel matrix.
The optimization processing module 30 specifically performs the following steps:
determining the length of a time keeping band of the clock synchronization information after the completion processing;
determining a total throughput in the clock synchronization process based on the guard band length, expressed as:
wherein U (B) k ,p k ) Representing the total throughput of transmitted data during clock synchronization, W B (B k ) Representing equivalent bandwidth considering guard band length, V k Representing the dispersion of the channel,
is an inverse function of Q (x), 1-lambda k Representing the probability of packet loss, i.e. transmission error rate, snr k (p k ) Representing the signal-to-noise ratio when transmitting data, L representing the length of a transmitted data packet;
determining a plurality of users participating in the clock synchronization process, and grouping the plurality of users based on a clustering algorithm to obtain a plurality of user groups;
determining, based on the total throughput and the number of the plurality of user groups, a group throughput assigned by each of the plurality of user groups, expressed as:
wherein U (B) k ,p k ) Representing the total throughput of transmitted data during clock synchronization, R total Representing group throughput, M representing the number of multiple user groups, u representing the number of users in each user group, k representing the total number of users;
generating precision error covariances of the plurality of user groups during the clock synchronization based on the group throughput;
optimizing the clock synchronization process based on the precision error covariance;
wherein the precision error covariance is expressed as:
wherein P is avg Precision error covariance, M denotes the number of user groups, u denotes the number of users in each user group, k denotes the total number of users, tr (E [ P ] k,t (p m )]) Representing E [ P ] k,t (p m )]E [ P ] k,t (p m )]Representing a fixed error in the clock synchronization process, P k,t Is the synchronization error covariance matrix of the kth terminal at the time t.
Based on the same technical concept, the present disclosure also provides an electronic device corresponding to the method of any embodiment, which includes a memory, a processor, and a computer program stored on the memory and capable of running on the processor, where the processor implements the method of optimizing the clock synchronization network according to any embodiment when executing the program.
Fig. 3 shows a more specific hardware architecture of an electronic device according to this embodiment, where the device may include: a processor 1010, a memory 1020, an input/output interface 1030, a communication interface 1040, and a bus 1050. Wherein processor 1010, memory 1020, input/output interface 1030, and communication interface 1040 implement communication connections therebetween within the device via a bus 1050.
The processor 1010 may be implemented by a general-purpose CPU (Central Processing Unit ), microprocessor, application specific integrated circuit (Application Specific Integrated Circuit, ASIC), or one or more integrated circuits, etc. for executing relevant programs to implement the technical solutions provided in the embodiments of the present disclosure.
The Memory 1020 may be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory ), static storage device, dynamic storage device, or the like. Memory 1020 may store an operating system and other application programs, and when the embodiments of the present specification are implemented in software or firmware, the associated program code is stored in memory 1020 and executed by processor 1010.
The input/output interface 1030 is used to connect with an input/output module for inputting and outputting information. The input/output module may be configured as a component in a device (not shown) or may be external to the device to provide corresponding functionality. Wherein the input devices may include a keyboard, mouse, touch screen, microphone, various types of sensors, etc., and the output devices may include a display, speaker, vibrator, indicator lights, etc.
It should be noted that although the above-described device only shows processor 1010, memory 1020, input/output interface 1030, communication interface 1040, and bus 1050, in an implementation, the device may include other components necessary to achieve proper operation. Furthermore, it will be understood by those skilled in the art that the above-described apparatus may include only the components necessary to implement the embodiments of the present description, and not all the components shown in the drawings.
The electronic device of the foregoing embodiment is configured to implement the optimization method of the corresponding clock synchronization network in any of the foregoing embodiments, and has the beneficial effects of the corresponding method embodiment, which is not described herein.
Based on the same technical concept, corresponding to the method of any embodiment described above, the present disclosure further provides a non-transitory computer-readable storage medium storing computer instructions for causing the computer to perform the method of optimizing a clock synchronization network according to any embodiment described above.
The computer readable media of the present embodiments, including both permanent and non-permanent, removable and non-removable media, may be used to implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of storage media for a computer include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device.
The storage medium of the foregoing embodiments stores computer instructions for causing the computer to execute the method for optimizing the clock synchronization network according to any one of the foregoing embodiments, and has the beneficial effects of the corresponding method embodiments, which are not described herein.
Those of ordinary skill in the art will appreciate that: the discussion of any of the embodiments above is merely exemplary and is not intended to suggest that the scope of the disclosure, including the claims, is limited to these examples; the technical features of the above embodiments or in the different embodiments may also be combined under the idea of the present disclosure, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present disclosure as described above, which are not provided in details for the sake of brevity.
Additionally, well-known power/ground connections to Integrated Circuit (IC) chips and other components may or may not be shown within the provided figures, in order to simplify the illustration and discussion, and so as not to obscure the embodiments of the present disclosure. Furthermore, the devices may be shown in block diagram form in order to avoid obscuring the embodiments of the present disclosure, and this also accounts for the fact that specifics with respect to implementation of such block diagram devices are highly dependent upon the platform on which the embodiments of the present disclosure are to be implemented (i.e., such specifics should be well within purview of one skilled in the art). Where specific details (e.g., circuits) are set forth in order to describe example embodiments of the disclosure, it should be apparent to one skilled in the art that embodiments of the disclosure can be practiced without, or with variation of, these specific details. Accordingly, the description is to be regarded as illustrative in nature and not as restrictive.
While the present disclosure has been described in conjunction with specific embodiments thereof, many alternatives, modifications, and variations of those embodiments will be apparent to those skilled in the art in light of the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may use the embodiments discussed.
The disclosed embodiments are intended to embrace all such alternatives, modifications and variances which fall within the broad scope of the appended claims. Accordingly, any omissions, modifications, equivalents, improvements, and the like, which are within the spirit and principles of the embodiments of the disclosure, are intended to be included within the scope of the disclosure.
Claims (11)
1. A method for optimizing a clock synchronization network, comprising:
acquiring clock synchronization information between a target node and a time service terminal;
calculating an error value of the clock synchronization information, and carrying out complement processing on the clock synchronization information according to the error value to obtain the clock synchronization information after the complement processing;
generating a resource allocation countermeasure based on the clock synchronization information after the completion processing, and optimizing the clock synchronization process of the clock synchronization network through the resource allocation countermeasure.
2. The method of claim 1, wherein said calculating an error value of said clock synchronization information comprises:
determining first time information of the clock synchronization information sent by the time service terminal to the target node, and determining fixed time delay and random time delay in the current clock synchronization process based on the first time information;
Determining second time information of the clock synchronization information fed back by the target node to the time service terminal based on the fixed time delay and the random time delay;
an error value of the clock synchronization information is determined based on the first time information and the second time information.
3. The method of claim 2, wherein the determining the error value of the clock synchronization information based on the first time information and the second time information comprises:
generating a clock information observation model based on the first time information and the second time information;
determining an error value of the clock synchronization information based on the clock information observation model;
wherein the first time information is expressed as:
T 1 i,j ＝t+t i (k)
wherein T is 1 i,j Representing first time information, t representing ideal reference time, t i (k) Phase offset denoted as clock synchronization information;
the second time information is expressed as:
wherein T is 2 i,j Expressed as second time information, t represents ideal reference time, θ i (k) Phase shift, d, representing clock synchronization information i,j Indicating a fixed time delay, the time delay is,
representing random time delay;
the clock information observation model is expressed as:
y i,k ＝Cx i (k)+v i (k)
wherein y is i,k Represents clock information observation model Cx i (k) Representing the observation matrix of the clock information,
representing gaussian random variables that obey the N (0, r) distribution.
4. A method according to claim 3, wherein said determining an error value of said clock synchronization information based on said clock information observation model comprises:
correcting the clock information observation model based on the Bernoulli equation to obtain a corrected clock information observation model;
determining an error covariance of the clock synchronization process based on the corrected clock information observation model;
updating the error covariance based on a Kalman filtering algorithm, and calculating the updated error covariance to obtain an error value of the clock synchronization information;
wherein the corrected clock information observation model is expressed as:
z i,k ＝γ k [Cx i (k)+v i (k)]
wherein z is i,k Represents the corrected clock information observation model, gamma k The representation being a binary Bernoulli random variable, cx i (k) Representing the observation matrix of the clock information,
representing a gaussian random variable subject to an N (0, r) distribution;
the error covariance is expressed as:
P k ＝E[e k e k T ]
wherein P is k Representing error covariance e k Representing the estimation error of the clock synchronization process, E represents the channel matrix.
5. The method of claim 1, wherein the generating a resource allocation countermeasure based on the complemented clock synchronization information comprises:
determining the length of a time keeping band of the clock synchronization information after the completion processing;
determining a total throughput in the clock synchronization process based on the guard band length;
determining users participating in the clock synchronization process, and grouping the users based on a clustering algorithm to obtain a plurality of user groups;
determining a group throughput allocated to each of the plurality of user groups based on the total throughput and the number of the plurality of user groups;
wherein the resource allocation countermeasure includes a group throughput allocated to each user group.
6. The method according to claim 5, comprising:
determining a total throughput in the clock synchronization process based on the following formula;
wherein U (B) k ,p k ) Representing the total throughput of transmitted data during clock synchronization, W B (B k ) Representing equivalent bandwidth considering guard band length, V k Representing the dispersion of the channel,
is an inverse function of Q (x), 1-lambda k Representing the probability of packet loss, i.e. transmission error rate, snr k (p k ) Representing the signal-to-noise ratio at the time of transmitting the data, L represents the length of the transmitted data packet.
7. The method of claim 5, wherein the determining the group throughput assigned by each of the plurality of user groups based on the total throughput and the number of the plurality of user groups is expressed as:
wherein U (B) k ,p k ) Representing the total throughput of transmitted data during clock synchronization, R total Group throughput is expressed, M denotes the number of user groups, u denotes the number of users in each user group, and k denotes the total number of users.
8. The method according to claim 1, wherein optimizing the clock synchronization process of the clock synchronization network by the resource allocation countermeasure comprises:
generating precision error covariances of the plurality of user groups during the clock synchronization based on the group throughput;
optimizing the clock synchronization process based on the precision error covariance;
wherein the precision error covariance is expressed as:
wherein P is avg Precision error covariance, M denotes the number of user groups, u denotes the number of users in each user group, k denotes the total number of users, tr (E [ P ] k,t (p m )]) Representing E [ P ] k,t (p m )]E [ P ] k,t (p m )]Representing a fixed error in the clock synchronization process, P k,t Is the synchronization error covariance matrix of the kth terminal at the time t.
9. An optimization apparatus for a clock synchronization network, comprising:
a clock information acquisition module configured to: acquiring clock synchronization information between a target node and a time service terminal;
an error value calculation module configured to: calculating an error value of the clock synchronization information, and carrying out complement processing on the clock synchronization information according to the error value to obtain the clock synchronization information after the complement processing;
an optimization processing module configured to: generating a resource allocation countermeasure based on the clock synchronization information after the completion processing, and optimizing the clock synchronization process of the clock synchronization network through the resource allocation countermeasure.
10. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the method of any one of claims 1 to 8 when the program is executed by the processor.
11. A non-transitory computer readable storage medium storing computer instructions for causing a computer to perform the method of any one of claims 1 to 8.
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