CN116403101A

CN116403101A - Image recognition method, device and system for wafer bonding

Info

Publication number: CN116403101A
Application number: CN202111622519.XA
Authority: CN
Inventors: 孙宝; 赵捷; 唐安伦; 周坚
Original assignee: Tojingjianke Haining Semiconductor Equipment Co ltd
Current assignee: Tojingjianke Haining Semiconductor Equipment Co ltd
Priority date: 2021-12-28
Filing date: 2021-12-28
Publication date: 2023-07-07

Abstract

The application relates to an image recognition method, device and system for wafer bonding. Methods according to some embodiments of the present application include: collecting a plurality of first template images, wherein each of the plurality of first template images includes a first template region; making a mean image based on the plurality of first template images; collecting a plurality of second template images, wherein each of the plurality of second template images includes a second template region; creating a sum image based on the plurality of second template images; and identifying the mean image and the sum image to determine the position of the second template region in the sum image. Compared with the prior art, the image recognition method, device and system for wafer bonding can effectively overcome the influence of the signal to noise ratio of a camera on the image positioning precision, improve the image positioning precision and reduce the image recognition precision error.

Description

Image recognition method, device and system for wafer bonding

Technical Field

The present disclosure relates generally to the field of semiconductor technology, and more particularly, to an image recognition method, apparatus, and system for wafer bonding.

Background

In the manufacture or process inspection of semiconductor large scale integrated circuits, semiconductor wafers are processed or inspected by a plurality of different equipment through a plurality of manufacturing process stages. Wafer bonding processes have become a key technology for the integrated development and practicality of semiconductor manufacturing technology. Wafer bonding refers to bonding two flat wafers face to face, applying external conditions such as certain pressure, temperature, voltage and the like, and generating atom or intermolecular bonding force such as covalent bond, metal bond, molecular bond and the like at the interface between the original two wafers, so that the bonding between the two surfaces can reach certain strength, and the two wafers are integrated.

In the wafer bonding process, two wafers need to be aligned and bonded. Template images are typically used for this purpose. However, in the process of positioning a wafer by means of a template image, the existing method focuses on improving the optical resolution to achieve positioning at the sub-pixel level, and neglects the influence of the signal-to-noise ratio of a camera on positioning accuracy.

Accordingly, there is a need for improvements in the art to address the problems of the prior art.

Disclosure of Invention

One of the purposes of the present application is to provide an image recognition method, device and system for wafer bonding, which solve the problem of low image positioning accuracy caused by the signal-to-noise ratio of a camera.

According to one aspect of the present application, there is provided an image recognition method for wafer bonding, including: collecting a plurality of first template images, wherein each of the plurality of first template images includes a first template region; making a mean image based on the plurality of first template images; collecting a plurality of second template images, wherein each of the plurality of second template images includes a second template region; creating a sum image based on the plurality of second template images; and identifying the mean image and the sum image to determine the position of the second template region in the sum image.

According to one aspect of the present application, there is provided an image recognition apparatus for wafer bonding, including: a first acquisition module configured to acquire a plurality of first template images, wherein each of the plurality of first template images includes a first template region; a first processing module configured to produce a mean image based on the plurality of first template images; a second acquisition module configured to acquire a plurality of second template images, wherein each of the plurality of second template images includes a second template region; a second processing module configured to produce a sum-value image based on a plurality of second template images; and the identification module is used for identifying the mean value image and the sum value image to determine the position of the second template area in the sum value image.

According to one aspect of the present application, there is also provided a non-transitory computer readable storage medium storing one or more programs executable by one or more processors to implement an image recognition method for wafer bonding as described herein.

According to one aspect of the present application, there is also provided an image recognition system for wafer bonding, comprising: a processor; a non-transitory computer readable storage medium storing computer executable instructions coupled to the processor; a carrier for supporting the wafer; wherein the processor is configured to execute computer-executable instructions to implement the image recognition method for wafer bonding described herein on the wafer. The image recognition method, device and system for wafer bonding can effectively overcome the influence of the signal to noise ratio of a camera on image positioning accuracy, improve the image positioning accuracy and reduce the image recognition accuracy error.

Drawings

The drawings that are necessary to describe embodiments of the present application or the prior art will be briefly described below in order to describe the embodiments of the present application. It is apparent that the figures in the following description are only some of the embodiments in this application. It will be apparent to those skilled in the art that other embodiments of the drawings can be made in accordance with the illustrations in these drawings without the need for inventive labor.

Fig. 1 is a flowchart of an image recognition method for wafer bonding according to some embodiments of the present application.

Fig. 2 is a specific flowchart of acquiring a plurality of first template images according to some embodiments of the present application.

FIG. 3 is a specific flowchart of acquiring a plurality of second template images according to some embodiments of the present application.

Fig. 4 is a flowchart of an image recognition method for wafer bonding according to further embodiments of the present application.

Fig. 5 is a block diagram of an image recognition device for wafer bonding according to some embodiments of the present application.

Detailed Description

For a better understanding of the spirit of the present application, the following description is provided in connection with some preferred embodiments of the present application.

Various embodiments of the present application are discussed in detail below. Although specific implementations are discussed, it should be understood that these implementations are for illustrative purposes only. One skilled in the relevant art will recognize that other components and configurations may be used without departing from the spirit and scope of the application.

Fig. 1 is a flowchart of an image recognition method for wafer bonding according to some embodiments of the present application. The image recognition method for wafer bonding according to some embodiments of the present application as shown in fig. 1 is described in detail below with reference to fig. 2 to 3.

In some embodiments, a plurality of first template images are acquired (step S10). Wherein each of the plurality of first template images has a first template region. Fig. 2 is a specific flowchart of acquiring a plurality of first template images according to some embodiments of the present application.

In some embodiments, a first template image is acquired (step S102).

In some embodiments, a first template region is searched for in the first template image (step S104). The first template region may be searched by any known method, such as an automatic search-based method or a manual search-based method, etc.

In some embodiments, the first template region is centered in the first template image (step S106). In this step, the first template region may be centered in the first template image using a variety of methods. For example, the center of the first template region may be moved to the center of the first template image by moving; alternatively, the first template region may be located at the center of the first template image by cutting the boundary of the first template image such that the distance between the edge of the first template region and the boundary of the cut first template image is the same. However, in some embodiments, step S106 is not required, and step S106 may be omitted.

In some embodiments, the image sensor is focused on the first template region (step S108). In some embodiments, the image sensor may be a camera. The ROI area of the camera is made to contain the first template area by setting the position and size of the ROI (Region of Interest) area of the camera. The main purpose of focusing the image sensor on the first template area is to: the areas of no interest are screened out, thereby increasing the operating speed of the processor. However, in some embodiments, step S108 may also be omitted without regard to the running speed of the processor.

In some embodiments, the first template region is exposed a plurality of times (step S110). In this step, a first template region of a first template image is subjected to multiple exposures using an image sensor (e.g., a camera) to obtain a plurality of first template images.

Referring to fig. 1 and 2, in some embodiments, a mean image is made based on a plurality of first template images (step S20). In this step, pixel values at the same position in the plurality of first template images are accumulated and an average value thereof is found, thereby obtaining an average value image. In some embodiments, 16 exposures are made to the first template region in step S110, resulting in 16 first template images. The mean image of the 16 first template images is obtained from averaging by summing up the pixel values at the same position on each of the 16 first template images, divided by 16. It should be understood that 16 first template images are merely preferred embodiments of the present application, and in some embodiments, the first template images may be any other number, and are not limited herein. By making the mean value image, the noise in the template image can be reduced, and the signal to noise ratio can be improved.

In some embodiments, a plurality of second template images are acquired (step S30). Wherein each of the plurality of second template images has a second template region. FIG. 3 is a specific flowchart of acquiring a plurality of second template images according to some embodiments of the present application.

In some embodiments, a second template image is acquired (step S302).

In some embodiments, the second template image line is exposed multiple times (step S304). In this step, the second template image is subjected to a plurality of exposures using an image sensor (e.g., a camera) to obtain a plurality of second template images.

Referring back to fig. 1, in some embodiments, a sum value image is made based on the plurality of second template images (step S40). In this step, the pixel values at the same position in the plurality of second template images acquired in step S30 are accumulated, thereby producing a sum image. In some embodiments, consideration is given to preventing insufficient memory in the image from causing data overflow when creating and valuing the image. In some embodiments, the second template image is exposed 16 times in step S304, resulting in 16 second template images. However, it should be understood that the number 16 is merely a preferred embodiment of the present application, and that the second template image may be any other number. The template image edge contrast ratio low and the edge blurring caused by low illumination intensity can be compensated by manufacturing sum value images based on a plurality of second template images, so that the signal-to-noise ratio of the images is improved, and the result is accurately identified.

In some embodiments, the mean image is identified with the sum image (step S50). Specifically, the mean image is identified with the sum image to determine the location of the second template region in the sum image. In this application, the mean image and the sum image may be identified using a variety of methods. For example, in some embodiments, the mean image and the sum image may be identified using a geometric identification algorithm, and a template matching method may also be used to identify the mean image and the sum image.

Fig. 4 is a flowchart of an image recognition method for wafer bonding according to some embodiments of the present application.

In some embodiments, a plurality of sum value images are produced (at step S402). Specifically, steps S30 and S40 in fig. 1 are repeatedly performed, thereby obtaining a plurality of sum-value images. In some embodiments, steps S30 and S40 in fig. 1 are repeatedly performed 50 times in total, thereby obtaining 50 sum-value images. However, it should be understood that 50 times is only a preferred embodiment of the present application, and in some embodiments, steps S30 and S40 in fig. 1 may be repeated for other times, which is not particularly limited herein.

In some embodiments, each of the mean image and the plurality of sum-value images is identified (step S502). Specifically, step S50 in fig. 1 is repeatedly performed, thereby obtaining a plurality of sets of recognition results.

In some embodiments, the variance of the recognition result is calculated (step S60). Specifically, the variances of the plurality of sets of recognition results are calculated to determine the degree of discretization of the plurality of sets of recognition results.

The flow of the image recognition method for wafer bonding shown in fig. 4 is described below in conjunction with a geometry recognition algorithm. It should be understood that the following steps of the geometric recognition algorithm are only one specific embodiment of the present application, and in some embodiments, the geometric recognition algorithm may have other variations or parameter adjustments, which are not specifically limited herein. The geometric recognition algorithm of a specific embodiment of the present application comprises the following steps:

firstly, setting a region of a first template region in a first template image; secondly, calculating a result score for the first template region and developing a cache for the angle deflection result; the size of the buffer memory is consistent with the size of the first template area; thirdly, controlling recognition accuracy, using high-accuracy recognition such that the error is at 0.05 pixels (sub-pixel level); fourthly, loading a second template image, then identifying by using the first template image, and calculating an identification result; fifthly, loading different second template images, continuously repeating the fourth step, and summarizing a plurality of groups of obtained recognition results; and sixthly, calculating the variance of 3 times of the multiple groups of summarized recognition results. The 3-fold variance is used here to make it possible to more clearly understand the degree of dispersion of the plurality of sets of recognition results.

Table 1 is a graph of comparison results of 3-fold variances obtained after different exposure times of the second template image at different magnifications.

TABLE 1

Magnification factor	Number of exposure times	3. Sigma. Calculation results (unit: nm)
			×3.6	1	43.87754
×3.6	16	14.99986
			×7.2	1	39.56873
×7.2	16	11.21481

As can be seen from table 1, at 3.6 times magnification: when only the second template image is subjected to 1 exposure, and the 3-time variance of a plurality of groups of recognition results obtained after the step is performed for a plurality of times is larger, the variance is 43.87754nm, which means that the degree of dispersion of the recognition results is larger; and when the second template image is subjected to 16 times of exposure, a sum value image is manufactured, and 3 times of variance of a plurality of groups of identification results obtained after the step is carried out for a plurality of times is obviously reduced, and the sum value image is only 14.99986nm. Similarly, at 7.2 times magnification: when only the second template image is subjected to 1 exposure, and the 3-fold variance of the plurality of groups of recognition results obtained after the step is performed for a plurality of times is also larger, which is 39.56873, the degree of dispersion of the recognition results is larger; and when the second template image is subjected to 16 times of exposure, a sum value image is manufactured, and the 3 times variance of a plurality of groups of identification results obtained after the step is carried out for a plurality of times is further obviously reduced, namely, only 11.21481. That is, regardless of the magnification of 3.6 times or the magnification of 7.2 times, the sum image was produced after 16 times of exposure to the second template image, and the 3-fold variance of the plurality of sets of recognition results obtained after performing this step a plurality of times was 15nm or less. That is, the error of the image recognition result is reduced to about 15nm.

Fig. 5 is a block diagram of an image recognition device for wafer bonding according to some embodiments of the present application. As shown in fig. 5, the image recognition device 50 for wafer bonding includes a first acquisition module 502, a first processing module 504, a second acquisition module 506, a second processing module 508, a recognition module 510, and a determination module 512. The image recognition method for wafer bonding of the present application may be implemented by the image recognition device for wafer bonding 50 of the present application. Step S10 may be implemented by the first acquisition module 502; step S20 may be implemented by the first processing module 504; step S30 may be implemented by the second acquisition module 506; step S40 may be implemented by the second processing module 508; step S50 may be implemented by the identification module 510; step S60 may be implemented by the determination module 512. That is, the image recognition device 50 for wafer bonding may implement any of the steps of any of the methods described herein, including the method steps described in fig. 1-4, via the first acquisition module 502, the first processing module 504, the second acquisition module 506, the second processing module 508, the recognition module 510, and the determination module 512.

Further embodiments of the present application relate to a non-transitory computer readable storage medium storing one or more programs executable by one or more processors to implement any of the steps of any of the methods described herein, including the method steps described in fig. 1-4. A program may be implemented in any of a variety of ways, including program-based techniques, component-based techniques, and/or object-oriented techniques, etc. For example, programs may be implemented using ActiveX controls, C++ objects, javaBeans, microsoft Foundation Categories (MFCs), streaming SIMD Extensions (SSEs), or other techniques or methods, as desired.

In addition, other embodiments of the present application also provide an image recognition system for wafer bonding. The system includes a processor, a non-volatile computer-readable storage medium storing computer-executable instructions, and a carrier. A non-volatile computer-readable storage medium having stored thereon computer-executable instructions is coupled to the processor. The carrier may be used to support a wafer. The processor is configured to execute computer-executable instructions to perform any of the steps of any of the methods described herein, including the method steps described in fig. 1-4, on the wafer.

The image recognition method, the device and the system for wafer bonding have the following advantages: (1) The noise in the first template image is reduced by manufacturing the mean image, so that the image recognition error caused by the noise is effectively reduced; and (2) by accumulating the second template images, the signal-to-noise ratio of the images is improved, the recognition result is accurate, the recognition precision is improved, and the image recognition precision can reach the sub-pixel level standard.

It is noted that reference throughout this specification to "some embodiments of the present application" or similar terms means that a particular feature, structure, or characteristic described in connection with other embodiments is included in at least one embodiment and may not necessarily be present in all embodiments. Thus, the corresponding appearances of the phrase "some embodiments of the present application" or similar terms in various places throughout this specification are not necessarily referring to the same embodiments. Furthermore, the particular features, structures, or characteristics of any specific embodiment may be combined in any suitable manner with one or more other embodiments.

While the technical content and features of the present invention have been disclosed above, those skilled in the art may make various substitutions and modifications based on the teachings and disclosure of the present invention without departing from the spirit of the present invention. Accordingly, the scope of the present invention should not be limited to the embodiments disclosed, but should include various alternatives and modifications without departing from the invention and be covered by the claims of the present application.

Claims

1. An image recognition method for wafer bonding, characterized in that the image recognition method for wafer bonding comprises the following steps:

acquiring a plurality of first template images, wherein each of the plurality of first template images includes a first template region;

creating a mean image based on the plurality of first template images;

acquiring a plurality of second template images, wherein each of the plurality of second template images includes a second template region;

creating a sum image based on the plurality of second template images; and

and identifying the mean value image and the sum value image to determine the position of the second template area in the sum value image.

2. The method of claim 1, wherein capturing a plurality of first template images comprises:

focusing an image sensor on the first template region of the first template image; and

and exposing the first template area of the first template image for a plurality of times to obtain a plurality of first template images.

3. The method of image recognition for wafer bonding according to claim 2, wherein capturing the plurality of first template images further comprises: the first template region of the first template image is centered in the first template image prior to focusing an image sensor on the first template region of the first template image.

4. The method of claim 1, wherein capturing a plurality of second template images comprises:

and performing multiple exposure on the second template images to obtain a plurality of second template images.

5. The image recognition method for wafer bonding according to claim 1, further comprising:

making a plurality of sum images;

identifying each of the mean image and the plurality of sum images to obtain a plurality of groups of identification results; and

and calculating variances of the multiple groups of identification results.

6. The image recognition method for wafer bonding according to claim 1, wherein the mean image and the sum image are recognized based on a geometric recognition algorithm.

7. The method of claim 1, wherein the first template region has the same shape and size as the second template region.

8. An image recognition device for wafer bonding, the image recognition device for wafer bonding comprising:

a first acquisition module configured to acquire a plurality of first template images, wherein each of the plurality of first template images includes a first template region;

a first processing module configured to produce a mean image based on the plurality of first template images;

a second acquisition module configured to acquire a plurality of second template images, wherein each of the plurality of second template images includes a second template region;

a second processing module configured to produce a sum-value image based on the plurality of second template images; and

and the identification module is used for identifying the mean value image and the sum value image to determine the position of the second template area in the sum value image.

9. The image recognition device for wafer bonding of claim 8, wherein the first processing module is further configured to:

10. The image recognition device for wafer bonding of claim 9, wherein the first processing module is further configured to center the first template region of the first template image in the first template image.

11. The image recognition device for wafer bonding of claim 8, wherein the second acquisition module is further configured to expose the second template image a plurality of times to obtain the plurality of second template images.

12. The image recognition device for wafer bonding of claim 8, wherein

The second processing module is further configured to produce a plurality of the sum images;

the first recognition module is further configured to recognize each of the mean image and the plurality of sum images to obtain a plurality of sets of recognition results; and is also provided with

The image recognition device for wafer bonding further comprises: a determination module configured to calculate variances of the plurality of sets of recognition results.

13. The image recognition device for wafer bonding of claim 8, wherein the mean image and the sum image are identified based on a geometric recognition algorithm.

14. The image recognition device for wafer bonding of claim 8, wherein the first template region has a shape and size that is the same as a shape and size of the second template region.

15. A non-transitory computer readable storage medium storing one or more programs executable by one or more processors to implement the image recognition method for wafer bonding of any of claims 1-7.

16. An image recognition system for wafer bonding, comprising:

a processor;

a non-transitory computer readable storage medium storing computer executable instructions coupled to the processor; and

a carrier for supporting the wafer;

wherein the processor is configured to execute the computer-executable instructions to implement the image recognition method for wafer bonding of any one of claims 1-7 on the wafer.