CN116389585B - Method and device for NFC data caching and electronic equipment - Google Patents
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
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- H—ELECTRICITY
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- H04B—TRANSMISSION
- H04B5/00—Near-field transmission systems, e.g. inductive or capacitive transmission systems
- H04B5/70—Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes
- H04B5/72—Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes for local intradevice communication
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The application relates to the technical field of near field communication, and discloses a method for caching NFC data, which comprises the following steps: acquiring a bit number limit marking value and a cycle count value of NFC received data; in the conflict detection stage, detecting a communication end mark and a conflict bit mark; based on the detection results of the communication end flag and the collision bit flag, demodulation bits are output according to the bit number limit flag value and the cycle count value. In the conflict detection stage, the PCD performs data output according to the detection results of the communication end mark and the conflict bit mark by combining the bit number limit mark value and the cycle count value, and can effectively avoid PCD less bit or more bit receiving, thereby improving the demodulation performance of NFC signals. The application also discloses a device for caching NFC data and electronic equipment.
Description
Technical Field
The present application relates to the field of near field communication technologies, and for example, to a method and an apparatus for NFC data caching, and an electronic device.
Background
Near field communication (Near Field Communication, NFC), also known as near field communication, is a short range wireless communication technology with an operating frequency of 13.56MHz, allowing contactless point-to-point data transmission between electronic devices. The electronic equipment with the NFC function can conveniently and safely complete information exchange and access of contents and services, and is widely applied to the fields of access control, public transportation, mobile phone payment and the like.
In the related art, when a proximity coupling device (proximity coupling device, PCD) and a proximity card (proximity card or object, PICC) perform near field communication, the PCD detects a communication end flag to realize buffering and outputting of NFC data.
In the process of implementing the embodiments of the present disclosure, it is found that at least the following problems exist in the related art:
the PCD only detects the communication end mark to realize caching and outputting of NFC data, so that the PCD is easy to receive more or less bits, and the accuracy of receiving NFC signals is low.
It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the application and thus may include information that does not form the prior art that is already known to those of ordinary skill in the art.
Disclosure of Invention
The following presents a simplified summary in order to provide a basic understanding of some aspects of the disclosed embodiments. This summary is not an extensive overview, and is intended to neither identify key/critical elements nor delineate the scope of such embodiments, but is intended as a prelude to the more detailed description that follows.
The embodiment of the disclosure provides a method and a device for caching NFC data and electronic equipment, so that the integrity of receiving NFC signals by PCD is ensured, and the accuracy of receiving NFC signals by PCD is improved.
In some embodiments, a method for NFC data caching includes: acquiring a bit number limit marking value and a cycle count value of NFC received data; in the conflict detection stage, detecting a communication end mark and a conflict bit mark; based on the detection results of the communication end flag and the collision bit flag, demodulation bits are output according to the bit number limit flag value and the cycle count value.
In some embodiments, an apparatus for NFC data caching includes: a processor and a memory storing program instructions, the processor being configured to perform the aforementioned method for NFC data caching when executing the program instructions.
In some embodiments, an electronic device includes: an electronic device main body; and the aforementioned means for NFC data caching is mounted to the electronic device body.
The method and device for caching NFC data and the electronic device provided by the embodiment of the disclosure can realize the following technical effects:
in the technical scheme of the disclosure, when receiving a Near Field Communication (NFC) signal, PCD records and obtains a bit number limit marking value and a cycle count value of NFC received data, then detects a communication end mark and a conflict bit mark in a conflict detection stage, and outputs demodulation bits according to the bit number limit marking value and the cycle count value based on detection results of the communication end mark and the conflict bit mark. In this way, in the collision detection stage, the PCD performs data output according to the detection results of the communication end mark and the collision bit mark by combining the bit number limit mark value and the cycle count value, so that the PCD can be effectively prevented from receiving less bits or more bits, and the PCD is ensured to receive a complete frame of NFC signal, thereby improving the demodulation performance of the NFC signal.
The foregoing general description and the following description are exemplary and explanatory only and are not restrictive of the application.
Drawings
One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements, and in which like reference numerals refer to similar elements, and in which:
fig. 1 is a flowchart of a method for NFC data caching provided in an embodiment of the present disclosure;
fig. 2 is a flow chart of another method for NFC data caching provided by an embodiment of the present disclosure;
fig. 3 is a flowchart of another method for NFC data caching provided by an embodiment of the present disclosure;
FIG. 4 is a schematic diagram of a standard frame provided by an embodiment of the present disclosure;
FIG. 5 is a schematic diagram of an anti-collision frame provided by an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of an apparatus for NFC data caching according to an embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure.
Detailed Description
So that the manner in which the features and techniques of the disclosed embodiments can be understood in more detail, a more particular description of the embodiments of the disclosure, briefly summarized below, may be had by reference to the appended drawings, which are not intended to be limiting of the embodiments of the disclosure. In the following description of the technology, for purposes of explanation, numerous details are set forth in order to provide a thorough understanding of the disclosed embodiments. However, one or more embodiments may still be practiced without these details. In other instances, well-known structures and devices may be shown simplified in order to simplify the drawing.
The terms first, second and the like in the description and in the claims of the embodiments of the disclosure and in the above-described figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate in order to describe embodiments of the present disclosure. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion.
The term "plurality" means two or more, unless otherwise indicated. In the embodiment of the present disclosure, the character "/" indicates that the front and rear objects are an or relationship. For example, A/B represents: a or B. The term "and/or" is an associative relationship that describes an object, meaning that there may be three relationships. For example, a and/or B, represent: a or B, or, A and B. The term "corresponding" may refer to an association or binding relationship, and the correspondence between a and B refers to an association or binding relationship between a and B.
In NFC protocols (e.g., ISO14443, ISO15693, JISX6319-4, etc. standards), when the proximity card PICC communicates to the proximity coupling device PCD, the end of communication flag (end of communication, EOC) is defined as no subcarrier modulation for one bit period, typically comprising one or more bits. The method for NFC data buffering according to the embodiments of the present disclosure may be applied to a proximity coupling device PCD, and in the case that a data buffering output flag (e.g., EOC) is detected, output demodulation bits according to a bit number limit flag value and a cycle count value, so as to improve demodulation performance of an NFC signal.
Referring to fig. 1, an embodiment of the disclosure provides a method for NFC data caching, including the following steps:
s101, obtaining a bit number limit marking value and a cycle count value of NFC received data.
The bit number limit Flag value Flag is used for marking whether the received bit number is larger than a preset bit number value +1. For example, when the preset number of bits is 8, a number-of-bits limit flag value is used to flag whether the number of bits received is greater than 9 bits. When flag=0, it indicates that the number of received bits is less than or equal to the preset bit value +1, i.e., bcnt max +1; when flag=1, it indicates that the number of received bits is greater than the preset bit value +1.
A cycle count Bcnt of 0-Bcnt max The number of received bits is counted cyclically, e.g. when the cycle count is at a maximum Bcnt max For 8, the cycle count value is used to count the number of received bits from 0-8 cycles.
Initializing a bit number limit Flag value Flag and a cycle count value Bcnt, the bit number limit Flag value flag=0, and the cycle count value bcnt=0.
Optionally, obtaining the cycle count of the near field communication received bits includes calculating the cycle count as follows:
Bcnt=i%（Bcnt max +1）
wherein Bcnt is a cycle count, i is a buffer bit number, bcnt max Is the cycle count maximum.
i%（Bcnt max +1) is i divided by (Bcnt max +1) taking the remainder. In practical application, the maximum value Bcnt of the cycle count max May be 8. When i is 1, bcnt=i% (Bcnt max +1) = 1%9 =1; when i is 8, bcnt=i% (Bcnt max +1）=8%9=8。
S102, in the conflict detection stage, a communication end mark and a conflict bit mark are detected.
In the collision detection phase, i.e. the PCD is in an anti-collision phase, there are multiple proximity cards PICCs simultaneously sending NFC data signals to the proximity coupling device PCD. After the PCD detects the communication ending mark, ending the near field communication between the PCD and the PICC; after the PCD detects the conflict bit flag, it indicates that the PCD is in conflict phase.
Optionally, the communication end flag and the collision bit flag are detected as follows: determining that a communication end mark is detected under the condition that an envelope detection value in one bit period is smaller than a communication end detection threshold; and determining that the conflict bit mark is detected under the condition that the first envelope detection maximum value of the first half bit period is larger than the conflict detection threshold and the second envelope detection maximum value of the second half bit period is larger than the conflict detection threshold.
One bit period is defined as one data transmission period of communication between the PICC and the PCD. The first half of the bit period is the first 50% of the bit period, and correspondingly, the second half of the bit period is the second 50% of the bit period.
Optionally, the collision detection threshold and the end of communication detection threshold are calculated as follows:
Q clash =C 1 x Env (soc), and Q end =C 2 ×Env(soc)
That is to say,
wherein Q is clash For collision detection threshold, Q end For the end-of-communication detection threshold, env (soc) is the envelope detection value of the start-of-communication node, C 1 As a first coefficient, C 2 Is the second coefficient, C 1 ＞C 2 。
In practical applications, the 848KHz subcarrier characteristic may be used to correlate digital-to-analog converter (ADC) sampled signals. For example, when the sampling frequency is 13.56MHz, the reference signal ref= [ -1-1-1-1-1-1-1-1 1 1 1 1 1 1 1 1] is S (i), i=1, 2, …, and the correlation result Corr (i) =sum (S (i, …, i+15) ×ref), sum () is the sum. And (3) carrying out operation on the Corr (i) absolute value and carrying out low-pass filtering to obtain an envelope detection value Env (i). And searching an inflection point of which the envelope detection value exceeds a predefined threshold as a position estimation of the SOC, namely if Env (T) is more than or equal to Env (T+1) > envI (T+2), env (T) is the amplitude of the inflection point, and T is the position of the inflection point. If Env (T) is equal to or greater than a predefined threshold TH, env (T) is the initial amplitude of the SOC (i.e., the envelope detection value Env (SOC) of the communication start node), and T is the initial position of the SOC (i.e., the communication start node).
The end of communication detection threshold is less than the collision detection threshold, e.g. C 1 The value is 0.5, C 2 The value is 0.3. Since the EOC detection threshold is smaller than the collision detection threshold, EOC will not be detected when a collision bit is detected. A lower EOC detection threshold is employed to ensure that a complete frame of data is received.
Setting an EOC detection threshold and a conflict detection threshold to detect EOC and conflict bit marks, outputting all bits before conflict bits are generated after PCD detects the conflict bit marks, emptying all caches stored by PCD, improving accuracy of cache data, and outputting demodulation bits according to a bit number limit mark value and a cycle count value after the EOC of the communication end mark is detected, so that PCD is prevented from receiving fewer bits or more bits, and accuracy of PCD receiving NFC signals can be obviously improved. In addition, the EOC detection threshold is set to be smaller than the conflict detection threshold, corresponding operation after the conflict bit mark is detected is preferentially executed, and the accuracy of PCD data caching is further guaranteed.
S103, based on the detection results of the communication end mark and the conflict bit mark, a demodulation bit is output according to the bit number limit mark value and the cycle count value.
Optionally, based on the detection results of the communication end flag and the collision bit flag, outputting the demodulation bits according to the bit number limit flag value and the cycle count value, including: outputting all demodulation bits before the conflict bit mark and latching the limit boundary value of the current bit number and the current cycle count value under the condition that the conflict bit mark is detected; under the condition that the next part of bits are received, unlocking the current bit number limit marking value and the current cycle count value to obtain the latest bit number limit marking value and the latest cycle count value; when the communication end flag is detected, demodulation bits are output based on the latest bit number limit flag value and the latest cycle count value.
When the PCD is in an anti-collision phase, a collision bit flag is detected, collision avoidance is performed, and interference with other NFC devices in communication and electronic devices which also operate in the frequency band is prevented. The PCD does not generate a radio frequency field during initialization, and remains silent to await instructions from the initiator. The application can control the device to actively transition from the target state to the originating state. After the PCD enters the initiation state, the PCD is in an anti-collision detection stage, and collision detection is started. After the application program determines the communication mode and the transmission rate, the application program starts to establish a link to transmit data. When the PCD detects the conflict bit flag, all demodulation bits before the conflict bit flag are output, and the current bit number limit boundary value and the current cycle count value are latched.
After the PCD detects the conflict bit mark, outputting all bits before the conflict bit, and emptying all caches stored by the PCD, thereby improving the accuracy of the cache data. And simultaneously, latching the current bit number limit marking value and the current cycle counting value, unlocking the current bit number limit marking value and the current cycle counting value under the condition of receiving the next part of bits, obtaining the latest bit number limit marking value and the latest cycle counting value, ensuring that the output data of the subsequent demodulation bits is output as a whole frame, and improving the continuity of the subsequent cache data.
Fig. 4 is a schematic diagram of one standard frame provided by an embodiment of the present disclosure, and in combination with fig. 4, the 7-byte standard frame includes a communication start frame, a data frame, and a parity frame. Fig. 5 is a schematic diagram of an anti-collision frame provided in an embodiment of the disclosure, and in conjunction with fig. 5, the anti-collision frame (collision bit flag) is a 7-byte standard frame divided into two parts, and the PCD receives the standard frame data and detects collision bits at the position of 2 bytes+5 bits. The PCD transmits the 2 bytes+5 bits to the PICC, which increases the bits after transmission collision by SOC (start of communication, communication start flag) and EOC, and transmits the bits as the next part (part 2) to the PCD.
In the embodiment of the disclosure, after the PCD detects the conflict bit mark, all bits before the conflict bit are output, all caches stored by the PCD are emptied, the accuracy of cache data is improved, meanwhile, the limit value of the current bit number and the current cycle count value are latched, and under the condition that the next period bit is received, the limit value of the current bit number and the current cycle count value are unlocked, and the continuity of the subsequent cache data is improved. In addition, after the communication end mark EOC is detected, demodulation bits are output according to the bit number limit mark value and the cycle count value, so that PCD (PCD) less or more bits are avoided, the accuracy of PCD receiving NFC signals can be obviously improved, and the demodulation performance of the NFC signals is improved.
Optionally, based on the detection results of the communication end flag and the collision bit flag, outputting the demodulation bits according to the bit number limit flag value and the cycle count value, further including: when the communication end flag is detected, a demodulation bit is outputted based on the bit number limit flag value and the cycle count value.
After the communication end mark EOC is detected, demodulation bits are output according to the bit number limit mark value and the cycle count value, so that PCD (PCD) less or more bits are avoided, the accuracy of PCD receiving NFC signals can be obviously improved, and the demodulation performance of the NFC signals is improved.
Optionally, outputting the demodulation bits according to the bit number limit flag value and the cycle count value includes: outputting demodulation bits with the number of bits being the number of short frames under the condition that the bit number limit mark value is 0; in the case where the bit number limit flag value is 1, the demodulated bits whose bit number is the cycle count value are output.
Here, flag is a bit number limit Flag value. The end of communication flag EOC is defined as no subcarrier modulation within one bit period. The short frame number value is the demodulation bit number of the short data frame received by the PCD and is typically 4 bits. In the case where the communication end Flag is detected and flag=0, the number of demodulation bits of the short frame number value is output. For example, when the short frame number value is 4, if the communication end Flag is detected and flag=0, demodulation bits having a bit number of 4 are output.
In the case where the communication end Flag is detected and flag=1, if the cycle count is 2, demodulation bits having a bit number of 2 are output.
Optionally, outputting the demodulated bits includes: determining a target output bit number of the demodulation bits; the number of output bits is the demodulated bits of the target number of output bits in the first-in-first-out order.
When the communication end mark is detected and flag=0, the target output number value of the demodulation bit is the short frame number value; when the communication end Flag is detected and flag=1, the target output number value is the cycle count value. The demodulated bits are buffered in a first-in-first-out manner, and when the demodulated bits enter the buffer, bcnt starts to cycle count bcnt=i% 9,i =0, 1, …, i.e. the i value is increased by 1 every 1 bit entered. And outputting the first bit after the buffer is filled, namely if the buffer size is equal to 8, inputting 8 bits, filling the buffer, inputting 9 th bits, outputting 1 st bit and buffering 2-9 th bits. Bcnt=8, the bit number limit Flag value flag=1 is set. The first-in first-out order is adopted, the number of output bits is the demodulation bits of the target output quantity value, on one hand, the demodulation bits of the target output quantity value are output, the multi-receiving bits or the less-receiving bits are avoided, the accuracy of data caching is ensured, and on the other hand, the cached data is output according to the first-in first-out order, and the timeliness of the cached information is ensured.
By adopting the method for caching NFC data provided by the embodiment of the disclosure, when receiving a near field communication NFC signal, PCD records and obtains a bit number limit marking value and a cycle count value of NFC received data, then detects a communication end mark and a conflict bit mark in a conflict detection stage, and outputs demodulation bits according to the bit number limit marking value and the cycle count value based on detection results of the communication end mark and the conflict bit mark. In this way, in the collision detection stage, the PCD performs data output according to the detection results of the communication end mark and the collision bit mark by combining the bit number limit mark value and the cycle count value, so that the PCD can be effectively prevented from receiving less bits or more bits, the PCD is ensured to receive a complete frame of NFC signal, the accuracy of the PCD in receiving the NFC signal is obviously improved, and the demodulation performance of the NFC signal is improved.
In some embodiments, the method for NFC data caching further comprises: in the non-conflict detection stage, detecting a communication ending mark; based on the detection result of the communication end flag, demodulation bits are output based on the bit number limit flag value and the cycle count value.
Optionally, based on a detection result of the communication end flag, outputting the demodulation bits according to the bit number limit flag value and the cycle count value, including in a case where the communication end flag is detected: outputting demodulation bits with the number of bits being the number of short frames when the bit number limit mark value is 0; when the bit number limit flag value is 1, the demodulation bits whose bit number is the cycle count are output.
According to the detection result of the communication end mark, the bit number limit mark value and the cycle count value are combined to output data, so that PCD (PCD) less or more bits can be effectively avoided, PCD is ensured to receive a complete frame of NFC signal, the accuracy of PCD receiving the NFC signal is obviously improved, and the demodulation performance of the NFC signal is improved.
The embodiment of the disclosure provides a method for buffering NFC data, which is shown in fig. 2, and outputs demodulation bits according to a bit number limit mark value and a cycle count value based on detection results of a communication end mark and a conflict bit mark, and comprises the following steps:
s201, a communication end flag and a collision bit flag are detected.
S202, when the conflict bit mark is detected, outputting all demodulation bits before the conflict bit mark, and latching the current bit number limit boundary value and the current cycle count value.
S203, unlocking the current bit number limit marking value and the current cycle count value under the condition that the next part of bits are received, and obtaining the latest bit number limit marking value and the latest cycle count value;
s204, when the communication end mark is detected, the demodulation bit is output according to the latest bit number limit mark value and the latest cycle count value.
S205, when the communication end flag is detected, the demodulation bit is outputted based on the bit number limit flag value and the cycle count value.
In the embodiment of the disclosure, after the PCD detects the conflict bit mark, all bits before the conflict bit are output, all caches stored by the PCD are emptied, the accuracy of cache data is improved, meanwhile, the limit value of the current bit number and the current cycle count value are latched, and under the condition that the next period bit is received, the limit value of the current bit number and the current cycle count value are unlocked, and the continuity of the subsequent cache data is improved. In addition, after the communication end mark EOC is detected, demodulation bits are output according to the bit number limit mark value (the latest bit number limit mark value) and the cycle count value (the latest cycle count value), so that PCD (PCD) is prevented from receiving fewer bits or more bits, the PCD is ensured to receive a complete frame of NFC signals, the accuracy of PCD receiving NFC signals can be obviously improved, and the demodulation performance of NFC signals is improved.
As shown in conjunction with fig. 3, an embodiment of the present disclosure provides a method for NFC data caching, including the following steps:
s301, obtaining a bit number limit flag value and a cycle count value of NFC reception data.
S302, in the conflict detection stage, a communication end mark and a conflict bit mark are detected.
S303, outputting all demodulation bits before the conflict bit mark and latching the current bit number limit boundary value and the current cycle count value when the conflict bit mark is detected.
And S304, unlocking the current bit number limit marking value and the current cycle count value under the condition that the next part of bits are received, and obtaining the latest bit number limit marking value and the latest cycle count value.
S305, when the communication end flag is detected, the latest bit number limit flag value is determined.
S306, when the latest bit number limit mark value is 0, the demodulation bit with the short frame number value is output.
S307, when the latest bit number limit flag value is 1, the demodulated bit having the latest cycle count value is output.
S308, when the communication end flag is detected, the bit number limit flag value is determined.
S309, when the bit number limit flag value is 0, the demodulated bit having the short frame number value is output.
S310, when the bit number limit flag value is 1, the demodulated bits whose bit number is the cycle count value are output.
In the disclosed embodiment, when receiving a near field communication NFC signal, the PCD records and obtains a bit number limit flag value and a cycle count value of NFC received data, then detects a communication end flag and a conflict bit flag in a conflict detection stage, and outputs demodulation bits according to the bit number limit flag value and the cycle count value based on detection results of the communication end flag and the conflict bit flag, when the bit number limit flag value is 0, outputs demodulation bits with a short frame number value, and when the bit number limit flag value is 1, outputs demodulation bits with a cycle count value. In this way, in the collision detection stage, the PCD performs data output according to the detection results of the communication end mark and the collision bit mark by combining the bit number limit mark value and the cycle count value, so that the PCD can be effectively prevented from receiving less bits or more bits, the PCD is ensured to receive a complete frame of NFC signal, the accuracy of the PCD in receiving the NFC signal is obviously improved, and the demodulation performance of the NFC signal is improved.
The embodiment of the present disclosure shown in fig. 6 provides an apparatus for NFC data caching, which includes a processor (processor) 60 and a memory (memory) 61, and may further include a communication interface (Communication Interface) 62 and a bus 63. The processor 60, the communication interface 62, and the memory 61 may communicate with each other via the bus 63. The communication interface 62 may be used for information transfer. The processor 60 may invoke logic instructions in the memory 61 to perform the method for NFC data caching of the above-described embodiments.
Further, the logic instructions in the memory 61 described above may be implemented in the form of software functional units and may be stored in a computer-readable storage medium when sold or used as a stand-alone product.
The memory 61 is a computer readable storage medium that may be used to store a software program, a computer executable program, such as program instructions/modules corresponding to the methods in the embodiments of the present disclosure. The processor 60 executes functional applications and data processing by running program instructions/modules stored in the memory 61, i.e. implements the method for NFC data caching in the above-described method embodiments.
The memory 61 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, at least one application program required for functions; the storage data area may store data created according to the use of the terminal device, etc. Further, the memory 61 may include a high-speed random access memory, and may also include a nonvolatile memory.
By adopting the device for caching NFC data, which is provided by the embodiment of the disclosure, when receiving a near field communication NFC signal, PCD records and obtains a bit number limit marking value and a cycle count value of NFC received data, then detects a communication end mark and a conflict bit mark in a conflict detection stage, and outputs demodulation bits according to the bit number limit marking value and the cycle count value based on detection results of the communication end mark and the conflict bit mark. In this way, in the collision detection stage, the PCD performs data output according to the detection results of the communication end mark and the collision bit mark by combining the bit number limit mark value and the cycle count value, so that the PCD can be effectively prevented from receiving less bits or more bits, the PCD is ensured to receive a complete frame of NFC signal, the accuracy of the PCD in receiving the NFC signal is obviously improved, and the demodulation performance of the NFC signal is improved.
As shown in connection with fig. 7, embodiments of the present disclosure provide an electronic device (e.g., computer, server, etc.) comprising an electronic device body 70; and the above-described apparatus 600 for NFC data caching is mounted to the electronic device body 70.
Embodiments of the present disclosure provide a computer-readable storage medium storing computer-executable instructions configured to perform the above-described method for NFC data caching.
The disclosed embodiments provide a computer program product comprising a computer program stored on a computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, cause the computer to perform the above-described method for NFC data caching.
The computer readable storage medium may be a transitory computer readable storage medium or a non-transitory computer readable storage medium.
Embodiments of the present disclosure may be embodied in a software product stored on a storage medium, including one or more instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of a method according to embodiments of the present disclosure. And the aforementioned storage medium may be a non-transitory storage medium including: a plurality of media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or a transitory storage medium.
The above description and the drawings illustrate embodiments of the disclosure sufficiently to enable those skilled in the art to practice them. Other embodiments may involve structural, logical, electrical, process, and other changes. The embodiments represent only possible variations. Individual components and functions are optional unless explicitly required, and the sequence of operations may vary. Portions and features of some embodiments may be included in, or substituted for, those of others. The scope of the embodiments of the present disclosure encompasses the full ambit of the claims, as well as all available equivalents of the claims. When used in the present application, although the terms "first," "second," etc. may be used in the present application to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without changing the meaning of the description, so long as all occurrences of the "first element" are renamed consistently and all occurrences of the "second element" are renamed consistently. The first element and the second element are both elements, but may not be the same element. Moreover, the terminology used in the present application is for the purpose of describing embodiments only and is not intended to limit the claims. As used in the description of the embodiments and the claims, the singular forms "a," "an," and "the" (the) are intended to include the plural forms as well, unless the context clearly indicates otherwise. Similarly, the term "and/or" as used in this disclosure is meant to encompass any and all possible combinations of one or more of the associated listed. Furthermore, when used in the present disclosure, the terms "comprises," "comprising," and/or variations thereof, mean that the recited features, integers, steps, operations, elements, and/or components are present, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method or apparatus comprising such elements. In this context, each embodiment may be described with emphasis on the differences from the other embodiments, and the same similar parts between the various embodiments may be referred to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method sections disclosed in the embodiments, the description of the method sections may be referred to for relevance.
Those of skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. The skilled artisan may use different methods for each particular application to achieve the described functionality, but such implementation should not be considered to be beyond the scope of the embodiments of the present disclosure. It will be clearly understood by those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, which are not repeated herein.
In the embodiments disclosed herein, the disclosed methods, articles of manufacture (including but not limited to devices, apparatuses, etc.) may be practiced in other ways. For example, the apparatus embodiments described above are merely illustrative, and for example, the division of the units may be merely a logical function division, and there may be additional divisions when actually implemented, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. In addition, the coupling or direct coupling or communication connection shown or discussed with each other may be through some interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form. The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to implement the present embodiment. In addition, each functional unit in the embodiments of the present disclosure may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. In the description corresponding to the flowcharts and block diagrams in the figures, operations or steps corresponding to different blocks may also occur in different orders than that disclosed in the description, and sometimes no specific order exists between different operations or steps. For example, two consecutive operations or steps may actually be performed substantially in parallel, they may sometimes be performed in reverse order, which may be dependent on the functions involved. Each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
Claims (10)
1. A method for NFC data caching, comprising:
acquiring a bit number limit marking value and a cycle count value of NFC received data; the bit number limit marking value is used for marking whether the received bit number is larger than a preset bit number value +1 or not;
in the conflict detection stage, detecting a communication end mark and a conflict bit mark;
based on the detection results of the communication end flag and the collision bit flag, demodulation bits are output according to the bit number limit flag value and the cycle count value.
2. The method according to claim 1, wherein outputting the demodulation bits according to the bit number limit flag value and the cycle count value based on the detection results of the communication end flag and the collision bit flag, comprises:
outputting all demodulation bits before the conflict bit mark and latching the limit boundary value of the current bit number and the current cycle count value under the condition that the conflict bit mark is detected;
under the condition that the next part of bits are received, unlocking the current bit number limit marking value and the current cycle count value to obtain the latest bit number limit marking value and the latest cycle count value;
when the communication end flag is detected, demodulation bits are output based on the latest bit number limit flag value and the latest cycle count value.
3. The method according to claim 1, wherein outputting the demodulation bits according to the bit number limit flag value and the cycle count value based on the detection results of the communication end flag and the collision bit flag, comprises:
when the communication end flag is detected, a demodulation bit is outputted based on the bit number limit flag value and the cycle count value.
4. A method according to claim 3, wherein outputting the demodulated bits based on the bit number limit flag value and the cycle count value comprises:
outputting demodulation bits with the number of bits being the number of short frames under the condition that the bit number limit mark value is 0;
outputting demodulation bits with the number of bits being the cycle count value when the bit number limit flag value is 1;
when the bit number limit mark value is 0, the received bit number is smaller than or equal to a preset bit number value +1; when the bit number limit flag value is 1, it indicates that the received bit number is greater than the preset bit number +1.
5. The method of claim 1, wherein outputting the demodulated bits comprises:
determining a target output bit number of the demodulation bits;
the number of output bits is the demodulated bits of the target number of output bits in the first-in-first-out order.
6. The method of claim 1, wherein the end of communication flag and the collision bit flag are detected as follows:
determining that a communication end mark is detected under the condition that an envelope detection value in one bit period is smaller than a communication end detection threshold;
and determining that the conflict bit mark is detected under the condition that the first envelope detection maximum value of the first half bit period is larger than the conflict detection threshold and the second envelope detection maximum value of the second half bit period is larger than the conflict detection threshold.
7. The method of claim 6, wherein the collision detection threshold and the end of communication detection threshold are calculated as follows:
Q clash =C 1 x Env (soc), and Q end =C 2 ×Env(soc)
Wherein Q is clash For collision detection threshold, Q end For the end-of-communication detection threshold, env (soc) is the envelope detection value of the start-of-communication node, C 1 As a first coefficient, C 2 Is the second coefficient, C 1 ＞C 2 。
8. The method according to any one of claims 1 to 7, further comprising:
in the non-conflict detection stage, detecting a communication ending mark;
based on the detection result of the communication end flag, demodulation bits are output based on the bit number limit flag value and the cycle count value.
9. An apparatus for NFC data caching, comprising a processor and a memory storing program instructions, wherein the processor is configured to perform the method for NFC data caching according to any of claims 1 to 8 when executing the program instructions.
10. An electronic device, comprising:
an electronic device main body;
the apparatus for NFC data caching as claimed in claim 9, mounted to the electronic device body.
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