CN116388915A - PTP clock synchronization method, PTP system, clock device and storage medium - Google Patents

Abstract

The embodiment of the invention provides a PTP clock synchronization method, a PTP system, clock equipment and a storage medium, and relates to the technical field of communication. The method is applied to clock equipment in a PTP system, the clock equipment is pre-recorded with original clock characteristic information, and the method comprises the following steps: and judging whether the clock characteristic information contained in each announce message is consistent with the original clock characteristic information or not according to each announce message received through the transparent clock, if so, processing each announce message containing the clock characteristic information consistent with the original clock characteristic information through an optimal master clock algorithm to synchronize the clock of the clock device with the clock of the target optimal clock, and if not, discarding the announce message. The embodiment of the invention provides support for the stability of the PTP domain clock network.

Description

PTP clock synchronization method, PTP system, clock device and storage medium

Technical Field

The present invention relates to the field of communications technologies, and in particular, to a PTP clock synchronization method, PTP system, clock device, and storage medium.

Background

With the development of ethernet technology, more network devices need clock synchronization, the deployment environment of the clock synchronization network is increasingly complex, and the probability of concurrency in PTP (Precision Time Protocol, accurate clock synchronization protocol) domain is also increasing. In theory, when clock devices in the whole PTP domain complete clock synchronization, all master ports will send an announce message to the PTP domain, and all clock devices will also receive and process all received announce messages, and will not distinguish whether the message comes from the legal optimal clock. On the one hand, the slave port of the clock device can also process and compare the messages received from the non-master port and the non-master port through the optimal master clock algorithm, so that the operation load of the clock device is increased to a certain extent, and the phenomenon is particularly obvious when the clock devices are extremely large in the PTP domain. On the other hand, when the PTP domain has selected the optimal master clock, a new clock device is accessed in the PTP domain or an illegal optimal clock attack is launched to the PTP domain, all clock devices in the PTP domain determine whether to renegotiate the optimal master clock according to the corresponding parameters in the anonance message by the optimal master clock algorithm, and a certain probability forms a clock conflict.

Meanwhile, the existing clock synchronization network has insufficient safety and reliability, and a unified clock synchronization safety protocol does not exist in the market, so that an illegal molecule can easily launch attack on a PTP domain, and the clock synchronization disorder of the whole PTP domain can be seriously caused. While the security protocol with higher encryption level is usually oriented to the whole ethernet network, it is too complex for the clock device, and is unfavorable for the deployment and maintenance of the whole PTP domain.

Disclosure of Invention

Accordingly, an object of the present invention is to provide a PTP clock synchronization method, PTP system, clock apparatus and storage medium, for providing support for the stability of PTP domain clock network.

In order to achieve the above object, the technical scheme adopted by the embodiment of the invention is as follows:

in a first aspect, an embodiment of the present invention provides a PTP clock synchronization method, which is applied to a clock device in a PTP system, where the clock device has pre-recorded original clock feature information, the PTP system further includes a transparent clock and a plurality of optimal clocks, the original clock feature information characterizes clock feature information of a main port of a target optimal clock, and the target optimal clock is one of the optimal clocks;

the method comprises the following steps:

judging whether clock characteristic information contained in each announce message is consistent with the original clock characteristic information or not according to each announce message received through the transparent clock; the announce message is forwarded to the clock device from the main port of each optimal clock through the transparent clock;

If yes, processing each announce message containing clock characteristic information consistent with the original clock characteristic information through an optimal master clock algorithm so as to synchronize the clock of the clock equipment with the clock of the target optimal clock;

if not, discarding the announce message.

In an alternative embodiment, the target optimal clock includes an optimal master clock and an optimal alternate clock;

the method further comprises the steps of:

comparing each announce message received through the transparent clock with the announce message corresponding to the optimal master clock through an optimal master clock algorithm to select a target optimal clock from the optimal master clock and the optimal candidate clock for clock synchronization;

and recording clock characteristic information of a main port of the target optimal clock contained in the announce message corresponding to the target optimal clock as original clock characteristic information.

In an alternative embodiment, the anonance message further includes a clock first priority parameter, a clock level, a clock precision parameter, a clock stability parameter, and a clock second priority parameter;

The step of comparing the announce message corresponding to the optimal master clock with the announce message corresponding to the optimal candidate clock through an optimal master clock algorithm includes:

comparing a first priority parameter in the announce message corresponding to the optimal master clock with a first priority parameter in the announce message corresponding to the optimal candidate clock;

comparing the clock level in the announce message corresponding to the optimal master clock with the clock level in the announce message corresponding to the optimal candidate clock under the condition that the first priority parameter of the optimal master clock is the same as the first priority parameter of the optimal candidate clock;

comparing the clock precision parameter in the announce message corresponding to the optimal master clock with the clock precision parameter in the announce message corresponding to the optimal candidate clock under the condition that the clock level of the optimal master clock is the same as the clock level of the optimal candidate clock;

comparing the clock stability parameter in the announce message corresponding to the optimal master clock with the clock stability parameter in the announce message corresponding to the optimal candidate clock under the condition that the clock precision parameter of the optimal master clock is the same as the clock precision parameter of the optimal candidate clock;

And comparing the clock second priority parameter in the announce message corresponding to the optimal master clock with the clock second priority parameter in the announce message corresponding to the optimal candidate clock under the condition that the clock stability parameter of the optimal master clock is the same as the clock stability parameter of the optimal candidate clock.

In an optional embodiment, the original clock characteristic information includes an original master port unique number, an original master port transmission message port number, an original clock domain unique number and an original optimal clock hop count;

the step of judging whether the clock characteristic information contained in the anonance message is consistent with the original clock characteristic information comprises the following steps:

judging whether the unique number of the main port in the announce message is consistent with the unique number of the original main port;

if yes, judging whether the port number of the message sent by the main port in the announce message is consistent with the port number of the message sent by the original main port;

if yes, judging whether the unique clock domain number in the anonance message is consistent with the unique clock domain number of the original clock domain;

if yes, judging whether the optimal clock hop count in the anonance message is consistent with the original optimal clock hop count;

If yes, judging that the clock characteristic information contained in the anonance message is consistent with the original clock characteristic information;

if the unique number of the main port in the announce message is inconsistent with the unique number of the original main port, or the port number of the main port sending message in the announce message is inconsistent with the port number of the original main port sending message, or the unique number of the clock domain in the announce message is inconsistent with the unique number of the original clock domain, or the optimal clock hop count in the announce message is inconsistent with the optimal clock hop count, judging that the clock characteristic information and the original clock characteristic information contained in the announce message are inconsistent.

In an alternative embodiment, the method further comprises:

deleting the recorded original clock characteristic information under the condition that the announce message corresponding to the target optimal clock forwarded by the transparent clock is not acquired within preset time;

judging the state of the target optimal clock;

under the condition that the target optimal clock is disconnected, processing the announce messages of the optimal clocks except the target optimal clock through an optimal master clock algorithm aiming at each announce message currently received through the transparent clock so as to reselect a target optimal clock from the optimal master clock and an optimal alternative clock for clock synchronization;

And under the condition that the clock characteristic information of the main port of the target optimal clock is changed, comparing the announce message corresponding to the optimal main clock with the announce message corresponding to the optimal alternative clock through an optimal main clock algorithm for each announce message received through the transparent clock so as to reselect the target optimal clock from the optimal main clock and the optimal alternative clock for clock synchronization.

In a second aspect, an embodiment of the present invention provides a PTP system, including a transparent clock, a plurality of clock devices, and a plurality of optimal clocks, each of the optimal clocks being communicatively connected to the transparent clock, the transparent clock being communicatively connected to each of the clock devices;

each clock device is pre-recorded with original clock characteristic information, the original clock characteristic information represents clock characteristic information of a target optimal clock master port, and the target optimal clock is one of the optimal clocks;

each optimal clock is used for sending an announce message to the transparent clock so that the transparent clock forwards the announce message to the clock equipment;

the transparent clock is used for receiving the announce messages sent by the main ports of the optimal clocks and forwarding all the announce messages to the clock devices;

Each of the clock devices is configured to implement a PTP clock synchronization method as described in the foregoing first aspect of embodiments and/or in combination with the foregoing possible implementation manners of the foregoing first aspect of embodiments, so that a clock of each of the clock devices is synchronized with a clock of the target optimal clock.

In an alternative embodiment, each clock device includes a CPU and a PTP port, and the original clock characteristic information is recorded in the PTP port in advance, and the PTP port is communicatively connected to the CPU;

the CPU is used for judging whether the clock characteristic information contained in each announce message is consistent with the original clock characteristic information or not according to each announce message received by the PTP port through the transparent clock; the announce message is forwarded to the clock device from the main port of each optimal clock through the transparent clock;

if so, processing the announce message corresponding to the clock characteristic information consistent with the original clock characteristic information through an optimal master clock algorithm so as to synchronize the clock of the clock equipment with the clock of the target optimal clock;

if not, discarding the announce message;

the PTP port is configured to record clock characteristic information of a master port of the target optimal clock included in the announce packet corresponding to the target optimal clock, as original clock characteristic information.

In an optional embodiment, the PTP port is further configured to delete the recorded original clock characteristic information when the announce message corresponding to the target optimal clock forwarded by the transparent clock is not acquired within a preset time.

In a third aspect, an embodiment of the present invention provides a clock device including a memory and a processor;

the memory is used for storing a computer program;

the processor is configured to execute the computer program to implement a PTP clock synchronization method as and/or as provided in connection with the embodiments of the first aspect described above.

In a fourth aspect, embodiments of the present invention provide a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements a PTP clock synchronization method as described in the above first aspect embodiment and/or in combination with possible implementation manners of the above first aspect embodiment.

The beneficial effects of the embodiment of the invention include, for example:

according to the PTP clock synchronization method, the PTP system, the clock equipment and the storage medium, the validity of each announce message received through the transparent clock is judged before the optimal master clock algorithm is used, namely whether the clock characteristic information contained in the announce message is consistent with the original clock characteristic information is judged, if so, the processing is carried out, if not, the processing is carried out, and if not, the processing is carried out, the equipment burden caused by the clock equipment to the announce message sent by the non-target optimal clock is effectively reduced, and the conflict of the whole network clock caused by malicious clock attack or the unintentional configuration error of a user is avoided, so that support is provided for the stability of the PTP domain clock network.

In order to make the above objects, features and advantages of the present invention more comprehensible, preferred embodiments accompanied with figures are described in detail below.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 illustrates an exemplary block diagram of a conventional PTP domain time synchronization provided by an embodiment of the present invention;

FIG. 2 illustrates a second exemplary block diagram of a conventional PTP domain time synchronization architecture provided by an embodiment of the present invention;

FIG. 3 illustrates a third exemplary architecture diagram of a conventional PTP domain time synchronization provided by an embodiment of the present invention;

FIG. 4 shows an exemplary block diagram of a PTP system provided by an embodiment of the present invention;

FIG. 5 shows an exemplary block diagram of a clock device provided by an embodiment of the present invention;

fig. 6 shows a flowchart of a PTP clock synchronization method according to an embodiment of the present invention;

Fig. 7 shows a second flowchart of a PTP clock synchronization method according to an embodiment of the invention;

fig. 8 shows a third flowchart of a PTP clock synchronization method according to an embodiment of the invention;

fig. 9 shows a fourth flowchart of a PTP clock synchronization method according to an embodiment of the invention;

fig. 10 shows a fifth flowchart of a PTP clock synchronization method according to an embodiment of the invention.

Icon: a 100-PTP system; 110-a transparent clock; 120-clock device; 1201-memory; 1202-a processor; 1203-communication interface; 130-optimum clock.

Detailed Description

The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by a person skilled in the art without making any inventive effort, are intended to be within the scope of the present invention.

It is noted that relational terms such as "first" and "second", and the like, are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

It should be noted that the features of the embodiments of the present invention may be combined with each other without conflict.

Referring to fig. 1, fig. 1 is a block diagram illustrating an exemplary structure of time synchronization of a conventional PTP domain, which has both an optimal clock (i.e., an optimal clock one and an optimal clock two), a transparent clock, and clock devices (i.e., a boundary clock and a normal clock in fig. 1) according to an embodiment of the present invention, as shown in fig. 1.

Wherein, the optimal clock is usually manually configured with static assignment for an administrator, does not participate in clock synchronization per se, and only synchronizes the clock per se to other clocks in the PTP domain. The transparent clock has a plurality of PTP ports, which do not participate in clock synchronization, but only forward PTP messages between the PTP ports, and forward delay correction is performed on the PTP messages, and the time is not synchronized from any port. The normal clock has only a single physical port to participate in PTP time synchronization, and in fig. 1 the normal clock synchronizes the clock from the upstream device through the single port. A boundary clock is understood to be a common clock with multiple physical ports participating in PTP time synchronization, where one port synchronizes time from an upstream device and the remaining multiple ports issue time to a downstream device.

In the whole PTP domain, all clocks are connected together according to Master-Slave (Master-Slave) hierarchical relationship, clock information is exchanged between clock devices through an announce message, and a Master-Slave structure is determined through an optimal Master clock algorithm. On the basis of fig. 1, it is assumed that the optimal clock one is better than the optimal clock two, and the optimal clock synchronizes clocks to each clock device step by exchanging an announce message through each clock device. And the best clock two is used as an alternative clock in the clock domain, and the best clock one still continuously sends an announce message to the PTP domain when it is normal, and the path of the best clock two for sending the announce message can be as shown in fig. 2.

Referring to fig. 2, fig. 2 shows a second exemplary structural block diagram of time synchronization in a conventional PTP domain according to an embodiment of the present invention, and as shown in fig. 2, no matter whether the first best clock works normally or not, the second best clock may send an announce message through the main port according to a certain period, and after receiving the announce message from the second best clock, the transparent clock may forward the corrected time delay through other PTP ports. At this time, the common clock 1, the common clock 2, the boundary clock 1 and the boundary clock 2 receive the best clock one-and-two-announce messages forwarded by the transparent clock at the same time. And each time an announce message of the optimal clock two is received, the common clock 1, the common clock 2, the boundary clock 1 and the boundary clock 2 compare the information in the received announce message through an optimal master clock algorithm, and the optimal clock one is selected for synchronization.

Based on this, an announce message sent continuously by an alternative best clock in the clock domain may cause the clock device (e.g., ordinary clock 1, ordinary clock 2, boundary clock 1, boundary clock 2 in fig. 1) that receives the message to continuously run the best master clock algorithm, affecting the clock device performance.

Further, after each clock device in the PTP domain completes clock synchronization, the newly added clock device continuously sends an announce message to the PTP domain when clock synchronization is not completed. For example, the description will be given by taking the case where the normal clock 5 shown in fig. 3 newly joins the PTP domain as an example:

referring to fig. 3, fig. 3 illustrates a third exemplary structural block diagram of time synchronization in the conventional PTP domain according to the embodiment of the present invention, and as shown in fig. 3, before the clock synchronization is not completed, the common clock 5 may send an announce message according to a certain period, and after receiving the announce message from the common clock 5, the transparent clock may correct its delay and forward the corrected announce message through other PTP ports. And when the common clock 1, the common clock 2, the boundary clock 1 and the boundary clock 2 receive the common clock 5announce message forwarded from the transparent clock, the announce message is considered to be from a new optimal clock and is processed through an optimal master clock algorithm.

And the common clock 5 is replaced by illegal clock equipment, so that the illegal clock equipment is negotiated into a new optimal clock according to the corresponding parameters in the illegal announce message and is synchronized to the common clock 3 and the common clock 4 by the optimal master clock algorithm when the illegal optimal clock attack is started on the whole clock domain by the illegal clock equipment and the common clock 1, the common clock 2, the boundary clock 1 and the boundary clock 2. So far, the whole PTP domain thoroughly loses the clock synchronization with the original optimal clock, and clock conflict is formed.

Based on this, the announce message continuously sent by the newly added device may not only affect the performance of the clock device in the clock domain that has completed clock synchronization, but may also cause clock collision in the whole clock domain.

Based on the above drawbacks, the conventional solutions have two kinds of: in the first scheme, a certain port on the clock synchronization device can be forcedly designated as a slave port and only takes charge of synchronizing the time of the selected optimal clock, specifically, after the clock device port is forcedly designated as the slave port, the port can send delay-req message request time information to the opposite terminal device, receive sync and delay-resp messages sent by the opposite terminal device and discard an announce message; in the second scheme, when the PTP message is transmitted, a specific field is encrypted into encrypted information and then transmitted, after receiving the PTP message containing the encrypted information, the opposite terminal decrypts the encrypted information and judges the encrypted information, if the information is processed reasonably, the opposite terminal directly discards the PTP message if the information is illegal.

The two schemes have corresponding defects, for the scheme I, after the clock equipment port is forcedly designated as the slave port, the clock equipment port cannot be switched to the master port and the passive port, the flexibility of the clock synchronization network is lost, and any change of the PTP domain cannot be responded completely. Meanwhile, the announce message is discarded, so that the slave port cannot acquire the clock information of the opposite terminal, and only the time of the opposite terminal can be synchronized; for the scheme II, if the PTP message is to be encrypted, all clock devices and the optimal clock of the whole PTP domain are required to support the encryption mode, so that the difficulty of the clock devices in processing the PTP message is increased, and meanwhile, the compatibility of the low-version clock devices is influenced.

Based on this, the embodiment of the invention provides a PTP clock synchronization method to solve the above problems.

Referring to fig. 4, fig. 4 is a block diagram illustrating an exemplary configuration of a PTP system 100 according to an embodiment of the invention, and as shown in fig. 4, the PTP system 100 includes a transparent clock 110, a plurality of clock devices 120, and a plurality of best clocks 130, each best clock 130 is communicatively connected to the transparent clock, and the transparent clock is communicatively connected to each clock device.

Each of the optimal clocks 130 is configured to send an announce message to the transparent clock, so that the transparent clock forwards the announce message to the clock device.

The transparent clock is configured to receive the any report sent by the master port of each optimal clock 130, and forward all the any report to each clock device.

The clock device is configured to receive the anonance messages forwarded by the transparent clock, and process all the anonance messages through an optimal master clock algorithm, so as to select one optimal clock 130 from the optimal clocks 130 for clock synchronization.

Based on the PTP system 100, an embodiment of the present invention further provides a clock device 120, referring to fig. 5, fig. 5 shows an exemplary block diagram of the clock device 120 provided by the embodiment of the present invention, as shown in fig. 1, the clock device 120 includes: the memory 1201, the processor 1202 and the communication interface 1203 are electrically connected directly or indirectly to each other, so as to realize data transmission or interaction. For example, the components may be electrically connected to each other via one or more communication buses or signal lines.

The memory 1201 may be used to store software programs and modules, and the processor 1202 performs various functional applications and data processing by executing the software programs and modules stored in the memory 1201. The communication interface 1203 may be used to communicate signaling or data with other node devices.

The Memory 1201 may be, but is not limited to, random access Memory (Random Access Memory, RAM), read Only Memory (ROM), programmable Read Only Memory (Programmable Read-Only Memory, PROM), erasable Read Only Memory (Erasable Programmable Read-Only Memory, EPROM), electrically erasable programmable Read Only Memory (Electric Erasable Programmable Read-Only Memory, EEPROM), etc.

The processor 1202 may be an integrated circuit chip with signal processing capabilities. The processor 1202 may be a general-purpose processor including a central processing unit (Central Processing Unit, CPU), a network processor (Network Processor, NP), etc.; but also digital signal processors (Digital Signal Processing, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

Next, with the clock device 120 of the PTP system 100 as an execution body, an exemplary description is given of a PTP clock synchronization method provided by the embodiment of the invention, and referring to fig. 6, fig. 6 shows a flowchart of a PTP clock synchronization method provided by the embodiment of the invention.

As shown in fig. 6, the above-mentioned PTP clock synchronization method is applied to a clock device 120 in a PTP system 100, where the clock device 120 has pre-recorded original clock characteristic information, and the PTP system 100 further includes a transparent clock 110 and a plurality of optimal clocks 130, where the original clock characteristic information characterizes clock characteristic information of a master port of a target optimal clock, and the target optimal clock is one of the optimal clocks 130, and the above-mentioned PTP clock synchronization method may include the following steps:

s210, judging whether the clock characteristic information contained in each announce message is consistent with the original clock characteristic information or not according to each announce message received through the transparent clock.

The announce message is forwarded to the clock device from the master port of each optimal clock through the transparent clock.

S220, if so, processing each announce message containing the clock characteristic information consistent with the original clock characteristic information through an optimal master clock algorithm so as to synchronize the clock of the clock equipment with the clock of the target optimal clock.

S230, if not, discarding the announce message.

The steps realize the process of synchronizing the clock of the clock device with the clock of the target optimal clock by using the optimal master clock algorithm after judging the validity of the received annunciation message information.

Specifically, step S210 is a process of determining validity of each anonce message received from the transparent clock. Because the original clock characteristic information is pre-stored in the clock equipment, after the clock equipment receives each announce message forwarded by the transparent clock, the method can judge whether the announce message belongs to the announce message sent by the optimal clock or not based on the pre-stored original clock characteristic information and the clock characteristic information carried in the announce message.

It should be noted that, the original clock characteristic information is recorded from the slave port after the clock device completes the clock synchronization in advance, and the process of clock synchronization in advance can be described as follows by way of example:

if the best clock is set to be the best clock one and the best clock two shown in fig. 2, at this time, the best clock one and the best clock two send an announce message through their main ports according to a certain period, and the transparent clock, after receiving the announce message from the best clock one and the best clock two, forwards the corrected time delay to the clock device (for example, the ordinary clock 1, the ordinary clock 2, the boundary clock 1 and the boundary clock 2 in fig. 2) through other PTP ports.

At this time, the common clock 1, the common clock 2, the boundary clock 1 and the boundary clock 2 receive the best clock one and two best clock two and the best clock 1, the common clock 2, the boundary clock 1 and the boundary clock 2 compare the received two best clock messages through the best master clock algorithm when receiving the two best clock two and select the target best clock from the first best clock and the second best clock to perform clock synchronization.

Further, the above-mentioned process of comparing the anonance message is to compare the corresponding parameters of the related clock included in the anonance message. Illustratively, the announce message may include parameter information such as a first priority of the clock, a clock level, a clock precision, a clock stability, and the like. Thus, in the comparison process, the first priority parameter included in the best clock one and two announce messages may be compared first, and if the first priority parameter is the same, the comparison of the clock ranks … may be continued, and so on. For example, if the clock precision included in the best clock one and two anonance messages is higher than the clock precision included in the best clock two anonance messages during the comparison, the best clock one may be selected as the target best clock, at which time the clocks of the normal clock 1, the normal clock 2, the boundary clock 1, the boundary clock 2 will be synchronized with the clock of the best clock one.

Based on the above process, after selecting the target best clock, the clock device records the clock characteristic information of the master port of the target best clock (for example, the original master port unique number, the original master port transmit message port number, the original clock domain unique number and the original best clock hop number, that is, the original clock characteristic information of the target best clock), and when performing step S210, the clock device compares the clock characteristic information contained in each received announce message with the recorded original clock characteristic information, so as to perform corresponding processing according to the comparison result.

In the embodiment of the present invention, after it is determined that the clock characteristic information included in the anonance packet is consistent with the original clock characteristic information, step S220 is continuously performed, where each anonance packet including the clock characteristic information consistent with the original clock characteristic information is processed by an optimal master clock algorithm, and the processing procedure is to compare the received anonance packet by the optimal master clock algorithm, so as to select a target optimal clock from each optimal clock for clock synchronization.

In the embodiment of the present invention, after determining that the clock characteristic information included in the anonance message is inconsistent with the original clock characteristic information, step S230 is continuously performed, where the anonance message is discarded, so as to avoid the burden of the clock device on the device caused by processing the anonance message sent by the non-target optimal clock through the optimal master clock algorithm.

According to the PTP clock synchronization method provided by the embodiment of the invention, the validity of each announce message received through the transparent clock is judged before the optimal master clock algorithm is used, namely whether the clock characteristic information contained in the announce message is consistent with the original clock characteristic information is judged, if so, the processing is carried out, and if not, the processing is carried out, so that the equipment burden caused by the clock equipment to the announce message sent by the non-target optimal clock is effectively reduced, the equipment burden caused by the processing of the optimal master clock algorithm is also avoided, the conflict of the whole network clock caused by malicious clock attack or the unintentional configuration error of a user is avoided, and the support is provided for the stability of the PTP domain clock network.

Alternatively, the target optimal clock may include an optimal master clock and an optimal candidate clock, based on which the specific process of determining the original clock characteristic information may be implemented by:

referring to fig. 7 on the basis of fig. 6, fig. 7 shows a second flowchart of a PTP clock synchronization method according to an embodiment of the present invention, wherein the target optimal clock includes an optimal master clock and an optimal candidate clock, and the PTP clock synchronization method further includes:

s190, comparing the announcing message corresponding to the optimal master clock with the announcing message corresponding to the optimal candidate clock through an optimal master clock algorithm for each announcing message received through the transparent clock, so as to select a target optimal clock from the optimal master clock and the optimal candidate clock for clock synchronization.

S200, recording clock characteristic information of a main port of the target optimal clock contained in the announce message corresponding to the target optimal clock as original clock characteristic information.

The steps realize the process of recording the clock characteristic information of the main port of the target optimal clock after the clock equipment performs clock synchronization with the selected target optimal clock in advance.

For example, if the best master clock and the best alternative clock are based on the best clock one and the best clock two shown in fig. 2, the transparent clock, after receiving the any packet from the best clock one and the best clock two, forwards the delay correction to the clock device through other PTP ports (for example, the normal clock 1, the normal clock 2, the boundary clock 1, and the boundary clock 2 in fig. 2).

At this time, the common clock 1, the common clock 2, the boundary clock 1 and the boundary clock 2 receive the best clock one and two best clock two and the best clock 1, the common clock 2, the boundary clock 1 and the boundary clock 2 compare the received two best clock messages through the best master clock algorithm when receiving the two best clock two and select the target best clock from the first best clock and the second best clock to perform clock synchronization.

Therefore, if the selected target best clock is the best clock one, the clock characteristic information of the master port of the best clock one included in the anonance message corresponding to the best clock one is recorded as the original clock characteristic information.

Optionally, in step S190, the process of comparing the announce message corresponding to the optimal master clock with the announce message corresponding to the optimal candidate clock through the optimal master clock algorithm actually compares the clock parameters included in the respective announce messages to finally select the target optimal clock, and the specific process may be implemented by the following steps:

referring to fig. 7, referring to fig. 8, fig. 8 shows a third flowchart of a PTP clock synchronization method according to an embodiment of the present invention, where the announce message further includes a clock first priority parameter, a clock level, a clock precision parameter, a clock stability parameter, and a clock second priority parameter, and in step S190, the comparing step of comparing, by an optimal master clock algorithm, the announce message corresponding to the optimal master clock with the announce message corresponding to the optimal alternative clock includes:

s191, comparing the first priority parameter in the announce message corresponding to the optimal master clock with the first priority parameter in the announce message corresponding to the optimal candidate clock.

S192, comparing the clock level in the announce message corresponding to the optimal master clock with the clock level in the announce message corresponding to the optimal candidate clock under the condition that the first priority parameter of the optimal master clock is the same as the first priority parameter of the optimal candidate clock.

S193, comparing the clock precision parameter in the announce message corresponding to the optimal master clock with the clock precision parameter in the announce message corresponding to the optimal candidate clock under the condition that the clock level of the optimal master clock is the same as the clock level of the optimal candidate clock.

S194, comparing the clock stability parameter in the announce message corresponding to the optimal master clock with the clock stability parameter in the announce message corresponding to the optimal candidate clock under the condition that the clock precision parameter of the optimal master clock is the same as the clock precision parameter of the optimal candidate clock.

S195, comparing the clock second priority parameter in the announce message corresponding to the optimal master clock with the clock second priority parameter in the announce message corresponding to the optimal candidate clock under the condition that the clock stability parameter of the optimal master clock is the same as the clock stability parameter of the optimal candidate clock.

The above steps realize the process of comparing the clock parameter in the announce message corresponding to the optimal master clock with the clock parameter in the announce message corresponding to the optimal alternative clock through the optimal master clock algorithm.

In the above-described process of comparing the clock parameters, if a certain clock parameter is different, it is only necessary to select the best clock parameter from the clock parameters corresponding to the best master clock and the best candidate clock as the best target clock (for example, if the clock precision parameters of the best master clock and the clock precision parameters of the best candidate clock are different, the corresponding best clock with higher clock precision is selected as the best target clock).

Furthermore, the clock device is further provided with a local clock, and before the comparing process, after the clock device receives the announce message corresponding to the optimal master clock, the clock parameter contained in the announce message is compared with the clock parameter of the local clock.

Since each of the best clocks is manually configured with a static assignment for the administrator, in order to avoid the problem that clock collision may occur in the clock domain due to the clock parameters of the local clock of the clock device being better than those of each of the best clocks during the comparison (e.g., the problem of clock collision caused when the normal clock 5 newly joins the PTP domain as shown in fig. 3 above). Therefore, the administrator will generally set the clock parameter of one of the best clocks to be the highest in the clock domain, so that in the process of selecting the target best clock, only the announce message corresponding to each best clock needs to be compared.

In addition, if the administrator does not set the clock parameter of one of the best clocks to be the highest in the clock domain in advance, and the clock parameter of the local clock of the clock device is better than the clock parameter of each best clock in the comparing process, when the clock device is selected as the target best clock, the administrator needs to disconnect each originally set best clock to avoid the problem of clock collision in the clock domain.

Optionally, the specific process of determining whether the clock characteristic information included in the anonance message and the original clock characteristic information are consistent in step S210 may be implemented by the following steps:

referring to fig. 9 on the basis of fig. 7, fig. 9 shows a fourth flowchart of a PTP clock synchronization method provided by the embodiment of the invention, and the step of determining whether the clock characteristic information included in the announce message and the original clock characteristic information are consistent in step S210 includes:

s211, judging whether the unique number of the main port in the announce message is consistent with the unique number of the original main port.

S212, if so, judging whether the port number of the main port sending message in the announce message is consistent with the port number of the original main port sending message.

S213, if yes, judging whether the unique clock domain number in the anonance message is consistent with the unique clock domain number.

S214, if so, judging whether the optimal clock hop count in the anonance message is consistent with the original optimal clock hop count.

S215, if yes, judging that the clock characteristic information contained in the anonance message is consistent with the original clock characteristic information.

S216, if the unique number of the main port in the announce message is inconsistent with the unique number of the original main port, or the port number of the main port sending message in the announce message is inconsistent with the port number of the original main port sending message, or the unique number of the clock domain in the announce message is inconsistent with the unique number of the original clock domain, or the optimal clock hop count in the announce message is inconsistent with the original optimal clock hop count, judging that the clock characteristic information and the original clock characteristic information contained in the announce message are inconsistent.

The steps realize the process of judging whether the clock characteristic information contained in the anonance message is consistent with the original clock characteristic information.

It should be noted that, if the unique number (Clock Identity) of the master port in the announce message is inconsistent with the unique number of the original master port, the state of the pre-selected target optimal Clock may be considered to be changed; if the port number (Source Port Identity) of the main port sending message in the announce message is inconsistent with the port number of the original main port sending message, the connection state of the preselected target optimal clock and the clock device can be considered to be changed; if the unique clock domain number (Grandmaster Clock Identity) in the anonance message is inconsistent with the unique clock domain number, then the target optimal clock of the clock domain can be considered to be changed; if the optimal clock hops (Local Steps Removed) in the anonance message do not match the original optimal clock hops, then the clock domain topology is considered to be changed.

Based on the above state, the received anonance message needs to be discarded later.

Optionally, if the current clock domain fails, for example, the target best clock is disconnected, or the clock information of the target best clock (i.e., the clock feature information of the master port of the target best clock) changes, based on the determination logic from step S210 to step S230, the clock device will not continuously receive the announce message originally from the target best clock, and at this time, a corresponding process needs to be performed to synchronize the clock device with the new target best clock, so that the whole clock network remains stable. Based on this, the above specific process can be realized by the following steps:

referring to fig. 10 on the basis of fig. 7, fig. 10 shows a fifth flowchart of a PTP clock synchronization method according to an embodiment of the invention, where the PTP clock synchronization method further includes:

s240, deleting the recorded original clock characteristic information under the condition that an announce message corresponding to the target optimal clock forwarded by the transparent clock is not acquired within preset time.

S250, judging the state of the target optimal clock.

S260, processing the announce messages of the other best clocks except the target best clock through the best master clock algorithm for each announce message currently received through the transparent clock under the condition that the target best clock is disconnected, so as to reselect the target best clock from the best master clock and the best alternative clock for clock synchronization.

S270, comparing the announcing message corresponding to the optimal main clock with the announcing message corresponding to the optimal alternative clock through the optimal main clock algorithm for each announcing message received through the transparent clock under the condition that the clock characteristic information of the main port of the target optimal clock is changed, so as to reselect the target optimal clock from the optimal main clock and the optimal alternative clock for clock synchronization.

The steps realize the process of deleting the recorded original clock characteristic information and reselecting the target optimal clock to perform clock synchronization under the condition that the current clock domain fails.

Illustratively, if the best clock is set to be the first best clock and the second best clock shown in fig. 2, and the target best clock selected in step S190 is the first best clock, two cases when the clock domain fails are illustrated:

in the first case, when the best clock is disconnected, the transparent clock will not forward the original anonance message from the best clock, and the clock device will delete the recorded original clock characteristic information of the best clock when the original anonance message from the best clock is not received continuously, and process the received anonance messages in all PTP domains (i.e. process the anonance message of the best clock except the best clock through the best master clock algorithm). At this time, the optimal clock two is determined to be the target optimal clock in the PTP domain by the optimal master clock algorithm, and all clock devices in the whole PTP domain complete clock synchronization with the optimal clock two.

In the second case, when the clock characteristic information of the master port of the best clock one is changed, for example, an administrator manually modifies the configuration of the best clock one, and at this time, the clock characteristic information carried in the anonance message sent by the best clock one is also changed.

Further, the clock device may determine that the clock characteristic information included in the anonce message is inconsistent with the original clock characteristic information according to the determination logic from step S210 to step S230 after receiving the anonce message with the changed clock characteristic information, and then continuously discard the anonce message, and determine that the original clock characteristic information of the recorded optimal clock one is deleted after the original anonce message from the optimal clock one is continuously received, and process the anonce message received in all PTP domains (i.e. compare the anonce message corresponding to the optimal clock one with the anonce message corresponding to the optimal clock two through the optimal master clock algorithm). At this time, the optimal clock one is determined to be the target optimal clock in the PTP domain by the optimal master clock algorithm, and all clock devices in the whole PTP domain are re-synchronized with the clock of the optimal clock one.

In the embodiment of the invention, under the condition that the clock network is changed, the locking of the original selected target optimal clock can be flexibly released by the PTP clock synchronization method, so that the new clock network topology is converged and the reselected target optimal clock is synchronized, and the PTP clock synchronization method plays a further supporting role in the stable operation of the clock network.

Based on the same inventive concept, the embodiment of the present application further provides a PTP system 100, as shown in fig. 4, the PTP system 100 includes a transparent clock 110, a plurality of clock devices 120, and a plurality of optimal clocks 130, each optimal clock 130 is communicatively connected to the transparent clock 110, and the transparent clock 110 is communicatively connected to each clock device 120.

Each clock device 120 has pre-recorded original clock characteristic information, where the original clock characteristic information characterizes clock characteristic information of a master port of a target best clock, and the target best clock is one of the best clocks 130.

Each of the optimal clocks 130 is configured to send an announce message to the transparent clock 110, such that the transparent clock 110 forwards the announce message to the clock device.

The transparent clock 110 is configured to receive the any packet sent by the master port of each optimal clock 130, and forward all the any packets to each clock device 120.

Each clock device 120 is configured to implement the PTP clock synchronization method provided in the foregoing embodiments and/or possible implementations in combination with the foregoing embodiments, so as to synchronize the clock of each clock device 120 with the clock of the target optimal clock.

Optionally, each clock device includes a CPU and a PTP port, and the original clock characteristic information is recorded in the PTP port in advance, and the PTP port is connected with the CPU in a communication manner.

The CPU is used for judging whether the clock characteristic information contained in each announce message is consistent with the original clock characteristic information or not according to each announce message received by the PTP port through the transparent clock. The announce message is forwarded to the clock device from the master port of each optimal clock through the transparent clock.

If so, processing the announce message corresponding to the clock characteristic information consistent with the original clock characteristic information through an optimal master clock algorithm so as to synchronize the clock of the clock equipment with the clock of the target optimal clock.

If not, discarding the announce message.

The PTP port is used for recording clock characteristic information of a main port of the target optimal clock contained in the announce message corresponding to the target optimal clock, and the clock characteristic information is used as original clock characteristic information.

Optionally, the PTP port is further configured to delete the recorded original clock characteristic information when the announce message corresponding to the target optimal clock forwarded by the transparent clock is not acquired within a preset time.

It should be noted that the PTP system can be applied to a network environment with high time synchronization accuracy requirements between ethernet devices, such as a mobile bearer network and a broadcast television network. The PTP clock synchronization method applied to each clock device in the PTP system reduces the load of the CPU of each clock device and prevents clock collision.

Based on the same inventive concept, embodiments of the present invention also provide a computer-readable storage medium having stored thereon a computer program which, when executed by the processor 1202, implements the PTP clock synchronization method provided in the above embodiments.

The steps executed when the computer program runs are not described in detail herein, and reference may be made to the explanation of the PTP clock synchronization method.

In the several embodiments provided in this application, it should be understood that the disclosed systems and methods may be implemented in other ways as well. The system embodiments described above are merely illustrative, for example, of the flowcharts and block diagrams in the figures that illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

In addition, functional modules in the embodiments of the present invention may be integrated together to form a single part, or each module may exist alone, or two or more modules may be integrated to form a single part.

The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (10)

1. The PTP clock synchronization method is characterized by being applied to clock equipment in a PTP system, wherein the clock equipment is pre-recorded with original clock characteristic information, the PTP system further comprises a transparent clock and a plurality of optimal clocks, the original clock characteristic information represents clock characteristic information of a main port of a target optimal clock, and the target optimal clock is one of the optimal clocks;

the method comprises the following steps:

judging whether clock characteristic information contained in each announce message is consistent with the original clock characteristic information or not according to each announce message received through the transparent clock; the announce message is forwarded to the clock device from the main port of each optimal clock through the transparent clock;

if yes, processing each announce message containing clock characteristic information consistent with the original clock characteristic information through an optimal master clock algorithm so as to synchronize the clock of the clock equipment with the clock of the target optimal clock;

if not, discarding the announce message.

2. The PTP clock synchronization method of claim 1, wherein the target optimal clock includes an optimal master clock and an optimal alternate clock;

The method further comprises the steps of:

comparing each announce message received through the transparent clock with the announce message corresponding to the optimal master clock through an optimal master clock algorithm to select a target optimal clock from the optimal master clock and the optimal candidate clock for clock synchronization;

and recording clock characteristic information of a main port of the target optimal clock contained in the announce message corresponding to the target optimal clock as original clock characteristic information.

3. The PTP clock synchronization method of claim 2, wherein the announce message further includes a clock first priority parameter, a clock level, a clock precision parameter, a clock stability parameter, and a clock second priority parameter;

the step of comparing the announce message corresponding to the optimal master clock with the announce message corresponding to the optimal candidate clock through an optimal master clock algorithm includes:

comparing a first priority parameter in the announce message corresponding to the optimal master clock with a first priority parameter in the announce message corresponding to the optimal candidate clock;

Comparing the clock level in the announce message corresponding to the optimal master clock with the clock level in the announce message corresponding to the optimal candidate clock under the condition that the first priority parameter of the optimal master clock is the same as the first priority parameter of the optimal candidate clock;

comparing the clock precision parameter in the announce message corresponding to the optimal master clock with the clock precision parameter in the announce message corresponding to the optimal candidate clock under the condition that the clock level of the optimal master clock is the same as the clock level of the optimal candidate clock;

comparing the clock stability parameter in the announce message corresponding to the optimal master clock with the clock stability parameter in the announce message corresponding to the optimal candidate clock under the condition that the clock precision parameter of the optimal master clock is the same as the clock precision parameter of the optimal candidate clock;

and comparing the clock second priority parameter in the announce message corresponding to the optimal master clock with the clock second priority parameter in the announce message corresponding to the optimal candidate clock under the condition that the clock stability parameter of the optimal master clock is the same as the clock stability parameter of the optimal candidate clock.

4. The PTP clock synchronization method of claim 2, wherein the original clock characteristic information includes an original master port unique number, an original master port transmit message port number, an original clock domain unique number, and an original optimal clock hop count;

the step of judging whether the clock characteristic information contained in the anonance message is consistent with the original clock characteristic information comprises the following steps:

judging whether the unique number of the main port in the announce message is consistent with the unique number of the original main port;

if yes, judging whether the port number of the message sent by the main port in the announce message is consistent with the port number of the message sent by the original main port;

if yes, judging whether the unique clock domain number in the anonance message is consistent with the unique clock domain number of the original clock domain;

if yes, judging whether the optimal clock hop count in the anonance message is consistent with the original optimal clock hop count;

if yes, judging that the clock characteristic information contained in the anonance message is consistent with the original clock characteristic information;

if the unique number of the main port in the announce message is inconsistent with the unique number of the original main port, or the port number of the main port sending message in the announce message is inconsistent with the port number of the original main port sending message, or the unique number of the clock domain in the announce message is inconsistent with the unique number of the original clock domain, or the optimal clock hop count in the announce message is inconsistent with the optimal clock hop count, judging that the clock characteristic information and the original clock characteristic information contained in the announce message are inconsistent.

5. The PTP clock synchronization method of claim 2, further comprising:

deleting the recorded original clock characteristic information under the condition that the announce message corresponding to the target optimal clock forwarded by the transparent clock is not acquired within preset time;

judging the state of the target optimal clock;

under the condition that the target optimal clock is disconnected, processing the announce messages of the optimal clocks except the target optimal clock through an optimal master clock algorithm aiming at each announce message currently received through the transparent clock so as to reselect a target optimal clock from the optimal master clock and an optimal alternative clock for clock synchronization;

and under the condition that the clock characteristic information of the main port of the target optimal clock is changed, comparing the announce message corresponding to the optimal main clock with the announce message corresponding to the optimal alternative clock through an optimal main clock algorithm for each announce message received through the transparent clock so as to reselect the target optimal clock from the optimal main clock and the optimal alternative clock for clock synchronization.

6. A PTP system comprising a transparent clock, a plurality of clock devices and a plurality of optimal clocks, each of said optimal clocks being communicatively coupled to a transparent clock, said transparent clock being communicatively coupled to each of said clock devices;

each clock device is pre-recorded with original clock characteristic information, the original clock characteristic information represents clock characteristic information of a target optimal clock master port, and the target optimal clock is one of the optimal clocks;

each optimal clock is used for sending an announce message to the transparent clock so that the transparent clock forwards the announce message to the clock equipment;

the transparent clock is used for receiving the announce messages sent by the main ports of the optimal clocks and forwarding all the announce messages to the clock devices;

each of the clock devices is configured to perform the PTP clock synchronization method of any of claims 1-5 to synchronize the clock of each of the clock devices with the clock of the target optimal clock.

7. The PTP system of claim 6, wherein each of the clock devices includes a CPU and a PTP port, wherein the original clock characteristic information is pre-recorded in the PTP port, wherein the PTP port is communicatively connected to the CPU;

The CPU is used for judging whether the clock characteristic information contained in each announce message is consistent with the original clock characteristic information or not according to each announce message received by the PTP port through the transparent clock; the announce message is forwarded to the clock device from the main port of each optimal clock through the transparent clock;

if so, processing the announce message corresponding to the clock characteristic information consistent with the original clock characteristic information through an optimal master clock algorithm so as to synchronize the clock of the clock equipment with the clock of the target optimal clock;

if not, discarding the announce message;

the PTP port is configured to record clock characteristic information of a master port of the target optimal clock included in the announce packet corresponding to the target optimal clock, as original clock characteristic information.

8. The PTP system of claim 7, wherein the PTP port is further configured to delete the recorded original clock characteristic information if the announce message corresponding to the target optimal clock forwarded by the transparent clock is not acquired within a preset time.

9. A clock device comprising a memory and a processor;

The memory is used for storing a computer program;

the processor is configured to execute the computer program to implement the PTP clock synchronization method of any of claims 1-5.

10. A computer readable storage medium having stored thereon a computer program, wherein the computer program when executed by a processor implements the PTP clock synchronization method of any of claims 1-5.

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