CN116366581A - Data transmission method and related equipment - Google Patents

Data transmission method and related equipment Download PDF

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Publication number
CN116366581A
CN116366581A CN202111615295.XA CN202111615295A CN116366581A CN 116366581 A CN116366581 A CN 116366581A CN 202111615295 A CN202111615295 A CN 202111615295A CN 116366581 A CN116366581 A CN 116366581A
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China
Prior art keywords
path
packet
message
buffer area
sending
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CN202111615295.XA
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Chinese (zh)
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尹华云
向平
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to CN202111615295.XA priority Critical patent/CN116366581A/en
Publication of CN116366581A publication Critical patent/CN116366581A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/35Switches specially adapted for specific applications
    • H04L49/351Switches specially adapted for specific applications for local area network [LAN], e.g. Ethernet switches
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/65Re-configuration of fast packet switches

Abstract

The embodiment of the application discloses a data transmission method and related equipment so as to realize lossless switching of paths. The method of the embodiment of the application is applied to the packet sending equipment. A method of data transmission comprising: and processing the Ethernet message to obtain a first message packet and a second message packet which are sequentially arranged. And placing the first message packet into a first buffer area corresponding to the first path, and placing the second message packet into a second buffer area corresponding to the second path. And after all the first message packets in the first buffer area are sent out through the first path, sending second message packets in the second buffer area through the second path.

Description

Data transmission method and related equipment
Technical Field
The embodiment of the application relates to the field of communication, in particular to a data transmission method and related equipment.
Background
In a communication network, a transmitting device is used to group ethernet packets and transmit the packets through corresponding paths. During packet transmission, path switching may be required. After receiving the path switching instruction, the transmitting device switches the transmission path of the message packet from the original path to a new path.
However, after the path is switched, the packet to be transmitted in the buffer area on the original path cannot be transmitted, so that the packet is lost.
Disclosure of Invention
The embodiment of the application provides a data transmission method and related equipment so as to realize lossless switching of paths.
In a first aspect, an embodiment of the present application provides a data transmission method. The method is applied to a transmitting device. The method comprises the following steps: the transmitting device processes the Ethernet message to obtain a first message packet and a second message packet which are sequentially arranged. The sending device comprises a first buffer area and a second buffer area. After the first message packet and the second message packet are obtained, the sending device places the first message packet in a first buffer area corresponding to the first path, and places the second message packet in a second buffer area corresponding to the second path. And then, the transmitting equipment transmits all the first message packets in the first buffer area through the first path, and then transmits the second message packets in the second buffer area through the second path.
In the data transmission method described in the embodiment of the present application, the switching of the transmission path is made later than the switching of the buffer (the buffer into which the packet is switched). By delaying switching the transmission path, sufficient time is provided for transmission of the buffered packets on the original path. The method ensures that all the cached message packets on the original path can be sent out, thereby ensuring the data integrity of the message packet transmission. And a first message packet with earlier sequencing in the message packets is placed in the first buffer area, and a second message packet with later sequencing in the message packets is placed in the second buffer area. By delaying switching the transmission path, it is ensured that the second packet with the later ordering is sent out later than the first packet with the earlier ordering. Therefore, the front and back time sequences of the message packet are ensured in the path switching process, so that the message packet is not sent out of order.
In the embodiment of the present application, the ethernet packet is also referred to as an ethernet data stream (packet), which is not limited in this application.
In this embodiment of the present application, the buffer area corresponding to the path is a buffer area on the sending device allocated for the path in the path configuration process. And placing the data into a certain buffer area, and then subsequently transmitting the data through a path corresponding to the buffer area.
In an alternative implementation, the first delay of the first path is greater than the second delay of the second path. The sending device sends all the first messages in the first buffer area through the first path, and then sends the second message packet in the second buffer area through the second path, which specifically includes: after the sending device sends all the first packet messages in the first buffer area through the first path, waiting for a first time length, and then sending the second packet in the second buffer area through the second path. Wherein the first time period is greater than or equal to a difference between the first time delay and the second time delay. Due to the fact that the first time length is greater than or equal to the time delay difference of the two paths, the implementation mode can ensure that after all first packets with earlier sequences reach the receiving device, second packets with later sequences reach the receiving device. Thereby ensuring that the message packets arrive in sequence at the receiving equipment, and ensuring that the message packets received by the receiving equipment are not out of sequence.
In an alternative implementation, before the sending device sends all the first packets in the first buffer area through the first path, the sending device measures the first delay and the second delay, and determines the first time length according to the first delay and the second delay. The sending device may obtain the instant first time delay and the instant second time delay by measuring, so that the determined first time length is more matched with the current network state. Under the condition of network state fluctuation, according to the first time length determined by the time delay measured in time, the receiving equipment can be ensured to receive the message packet in sequence (the network state fluctuation possibly causes the difference between the first time delay and the second time delay to be large, and the first time length is ensured to be enough by measuring the latest time delay of the path); and the delay of the first received packet and the second packet of the receiving device is prevented from being too long (the fluctuation of the network state may cause the difference between the first delay and the second delay to be small), and the latest delay of the measuring path ensures that the first delay is not too long.
In an alternative implementation, before the sending device sends all the first packets in the first buffer area through the first path, the sending device receives the indication information of the first duration from the control device. The first duration is determined by the control device, so that the time delay of the first path and the second path is not required to be measured by the sending device, and the computational power consumption of the sending device is saved. And, the time taken for the transmitting device to measure the delay is long, resulting in a long time to determine the first time. And the first time length is acquired through the control equipment, so that the temporary measurement of the path delay is not needed. The time delay for acquiring the first duration can be reduced, so that the time delay for transmitting the second message packet is reduced.
Alternatively, the control device may be a network management device. In the embodiment of the present application, the control device may also be a controller, for example: the network control engine (network control engine) is not limited in this application.
In an alternative implementation, the first delay of the first path is less than the second delay of the second path. The sending device sends all the first packets in the first buffer area through the first path, and then sends the second packets in the second buffer area through the second path, which specifically includes: and the sending equipment sends out all the first message packets in the first buffer area through the first path, and then immediately sends out the second message packets in the second buffer area through the second path. The first message packet is sent out completely and the second message packet is sent out, so that waiting is not performed any more, and the sending time delay of the second message packet can be reduced. And the calculation is not needed for the sending time of the second message packet, so that the calculation power consumed by the second message packet sending equipment is saved.
In an alternative implementation, the transmitting device includes a circuit board. The sending device sends all the first packets in the first buffer area through the first path, and then sends the second packets in the second buffer area through the second path, which specifically includes: the transmitting device transmits a first message packet through a port or a time slot corresponding to a first path on the circuit board. After all the first message packets in the first buffer area are sent out, the sending device sends second message packets through ports or time slots corresponding to the second paths on the circuit board. The method of the embodiment of the application realizes the lossless switching of the path through the transmitting equipment, and the circuit board is not required to have the lossless switching capability. Namely, the transmitting device is matched with a circuit board which does not have lossless switching capability to transmit data, and can realize lossless switching of paths. Compared with the prior art, the method has the advantages that the nondestructive switching of the paths is realized through the circuit board, and the requirements on the circuit board are reduced.
In the case that the first path and the second path correspond to different circuit boards, the embodiment of the application sends the first packet through a port or a time slot corresponding to the first path on the circuit board. In the prior art, path switching is performed after a path fails, so that a message packet after the failure and before the path switching is lost. By delaying the path switching and switching the buffer area, the embodiment of the application ensures that the message packet can be transmitted, thereby realizing the lossless path switching on different circuit boards.
In an alternative implementation, the circuit board includes: an optical service unit (optical service unit, OSU) board, a synchronous digital hierarchy (synchronous digital hierarchy, SDH) board, a flexible ethernet (flexible ethernet, flexE) board or a packet board. Corresponding to different types of circuit boards, the embodiment of the application realizes the lossless switching of the paths of the optical transport network (optical transport network, OTN) paths (the circuit board is an OSU circuit board), the SDH paths (the circuit board is an SDH circuit board), the FlexE paths (the circuit board is a FlexE circuit board) or the packet message paths (the circuit board is a packet circuit board).
In an alternative implementation, after the sending device places the first packet into the first buffer area corresponding to the first path, the sending device stops placing data into the first buffer area. Thereby ensuring that the subsequently generated message packets are all placed in the second buffer area and ensuring the integrity of the message packets transmitted after the path switching.
In an alternative implementation, after all the first packets are sent out, there are no more buffered packets in the first buffer. Therefore, after the sending device sends out all the first messages in the first buffer area through the first path, the sending device deletes the configuration information of the first path. The configuration information of the first path is used for indicating the sending equipment to send the message packet of the Ethernet message through the first path. Thereby releasing the resources corresponding to the first path and realizing the recovery of the resources of the first path.
In an alternative implementation, before the sending device sends the second packet in the second buffer through the second path, the sending device sets the sending rate of the second path to zero, or blocks the second path. The sending device sends the second packet in the second buffer through the second path, which specifically may include: the transmitting device sets the transmission rate of the second path to the bandwidth of the second path or unblocks the second path. By controlling the sending rate or blocking state of the second path, the second path is ensured not to transmit the message packets in the second buffer area before all the first message packets in the first buffer area are sent out, so that the message packets transmitted in the first path and the second path are ensured not to be disordered.
In an alternative implementation, the bandwidth of the second path is greater than the bandwidth of the first path; and/or the delay of the second path is smaller than the delay of the first path; and/or the quality of service (quality of service, qos) level of the second path is higher than the Qos level of the first path. Compared with the first path, the second path has larger bandwidth and/or smaller time delay and/or higher Qos level, thereby realizing lossless switching to the better path.
In a second aspect, an embodiment of the present application provides a transmitting device, including a processor and a transceiver unit. Wherein the processor is configured to: and processing the Ethernet message to obtain a first message packet and a second message packet which are sequentially arranged. And placing the first message packet into a first buffer area corresponding to the second path, and placing the second message packet into a second buffer area corresponding to the second path. The receiving and transmitting unit is used for: and after all the first message packets in the first buffer area are sent out through the first path, sending second message packets in the second buffer area through the second path. The packet transmission device of the second aspect is configured to implement the method of the first aspect or any implementation of the first aspect.
In a third aspect, embodiments of the present application provide a transmitting device including a processor and a memory, the processor being coupled to the memory. Wherein the memory is used for storing programs. The processor is configured to execute a program in the memory, such that the processor performs the method according to the first aspect or any implementation of the first aspect.
In a fourth aspect, embodiments of the present application provide a data transmission method, where the method is applied to a receiving device. The method comprises the following steps: the receiving device acquires target information including configuration information of the second path. Then, the receiving device receives the first packet through the first path and receives the second packet through the second path according to the target information. The first message packet and the second message packet are sequentially arranged message packets obtained by processing the Ethernet message.
In an alternative implementation, the receiving device may also obtain the target time information. The actions of the receiving device for receiving the first packet through the first path and receiving the second packet through the second path may specifically include: the receiving device acquires the target time information, receives the first message packet through the first path, and receives the second message packet through the second path from the target time.
In a fifth aspect, embodiments of the present application provide a receiving apparatus. The receiving device comprises a processor and a transceiver unit. Wherein the processor is configured to: and acquiring target information, wherein the target information comprises configuration information of the second path. The receiving and transmitting unit is used for: and receiving the first message packet through the first path and the second message packet through the second path according to the target information. The first message packet and the second message packet are sequentially arranged message packets obtained by processing the Ethernet message. The receiving device of the fifth aspect is configured to implement the method of the fourth aspect or any implementation manner of the fourth aspect.
In a sixth aspect, embodiments of the present application provide a receiving apparatus. The receiving device includes a processor and a memory. The processor is coupled to the memory. Wherein the memory is used for storing programs. The processor is configured to execute a program in the memory, such that the processor performs the method according to the fourth aspect or any implementation of the fourth aspect.
In a seventh aspect, embodiments of the present application provide a communication system. The communication system includes the transmitting device according to the second or third aspect, and the receiving device according to the fifth or sixth aspect.
In an eighth aspect, embodiments of the present application provide a chip. The chip is connected to a memory for reading and executing the program code stored in the memory to implement the method of the first aspect, any implementation manner of the first aspect, the fourth aspect or any implementation manner of the fourth aspect.
In a ninth aspect, embodiments of the present application provide a computer program product. When the computer program product is executed on a computer, the computer performs the method of the first aspect, any implementation manner of the first aspect, the fourth aspect or any implementation manner of the fourth aspect.
In a tenth aspect, embodiments of the present application provide a computer storage medium. The computer storage medium has a program stored therein which, when executed by a computer, performs the method of the first aspect, any implementation manner of the first aspect, the fourth aspect or any implementation manner of the fourth aspect.
Advantageous effects of the second to tenth aspects referring to the first aspect, the description thereof will not be repeated here.
Drawings
FIG. 1 is a diagram of a communication system architecture of the present application;
FIG. 2 is a diagram of an OTN architecture of the present application;
fig. 3 is a schematic hardware structure of a communication device provided in the present application;
fig. 4 is a schematic flow chart of a data transmission method according to an embodiment of the present application;
FIG. 5 is a schematic diagram of the packet flow according to the embodiment shown in FIG. 4;
FIG. 6 is a schematic diagram of packet flow within the sending device in the embodiment shown in FIG. 4;
fig. 7 is a flow chart of an extended data transmission method provided in an embodiment of the present application;
FIG. 8 is a diagram illustrating the packet flow according to the embodiment of FIG. 7;
fig. 9 is a schematic flow chart of a receiving device of a data transmission method according to an embodiment of the present application;
fig. 10 is a schematic structural diagram of a communication device according to an embodiment of the present application.
Detailed Description
The embodiment of the application provides a data transmission method and related equipment so as to realize lossless switching of paths.
Fig. 1 is a schematic diagram of a communication system according to an embodiment of the present application. As shown in fig. 1, the communication system includes a transmitting apparatus 10a, a receiving apparatus 10b, and a transmitting apparatus 20. The transmitting device 10a is configured to group the ethernet packet to obtain a packet, and transmit the packet. The transmitting device 20 is configured to receive the packet sent by the sending device and forward the packet to the receiving device 10b.
Alternatively, in addition to transmitting the packet, the transmitting apparatus 10a may perform encapsulation processing on the packet to obtain encapsulated data, and transmit the encapsulated data to the receiving apparatus 10b through the transmitting apparatus 20. Alternatively, the encapsulated data may be an OTN frame, an SDH frame, or a FlexE frame, which is not limited in this application.
Alternatively, the transmission device 20 may be an optical amplifier (optical amplifier, OA), an optical add-drop multiplexer (OADM), or the like, which is not limited in this application. Between the transmitting device 10a and the receiving device 10b, one or more transmitting devices 20 may be connected, which is not limited in this application.
Alternatively, the transmission device 20 in the communication system may be replaced by an optical fiber. And thus, the packet or the encapsulated data is transmitted through the optical fiber, which is not limited in this application.
Optionally, a control device 30 may be further included in the communication system, where the control device 30 is configured to configure a path between the transmitting device 10a and the receiving device 10 b. Alternatively, the control device may be a network management device or a controller, which is not limited in this application.
Alternatively, the communication system shown in fig. 1 may be an optical transport network OTN. The transmitting device 10a and the receiving device 10b in the OTN are both referred to as OTN devices. The OTN may include a plurality of OTN devices and optical fibers connecting the plurality of OTN devices, and the plurality of OTN devices and optical fibers may be composed of different topology types such as a line type, a ring type, and a mesh type according to specific needs.
Alternatively, the OTN device may include an optical layer device, an electrical layer device, and an opto-electronic hybrid device.
An optical layer device is a device that processes optical layer signals, such as: the optical amplifier OA, the optical add/drop multiplexer OADM, etc., are not limited in this application. OA may also be referred to as optical line amplifiers (optical line amplifier, OLA) for amplifying optical signals to support transmission over greater distances while ensuring specific performance of the optical signals. OADM is used to spatially transform an optical signal so that it may be output from different output ports (sometimes also referred to as directions). Depending on capabilities, OADMs may be classified as Fixed OADMs (FOADMs), configurable OADMs (ROADMs), and the like. Alternatively, the transmission device 20 in fig. 1 may be an optical layer device, which implements transmission of optical signals (e.g., OTN frames).
An electrical layer device is a device that processes electrical layer signals, such as: an apparatus for processing OTN signals. The photoelectric mixing device is a device with the capability of processing optical layer signals and electrical layer signals.
Alternatively, the transmitting device 10a and the receiving device 10b in fig. 1 may be opto-electronic hybrid devices, and the transmitting device 10a performs conversion of an electrical signal (ethernet packet) into an optical signal (for example, encapsulates the ethernet packet into an OTN frame), and transmits the resulting optical signal. The receiving device 10b receives the optical signal and performs conversion of the optical signal (e.g., OTN frame) into an electrical signal (ethernet message).
It should be noted that, depending on the specific integration requirement, one OTN device may integrate a plurality of different functions. The technical scheme provided by the application is suitable for OTN equipment with different forms and integration levels.
Alternatively, the transmitting device 10a, the receiving device 10b, and the transmitting device 20 in fig. 1 may also all be electric layer signals. For enabling packet transparent transmission of electrical signals (ethernet messages).
It should be noted that, in addition to OTN, the data transmission method and related device provided in the embodiments of the present application may also be applied to other networks, for example, packet transport networks (packet transport network, PTN), which are not limited in this application.
Fig. 2 is a schematic hardware structure of a communication device according to an embodiment of the present application. The communication device may be a transmitting device 10a or a receiving device 10b in the communication system shown in fig. 1. The communication device 10 includes a branching board 11, a cross board 12, and a wiring board 13. Optionally, the communication device 10 may further include a power supply 14, a fan 15, an auxiliary board 16, an optical layer processing board (not shown in the figure), and a system control and communication board 17, which is not limited in this application.
If the communication device 10 is an OTN device, the tributary board 11, the cross board 12 and the wiring board 13 may be used to process electrical layer signals of the OTN.
The tributary board 11 is used for implementing reception and transmission of various customer services, such as SDH services, packet services, ethernet services, and forwarding services, among others. Still further, the branching board 11 may be divided into a client-side optical module and a signal processor. The client-side optical module may be an optical transceiver, and is configured to receive and/or transmit service data (also referred to as ethernet packets, ethernet data streams, or packets). The signal processor is used for mapping and demapping the service data to the data frame (e.g. OTN frame).
The cross board 12 is used to implement exchange of data frames, and exchange of one or more types of data frames is completed.
The wiring board 13 mainly realizes processing of the line-side data frame. Specifically, the wiring board 13 may be divided into a line-side optical module and a signal processor. The line-side optical module may be a line-side optical transceiver, and may be configured to receive and/or transmit data frames. The signal processor is used for multiplexing and demultiplexing data frames at the line side or mapping and demapping processing.
Alternatively, the communication device 10 may be used to implement transparent transmission of ethernet packets, and the cross board 12 is used to implement grouping of ethernet packets and switching of packets, and the circuit board 13 is used to implement processing of line-side packets.
In the embodiment of the present application, the circuit board and the tributary board are both referred to as a single board. It should be noted that, according to specific needs, the types and numbers of boards specifically included in each device may be different. For example: the network device as a core node may not have a tributary board 11. There may be a plurality of tributary boards 11 as network devices of the edge node.
In communication device 10, power supply 14 is used to power communication device 10, and may include both primary and backup power supplies. The fan 15 is used to dissipate heat from the device. The auxiliary class board 16 is used to provide auxiliary functions such as external alarms or access to an external clock. The system control and communication class board 17 is used to implement system control and communication. Specifically, information can be collected from different single boards through the back board, or a control instruction can be sent to the corresponding single boards.
It should be noted that, unless specifically stated otherwise, the specific components (e.g., signal processor) may be one or more, and the present application is not limited. It should also be noted that, in the embodiments of the present application, no limitation is imposed on the type of boards included in the device and the functional design and number of the boards.
Fig. 2 is a diagram showing the configuration of a communication device according to an embodiment of the present application, and for convenience in describing the functions of the respective configurations in the transmitting device 10a and the receiving device 10b, the branching board, the crossing board, and the wiring board in the transmitting device 10a are denoted by 11a to 13a, respectively; the branching, crossing and wiring boards in the receiving apparatus 10b are denoted by 11b-13b, respectively.
The communication device 10 shown in fig. 2 may be applied to a communication system such as an OTN, a PTN, or the like, which is not limited in this application.
The device morphology of the communication device shown in fig. 2 may be as shown in fig. 3. The communication device may include a rack, a cross board, and a single board (a bypass board or a circuit board). Wherein the frame includes one or more cross plate slots for carrying cross plates. The rack also comprises a plurality of veneer grooves for bearing veneers (branch boards or circuit boards). And the rack is used for realizing connection among the cross board, the branch board and the circuit board.
The architecture and the device structure of the communication system according to the embodiment of the present application are described above, and the data transmission method provided by the embodiment of the present application is described next. Fig. 4 is a flowchart of a data transmission method according to an embodiment of the present application, where the method includes the following steps.
401. The transmitting device processes the Ethernet message to obtain a first message packet and a second message packet which are sequentially arranged.
The sending device may perform packet processing on the received ethernet packet to obtain a plurality of packet packets. In the ethernet message, the data arrangement has a back-and-forth order. For example, in fig. 5, P1 is arranged earlier than P2. The arrangement order of other data in the ethernet packet is similar, and will not be described again.
Since the arrangement of data in the ethernet packets has a front-to-back order, the ethernet packets are grouped, and the resulting packets also have a front-to-back order. In the embodiment of the application, the first packet is earlier than the second packet. As shown in fig. 5, the ethernet packet includes P1, P2, P3, and P4 arranged in sequence. Wherein, P1, P2, P3 and P4 together constitute a first packet and a second packet.
Alternatively, step 401 may be implemented by cross board 12a in transmitting device 10 a. As shown in fig. 6, the transmitting device 10a receives the ethernet packet through the tributary board 11a, and the cross board 12a may receive the ethernet packet from the tributary board 11 a. The packet forwarding processor in the crossbar board 12a includes packet processing (i.e., the packet processing module in fig. 5), and the crossbar board 12a may perform packet processing on the ethernet packet to obtain a first packet and a second packet that are sequentially arranged.
402. The sending equipment places the first message packet in a first buffer area corresponding to the first path, and places the second message packet in a second buffer area corresponding to the second path.
As shown in fig. 5, the transmitting apparatus 10a further includes a plurality of buffers, and different buffers correspond to different paths. It should be noted that different buffers may be different segments of physical memory on the transmitting device 10 a. The different buffers may also be different physical memories on the transmitting device 10a, which is not limited in this application.
When the first path is configured, a first buffer area is allocated for the first path and used for buffering the message packets sent on the first path. Before the path switching, the transmitting device 10a transmits the packet through the first path, and thus places the packet in the first buffer.
In the case of path expansion, path switching is required. The transmitting device 10a may acquire a path switching instruction from the control device 30, where the path switching instruction is used to instruct the transmitting device 10a to switch the transmission path of the ethernet packet from the first path to the second path. Wherein the bandwidth of the second path is greater than the bandwidth of the first path.
It is noted that path expansion is just one scenario for performing path switching. In addition, the method can also be used for improving the quality of service (Qos) level of the path, reducing the path delay and the like. The present application is not limited in this regard. And the Qos level of the second path is higher and the time delay is smaller in the corresponding scene.
The sending device 10a may establish a second path according to the path switching instruction, and synchronize the configuration information of the first path to the second path, so that the second path replaces the first path to transmit the packet of the ethernet packet. Since the second buffer is allocated for the second path on the transmitting device 10a when the control device 30 configures the second path. The transmitting device 10a therefore places the packet obtained by processing the ethernet packet in the second buffer so as to transmit the packet in the second buffer through the second path.
In the embodiment of the present application, a packet placed in a first buffer area corresponding to a path before switching (a first path) is referred to as a first packet; the packet placed in the second buffer area corresponding to the switched path (second path) is called a second packet.
403. And the sending equipment sends out all the first message packets in the first buffer area through the first path, and then sends out the second message packets in the second buffer area through the second path.
In the case of path switching, the transmitting device 10a does not transmit the packet in the second buffer until the packet in the first buffer is all transmitted in order to ensure that the packet is all transmitted. After all the first packets in the first buffer are sent out, the sending device 10a sends the second packets in the second buffer through the second path. That is, the transmitting device 10a does not transmit the packet in the second buffer until the first buffer is emptied.
Alternatively, step 403 may be implemented by cross board 12a in transmitting device 10 a. The wiring board 13a connected to the cross board 12a on the transmitting apparatus 10a may be an OSU wiring board, an SDH wiring board, a FlexE wiring board, or the like, which is not limited in this application. The following will illustrate the transmission of the first packet and the second packet using the OSU board as an example of the board 13 a.
As shown in fig. 6, when the first path is configured, a corresponding first virtual interface of the first path is configured on the cross board 12a, and a first slot corresponding to the first path is configured on the OSU board. That is, the first path corresponds to the first buffer and the first virtual interface on the cross board 12a, and corresponds to the first slot on the OSU board. Therefore, the cross board 12a sends the first packet in the first buffer area to the first slot on the OSU board through the first virtual interface, so as to send the first packet through the first path. After receiving the first message packet, the OSU circuit board encapsulates the first message packet into an OTN frame and sends out the OTN frame.
Note that, if the circuit board 13a is an SDH circuit board or the like, since different paths are distinguished by interfaces on such circuit boards, the operation of transmitting the packet to the circuit board 13a in step 503 is to transmit the packet to the corresponding interface, which is not limited in this application.
And after all the first message packets in the first buffer area are sent out, sending second message packets in the second buffer area through a second path. The specific process refers to the above description of sending the first packet, and will not be repeated here.
Alternatively, the transmitting device 10a may receive an instruction of the control device 30 and detect the depth of each buffer area based on the instruction. The depth of the buffer area indicates the length of the packet stored in the buffer area. Step 403 is shown in the detection result that the depth of the second buffer area starts to be smaller after the depth of the first buffer area becomes zero.
Alternatively, the occurrence of step 403 may also be detected by a Remote Monitor (RMON). Specifically, the RMON may count the transmitted packets of the ports on the first path and the second path, or count the transmitted packets of the queues corresponding to the first buffer and the second buffer. Step 403 indicates that the count of the transmitted messages on the first path does not increase again after the detection result of the RMON, the count of the transmitted messages on the second path begins to increase.
In the data transmission method described in the embodiment of the present application, the switching of the transmission path is made later than the switching of the buffer (the buffer into which the packet is switched). By delaying switching the transmission path, sufficient time is provided for transmission of the buffered packets on the original path. The method ensures that all the cached message packets on the original path can be sent out, thereby ensuring the data integrity of the message packet transmission. And a first message packet with earlier sequencing in the message packets is placed in the first buffer area, and a second message packet with later sequencing in the message packets is placed in the second buffer area. By delaying switching the transmission path, it is ensured that the second packet with the later ordering is sent out later than the first packet with the earlier ordering. Therefore, the front and back time sequences of the message packet are ensured in the path switching process, so that the message packet is not sent out of order.
The embodiments shown in fig. 4-6 enable the sending device to send packets in sequence. If the delays of the first path and the second path for transmitting the packet are different, the packet sequentially transmitted at the transmitting device may cause disorder when arriving at the receiving device due to the difference between the first delay and the second delay.
In order to solve the problem of disorder when the packet arrives at the receiving device, the embodiment of the application further provides a data transmission method as shown in fig. 7. As shown in fig. 7, the method includes the following steps.
701. The transmitting device processes the Ethernet message to obtain a first message packet and a second message packet which are sequentially arranged.
702. The sending equipment places the first message packet in a first buffer area corresponding to the first path, and places the second message packet in a second buffer area corresponding to the second path.
Steps 701 and 702 refer to steps 401 and 402 of the embodiment shown in fig. 4, which is not limited in this application.
700a, a transmitting device measuring a first delay of a first path and a second delay of a second path; the first path is a path for the sending device to send the first message packet to the receiving device, and the second path is a path for the sending device to send the second message packet to the receiving device.
As shown in fig. 8, the transmission device 20 connecting the transmission device 10a and the reception device 10b may form a plurality of transmission paths. The transmitting device 10a may measure a first delay of the first path and a second delay of the second path. In the embodiment of the present application, the first path and the second path are different paths from the transmitting apparatus 10a to the receiving apparatus 10 b.
Alternatively, the transmitting apparatus 10a may measure the first delay and the second delay through operation, administration, and maintenance (OAM) overhead or frame overhead. For example, the transmitting apparatus 10a may measure the first delay and the second delay by a measurement method described in the 802.1ag standard and the y.1731 standard of the institute of electrical and electronics engineers (institute of electrical and electronics engineers, IEEE).
700b, the transmitting device determines whether the first delay is greater than the second delay.
The sending device 10a determines whether the first delay is greater than the second delay, and determines how to send the packet message on the second path according to the determination result.
Alternatively, steps 700a and 700b may be performed by the control device 30, for example, the control device 30 may save the delay of the first path before sending the path switching instruction to the sending device 10 a. The control device 30 measures and saves the delay of the second path while configuring the second path. It is thus possible to determine whether the first delay is greater than the second delay.
703a, after all the first message packets in the first buffer area are sent out by the sending device through the first path, waiting for a first duration, and sending a second message packet in the second buffer area through the second path; the first delay of the first path is greater than the second delay of the second path, and the first delay is greater than or equal to the difference between the first delay and the second delay.
If the transmitting device 10a determines that the first time delay is greater than the second time delay in step 700b, the transmitting device 10a may determine the first time delay. Wherein the first time period is greater than or equal to a difference between the first time delay and the second time delay.
After the sending device 10a sends out all the first packets in the first buffer area through the first path, waiting for the first time length, the sending device 10a sends out the second packets in the second buffer area through the second path.
Alternatively, if in steps 700a and 700b the first time delay, the second time delay, and whether the first time delay is greater than the second time delay are determined by the control device 30, then in step 703a the transmitting device 10a may receive an indication of the first time period from the control device 30. The transmitting apparatus 10a may perform step 703a according to the instruction information.
The respective sending processes of the first packet and the second packet refer to the description of step 403 in the embodiment shown in fig. 4, and are not repeated here.
Due to the fact that the first time length is greater than or equal to the time delay difference of the two paths, the implementation mode can ensure that after all first packets with earlier sequences reach the receiving device, second packets with later sequences reach the receiving device. Thereby ensuring that the message packets arrive in sequence at the receiving equipment, and ensuring that the message packets received by the receiving equipment are not out of sequence.
703b, after all the first message packets in the first buffer area are sent out by the sending device through the first path, immediately sending second message packets in the second buffer area through the second path; wherein the first delay of the first path is less than or equal to the second delay of the second path.
If the first delay is less than or equal to the second delay, the second packet must arrive at the receiving device later than the first packet as long as the second packet is sent after the first packet. Thus after the sending device 10a sends out all the first packets in the first buffer through the first path. The transmitting device 10a immediately transmits the second packet in the second buffer through the second path.
Alternatively, if in step 700a and step 700b the first delay, the second delay and whether the first delay is greater than the second delay are determined by the control device 30, then in step 703b the transmitting device 10a may receive the indication information from the control device 30. The transmitting device 10a may perform step 703b according to the instruction information.
The respective sending processes of the first packet and the second packet refer to the description of step 403 in the embodiment shown in fig. 4, and are not repeated here.
In step 703b, waiting is not performed between the sending of all the first packets and the sending of the second packets, so that the sending delay of the second packets can be reduced. And the calculation is not needed for the sending time of the second message packet, so that the calculation power consumed by the second message packet sending equipment is saved.
Optionally, after all the first packets in the first buffer are sent out, the sending device 10a may delete the configuration information of the first path, thereby releasing the resources corresponding to the first path.
In the embodiments shown in fig. 4 to 8, the transmitting device 10a can accurately know when to transmit the second packet via the second path. The receiving device 10b cannot accurately know when the first packet transmitted through the first path and the second packet transmitted through the second path arrive, and thus cannot know when to switch between the first path and the second path. Too early or too late path switching by the receiving device 10b may result in packet loss.
To address the above-described drawbacks, embodiments of the present application provide a method as shown in fig. 9. The method shown in fig. 9 is a method corresponding to the receiving apparatus 10b side in the methods shown in fig. 4 to 8. As shown in fig. 9, the method includes the following steps.
901. The receiving device acquires target information including configuration information of the second path.
After determining to switch the transmission path of the packet of the ethernet packet from the first path to the second path, the control device 30 may determine configuration information of the second path, thereby transmitting the target information to the receiving device 10 b. Accordingly, the receiving apparatus 10b receives the target information, wherein the target information includes the configuration information of the second path.
902. The receiving equipment receives a first message packet through a first path and receives a second message packet through a second path according to the target information; the first message packet and the second message packet are sequentially arranged message packets obtained by processing the Ethernet message.
The destination information is used to instruct the receiving device to establish the second path and to receive packets from the transmitting device 10a (i.e., the first packet and the second packet in the embodiments shown in fig. 4-8) via the first path and the second path. In the data transmission method provided in the embodiment of the present application, the specific path switching time at the receiving apparatus 10b is not determined. Packet packets from the transmitting device 10a are received through two paths without loss of packets due to path switching either early or late.
Alternatively, in the embodiment shown in fig. 7 and fig. 8, since the first packet and the second packet arrive at the receiving apparatus 10b in sequence, after the receiving apparatus 10b receives the packet transmitted on the second path, it is explained that the packet on the first path has all arrived at the receiving apparatus 10b, so that the configuration information of the first path may be deleted, thereby releasing the resources of the first path.
Alternatively, in the first path or the second path, the packet may be transmitted in the form of a packet, an OTN frame, an SDH frame, or FlexE, which is not limited in this application.
Alternatively, the control device 30 or the sending device 10a may predict, as the target time, the time when the last packet in the first buffer is received by the receiving device 10b according to the depth of the packet in the first buffer and the first delay of the first path. The control device 30 or the transmitting device 10a may transmit the target time information to the receiving device 10 b. The receiving device 10b receives the target time information accordingly. The receiving device 10b receives the first packet through the first path. And receiving a second message packet from the target time through a second path according to the target time information.
The embodiment of the application also provides a structure of another communication device. As shown in fig. 10, a processor 1001 and a memory 1002 may be included in the communication device 100. The communication device 100 may function as either the transmitting device 10a or the receiving device 10b in the embodiment shown in fig. 1 to 10.
The processor 1001 is configured to implement the method performed by the transmission apparatus 10a described in fig. 4 to 8 when it is used as the transmission apparatus 10 a. In implementation, the steps of the process flow may complete the method performed by the transmitting device 10a described in fig. 4 to 8 by instructions in the form of integrated logic circuits of hardware or software in the processor 1001.
When acting as a receiving device 10b, the processor 1001 is configured to implement the method performed by the receiving device described in fig. 9. In implementation, the steps of the process flow may be performed by the receiving device described in fig. 9 through integrated logic circuitry of hardware in the processor 1001 or instructions in software.
It should be noted that, in the hardware configuration of the network device described in fig. 2, the processor 1001 and the memory 1002 may be located in a cross board.
The processor 1001 in the embodiments of the present application may be a general purpose processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, and may implement or execute the methods, steps and logic blocks disclosed in the embodiments of the present application. The general purpose processor may be a microprocessor or any conventional processor or the like. The steps of a method disclosed in connection with the embodiments of the present application may be embodied directly in a hardware processor for execution, or in a combination of hardware and software elements in the processor for execution. Program code executed by the processor 1001 for implementing the above-described method may be stored in the memory 1002. The memory 1002 is coupled to the processor 1001. The coupling in the embodiments of the present application is an indirect coupling or communication connection between devices, units, or modules, which may be in electrical, mechanical, or other forms for information interaction between the devices, units, or modules. The processor 1001 may operate in conjunction with the memory 1002. The memory 1002 may be a nonvolatile memory such as a Hard Disk Drive (HDD) or the like, or may be a volatile memory (RAM) such as a random-access memory (RAM). Memory 1002 is any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer, but is not limited to such.
A computer program product is also provided in an embodiment of the present application. When running on a computer, causes the computer to perform the steps performed by the transmitting device or the receiving device in the method described in the embodiments shown in the foregoing figures 4 to 9.
Based on the above embodiments, the present application further provides a computer storage medium. The storage medium has stored therein a software program which, when read and executed by one or more processors, performs the methods provided by any one or more of the embodiments described above. The computer storage medium may include: various media capable of storing program codes, such as a U disk, a mobile hard disk, a read-only memory, a random access memory, a magnetic disk or an optical disk.
Based on the above embodiments, the present application further provides a chip. The chip includes a processor for implementing the functions of any one or more of the embodiments described above, such as obtaining or processing packets of messages involved in the methods described above. Optionally, the chip further comprises a memory for the necessary program instructions and data to be executed by the processor. The chip may be formed by a chip, or may include a chip and other discrete devices.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, which are not repeated herein. In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods may be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a storage medium, including several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a read-only memory (ROM), a random access memory (random access memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

Claims (15)

1. A data transmission method, applied to a transmitting device, comprising:
processing the Ethernet message to obtain a first message packet and a second message packet which are sequentially arranged;
the first message packet is placed in a first buffer area corresponding to a first path, and the second message packet is placed in a second buffer area corresponding to a second path;
and after all the first message packets in the first buffer area are sent out through the first path, sending the second message packets in the second buffer area through the second path.
2. The method of claim 1, wherein a first delay of the first path is greater than a second delay of the second path;
after all the first packet in the first buffer area is sent out through the first path, sending the second packet in the second buffer area through the second path includes:
after all the first message packets in the first buffer area are sent out through the first path, waiting for a first duration, and sending the second message packets in the second buffer area through the second path; wherein the first time period is greater than or equal to a difference between the first time period and the second time period.
3. The method of claim 2, wherein before said sending all of said first packets in said first buffer through said first path, said method further comprises:
measuring the first delay and the second delay;
and determining the first duration according to the first time delay and the second time delay.
4. The method of claim 2, wherein before said sending all of said first packets in said first buffer through said first path, said method further comprises:
and receiving indication information of the first duration from the control equipment.
5. The method of claim 1, wherein a first delay of the first path is less than or equal to a second delay of the second path;
after all the first packet in the first buffer area is sent out through the first path, sending the second packet in the second buffer area through the second path includes:
and after all the first message packets in the first buffer area are sent out through the first path, the second message packets in the second buffer area are sent out through the second path immediately.
6. The method according to any one of claims 1 to 5, wherein the transmitting device comprises a wiring board;
after all the first packet in the first buffer area is sent out through the first path, sending the second packet in the second buffer area through the second path includes:
transmitting the first message packet through a port or a time slot corresponding to the first path on the circuit board;
and after all the first message packets are sent out, sending the second message packets through ports or time slots corresponding to the second paths on the circuit board.
7. The method of claim 6, wherein the circuit board comprises: an optical service unit OSU board, a synchronous digital hierarchy SDH board, a flexible ethernet FlexE board or a packet board.
8. The method according to any one of claims 1 to 7, wherein after said sending out all of said first packets in said first buffer via said first path, said method further comprises:
and deleting the configuration information of the first path, wherein the configuration information of the first path is used for indicating the sending equipment to send the message packet of the Ethernet message through the first path.
9. The method according to any one of claims 1 to 8, wherein before said sending said second packet in said second buffer via said second path, said method further comprises:
setting the sending rate of the second path to zero or blocking the second path;
the sending the second packet in the second buffer through the second path includes:
setting the sending rate of the second path to be the bandwidth of the second path or unblocking the second path.
10. The method according to any one of claims 1 to 9, wherein,
the bandwidth of the second path is greater than the bandwidth of the first path; and/or the number of the groups of groups,
the delay of the second path is smaller than the delay of the first path; and/or the number of the groups of groups,
the quality of service Qos level of the second path is higher than the Qos level of the first path.
11. A transmitting device, comprising a processor and a transceiver unit;
the processor is configured to:
processing the Ethernet message to obtain a first message packet and a second message packet which are sequentially arranged;
the first message packet is placed in a first buffer area corresponding to a first path, and the second message packet is placed in a second buffer area corresponding to a second path;
The receiving and transmitting unit is used for: after all the first message packets in the first buffer area are sent out through the first path, sending the second message packets in the second buffer area through the second path;
the packet transmission device is configured to implement the data transmission method of any one of claims 1 to 10.
12. A data transmission method, applied to a receiving device, comprising:
acquiring target information, wherein the target information comprises configuration information of a second path;
receiving a first message packet through a first path and a second message packet through a second path according to the target information; the first message packet and the second message packet are sequentially arranged message packets obtained by processing an Ethernet message.
13. The method according to claim 12, wherein the method further comprises:
acquiring target time information;
the receiving the first packet through the first path and the second packet through the second path includes:
and receiving the first message packet through the first path according to the target time information, and receiving the second message packet through the second path from the target time.
14. A receiving apparatus, comprising:
the processor is used for acquiring target information, wherein the target information comprises configuration information of a second path;
the receiving and transmitting unit is used for receiving a first message packet through a first path and a second message packet through a second path according to the target information; the first message packet and the second message packet are message packets which are sequentially arranged and obtained by processing an Ethernet message;
the packet receiving device is configured to implement the data transmission method of claim 12 or 13.
15. A communication system comprising the transmitting device of claim 11 and the receiving device of claim 14.
CN202111615295.XA 2021-12-27 2021-12-27 Data transmission method and related equipment Pending CN116366581A (en)

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