CN116366378A - Communication device - Google Patents

Communication device Download PDF

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Publication number
CN116366378A
CN116366378A CN202310106828.4A CN202310106828A CN116366378A CN 116366378 A CN116366378 A CN 116366378A CN 202310106828 A CN202310106828 A CN 202310106828A CN 116366378 A CN116366378 A CN 116366378A
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China
Prior art keywords
bus
communication
port
hbs
processing module
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CN202310106828.4A
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Chinese (zh)
Inventor
董志强
丁在泉
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Qingdao Zhonghong Digital Technology Co ltd
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Qingdao Zhonghong Digital Technology Co ltd
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Priority to CN202310106828.4A priority Critical patent/CN116366378A/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/02—Details
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40006—Architecture of a communication node
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/08—Protocols for interworking; Protocol conversion
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L2012/40208—Bus networks characterized by the use of a particular bus standard
    • H04L2012/40215—Controller Area Network CAN
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

The invention discloses a communication device, which relates to the field of communication, and when a port is connected with N buses, because the N buses are connected with corresponding communication conversion modules, a processing module acquires a signal currently transmitted by the port through the connection of the communication conversion modules corresponding to the N buses, determines a bus to be operated corresponding to the signal, and further controls the output of a decoder and an inverter to operate the communication conversion modules corresponding to the bus to be operated, thereby ensuring that only one bus and the corresponding communication conversion module operate at the same time. Moreover, the adopted decoder and inverter have no mechanical contact, so that the whole communication device can not cause the problem of switching errors due to long-time work, and the safety risk is reduced; the communication device also has the advantages of small volume, low cost, no limitation of action life and low power consumption.

Description

Communication device
Technical Field
The present invention relates to the field of communications, and in particular, to a communication device.
Background
With the development of the communication field, in particular, the multiplexing requirements for HBS (Home Bus System) Bus, CAN (Controller Area Network ) Bus and 485 Bus are increasing, but three ports are required to connect three buses together, and each Bus needs to be connected to a separate port, so that a user needs to identify the type of Bus and the corresponding port position when connecting. In order to connect three buses, three different ports are needed to be correspondingly connected, the number of the ports is large, the construction requirement is strong in specialization, if the situation of connecting the buses by mistake is light, the equipment is broken down, and the equipment is burnt out by heavy.
In the prior art, a design that a single port is connected with three buses is adopted, but a processor is required to switch the three buses by controlling a multi-path signal relay, and the scheme has several defects: the first point is a multipath signal relay, which has large volume and high cost; the second point is that the multipath signal relay is provided with a mechanical contact, so that the problem of switching errors can occur after the mechanical contact works for a long time, and the safety risk is increased; the third point is that the multipath signal relay has slow action response, limited action life and high power consumption.
Disclosure of Invention
The invention aims to provide a communication device which ensures that only one bus and a corresponding communication conversion module work at the same time. Moreover, the adopted decoder and inverter have no mechanical contact, so that the whole communication device can not cause the problem of switching errors due to long-time work, and the safety risk is reduced; the communication device also has the advantages of small volume, low cost, no limitation of action life and low power consumption.
In order to solve the above technical problems, the present invention provides a communication device, including:
the ports are connected with N buses, and N is an integer not smaller than 2;
the N buses are connected with the communication ends of the corresponding communication conversion modules in a one-to-one correspondence manner;
n communication conversion modules;
the processing module is connected with the communication conversion module and is used for determining a bus to be worked corresponding to a signal currently transmitted by the port, controlling the outputs of the processing module, the decoder and the inverter to enable the bus to be worked corresponding to the communication conversion module to work, and communicating with the port through the working communication conversion module and the bus to be worked;
the input end of the decoder is connected with the processing module, and the output end of the decoder is respectively connected with the input end of the inverter and the communication conversion module;
and the output end of the inverter is connected with the communication conversion module.
Preferably, when the N buses include: any two or three of the HBS bus, the CAN bus and the 485 bus; the N communication conversion modules include:
the receiving end of the HBS receiving circuit is connected with the HBS bus, and the transmitting end of the HBS receiving circuit is connected with the processing module;
the receiving end of the HBS transmitting circuit is connected with the output end of the inverter, and the transmitting end is connected with the HBS bus;
and/or the number of the groups of groups,
the CAN comprises a first CAN chip, a power supply end, a receiving end, a transmitting end, a CAN bus and a CAN communication end, wherein an enabling end of the first CAN chip is connected with the processing module, the power supply end is connected with a power supply, the receiving end and the transmitting end are both connected with the processing module, the CANH communication end is connected with a Y line of the CAN bus, and the CANL communication end is connected with an X line of the CAN bus;
and/or the number of the groups of groups,
a first 485 chip, a first receiving enabling end of the first 485 chip is connected with the output end of the decoder, a first transmitting enabling end is connected with the output end of the phase inverter, a transmitting end and a receiving end are both connected with the processing module, an A communication end is connected with an A line of the 485 bus,
Figure BDA0004075440450000021
and the communication end is connected with the B line of the 485 bus.
Preferably, the method further comprises:
the enabling end of the second CAN chip is connected with the processing module, the power supply end is connected with the power supply, the receiving end and the sending end are both connected with the processing module, the CANH communication end is connected with the X line of the CAN bus, and the CANL communication end is connected with the Y line of the CAN bus;
and/or the number of the groups of groups,
a second 485 chip, a first receiving enabling end of the second 485 chip is connected with the output end of the decoder, a first transmitting enabling end is connected with the output end of the phase inverter, a transmitting end and a receiving end are both connected with the processing module, an A communication end is connected with a B line of the 485 bus,
Figure BDA0004075440450000022
and the communication end is connected with an A line of the 485 bus.
Preferably, determining a bus to be operated corresponding to a signal currently transmitted by the port includes:
receiving a signal currently transmitted by the port through the HBS bus and the HBS receiving circuit;
and determining a bus to be worked corresponding to the signal based on the signal.
Preferably, the method further comprises:
the first end of the first switch is connected with the power supply, the second end of the first switch is connected with the power supply end of the first CAN chip, and the control end of the first switch is connected with the output end of the decoder;
and the first end of the second switch is connected with the power supply, the second end of the second switch is connected with the power supply end of the second CAN chip, and the control end of the second switch is connected with the output end of the decoder.
Preferably, the decoder is a thirty-eight decoder;
the input end A, the input end B and the input end C of the three-eight decoder are all connected with the processing module,
Figure BDA0004075440450000031
the output end is connected with the first receiving enabling end of the first 485 chip, and the output end is connected with the first receiving enabling end of the first 485 chip>
Figure BDA0004075440450000032
The output end is connected with the first receiving enabling end of the second 485 chip, and the output end is->
Figure BDA0004075440450000033
Output end and the saidThe 1A input end of the inverter is connected with +.>
Figure BDA0004075440450000034
The output end is connected with the 2A input end of the phase inverter, and the output end is connected with the 2A input end of the phase inverter>
Figure BDA0004075440450000035
The output end is connected with the 3A input end of the phase inverter, and the output end is connected with the 3A input end of the phase inverter>
Figure BDA0004075440450000036
The output end is connected with the 4A input end of the phase inverter, and the output end is connected with the 4A input end of the phase inverter>
Figure BDA0004075440450000037
The output end is connected with the control end of the second switch>
Figure BDA0004075440450000038
The output end is connected with the control end of the first switch.
Preferably, the port comprises: the first interface, the second interface and the port processing module comprise:
the first interface and the second interface are respectively connected with the HBS bus;
the port processing module, the first communication port of the port processing module and the second communication port of the port processing module are both connected with the HBS bus, the third communication port of the port processing module and the fourth communication port of the port processing module are both connected with the 485 bus, and are used for transmitting signals transmitted by the first communication port and the second communication port to the third communication port and the fourth communication port when the signals transmitted by the first communication port and the second communication port are 485 bus signals, and not transmitting the signals by the first communication port and the second communication port to the third communication port and the fourth communication port when the signals transmitted by the first communication port and the second communication port are not 485 bus signals.
Preferably, the port processing module includes:
the first end of the first resistor is connected with the HBS bus, and the second end of the first resistor is connected with the base electrode of the first NPN triode;
the collector of the first NPN triode is connected with the HBS bus, and the emitter of the first NPN triode is connected with the 485 bus;
the cathode of the first diode is connected with the HBS bus, and the anode of the first diode is connected with the 485 bus;
the cathode of the first zener diode is connected with the HBS bus, and the anode of the first zener diode is connected with the first end of the second resistor;
the second end of the second resistor is connected with the base electrode of the second NPN triode;
the collector of the second NPN triode is connected with the second end of the first resistor, and the emitter of the second NPN triode is connected with the 485 bus;
the first end of the third resistor is connected with the HBS bus, and the second end of the third resistor is connected with the base electrode of the third NPN triode;
the collector of the third NPN triode is connected with the HBS bus, and the emitter of the third NPN triode is connected with the 485 bus;
the cathode of the third diode is connected with the HBS bus, and the anode of the third diode is connected with the 485 bus;
the cathode of the second zener diode is connected with the HBS bus, and the anode of the second zener diode is connected with the first end of the fourth resistor;
the second end of the fourth resistor is connected with the base electrode of the fourth NPN triode;
and the collector electrode of the fourth NPN triode is connected with the second end of the third resistor, and the emitter electrode of the fourth NPN triode is connected with the 485 bus.
Preferably, the method further comprises:
and the input end of the common mode interference filtering module is connected with the port, and the output end of the common mode interference filtering module is connected with the HBS bus.
Preferably, the common mode interference filtering module is a common mode inductor.
The invention aims to provide a communication device, when a port is connected with N buses, because the N buses are connected with corresponding communication conversion modules, a processing module acquires a signal currently transmitted by the port through the connection of the communication conversion modules corresponding to the N buses, determines a bus to be operated corresponding to the signal, and further controls the output of a decoder and an inverter to enable the communication conversion module corresponding to the bus to be operated to operate, thereby ensuring that only one bus and the corresponding communication conversion module thereof operate at the same time. Moreover, the adopted decoder and inverter have no mechanical contact, so that the whole communication device can not cause the problem of switching errors due to long-time work, and the safety risk is reduced; the communication device also has the advantages of small volume, low cost, no limitation of action life and low power consumption.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required in the prior art and the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a communication device according to the present invention;
fig. 2 is a schematic structural diagram of a communication conversion module corresponding to an HBS bus according to the present invention;
fig. 3 is a schematic structural diagram of a communication conversion module corresponding to a CAN bus according to the present invention;
fig. 4 is a schematic structural diagram of a communication conversion module corresponding to a 485 bus provided by the invention;
fig. 5 is a schematic structural diagram of another communication device according to the present invention;
fig. 6 is a schematic structural diagram of another communication device according to the present invention.
Detailed Description
The core of the invention is to provide a communication device, which ensures that only one bus and a corresponding communication conversion module work at the same time. Moreover, the adopted decoder and inverter have no mechanical contact, so that the whole communication device can not cause the problem of switching errors due to long-time work, and the safety risk is reduced; the communication device also has the advantages of small volume, low cost, no limitation of action life and low power consumption.
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a communication device according to the present invention. The device comprises:
the port 1 is connected with N buses 2, and N is an integer not less than 2;
n buses 2, N buses 2 are connected with the communication ends of the corresponding communication conversion modules in a one-to-one correspondence manner;
n communication conversion modules 3;
the processing module 4 is connected with the communication conversion module and is used for determining a bus to be worked corresponding to the signal currently transmitted by the port 1, controlling the outputs of the processing module 4, the decoder 5 and the inverter 6 to enable the bus to be worked corresponding to the communication conversion module to work, and communicating with the port 1 through the working communication conversion module and the bus to be worked;
the input end of the decoder 5 is connected with the processing module 4, and the output end of the decoder 5 is respectively connected with the input end of the inverter 6 and the communication conversion module;
and the output end of the inverter 6 is connected with the communication conversion module.
In the invention, the design that the port 1 is connected with the N buses 2 is adopted, when one of the N buses 2 needs to be controlled to work, a user can realize the communication between the port 1 and one bus to be operated of the N buses 2 only by transmitting signals to the N buses 2 through the port 1, so that the safety of the scheme is improved; the processing module 4 is connected with the communication conversion modules corresponding to the N buses 2, receives the signals transmitted by the ports 1, and can determine which one of the buses to be operated corresponds to the signals, and further, the communication conversion modules corresponding to the buses to be operated are operated by controlling the outputs of the processing module, the decoder 5 and the inverter 6, so that the communication is carried out between the communication conversion modules to be operated and the ports 1, and further, only one bus and the corresponding communication conversion module thereof are ensured to be operated at the same time. Because the decoder 5 and the inverter 6 do not have mechanical contacts, the problem of switching errors caused by long-time operation like a multipath signal relay does not occur, and the safety risk is reduced; in addition, the decoder 5 and the inverter 6 have the advantages of small size, low cost, no limitation of operation life and low power consumption.
In practical applications, the method for determining the bus to be worked corresponding to the signal currently transmitted by the port 1 may be that the processing module 4 receives the signal currently transmitted by the port 1 through the HBS bus and the HBS receiving circuit 31, and determines the bus to be worked corresponding to the signal based on the signal or other methods.
In practical applications, the decoder 5 may be a thirty-eight decoder or other decoder 5.
The embodiment provides a communication device, which ensures that only one bus and a corresponding communication conversion module work at the same time. Moreover, the adopted decoder 5 and inverter 6 have no mechanical contact, so that the whole communication device can not cause the problem of switching errors due to long-time work, and the safety risk is reduced; the communication device also has the advantages of small volume, low cost, no limitation of action life and low power consumption.
Based on the above embodiments:
as a preferred embodiment, when the N buses 2 include: any two or three of the HBS bus, the CAN bus and the 485 bus; the N communication conversion modules 3 include:
the receiving end of the HBS receiving circuit 31 is connected with the HBS bus, and the transmitting end is connected with the processing module 4;
the receiving end of the HBS transmitting circuit 32 is connected with the output end of the inverter 6, and the transmitting end is connected with the HBS bus;
in the present invention, when the N buses 2 include HBS buses, the communication conversion module corresponding to the HBS buses includes: the HBS receiving circuit 31 and the HBS transmitting circuit 32 are specifically structured as shown in fig. 2. The HBS receiving circuit 31 is mainly used for receiving signals transmitted by the port 1 through the HBS bus, and the HBS transmitting circuit 32 is mainly used for communicating with the port 1 through the HBS bus.
It should be noted that, after receiving the signal transmitted by the port 1 through the HBS bus, the HBS receiving circuit 31 may transmit the signal to the processing module 4 through the hbs_rx in fig. 2, and the processing module 4 may determine the bus to be operated corresponding to the signal based on the signal.
It should be noted that, the transistor at the left end of hbs_ta in the HBS transmitting circuit 32 represents hbs_ta, which acts as the inverter 6, the transistor at the right end of hbs_tb in the HBS transmitting circuit 32 represents hbs_tb, which acts as the inverter 6, when hbs_ta is 1 and hbs_tb is 0, the transistor under outb is turned on, the transistor under outa is turned off, at this time, outa is 5v, and outb is 0v, and the HBS transmitting circuit works; when HBS_TA-0 and HBS_TB-1, the triode below the outb is not conducted, the triode below the outa is conducted, the outa is 0V, the outb is 5V, and the HBS transmitting circuit works; when HBS_TA-0 and HBS_TB-0, the triode below outb is not conducted, the triode below outa is also not conducted, the outa and the outb are in a suspended state, and the HBS transmitting circuit does not work.
And/or the number of the groups of groups,
the first CAN chip 33, the enabling end of the first CAN chip 33 is connected with the processing module 4, the power supply end is connected with the power supply, the receiving end and the transmitting end are both connected with the processing module 4, the CANH communication end is connected with the Y line of the CAN bus, and the CANL communication end is connected with the X line of the CAN bus;
in the invention, when the N buses 2 include the CAN bus, the communication conversion module corresponding to the CAN bus is the first CAN chip 33, and after the processing module 4 determines that the bus to be operated corresponding to the signal currently transmitted by the port 1 is the CAN bus, the processing module 4 CAN control the enabling end of the first CAN chip 33 to enable through its own output, so that the processing module 4 CAN make the first CAN chip 33 of the communication conversion module corresponding to the CAN bus operate, and communicate with the port 1 through the operating first CAN chip 33 and the CAN bus, thereby improving the reliability of the scheme.
And/or the number of the groups of groups,
the first 485 chip 34, the first receiving enabling end of the first 485 chip 34 is connected with the output end of the decoder 5, the first transmitting enabling end is connected with the output end of the inverter 6, the transmitting end and the receiving end are both connected with the processing module 4, the A communication end is connected with the A line of the 485 bus,
Figure BDA0004075440450000081
the communication end is connected with the B line of the 485 bus.
In the invention, when the N buses 2 comprise 485 buses, the communication conversion module corresponding to the 485 buses is the first 485 chip 34, and after the processing module 4 determines that the bus to be operated corresponding to the signal currently transmitted by the port 1 is the 485 bus, the processing module 4 can further control the output of the decoder 5 and the inverter 6 by controlling the input of the decoder 5 so as to enable the first 485 chip 34 corresponding to the 485 buses to operate, thereby communicating with the port 1 through the first 485 chip 34 and the 485 buses, and improving the stability of the scheme.
As a preferred embodiment, further comprising:
the second CAN chip 35, the enabling end of the second CAN chip 35 is connected with the processing module 4, the power supply end is connected with the power supply, the receiving end and the transmitting end are both connected with the processing module 4, the CANH communication end is connected with the X line of the CAN bus, and the CANL communication end is connected with the Y line of the CAN bus;
in the present invention, when the N buses 2 include a CAN bus, a communication conversion module corresponding to the CAN bus includes: the specific structure of the first CAN chip 33 and the second CAN chip 35 is shown in fig. 3. After the processing module 4 determines that the bus to be operated corresponding to the signal currently transmitted by the port 1 is a CAN bus, the processing module 4 CAN control the enabling end of the first CAN chip 33 or the enabling end of the second CAN chip 35 through its own output, so that the processing module 4 CAN make the CAN bus operate corresponding to the first CAN chip 33 or the second CAN chip 35 of the communication conversion module, and communicate with the port 1 through the operating first CAN chip 33 or the second CAN chip 35 and the CAN bus, thereby improving the reliability of the scheme.
It should be noted that, the non-polarity of the CAN bus is achieved by adopting the mode that the CAN chip is not electrified to be in a high-resistance state and has no influence on the bus, and the corresponding low-power consumption "silent" mode configuration pins are provided for the chip, and the two configuration pins are also realized by respectively controlling the enabling modes, when the power supply always supplies power to the power supply end of the chip, the processing module 4 CAN control the enabling end of the first CAN chip 33 or the enabling end of the second CAN chip 35 to enable through the output of the processing module, so that only one of the first CAN chip 33 and the second CAN chip 35 CAN work at the same time, and the non-polarity of the CAN bus is ensured.
It should be further noted that, the STB pin of the first CAN chip 33 is the enabling end of the first CAN chip 33, the STB pin of the second CAN chip 35 is the enabling end of the second CAN chip 35, and is connected with the ac_can_le of the processing module 4, the receiving ends of the two chips are RXD pins, the transmitting ends of the two chips are TXD pins, the receiving ends are connected with the ac_rxd of the processing module 4, and the transmitting ends are connected with the ac_txd of the processing module 4.
And/or the number of the groups of groups,
the second 485 chip 36, the first receiving enabling end of the second 485 chip 36 is connected with the output end of the decoder 5, the first sending enabling end is connected with the output end of the inverter 6, the sending end and the receiving end are both connected with the processing module 4, the A communication end is connected with the B line of the 485 bus,
Figure BDA0004075440450000091
communication terminalIs connected with the A line of the 485 bus.
In the invention, when the N buses 2 include 485 buses, the communication conversion module corresponding to the 485 buses includes: the specific structure of the first 485 chip 34 and the second 485 chip 36 is shown in fig. 4. After the processing module 4 determines that the bus to be operated corresponding to the signal currently transmitted by the port 1 is a 485 bus, the processing module 4 controls the output of the decoder 5 and the inverter 6 by controlling the input of the decoder 5 so as to enable the first 485 chip 34 or the second 485 chip 36 corresponding to the 485 bus to operate, thereby communicating with the port 1 through the first 485 chip 34 or the second 485 chip 36 and the 485 bus, and improving the stability of the scheme.
It should be noted that, the non-polarity of the 485 bus is reversely connected through the AB buses of the first 485 chip 34 and the second 485 chip 36, and the processing module 4 controls the input of the decoder 5, and further controls the output of the decoder 5 and the inverter 6 to make the first 485 chip 34 and the second 485 chip 36 corresponding to the 485 bus work or not.
It should also be noted that the invention overcomes the difficulty of compatibility and realizes the non-polar three-in-one implementation of three bus interfaces. The automatic construction wiring is realized, constructors do not need to know what kind of buses and polarities exist, and the positions of the corresponding ports are not needed to be distinguished. Single port fool access. Reduces the professional dependence of constructors and the opportunity of manual erasing and mistake making. The port cost is reduced, the equipment manufacturer operates the technical support cost, and the cost brought by the level requirements of construction staff technicians is reduced. The cost of multiple directions is reduced, and the method is safe, simple, efficient, stable and convenient for large-scale popularization and application of products.
It should be further noted that the receiving ends of the first 485 chip 34 and the second 485 chip 36 are RO pins, and the transmitting ends of the two chips are RO pins
Figure BDA0004075440450000101
The pins, the receiving ends are all connected with the AC_RXD of the processing module 4, and the transmitting ends are all connected with the AC_TXD of the processing module 4.
In practical applications, the 485 bus may be configured in a pull-up and pull-down configuration, as shown in fig. 4, by ac_485AB, ac_485BA, and resistors corresponding to the two.
As a preferred embodiment, determining a bus to be operated corresponding to a signal currently transmitted by the port 1 includes:
the signal currently transmitted by the port 1 is received by the HBS bus and the HBS receiving circuit 31;
and determining a bus to be operated corresponding to the signal based on the signal.
In the invention, the processing module 4 receives the signal currently transmitted by the port 1 through the HBS bus and the HBS receiving circuit 31, and determines the bus to be operated corresponding to the signal based on the signal, and by adopting the method, the bus to be operated corresponding to the signal can be determined more accurately, and the accuracy of the scheme is improved.
As a preferred embodiment, further comprising:
the first end of the first switch 7 is connected with a power supply, the second end of the first switch 7 is connected with the power supply end of the first CAN chip 33, and the control end of the first switch 7 is connected with the output end of the decoder 5;
and the first end of the second switch 8 is connected with a power supply, the second end of the second switch 8 is connected with the power supply end of the second CAN chip 35, and the control end of the second switch 8 is connected with the output end of the decoder 5.
In the present invention, the communication device further includes a first switch 7 and a second switch 8, where the functions of the first switch 7 and the second switch 8 are mainly to prevent the power supply from supplying power to the first CAN chip 33 and the second CAN chip 35 at the same time, and avoid that signals in the first CAN chip 33 and the second CAN chip 35 are mutually damaged when one of them is used as a transmitting signal, when the processing module 4 determines that the bus to be operated corresponding to the signal currently transmitted by the port 1 is a CAN bus, the input of the decoder 5 CAN be controlled to further control the output of the decoder 5 to enable the first CAN chip 33 and the second CAN chip 35 corresponding to the CAN bus to be powered on, and to control the enabling end enable of the first CAN chip 33 or the enabling end enable of the second CAN chip 35 based on the output of the decoder, and when the power supply end of one CAN chip is powered on and the enabling end enable, the CAN chip is calculated to be normally operated and CAN communicate with the port 1 through the CAN bus. The CAN chip is not always electrified, so that the energy consumption is reduced.
It should be noted that, after adding the switch, whether the first CAN chip 33 and the second CAN chip 35 are powered up is determined by whether the CAN1_le and the CAN2_le are 1, respectively, and reference may be made to the truth table in fig. 5.
In practical applications, the first switch 7 and the second switch 8 may be P-type MOS transistors or other switching devices.
Referring to fig. 5, fig. 5 is a schematic structural diagram of another communication device according to the present invention.
As a preferred embodiment, the decoder 5 is a thirty-eight decoder;
the input end A, the input end B and the input end C of the three-eight decoder are all connected with the processing module 4,
Figure BDA0004075440450000111
the output end is connected with the first receiving enabling end of the first 485 chip 34, and the output end is->
Figure BDA0004075440450000112
The output is connected to a first receiving enable of the second 485 chip 36,
Figure BDA0004075440450000113
the output terminal is connected with the 1A input terminal of the inverter 6,>
Figure BDA0004075440450000114
the output terminal is connected to the 2A input terminal of the inverter 6,>
Figure BDA0004075440450000115
the output terminal is connected to the 3A input terminal of the inverter 6,>
Figure BDA0004075440450000116
the output terminal is connected to the 4A input terminal of the inverter 6,>
Figure BDA0004075440450000117
the output terminal is connected to the control terminal of the second switch 8, ">
Figure BDA0004075440450000118
The output terminal is connected to the control terminal of the first switch 7.
In the invention, the decoder 5 is a three-eight decoder, after the three-eight decoder is adopted, the input of the three-eight decoder is controlled by the processing module 4, the output of the three-eight decoder can control the communication conversion modules of some buses in the N buses 2 to work, and the advantage of selecting the three-eight decoder is that the output end can perfectly control the N buses 2 to comprise: and the efficiency of the scheme is improved under the condition of any two or three of the HBS bus, the CAN bus and the 485 bus.
It should be noted that, for example, when the C input terminal, the B input terminal, and the a input terminal of the thirty-eight decoder are respectively 0, or 0, 1, 0, the first 485 chip 34 is operated at this time; when the C input, the B input, and the a input of the thirty-eight decoders are respectively 0, 1, or 0, 1, then the second 485 chip 36 operates. When the C input end, the B input end and the A input end of the three-eight decoder are respectively 1, 0 or 1, 0 and 1, the HBS bus works at the moment; when the C input end, the B input end and the A input end of the three-eight decoder are respectively 1, 1 and 0, the HBS bus does not work at the moment. Other controls may refer to the truth table section of fig. 5.
It should be noted that, in fig. 5, the truth table portion RX1 refers to RX1_en, RX2 refers to RX2_en, TX1 refers to TX1_en, TX2 refers to TX2_en, TA refers to hbs_ta, TB refers to hbs_tb, TA to hbs_ta to hbs_tb.
Referring to fig. 6, fig. 6 is a schematic structural diagram of another communication device according to the present invention.
As a preferred embodiment, port 1 comprises: the first interface 11, the second interface 12, and the port processing module 13 include:
the first interface 11 and the second interface 12 are respectively connected with the HBS bus;
the port processing module 13, the first communication port of the port processing module 13 and the second communication port of the port processing module 13 are connected with the HBS bus, the third communication port 1 of the port processing module 13 and the fourth communication port 1 of the port processing module 13 are connected with the 485 bus, and are used for transmitting signals from the first communication port and the second communication port to the third communication port 1 and the fourth communication port 1 when the signals transmitted by the first communication port and the second communication port are 485 bus signals, and not transmitting signals from the first communication port and the second communication port to the third communication port 1 and the fourth communication port 1 when the signals transmitted by the first communication port and the second communication port are not 485 bus signals.
Note that, the first interface 11 is ac_x, and the second interface 12 is ac_y.
In the present invention, since the port 1 includes the first interface 11, the second interface 12 and the port processing module 13, when the N buses 2 include: when any two or three of the HBS bus, the CAN bus and the 485 bus are used, in order to ensure the communication between the port 1 and the N buses 2, a port processing module 13 is required to process signals, and when the signals transmitted by the port 1 are 485 signals, the port processing module 13 transmits the signals to the 485 bus; when the signal transmitted by the port 1 is not 485 signal, the port processing module 13 does not transmit the signal to the 485 bus, so that the reliability of the scheme is ensured.
As a preferred embodiment, the port processing module 13 includes:
the first end of the first resistor is connected with the HBS bus, and the second end of the first resistor is connected with the base electrode of the first NPN triode;
the collector of the first NPN triode is connected with the HBS bus, and the emitter is connected with the 485 bus;
the cathode of the first diode is connected with the HBS bus, and the anode of the first diode is connected with the 485 bus;
the cathode of the first voltage stabilizing diode is connected with the HBS bus, and the anode of the first voltage stabilizing diode is connected with the first end of the second resistor;
the second end of the second resistor is connected with the base electrode of the second NPN triode;
the collector of the second NPN triode is connected with the second end of the first resistor, and the emitter is connected with the 485 bus;
the first end of the third resistor is connected with the HBS bus, and the second end of the third resistor is connected with the base electrode of the third NPN triode;
the collector of the third NPN triode is connected with the HBS bus, and the emitter is connected with the 485 bus;
the cathode of the third diode is connected with the HBS bus, and the anode of the third diode is connected with the 485 bus;
the cathode of the second voltage stabilizing diode is connected with the HBS bus, and the anode of the second voltage stabilizing diode is connected with the first end of the fourth resistor;
the second end of the fourth resistor is connected with the base electrode of the fourth NPN triode;
and the collector electrode of the fourth NPN triode is connected with the second end of the third resistor, and the emitter electrode of the fourth NPN triode is connected with the 485 bus.
In the present invention, since the voltage withstand difference between the HBS bus voltage and the 485 bus voltage is too large, in order to ensure that when the N buses 2 include: when the signal input by the port 1 is overlarge in voltage when the HBS bus, the CAN bus and the 485 bus are used, the communication between the port 1 and the 485 bus is disconnected; the voltage of the signal input by the port 1 is moderate, and the communication between the port 1 and the 485 bus is communicated, so that the port processing module 13 is composed of a first zener diode, a second zener diode and other devices, and the stability and the safety of the scheme are improved.
It should be noted that, the HBS bus, the CAN bus and the 485 bus all transmit differential signals, and as HBS belongs to the carrier bus, the voltage difference is highest, the signal voltage difference is also highest, and the HBS is placed at the entrance. The buses correspond to hbs_1, hbs_2. The CAN bus transceiver CAN withstand voltage of-40 to +40v under the bus empty state, and CAN be connected after the HBS carrier voltage, but the CAN bus is not enabled when the HBS bus is used, and the CAN bus corresponds to C_X (X line) and C_Y (Y line). Followed by a 485 bus. Since most 485 chips cannot exceed-15 v to +15v in voltage-resistant design, and the bus is required to be-7 v to +12v, some brands of HBS use 30v carrier (the sending state can reach 35 v), so the connection cannot be directly carried out, and the port processing module 13 is adopted for isolation, the principle is that the bus voltage is higher than the conduction voltage of the zener diode to conduct the connected triode, and then the other triode at the upper layer is turned off, so that the wire with higher voltage is disconnected from the bus at the rear stage (otherwise, the triode at the upper layer is in the conduction state by default at ordinary times, the bus is in the conduction state), and the wire with lower voltage is pulled down due to the existence of the front-end diode. 485 bus corresponds to ac_ab (line a), ac_ba (line B).
As a preferred embodiment, further comprising:
and the input end of the common mode interference filtering module 9 is connected with the port 1, and the output end of the common mode interference filtering module 9 is connected with the HBS bus.
In the invention, the communication device also comprises a common mode interference filtering module 9, and because the HBS bus, the CAN bus and the 485 bus are buses for transmitting differential signals, the joint of the HBS bus and the port 1 is added with the common mode interference filtering module 9 to filter certain common mode interference, thereby improving the reliability of the scheme.
In practical applications, the common mode interference filtering module 9 may be a common mode inductor or other devices.
As a preferred embodiment, the common mode interference filtering module 9 is a common mode inductance.
In the invention, the adopted common mode interference filtering module 9 is a common mode inductance, and has the advantages of good balance degree, convenient use and high quality.
It should be noted that in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A communication device, comprising:
the ports are connected with N buses, and N is an integer not smaller than 2;
the N buses are connected with the communication ends of the corresponding communication conversion modules in a one-to-one correspondence manner;
n communication conversion modules;
the processing module is connected with the communication conversion module and is used for determining a bus to be worked corresponding to a signal currently transmitted by the port, controlling the outputs of the processing module, the decoder and the inverter to enable the bus to be worked corresponding to the communication conversion module to work, and communicating with the port through the working communication conversion module and the bus to be worked;
the input end of the decoder is connected with the processing module, and the output end of the decoder is respectively connected with the input end of the inverter and the communication conversion module;
and the output end of the inverter is connected with the communication conversion module.
2. The communication device of claim 1, wherein when the N buses include: any two or three of the HBS bus, the CAN bus and the 485 bus; the N communication conversion modules include:
the receiving end of the HBS receiving circuit is connected with the HBS bus, and the transmitting end of the HBS receiving circuit is connected with the processing module;
the receiving end of the HBS transmitting circuit is connected with the output end of the inverter, and the transmitting end is connected with the HBS bus;
and/or the number of the groups of groups,
the CAN comprises a first CAN chip, a power supply end, a receiving end, a transmitting end, a CAN bus and a CAN communication end, wherein an enabling end of the first CAN chip is connected with the processing module, the power supply end is connected with a power supply, the receiving end and the transmitting end are both connected with the processing module, the CANH communication end is connected with a Y line of the CAN bus, and the CANL communication end is connected with an X line of the CAN bus;
and/or the number of the groups of groups,
a first 485 chip, a first receiving enabling end of the first 485 chip is connected with the output end of the decoder, a first transmitting enabling end is connected with the output end of the phase inverter, a transmitting end and a receiving end are both connected with the processing module, an A communication end is connected with an A line of the 485 bus,
Figure FDA0004075440400000011
and the communication end is connected with the B line of the 485 bus.
3. The communication device of claim 2, further comprising:
the enabling end of the second CAN chip is connected with the processing module, the power supply end is connected with the power supply, the receiving end and the sending end are both connected with the processing module, the CANH communication end is connected with the X line of the CAN bus, and the CANL communication end is connected with the Y line of the CAN bus;
and/or the number of the groups of groups,
a second 485 chip, a first receiving enabling end of the second 485 chip is connected with the output end of the decoder, a first transmitting enabling end is connected with the output end of the phase inverter, a transmitting end and a receiving end are both connected with the processing module, an A communication end is connected with a B line of the 485 bus,
Figure FDA0004075440400000029
and the communication end is connected with an A line of the 485 bus.
4. The communication device of claim 2, wherein determining a bus to be operated corresponding to a signal currently transmitted by the port comprises:
receiving a signal currently transmitted by the port through the HBS bus and the HBS receiving circuit;
and determining a bus to be worked corresponding to the signal based on the signal.
5. The communication device of claim 3, further comprising:
the first end of the first switch is connected with the power supply, the second end of the first switch is connected with the power supply end of the first CAN chip, and the control end of the first switch is connected with the output end of the decoder;
and the first end of the second switch is connected with the power supply, the second end of the second switch is connected with the power supply end of the second CAN chip, and the control end of the second switch is connected with the output end of the decoder.
6. The communication device of claim 5, wherein the decoder is a thirty-eight decoder;
the input end A, the input end B and the input end C of the three-eight decoder are all connected with the processing module,
Figure FDA0004075440400000021
the output end is connected with the first receiving enabling end of the first 485 chip, and the output end is connected with the first receiving enabling end of the first 485 chip>
Figure FDA0004075440400000022
The output end is connected with the first receiving enabling end of the second 485 chip, and the output end is->
Figure FDA0004075440400000023
The output end is connected with the 1A input end of the phase inverter, and the output end is connected with the 1A input end of the phase inverter>
Figure FDA0004075440400000024
The output end is connected with the 2A input end of the phase inverter, and the output end is connected with the 2A input end of the phase inverter>
Figure FDA0004075440400000025
The output end is connected with the 3A input end of the phase inverter, and the output end is connected with the 3A input end of the phase inverter>
Figure FDA0004075440400000026
The output end is connected with the 4A input end of the phase inverter,
Figure FDA0004075440400000027
the output end is connected with the control end of the second switch>
Figure FDA0004075440400000028
The output end is connected with the control end of the first switch.
7. The communication device of any of claims 2 to 6, wherein the port comprises: the first interface, the second interface and the port processing module comprise:
the first interface and the second interface are respectively connected with the HBS bus;
the port processing module, the first communication port of the port processing module and the second communication port of the port processing module are both connected with the HBS bus, the third communication port of the port processing module and the fourth communication port of the port processing module are both connected with the 485 bus, and are used for transmitting signals transmitted by the first communication port and the second communication port to the third communication port and the fourth communication port when the signals transmitted by the first communication port and the second communication port are 485 bus signals, and not transmitting the signals by the first communication port and the second communication port to the third communication port and the fourth communication port when the signals transmitted by the first communication port and the second communication port are not 485 bus signals.
8. The communications apparatus of claim 7, wherein the port processing module comprises:
the first end of the first resistor is connected with the HBS bus, and the second end of the first resistor is connected with the base electrode of the first NPN triode;
the collector of the first NPN triode is connected with the HBS bus, and the emitter of the first NPN triode is connected with the 485 bus;
the cathode of the first diode is connected with the HBS bus, and the anode of the first diode is connected with the 485 bus;
the cathode of the first zener diode is connected with the HBS bus, and the anode of the first zener diode is connected with the first end of the second resistor;
the second end of the second resistor is connected with the base electrode of the second NPN triode;
the collector of the second NPN triode is connected with the second end of the first resistor, and the emitter of the second NPN triode is connected with the 485 bus;
the first end of the third resistor is connected with the HBS bus, and the second end of the third resistor is connected with the base electrode of the third NPN triode;
the collector of the third NPN triode is connected with the HBS bus, and the emitter of the third NPN triode is connected with the 485 bus;
the cathode of the third diode is connected with the HBS bus, and the anode of the third diode is connected with the 485 bus;
the cathode of the second zener diode is connected with the HBS bus, and the anode of the second zener diode is connected with the first end of the fourth resistor;
the second end of the fourth resistor is connected with the base electrode of the fourth NPN triode;
and the collector electrode of the fourth NPN triode is connected with the second end of the third resistor, and the emitter electrode of the fourth NPN triode is connected with the 485 bus.
9. The communications apparatus of claim 7, further comprising:
and the input end of the common mode interference filtering module is connected with the port, and the output end of the common mode interference filtering module is connected with the HBS bus.
10. The communications apparatus of claim 9, wherein the common mode interference filtering module is a common mode inductance.
CN202310106828.4A 2023-02-09 2023-02-09 Communication device Pending CN116366378A (en)

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