CN116346127A - Frequency processing device and method and ship - Google Patents
Frequency processing device and method and ship Download PDFInfo
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- CN116346127A CN116346127A CN202310332751.2A CN202310332751A CN116346127A CN 116346127 A CN116346127 A CN 116346127A CN 202310332751 A CN202310332751 A CN 202310332751A CN 116346127 A CN116346127 A CN 116346127A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/24—Automatic control of frequency or phase; Synchronisation using a reference signal directly applied to the generator
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
- F02D—CONTROLLING COMBUSTION ENGINES
- F02D31/00—Use of speed-sensing governors to control combustion engines, not otherwise provided for
- F02D31/001—Electric control of rotation speed
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T10/00—Road transport of goods or passengers
- Y02T10/10—Internal combustion engine [ICE] based vehicles
- Y02T10/40—Engine management systems
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Abstract
The invention discloses a frequency processing device and method and a ship. The device comprises a crystal oscillator module, a frequency division module, a signal output module and a control module; the crystal oscillator module is used for generating basic frequency and inputting the generated basic frequency to the frequency dividing module for frequency division; the frequency division module is used for carrying out frequency division processing on the basic frequency and outputting signals with at least two different frequency values so as to match the operation frequency values of different diesel engines; the signal output module is used for counting the signal output by the frequency division module as a clock signal based on the clock signal and the preloaded threshold value to generate a control signal of the diesel engine; the control module is used for adjusting the preloaded threshold value so that the signal output module outputs a control signal matched with the overspeed frequency of the diesel engine. The technical scheme provided by the embodiment of the invention has a simple structure, effectively improves the running reliability of the engine and reduces the cost.
Description
Technical Field
The invention relates to the technical field of engine control, in particular to a frequency processing device and method and a ship.
Background
In the prior art, the voltage of the generator set is regulated by controlling the rotating speed of the engine, so that the rotating speed of the engine is required to be in a reasonable range, the engine control unit judges whether the rotating speed of the engine is in the reasonable range or not by reading the rotating speed data of the rotating speed sensor, and when the rotating speed of the engine exceeds the set maximum rotating speed, the voltage output by the generator set exceeds the rated voltage range, and load equipment is possibly damaged, so that the engine is stopped. The overspeed protection system of the domestic nuclear power emergency diesel generator set is totally dependent on import, has higher economic cost and poorer reliability, restricts the development of the domestic nuclear power emergency diesel generator to a certain extent, and therefore, the further research and development of the overspeed protection system of the diesel generator set is urgent.
Disclosure of Invention
The invention provides a frequency processing device and method and a ship, which have higher reliability and safety, simple structure and low cost.
According to one aspect of the invention, a frequency processing device is provided, which comprises a crystal oscillator module, a frequency dividing module, a signal output module and a control module;
the crystal oscillator module is connected with the frequency dividing module and is used for generating basic frequency and inputting the generated basic frequency to the frequency dividing module for frequency division;
the frequency division module is used for carrying out frequency division processing on the basic frequency and outputting signals with at least two different frequency values so as to match the operation frequency values of different diesel engines;
the signal output module is connected with the frequency division module and is used for taking the signal output by the frequency division module as a clock signal and counting based on the clock signal and a preloaded threshold value to generate a control signal of the diesel engine;
the control module is connected with the signal output module and is used for adjusting the preloaded threshold value so that the signal output module outputs a control signal matched with the overspeed frequency of the diesel engine.
Optionally, the crystal oscillator module comprises a crystal oscillator and a crystal oscillator external circuit.
Optionally, the crystal oscillator comprises a crystal oscillator chip, and the crystal oscillator external circuit comprises a logic processing chip, a first capacitor, a second capacitor and a first resistor; the crystal oscillator chip is connected with the logic processing chip, and the crystal oscillator chip and the logic processing chip are used for generating basic frequency and inputting the generated basic frequency to the frequency dividing module for frequency division; the first end of the first capacitor is connected with the first end of the crystal oscillator chip, and the second end of the first capacitor is grounded; the first end of the second capacitor is connected with the second end of the crystal oscillator chip, and the second end of the second capacitor is grounded; the first end of the first resistor is connected with the common end of the first capacitor and the crystal oscillator chip, and the second end of the first resistor is connected with the common end of the second capacitor and the crystal oscillator chip.
Optionally, the frequency dividing module comprises a frequency dividing circuit and at least two resistors; the frequency dividing circuit comprises an input end and at least two output ends, and at least two resistors are in one-to-one correspondence with at least two output ends of the frequency dividing circuit; the first end of the resistor is connected with the output end of the corresponding frequency dividing circuit, and the second end of the resistor is connected with the output end of the frequency dividing module; the frequency dividing circuit is used for carrying out frequency dividing processing on the basic frequency and outputting signals with at least two different frequency values so as to match the operation frequency values of different diesel engines.
Optionally, the at least two output ends of the frequency dividing circuit include a first frequency output end, a second frequency output end, a third frequency output end and a fourth frequency output end; the at least two resistors comprise a second resistor, a third resistor, a fourth resistor and a fifth resistor; the first frequency output end is connected with the first end of the second resistor, and the second end of the second resistor is connected with the output end of the frequency dividing module; the second frequency output end is connected with the first end of the third resistor, and the second end of the third resistor is connected with the output end of the frequency dividing module; the third frequency output end is connected with the first end of the fourth resistor, and the second end of the fourth resistor is connected with the output end of the frequency dividing module; the fourth frequency output end is connected with the first end of the fifth resistor, and the second end of the fifth resistor is connected with the output end of the frequency dividing module.
Optionally, the signal output module includes at least one counter; the output end of the frequency dividing module is connected with the clock signal input end of the counter, the control module is connected with the input end of the counter, and the control module is used for setting the preloaded threshold value of the counter; the counter is used to count from a preloaded threshold.
Optionally, the at least one counter includes a first counter and a second counter; the first counter is connected with the second counter, the input end of the first counter is connected with the control module, and the input end of the second counter is connected with the control module.
Optionally, the control module includes a dial switch, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, and a thirteenth resistor; the first end of the sixth resistor is connected with the first pin of the dial switch; the first end of the seventh resistor is connected with the second pin of the dial switch; the first end of the eighth resistor is connected with a third pin of the dial switch; the first end of the ninth resistor is connected with a fourth pin of the dial switch; the second ends of the sixth resistor, the seventh resistor, the eighth resistor and the ninth resistor are connected with a power supply; the first end of the tenth resistor is connected with a fifth pin of the dial switch; the first end of the eleventh resistor is connected with a sixth pin of the dial switch; the first end of the twelfth resistor is connected with a seventh pin of the dial switch; the first end of the thirteenth resistor is connected with an eighth pin of the dial switch; the second ends of the tenth resistor, the eleventh resistor, the twelfth resistor and the thirteenth resistor are connected with a power supply; the sixth resistor, the seventh resistor, the eighth resistor, the ninth resistor, the tenth resistor, the eleventh resistor, the twelfth resistor, and the thirteenth resistor are configured to be used with the dial switch to adjust the preload threshold.
According to another aspect of the present invention, there is provided a frequency processing method performed by a frequency processing apparatus including a crystal oscillator module, a frequency dividing module, a signal output module, and a control module;
the method comprises the following steps:
the crystal oscillator module generates basic frequency and inputs the generated basic frequency to the frequency dividing module for frequency division;
the frequency division module carries out frequency division processing on the basic frequency, outputs signals with at least two different frequency values to match the running frequency values of different diesel engines, and inputs the output signals to the signal output module;
the signal output module takes the signal output by the frequency division module as a clock signal, and counts based on the clock signal and the preloaded value to generate a control signal of the diesel engine;
the control module adjusts the preloaded value so that the signal output module outputs a control signal matched with the overspeed frequency of the diesel engine, and further control of the engine is achieved.
According to another aspect of the invention there is provided a vessel comprising a frequency processing apparatus according to any one of the invention.
According to the technical scheme, a crystal oscillator module, a frequency dividing module, a signal output module and a control module are arranged; the crystal oscillator module is connected with the frequency dividing module and is used for generating basic frequency and inputting the generated basic frequency to the frequency dividing module for frequency division; the frequency division module is used for carrying out frequency division processing on the basic frequency and outputting signals with at least two different frequency values so as to match the operation frequency values of different diesel engines; the signal output module is connected with the frequency division module and is used for taking the signal output by the frequency division module as a clock signal and counting based on the clock signal and the preloaded threshold value to generate a control signal of the diesel engine; the control module is connected with the signal output module and used for adjusting the preloaded threshold value so that the signal output module outputs a control signal matched with the overspeed frequency of the diesel engine. According to the technical scheme provided by the embodiment of the invention, the control module and the frequency dividing module are used for dividing and adjusting the basic frequency to achieve the aim that different frequency values can be output to match the operating frequency values of different diesel engines, and the frequency adjustment between 400Hz and 6000Hz can be covered; because the software programming is not involved, software V & V authentication is not needed in use, and the cost is effectively reduced.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a frequency processing apparatus according to a first embodiment of the present invention.
Fig. 2 is a schematic structural diagram of a frequency processing apparatus according to a second embodiment of the present invention.
Fig. 3 is a flow chart of a frequency processing method according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
Fig. 1 is a schematic structural diagram of a frequency processing apparatus according to a first embodiment of the present invention, as shown in fig. 1, the apparatus includes a crystal oscillator module 110, a frequency dividing module 120, a signal output module 130, and a control module 140;
the crystal oscillator module 110 is connected with the frequency dividing module 120, and the crystal oscillator module 110 is used for generating a basic frequency and inputting the generated basic frequency to the frequency dividing module 120 for frequency division;
specifically, the crystal oscillator module 110 generates a fundamental frequency of 5M, and inputs the generated fundamental frequency into a frequency divider circuit capable of selecting different frequency division numbers for frequency division processing.
The frequency division module 120 is configured to perform frequency division processing on the base frequency, and output signals with at least two different frequency values to match the operation frequency values of different diesel engines;
the at least two different frequency value signals can be specifically understood as internal clock frequency signals, and the different internal clock frequency signals can be selected through the short-circuited position of the short-circuited connection sheet.
Specifically, the frequency dividing module inputs the basic frequency generated by the crystal oscillator module into the frequency dividing module through the clock input end and carries out frequency dividing processing on the basic frequency, so that different frequency values can be output through the frequency dividing processing on the basic frequency, the operating frequency values of different diesel engines can be matched, the universality of products is higher, and the frequency dividing module can cover adjustment between 400Hz-6000 Hz. The frequency dividing module can be specifically understood as a 14-level binary counter, and comprises a clock input end, an asynchronous host reset input end and 12 full-buffer output ends, and has the remarkable characteristic of high running speed.
The signal output module 130 is connected to the frequency division module 120, and is configured to generate a control signal of the diesel engine by counting the signal output by the frequency division module 120 as a clock signal based on the clock signal and the preloaded threshold value;
the pre-load threshold is specifically understood as a diesel engine overspeed frequency signal, the frequency division module outputs different frequency value signals to be input to the signal output module, the signal output module takes the signal output by the frequency division module 120 as a clock signal, the control module 140 sets the pre-load threshold of the signal output module 130, and the signal output module 130 starts counting according to the input frequency from the pre-load value; after the set value is counted, the signal output module 130 outputs a low level.
The control module 140 is connected to the signal output module 130 for adjusting the pre-load threshold value so that the signal output module 130 outputs a control signal matching the overspeed frequency of the diesel engine.
Specifically, the control module effects engine control through an internal clock frequency and a diesel engine overspeed frequency. Illustratively, 390 rated speed is 600rpm, corresponding to 80 teeth, overspeed speed is 600X1.15 =690 rpm; diesel engine overspeed frequency= (number of teeth 80 x overspeed 690)/60 = 920Hz; assuming shorting tab shorting position 9, then internal clock frequency= (5×10 6 ) 29= 9765.6Hz; the number to be encoded m=240- ((internal clock frequency x 16)/diesel engine overspeed frequency) =240-170=70; therefore, the number to be encoded m=70=64+4+2=2 6 +2 2 +2 1 The method comprises the steps of carrying out a first treatment on the surface of the At this time, the control module controls the display according to the corresponding number of the dialing code, namely
From this, it can be obtained that setting up of 390 changes diesel engine unit overspeed protection corresponds n=9 places short circuit, opens dial 3, 4, 8, then corresponds 390 changes diesel engine's 115% overspeed alarm.
According to the technical scheme provided by the embodiment of the invention, a crystal oscillator module, a frequency dividing module, a signal output module and a control module are arranged; the crystal oscillator module is connected with the frequency dividing module and is used for generating basic frequency and inputting the generated basic frequency to the frequency dividing module for frequency division; the frequency division module is used for carrying out frequency division processing on the basic frequency and outputting signals with at least two different frequency values so as to match the operation frequency values of different diesel engines; the signal output module is connected with the frequency division module and is used for taking the signal output by the frequency division module as a clock signal and counting based on the clock signal and the preloaded threshold value to generate a control signal of the diesel engine; the control module is connected with the signal output module and used for adjusting the preloaded threshold value so that the signal output module outputs a control signal matched with the overspeed frequency of the diesel engine. Because the technical proposal provided by the embodiment of the invention adopts hardware design, the structure is simple, no software program code design is needed, the error of the program code is avoided, and the running reliability of the engine is further improved; because the software programming is not involved, software V & V authentication is not needed in use, and the cost is effectively reduced.
Example two
Fig. 2 is a schematic structural diagram of a frequency processing apparatus according to a second embodiment of the present invention, where the foregoing embodiment is further refined based on the foregoing embodiment, and as shown in fig. 2, optionally, a crystal oscillator module 110 includes a crystal oscillator and a crystal oscillator external circuit.
Optionally, the crystal oscillator comprises a crystal oscillator chip OSC1, and the crystal oscillator external circuit comprises a logic processing chip IC10, a first capacitor C1, a second capacitor C2 and a first resistor R1; the crystal oscillator chip OSC1 is connected with the logic processing chip IC10, and the crystal oscillator chip OSC1 and the logic processing chip IC10 are used for generating basic frequency and inputting the generated basic frequency into the frequency dividing module for frequency division; a first end of the first capacitor C1 is connected with a first end of the crystal oscillator chip OSC1, and a second end of the first capacitor C1 is grounded; the first end of the second capacitor C2 is connected with the second end of the crystal oscillator chip OSC1, and the second end of the second capacitor C2 is grounded; the first end of the first resistor R1 is connected to the common terminal of the first capacitor C1 and the crystal oscillator chip OSC1, and the second end of the first resistor R1 is connected to the common terminal of the second capacitor C2 and the crystal oscillator chip OSC 1.
The logic processing chip IC10 includes 12 pins, and the 1 pin, the 2 pin, the 4 pin, the 5 pin and the 6 pin are all test points for detecting a line fault point, the 8 pin and the 9 pin are grounded, the 12 pin and the 13 pin are connected together and connected with the first end of the crystal oscillator chip OSC1, and the 11 pin is connected with the second end of the crystal oscillator chip OSC 1.
Optionally, the frequency dividing module 120 includes a frequency dividing circuit and at least two resistors; the frequency dividing circuit comprises an input end and at least two output ends, and at least two resistors are in one-to-one correspondence with at least two output ends of the frequency dividing circuit; the first end of the resistor is connected with the output end of the corresponding frequency dividing circuit, and the second end of the resistor is connected with the output end of the frequency dividing module; the frequency dividing circuit is used for carrying out frequency dividing processing on the basic frequency and outputting signals with at least two different frequency values so as to match the operation frequency values of different diesel engines.
The frequency dividing circuit comprises a logic processing chip IC4, the logic processing chip IC4 is a 14-stage binary counter, the logic processing chip IC4 comprises a clock input end CP, an asynchronous host reset input end MR and 12 full-buffer output ends (Q0, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10, Q11, Q12 and Q13), the clock input end CP of the logic processing chip IC4 is connected with an 11 pin of the logic processing chip IC10, and the asynchronous host reset input end MR of the logic processing chip IC4 is grounded. The full buffer output end is connected with the resistor and is used for outputting a frequency signal.
Optionally, at least two output ends of the frequency dividing circuit include a first frequency output end Q8, a second frequency output end Q9, a third frequency output end Q10 and a fourth frequency output end Q11; the at least two resistors comprise a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5; the first frequency output end Q9 is connected with the first end of the second resistor R2, and the second end of the second resistor R2 is connected with the output end PT5 of the frequency dividing module; the second frequency output end Q10 is connected with the first end of a third resistor R3, and the second end of the third resistor R3 is connected with the output end PT5 of the frequency dividing module; the third frequency output end Q11 is connected with the first end of a fourth resistor R4, and the second end of the fourth resistor R4 is connected with the output end PT5 of the frequency dividing module; the fourth frequency output end Q12 is connected to the first end of the fifth resistor R5, and the second end of the fifth resistor R5 is connected to the output end PT5 of the frequency dividing module.
The second resistor R2, the third resistor R3, the fourth resistor R4, and the fifth resistor R5 are provided for the purpose of ensuring the reliability and the practicability of the design.
Optionally, the signal output module 130 includes at least one counter; the output end of the frequency dividing module 120 is connected with the clock signal input end of the counter, the control module is connected with the input end of the counter, and the control module is used for setting the preloaded threshold value of the counter; the counter is used to count from the preloaded threshold.
Optionally, the at least one counter includes a first counter IC6 and a second counter IC7; the first counter IC6 is connected with the second counter IC7, the input end of the first counter is connected with the control module, and the input end of the second counter is connected with the control module.
Optionally, the control module 140 includes a dial switch SW1, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, and a thirteenth resistor R13; the first end of the sixth resistor R6 is connected with the first pin 1 of the dial switch SW 1; the first end of the seventh resistor R7 is connected with the second pin 2 of the dial switch SW 1; the first end of the eighth resistor R8 is connected with the third pin 3 of the dial switch SW 1; a first end of the ninth resistor R9 is connected with a fourth pin 4 of the dial switch SW 1; the second ends of the sixth resistor R6, the seventh resistor R7, the eighth resistor R8 and the ninth resistor R9 are connected with a power supply +15V; a first end of the tenth resistor R10 is connected with a fifth pin 5 of the dial switch SW 1; the first end of the eleventh resistor R11 is connected with the sixth pin 6 of the dial switch SW 1; a first end of the twelfth resistor R12 is connected with a seventh pin 7 of the dial switch SW 1; a first end of the thirteenth resistor R13 is connected with the eighth pin 8 of the dial switch SW 1; the second ends of the tenth resistor R10, the eleventh resistor R11, the twelfth resistor R12 and the thirteenth resistor R13 are connected with a power supply +15V; the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the ninth resistor R9, the tenth resistor R10, the eleventh resistor R11, the twelfth resistor R12 and the thirteenth resistor R13 are used for being matched with a dial switch to adjust the preloaded threshold.
Wherein, ninth pin 9, tenth pin 10, eleventh pin 11, twelfth pin 12, thirteenth pin 13, fourteenth pin 14, fifteenth pin 15 and sixteenth pin 16 of the dial switch SW1 are connected together and grounded; the first pin 1 of the first counter IC6 is connected with the first pin 1 of the second counter IC7, the third pin 3 of the first counter IC6 is connected with the first end of the seventh resistor R7, the thirteenth pin 13 of the first counter IC6 is connected with the first end of the ninth resistor R9, the twelfth pin 12 of the first counter IC6 is connected with the first end of the eighth resistor R8, the fourth pin 4 of the first counter IC6 is connected with the first end of the sixth resistor R6, the sixteenth pin 16 of the first counter IC6 is grounded, and the ninth pin 9 and the tenth pin 10 of the first counter IC6 are connected together and are connected with a power supply +15V; the third pin 3 of the second counter IC7 is connected to the first end of the eleventh resistor R11, the thirteenth pin 13 of the second counter IC7 is connected to the first end of the thirteenth resistor R13, the twelfth pin 12 of the second counter IC7 is connected to the first end of the tenth resistor R10, the fourth pin 4 of the second counter IC7 is connected to the first end of the twelfth resistor R12, the sixteenth pin 16 of the second counter IC7 is grounded, the ninth pin 9 and the tenth pin 10 of the second counter IC7 are connected together and are connected to the power source +15v, and the fifteenth pin 15 of the second counter IC7 is connected to the seventh pin 7 of the first counter IC 6.
The specific working principle of the frequency processing device is as follows:
the crystal oscillator and the crystal oscillator external circuit generate 1 basic frequency of 5M, and input the basic frequency into a frequency dividing circuit capable of selecting different frequency dividing numbers to divide the frequency through a logic processing chip IC4, and ohmic resistors are also arranged when different frequency dividing is selected in order to ensure the reliability and the practicability of the design; the divided square wave is then output to the first counter IC6 and the second counter IC 7. The dial switch SW1 is used to set the preload threshold of the first counter IC6 and the second counter IC7, the counter starts counting from the preload value according to the input frequency; after the set value is counted up, the second counter IC7 outputs a low level.
According to the control value which is needed to be realized by the engine, the frequency division value or the dial switch is adjusted, so that the control of the engine is realized, and the adjusting method is determined according to the frequency method as follows:
assuming fH as the internal clock frequency, 4 different clock frequencies may be chosen, n=9, 10, 11, 12, respectively, depending on the position of the shorting chip: fh= (5 x 10) 6 )/2 n
n＝9.................fH＝9765.2Hz
n＝10...............fH＝4882.8Hz
n＝11...............fH＝2441.4Hz
n＝12...............fH＝1220.7Hz
Let fS be the corresponding diesel overspeed frequency:
(fH/(240-m))＝(fS/16)
m is more than 0 and less than 120, m is the number to be coded, and binary mode coverage is realized through a dial switch.
According to fig. 2, the binary values of the dial switch are now set as follows:
dialing 1 to 2 0
The binary mode corresponding to the dial switch can be adjusted through circuit design, and the invention is not limited to this.
According to the technical scheme provided by the embodiment of the invention, the crystal oscillator and the crystal oscillator external circuit are arranged and are used for generating the basic frequency and inputting the basic frequency into the frequency dividing circuit capable of selecting different frequency dividing numbers for frequency division, then the clock signals after frequency division are output into the first counter and the second counter for counting, and the input frequency signals are subjected to secondary fine tuning according to the internal clock frequency and the diesel engine overspeed frequency, so that the running frequency values of different diesel engines are matched, and the control of the engines is realized. The technical scheme provided by the embodiment of the invention can effectively realize domestic matching of the overspeed protection system of the nuclear power emergency diesel generator set, and the frequency processing device uses a digital logic circuit to realize the functions of emergency stop and alarm of the nuclear power emergency diesel generator set, so that the hardware is safe and reliable.
Example III
Fig. 3 is a schematic flow chart of a frequency processing method according to a third embodiment of the present invention, where the frequency processing method may be executed by the frequency processing apparatus according to any embodiment of the present invention, and the frequency processing apparatus includes a crystal oscillator module, a frequency dividing module, a signal output module, and a control module; as shown in fig. 3, the method includes:
s310, generating a basic frequency by a crystal oscillator module, and inputting the generated basic frequency to a frequency dividing module for frequency division;
s320, the frequency division module carries out frequency division processing on the basic frequency, outputs signals with at least two different frequency values to match the running frequency values of different diesel engines, and inputs the output signals to the signal output module;
s330, the signal output module takes the signal output by the frequency division module as a clock signal, and counts based on the clock signal and the preloaded value to generate a control signal of the diesel engine;
s340, the control module adjusts the pre-loading value so that the signal output module outputs a control signal matched with the overspeed frequency of the diesel engine, and further control of the engine is achieved.
According to the technical scheme provided by the embodiment of the invention, the crystal oscillator module generates the basic frequency, and the generated basic frequency is input to the frequency dividing module for frequency division; the frequency division module carries out frequency division processing on the basic frequency, outputs signals with at least two different frequency values to match the running frequency values of different diesel engines, and inputs the output signals to the signal output module; the signal output module takes the signal output by the frequency division module as a clock signal, and counts based on the clock signal and the preloaded value to generate a control signal of the diesel engine; the control module adjusts the pre-loading value so that the signal output module outputs a control signal matched with the overspeed frequency of the diesel engine, and further control of the engine is achieved. The technical scheme provided by the embodiment of the invention can effectively realize domestic matching of the overspeed protection system of the nuclear power emergency diesel generator set, and the digital logic circuit is used for realizing the functions of emergency stop and alarm of the nuclear power emergency diesel generator set, so that the hardware is safe and reliable, the structure is simple, and the cost is effectively reduced.
The third embodiment of the invention provides a ship, which comprises the frequency processing device provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of an execution method.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.
Claims (10)
1. The frequency processing device is characterized by comprising a crystal oscillator module, a frequency dividing module, a signal output module and a control module;
the crystal oscillator module is connected with the frequency dividing module and is used for generating basic frequency and inputting the generated basic frequency to the frequency dividing module for frequency division;
the frequency division module is used for carrying out frequency division processing on the basic frequency and outputting signals with at least two different frequency values so as to match the operation frequency values of different diesel engines;
the signal output module is connected with the frequency division module and is used for taking the signal output by the frequency division module as a clock signal and counting based on the clock signal and a preloaded threshold value to generate a control signal of the diesel engine;
the control module is connected with the signal output module and is used for adjusting the preloaded threshold value so that the signal output module outputs a control signal matched with the overspeed frequency of the diesel engine.
2. The system of claim 1, wherein the crystal oscillator module comprises a crystal oscillator and a crystal oscillator external circuit.
3. The system of claim 2, wherein the crystal oscillator comprises a crystal oscillator chip, and the crystal oscillator external circuit comprises a logic processing chip, a first capacitor, a second capacitor, and a first resistor; the crystal oscillator chip is connected with the logic processing chip, and the crystal oscillator chip and the logic processing chip are used for generating basic frequency and inputting the generated basic frequency to the frequency dividing module for frequency division; the first end of the first capacitor is connected with the first end of the crystal oscillator chip, and the second end of the first capacitor is grounded; the first end of the second capacitor is connected with the second end of the crystal oscillator chip, and the second end of the second capacitor is grounded; the first end of the first resistor is connected with the common end of the first capacitor and the crystal oscillator chip, and the second end of the first resistor is connected with the common end of the second capacitor and the crystal oscillator chip.
4. The system of claim 1, wherein the frequency dividing module comprises a frequency dividing circuit and at least two resistors; the frequency dividing circuit comprises an input end and at least two output ends, and at least two resistors are in one-to-one correspondence with at least two output ends of the frequency dividing circuit; the first end of the resistor is connected with the output end of the corresponding frequency dividing circuit, and the second end of the resistor is connected with the output end of the frequency dividing module; the frequency dividing circuit is used for carrying out frequency dividing processing on the basic frequency and outputting signals with at least two different frequency values so as to match the operation frequency values of different diesel engines.
5. The system of claim 4, wherein the at least two outputs of the divider circuit include a first frequency output, a second frequency output, a third frequency output, and a fourth frequency output; the at least two resistors comprise a second resistor, a third resistor, a fourth resistor and a fifth resistor; the first frequency output end is connected with the first end of the second resistor, and the second end of the second resistor is connected with the output end of the frequency dividing module; the second frequency output end is connected with the first end of the third resistor, and the second end of the third resistor is connected with the output end of the frequency dividing module; the third frequency output end is connected with the first end of the fourth resistor, and the second end of the fourth resistor is connected with the output end of the frequency dividing module; the fourth frequency output end is connected with the first end of the fifth resistor, and the second end of the fifth resistor is connected with the output end of the frequency dividing module.
6. The system of claim 1, wherein the signal output module comprises at least one counter; the output end of the frequency dividing module is connected with the clock signal input end of the counter, the control module is connected with the input end of the counter, and the control module is used for setting the preloaded threshold value of the counter; the counter is used to count from a preloaded threshold.
7. The system of claim 6, wherein the at least one counter comprises a first counter and a second counter; the first counter is connected with the second counter, the input end of the first counter is connected with the control module, and the input end of the second counter is connected with the control module.
8. The system of claim 6, wherein the control module comprises a dial switch, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, and a thirteenth resistor; the first end of the sixth resistor is connected with the first pin of the dial switch; the first end of the seventh resistor is connected with the second pin of the dial switch; the first end of the eighth resistor is connected with a third pin of the dial switch; the first end of the ninth resistor is connected with a fourth pin of the dial switch; the second ends of the sixth resistor, the seventh resistor, the eighth resistor and the ninth resistor are connected with a power supply; the first end of the tenth resistor is connected with a fifth pin of the dial switch; the first end of the eleventh resistor is connected with a sixth pin of the dial switch; the first end of the twelfth resistor is connected with a seventh pin of the dial switch; the first end of the thirteenth resistor is connected with an eighth pin of the dial switch; the second ends of the tenth resistor, the eleventh resistor, the twelfth resistor and the thirteenth resistor are connected with a power supply; the sixth resistor, the seventh resistor, the eighth resistor, the ninth resistor, the tenth resistor, the eleventh resistor, the twelfth resistor, and the thirteenth resistor are configured to be used with the dial switch to adjust the preload threshold.
9. The frequency processing method is characterized by being executed by a frequency processing device, wherein the device comprises a crystal oscillator module, a frequency dividing module, a signal output module and a control module;
the method comprises the following steps:
the crystal oscillator module generates basic frequency and inputs the generated basic frequency to the frequency dividing module for frequency division;
the frequency division module carries out frequency division processing on the basic frequency, outputs signals with at least two different frequency values to match the running frequency values of different diesel engines, and inputs the output signals to the signal output module;
the signal output module takes the signal output by the frequency division module as a clock signal, and counts based on the clock signal and the preloaded value to generate a control signal of the diesel engine;
the control module adjusts the preloaded value so that the signal output module outputs a control signal matched with the overspeed frequency of the diesel engine, and further control of the engine is achieved.
10. A ship comprising a frequency processing device according to any one of claims 1-8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310332751.2A CN116346127A (en) | 2023-03-30 | 2023-03-30 | Frequency processing device and method and ship |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310332751.2A CN116346127A (en) | 2023-03-30 | 2023-03-30 | Frequency processing device and method and ship |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116346127A true CN116346127A (en) | 2023-06-27 |
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ID=86882115
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310332751.2A Pending CN116346127A (en) | 2023-03-30 | 2023-03-30 | Frequency processing device and method and ship |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116346127A (en) |
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2023
- 2023-03-30 CN CN202310332751.2A patent/CN116346127A/en active Pending
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