CN116344436A - Method for preparing double-layer SOI material - Google Patents

Method for preparing double-layer SOI material Download PDF

Info

Publication number
CN116344436A
CN116344436A CN202310331894.1A CN202310331894A CN116344436A CN 116344436 A CN116344436 A CN 116344436A CN 202310331894 A CN202310331894 A CN 202310331894A CN 116344436 A CN116344436 A CN 116344436A
Authority
CN
China
Prior art keywords
substrate
ions
layer
soi material
bubbling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310331894.1A
Other languages
Chinese (zh)
Inventor
陈国兴
汪聪颖
刘燕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Simgui Technology Co Ltd
Original Assignee
Shanghai Simgui Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Simgui Technology Co Ltd filed Critical Shanghai Simgui Technology Co Ltd
Priority to CN202310331894.1A priority Critical patent/CN116344436A/en
Publication of CN116344436A publication Critical patent/CN116344436A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)

Abstract

The present application provides a method of preparing a bilayer SOI material, the method comprising the steps of: providing a first substrate; implanting bubbling ions on a surface of the first substrate; providing a second substrate, and bonding the surface of the first substrate, into which foaming ions are implanted, with the second substrate; stripping a portion of the first substrate away from the second substrate to obtain a single layer of SOI material; providing a third substrate; implanting bubbling ions on the surface of the third substrate; bonding the surface of the third substrate, into which foaming ions are implanted, with the single-layer SOI material; and stripping a part of the third substrate away from the single-layer SOI material to obtain the double-layer SOI material. The double-layer SOI material with good uniformity can be obtained by the method.

Description

Method for preparing double-layer SOI material
Technical Field
The present application relates to the field of semiconductor manufacturing, and in particular, to a method for preparing a double-layer SOI material.
Background
Silicon-on-insulator (Silicon On Insulator, SOI) is a new generation of silicon-based materials that are widely used, and has important applications in low voltage, low power consumption circuits, micro-mechanical sensors, optoelectronic integration, and the like.
The current fabrication techniques of SOI wafers mainly include the separation by implanted oxygen (Separate by IMplant Oxygen, SIMOX) technique, the Bond Etch SOI (BESOI) technique, and the back side Etch SOI (BESOI) technique. The SIMOX technology is to implant oxygen ions into a silicon wafer, control the implantation dosage and energy, and change the thickness of a silicon dioxide insulating buried layer and a top silicon layer. The BESOI technology is to oxidize at least one of two silicon wafers, then attach the two silicon wafers together to realize bonding, and then grind, etch and chemically and mechanically polish the back surface to reduce the thickness. The buried oxide layer and the top silicon with better quality can be obtained by the BESOI technology, the thickness of the buried oxide layer can be adjusted, and the preparation cost is low.
Based on current market development, single-layer SOI materials have not been satisfied, and a need has also been raised for double-layer SOI materials. Therefore, a preparation method of the double-layer SOI material needs to be found, so that the market demand can be met, and the total yield of the double-layer SOI material can be ensured.
Disclosure of Invention
The technical problem to be solved by the application is to provide a method for preparing a double-layer SOI material, which can obtain the double-layer SOI material with good uniformity.
In order to solve the above problems, the following provides a method for preparing a double-layer SOI material, comprising the steps of: providing a first substrate; implanting bubbling ions on a surface of the first substrate; providing a second substrate, and bonding the surface of the first substrate, into which foaming ions are implanted, with the second substrate; stripping a portion of the first substrate away from the second substrate to obtain a single layer of SOI material; providing a third substrate; implanting bubbling ions on the surface of the third substrate; bonding the surface of the third substrate, into which foaming ions are implanted, with the single-layer SOI material; and stripping a part of the third substrate away from the single-layer SOI material to obtain the double-layer SOI material.
In some embodiments, the first, second, and third substrates are monocrystalline silicon substrates.
In some embodiments, before implanting the bubbling ions into the first substrate, the method further comprises the step of forming an oxide layer on a surface of the first substrate.
In some embodiments, the method of forming the oxide layer on the surface of the first substrate is any one of a thermal oxidation method and a chemical vapor deposition method.
In some embodiments, before implanting the bubbling ions into the third substrate, the method further comprises the step of forming an oxide layer on a surface of the third substrate.
In some embodiments, the method of forming the oxide layer on the surface of the third substrate is any one of a thermal oxidation method and a chemical vapor deposition method.
In some embodiments, the bubbling ion is selected from one of hydrogen and helium, or a combination thereof.
In some embodiments, the surface of the second substrate bonded to the first substrate is either a smooth surface or an oxidized layer.
In some embodiments, the single layer SOI material and the double layer SOI material are polished by a chemical mechanical polishing process.
In some embodiments, the third substrate is bonded to the single layer of SOI material by plasma treatment and vacuum bonding.
According to the technical scheme, on the basis of the single-layer SOI material obtained by surface bonding of the injection foaming ions, the foaming ions are injected into the third substrate and bonded with the single-layer SOI material, so that the double-layer SOI material with good uniformity can be obtained.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application. Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail, but should be considered part of the specification where appropriate.
Drawings
FIG. 1 is a flow chart illustrating one embodiment of a method for fabricating a bilayer SOI material as described herein;
fig. 2 to 9 are schematic views of device structures formed by main steps of a specific embodiment of a method for preparing a double-layer SOI material according to the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
One embodiment of the present application provides a method of preparing a bilayer SOI material.
Referring to fig. 1, a flowchart of one embodiment of a method for fabricating a dual layer SOI material is shown. As shown in fig. 1, a method for preparing a double-layer SOI material according to an embodiment of the present application includes: step S110, providing a first substrate; step S111, implanting foaming ions on the surface of the first substrate; step S112, providing a second substrate, and bonding the surface of the first substrate, into which the foaming ions are implanted, with the second substrate; step S113, stripping part of the first substrate far away from the second substrate to obtain a single-layer SOI material; step S114, providing a third substrate; step S115, implanting foaming ions on the surface of the third substrate; step S116, bonding the surface of the third substrate, into which foaming ions are implanted, with the single-layer SOI material; step S117, peeling off a portion of the third substrate away from the single-layer SOI material to obtain a double-layer SOI material.
Fig. 2 to fig. 9 are schematic views of device structures formed by main steps of a specific embodiment of a method for preparing a double-layer SOI material as described in the present application.
Referring to step S110, as shown in fig. 2, a first substrate 21 is provided. In this embodiment, the material of the first substrate 21 is monocrystalline silicon material, which is compatible with large-scale integrated circuits. In other embodiments, the material of the first substrate 21 may be one of polysilicon, or amorphous silicon, or may be single crystal germanium, germanium on insulator, or a silicon germanium compound, or may have a silicon on insulator structure or an epitaxial structure on silicon.
Referring to step S111, as shown in fig. 3, bubbling ions are implanted into the surface of the first substrate 21. In this embodiment, before the first substrate 21 is implanted with the bubbling ions, the method further includes a step of forming an oxide layer 211 on the surface of the first substrate 21. In this embodiment, an oxide layer 211 is formed on the surface of the first substrate 21 by a thermal oxidation method. In other embodiments, the oxide layer 211 may also be formed using chemical vapor deposition. In this embodiment, the bubbling ions implanted into the surface of the first substrate 21 are hydrogen ions. In other embodiments, the bubbling ion is selected from one or a combination of hydrogen and helium ions.
Referring to fig. 4, referring to step S112, a second substrate 22 is provided, and the surface of the first substrate 21 implanted with the bubbling ions is bonded to the second substrate 22. In this embodiment, the material of the second substrate 22 is monocrystalline silicon material, which is compatible with large scale integrated circuits. In other embodiments, the material of the second substrate 22 may be one of polysilicon, or amorphous silicon, or may be single crystal germanium, germanium on insulator, or a silicon germanium compound, or may have a silicon on insulator structure or an epitaxial structure on silicon. In this embodiment, the surface to be bonded of the second substrate 22 is a smooth surface. In other embodiments, the surface of the second substrate 22 may also have an oxide layer. In this embodiment, before the first substrate 21 and the second substrate 22 are bonded, the method further includes a step of cleaning and activating the first substrate 21 and the second substrate 22. In this embodiment, the surface of the first substrate 21 into which the bubbling ions are injected and the second substrate 22 are bonded together at room temperature.
Referring to step S113, as shown in fig. 5, a portion of the first substrate 21 remote from the second substrate 22 is peeled off to obtain a single layer of SOI material 24. In this embodiment, the bonded first substrate 21 and second substrate 22 are heat treated to form microcavities where the bubbling ions are implanted, thereby allowing the portion of the first substrate 21 remote from the second substrate 22 to be stripped to form a single layer of SOI material 24. Then, high-temperature annealing is performed to increase the bonding strength and recover the damage caused by the implantation of hydrogen ions on the surface of the first substrate 21.
In this embodiment, polishing the single layer of SOI material 24 by a chemical mechanical polishing process is also included. The chemical mechanical polishing process is to apply the single layer of SOI material 24 to a polishing pad for relative movement, and combine with the chemical etching action of the polishing liquid to form a soft layer and remove the soft layer, resulting in a single layer of SOI material 24 that is highly planarized, has low surface roughness, and has low defects.
Referring to step S114, a third substrate 23 is provided as shown in fig. 6. In this embodiment, the material of the third substrate 23 is monocrystalline silicon material, which is compatible with large-scale integrated circuits. In other embodiments, the material of the third substrate 23 may be one of polysilicon, or amorphous silicon, or may be single crystal germanium, germanium on insulator, or a silicon germanium compound, or may have a silicon on insulator structure or an epitaxial structure on silicon.
Referring to step S115, as shown in fig. 7, bubbling ions are implanted into the surface of the third substrate 23. In this embodiment, before the third substrate 23 is implanted with the bubbling ions, the method further includes a step of forming an oxide layer 231 on the surface of the first substrate 23. In this embodiment, an oxide layer 231 is formed on the surface of the third substrate 23 by a thermal oxidation method. In other embodiments, the oxide layer 231 may also be formed using chemical vapor deposition. In this embodiment, the bubbling ions implanted on the surface of the third substrate 23 are hydrogen ions. In other embodiments, the bubbling ion is selected from one or a combination of hydrogen and helium ions.
Referring to fig. 8, referring to step S116, the surface of the third substrate 23, into which the foaming ions are implanted, is bonded to the single-layer SOI material 24. In this embodiment, the surface to be bonded of the third substrate 23 is a smooth surface. In other embodiments, the surface of the third substrate 23 is either a smooth surface or an oxide layer. In this embodiment, the third substrate 23 and the single-layer SOI material 24 are bonded by plasma treatment and vacuum bonding. The plasma treatment is to change the activity of the surface of the substance by ionized gas, remove the polluted impurities on the surface of the substance and improve the adhesive force of the surface of the substance. The energy of particles in the plasma is generally about several to tens of electron volts, which is larger than the bonding bond energy of the polymer material, and can completely break the chemical bond of the organic macromolecule to form a new bond, but is far lower than the high-energy radioactive rays, only the surface of the material is involved, and the performance of the matrix is not affected. In the existing bonding technology, the surface to be bonded is directly bonded by adopting a conventional bonding method at room temperature, so that the bonding force of the edge of the bonding surface is smaller, the bonding strength of the edge of the bonding surface is reduced, and bubbles are easy to form. In this embodiment, the surface of the third substrate 23 implanted with the foaming ions and the surface of the single-layer SOI material 24 are bonded by vacuum bonding.
Referring to fig. 9, referring to step S117, a portion of the third substrate 23 remote from the single layer of SOI material 24 is stripped to yield a double layer of SOI material 25. In this embodiment, the bonded third substrate 23 and single layer SOI material 24 are heat treated to form microcavities where the bubbling ions are implanted, thereby allowing the silicon wafer to delaminate to form a double layer SOI material 25. And then high-temperature annealing is performed to increase the bonding strength and recover damage caused by the implantation of hydrogen ions on the surface of the third substrate 23.
In this embodiment, polishing the double layer SOI material 25 by a chemical mechanical polishing process is also included. The chemical mechanical polishing process is to apply the double-layer SOI material 25 to a polishing pad to perform a relative motion, and combine the chemical etching action of the polishing solution to form a soft layer and remove the soft layer, thereby obtaining the double-layer SOI material 25 with high planarization, low surface roughness and low defects.
It should be noted that in this document, relational terms such as "first" and "second" and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the statement "comprises" and "comprising" does not exclude the presence of other elements than those listed in any process, method, article, or apparatus that comprises the element.
The embodiments in this application are described in a related manner, and identical and similar parts of the embodiments are all referred to each other, and each embodiment is mainly different from other embodiments.
The foregoing is merely a preferred embodiment of the present application and is not intended to limit the scope of the present application. It should be noted that, for a person skilled in the art, several improvements and modifications can be made without departing from the principle of the present application, and these improvements and modifications should also be considered as the protection scope of the present application.

Claims (10)

1. A method of making a bilayer SOI material comprising the steps of:
providing a first substrate;
implanting bubbling ions on a surface of the first substrate;
providing a second substrate, and bonding the surface of the first substrate, into which foaming ions are implanted, with the second substrate;
stripping a portion of the first substrate away from the second substrate to obtain a single layer of SOI material;
providing a third substrate;
implanting bubbling ions on the surface of the third substrate;
bonding the surface of the third substrate, into which foaming ions are implanted, with the single-layer SOI material;
and stripping a part of the third substrate away from the single-layer SOI material to obtain the double-layer SOI material.
2. The method of claim 1, wherein the first substrate, the second substrate, and the third substrate are monocrystalline silicon substrates.
3. The method of claim 1, further comprising the step of forming an oxide layer on a surface of the first substrate prior to implanting the bubbling ions into the first substrate.
4. The method according to claim 3, wherein the method of forming an oxide layer on the surface of the first substrate is any one of a thermal oxidation method and a chemical vapor deposition method.
5. The method of claim 1, further comprising the step of forming an oxide layer on a surface of the third substrate prior to implanting the bubbling ions into the third substrate.
6. The method according to claim 5, wherein the method of forming an oxide layer on the surface of the third substrate is any one of a thermal oxidation method and a chemical vapor deposition method.
7. The method of claim 1, wherein the bubbling ions are selected from one or a combination of hydrogen ions and helium ions.
8. The method of claim 1, wherein the surface of the second substrate bonded to the first substrate is either a smooth surface or an oxidized layer.
9. The method of claim 1, wherein the single layer SOI material and the double layer SOI material are polished by a chemical mechanical polishing process.
10. The method of claim 1, wherein the third substrate is bonded to the single layer SOI material by plasma treatment and vacuum bonding.
CN202310331894.1A 2023-03-30 2023-03-30 Method for preparing double-layer SOI material Pending CN116344436A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310331894.1A CN116344436A (en) 2023-03-30 2023-03-30 Method for preparing double-layer SOI material

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310331894.1A CN116344436A (en) 2023-03-30 2023-03-30 Method for preparing double-layer SOI material

Publications (1)

Publication Number Publication Date
CN116344436A true CN116344436A (en) 2023-06-27

Family

ID=86875956

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310331894.1A Pending CN116344436A (en) 2023-03-30 2023-03-30 Method for preparing double-layer SOI material

Country Status (1)

Country Link
CN (1) CN116344436A (en)

Similar Documents

Publication Publication Date Title
US7410883B2 (en) Glass-based semiconductor on insulator structures and methods of making same
EP1929511B1 (en) Semiconductor on glass insulator with deposited barrier layer
US8557679B2 (en) Oxygen plasma conversion process for preparing a surface for bonding
US20100112784A1 (en) Large area semiconductor on glass insulator
KR20070065235A (en) Semiconductor on glass insulator made using improved ion implantation process
KR20060126629A (en) Surface finishing of soi substrates using an epi process
KR20090018850A (en) Producing soi sturcture using ion shower
US20090032873A1 (en) Ultra thin single crystalline semiconductor TFT and process for making same
JP2006032968A (en) Method of manufacturing silicon-on glass through transfer of layer
WO2007127074A2 (en) Semiconductor on glass insulator made using improved thinning process
WO2008130490A1 (en) Methods of fabricating glass-based substrates and apparatus employing same
US20080057678A1 (en) Semiconductor on glass insulator made using improved hydrogen reduction process
EP1981079B1 (en) Method for manufacturing an SOI substrate
JP2009105315A (en) Method of manufacturing semiconductor substrate
CN116344436A (en) Method for preparing double-layer SOI material
US11443941B2 (en) Silicon on insulator structure and method of making the same
US11610808B2 (en) Semiconductor wafer with low defect count and method for manufacturing thereof
KR100738460B1 (en) Method of fabricating nano SOI wafer
KR100722523B1 (en) Method of etching surface of wafer
CN118658830A (en) Preparation method of SOI substrate and SOI substrate prepared by preparation method
JPH11195774A (en) Manufacture of semiconductor substrate
JPH06326280A (en) Manufacture of semiconductor base body
JPH02205007A (en) Semiconductor substrate and manufacture thereof ad semiconductor device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination