CN116338997A - Local erasing voltage control method and system for liquid crystal writing device - Google Patents
Local erasing voltage control method and system for liquid crystal writing device Download PDFInfo
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- CN116338997A CN116338997A CN202310280947.1A CN202310280947A CN116338997A CN 116338997 A CN116338997 A CN 116338997A CN 202310280947 A CN202310280947 A CN 202310280947A CN 116338997 A CN116338997 A CN 116338997A
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 100
- 238000000034 method Methods 0.000 title claims abstract description 94
- 230000005684 electric field Effects 0.000 description 10
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000004986 Cholesteric liquid crystals (ChLC) Substances 0.000 description 2
- 238000005299 abrasion Methods 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/137—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering
- G02F1/13718—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering based on a change of the texture state of a cholesteric liquid crystal
Abstract
The invention discloses a method and a system for controlling local erasing voltage of a liquid crystal writing device, wherein the method comprises the following steps: applying a first auxiliary voltage and a second auxiliary voltage to non-erased areas on the first conductive layer and the second conductive layer, respectively; applying a first voltage and a second voltage to the locally erased areas on the first conductive layer and the second conductive layer, respectively; controlling the local erasing area or the whole area on the first conductive layer and the second conductive layer to be in a high-resistance state; applying a voltage which is the same as or similar to the second auxiliary voltage to the non-erasing area on the first conductive layer; applying a voltage which is the same as or similar to the first auxiliary voltage to the non-erasing area on the second conductive layer; and applying a voltage which is the same as or similar to the second voltage to the local erasing area on the first conductive layer, and applying a voltage which is the same as or similar to the first voltage to the local erasing area on the second conductive layer, so that writing marks of the local erasing area are erased, and writing marks of other areas cannot be shallow or vanished.
Description
Technical Field
The invention relates to the technical field of liquid crystal writing, in particular to a method and a system for controlling local erasing voltage of a liquid crystal writing device.
Background
The statements in this section merely provide background information related to the present disclosure and may not necessarily constitute prior art.
The liquid crystal writing device on the market at present has the working principle that the bistable property of liquid crystal is utilized to realize displaying and/or erasing writing contents on a liquid crystal writing board. For example, taking cholesteric liquid crystal as an example, the writing pressure track of the writing pen is recorded by the pressure acted on the liquid crystal writing device, and the corresponding writing content is displayed; the cholesteric liquid crystal structure is changed by applying an electric field, so that the writing pressure track on the liquid crystal writing board disappears to realize erasure.
The structure of the liquid crystal writing device mainly comprises: an upper conductive layer, a liquid crystal layer, and a lower conductive layer; an insulating layer is further provided between the upper conductive layer and the liquid crystal layer and/or between the liquid crystal layer and the lower conductive layer. In order to realize local erasure, the upper conductive layer and the lower conductive layer are respectively divided into a plurality of conductive areas, and different voltages are applied to the set conductive areas to achieve the purpose of local erasure; at the same time, the prior art also discloses a method of avoiding the surrounding area from becoming shallower or disappearing by the influence of local erasure by applying one or two auxiliary voltages.
However, due to the influence of the liquid crystal property, the voltage required for local erasing of the liquid crystal writing device increases with the decrease of the temperature, so that in the actual use process of the liquid crystal writing device, the voltage for local erasing often needs to be frequently adjusted according to one or more factors such as the ambient temperature, the thickness and material of the liquid crystal layer, the thickness and material of the insulating layer, the service life and the abrasion degree of the product, and the best local erasing effect can be achieved; this increases the complexity of use for the user, affecting the use experience.
In addition, after the partial erasing is completed, the condition that re-writing is not realized or error erasing or writing blurring is caused in the electrified state is not realized, and the writing efficiency is affected to a certain extent.
Disclosure of Invention
In order to solve the problems, the invention provides a method and a system for controlling the local erasing voltage of a liquid crystal writing device, which enable the voltage required by the local erasing to be less affected by temperature, and can also re-write in a charged state, thereby avoiding the situations of error erasing or fuzzy writing, and the like, and improving the writing efficiency.
In some embodiments, the following technical scheme is adopted:
a method for controlling a local erase voltage of a liquid crystal writing device, comprising:
applying a first auxiliary voltage to a non-erased area on the first conductive layer and applying a second auxiliary voltage to a corresponding non-erased area on the second conductive layer;
applying a first voltage to a local erase region on the first conductive layer and applying a second voltage to a corresponding local erase region on the second conductive layer;
controlling the local erasing area on the first conductive layer and the corresponding local erasing area on the second conductive layer to be in a high-resistance state; applying a voltage which is the same as or similar to the second auxiliary voltage to the non-erased area on the first conductive layer, and applying a voltage which is the same as or similar to the first auxiliary voltage to the corresponding non-erased area on the second conductive layer;
and applying a voltage which is the same as or similar to the second voltage to the local erasing area on the first conductive layer, and applying a voltage which is the same as or similar to the first voltage to the corresponding local erasing area on the second conductive layer, so that writing marks of the local erasing area are erased, and writing marks of non-erasing areas cannot be shallow or vanished.
Or alternatively, the process may be performed,
a method for controlling a local erase voltage of a liquid crystal writing device, comprising:
applying a first auxiliary voltage to a non-erased area on the first conductive layer and applying a second auxiliary voltage to a corresponding non-erased area on the second conductive layer;
applying a first voltage to a local erase region on the first conductive layer and applying a second voltage to a corresponding local erase region on the second conductive layer;
controlling all areas on the first conductive layer and the second conductive layer to be in a high-resistance state; applying a voltage which is the same as or similar to the second auxiliary voltage to the non-erased area on the first conductive layer, and applying a voltage which is the same as or similar to the first auxiliary voltage to the corresponding non-erased area on the second conductive layer;
and applying a voltage which is the same as or similar to the second voltage to the local erasing area on the first conductive layer, and applying a voltage which is the same as or similar to the first voltage to the corresponding local erasing area on the second conductive layer, so that writing marks of the local erasing area are erased, and writing marks of other areas cannot be shallow or vanished.
When an insulating layer is present only between the first conductive layer and the liquid crystal layer or between the liquid crystal layer and the second conductive layer, a similar voltage means a voltage which floats up and down by 50% on the basis of the original voltage.
When an insulating layer is present between the first conductive layer and the liquid crystal layer, and between the liquid crystal layer and the second conductive layer, a similar voltage means a voltage that floats up and down by 20% on the basis of the original voltage.
As a further aspect, the first voltage, the second voltage, the first auxiliary voltage, and the second auxiliary voltage satisfy the following relationship:
first voltage-second voltage > |first voltage-second auxiliary voltage|
First voltage-second voltage > |first auxiliary voltage-second auxiliary voltage|
First voltage-second voltage > |first auxiliary voltage-second voltage|.
If the second voltage is used as the reference potential, the following relationships among the first voltage, the second voltage, the first auxiliary voltage and the second auxiliary voltage are satisfied:
3.45 (first auxiliary voltage-second voltage) > or (first voltage-second voltage) > or 2.55 (first auxiliary voltage-second voltage);
2.3 x (first auxiliary voltage-second voltage) > or (second auxiliary voltage-second voltage) > or (first auxiliary voltage-second voltage);
6 (first auxiliary voltage-second voltage) > erase start voltage > 3 (first auxiliary voltage-second voltage);
wherein the erase start voltage is a voltage that causes a part of liquid crystal molecules to start to change from a planar state to a focal conic state or from a focal conic state to a planar state.
More specifically, if the second voltage is taken as a reference potential, the following relationship is satisfied among the first voltage, the second voltage, the first auxiliary voltage and the second auxiliary voltage:
(first voltage-second voltage) = (first auxiliary voltage-second voltage) = 3
(second auxiliary voltage-second voltage) = (first auxiliary voltage-second voltage) ×2.
In other embodiments, the following technical solutions are adopted:
a liquid crystal writing device comprising a first conductive layer, a liquid crystal layer and a second conductive layer, an insulating layer being provided between the first conductive layer and the liquid crystal layer and/or between the liquid crystal layer and the second conductive layer; the liquid crystal writing device local erasing voltage control method is adopted to realize local erasing.
Compared with the prior art, the invention has the beneficial effects that:
(1) According to the control method for the local erasing voltage of the liquid crystal writing device, corresponding voltages are respectively applied to the erasing areas and the non-erasing areas on the two conductive layers, the to-be-erased areas on the two conductive layers are controlled to be in a high-resistance state, then electric field inversion of the non-erasing areas on the two conductive layers is carried out, then electric field inversion of the erasing areas is carried out, and at the moment of the electric field inversion, the voltage change of the erasing areas can reach 6Va, so that the local erasing condition can be met, and the local erasing is realized. The method greatly reduces the voltage required to be applied to the local erasing area, has small change when the voltage required to be locally erased is influenced by temperature, and avoids frequent adjustment of the erasing voltage due to temperature change.
(2) When the partial erasure is realized, the voltage applied to the erasure area does not reach the erasure starting voltage yet, so that the partial erasure can be realized and the re-writing can be performed without waiting for the electric field between the two conductive layers to be reduced to zero, thereby greatly improving the writing efficiency.
Additional features and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a schematic diagram of a liquid crystal writing device according to an embodiment of the present invention;
FIG. 2 is a schematic diagram showing a method for controlling a local erase voltage of a liquid crystal writing device according to a first embodiment of the present invention;
FIG. 3 is a schematic diagram illustrating a control method of a next partial erase voltage in accordance with an embodiment of the present invention;
FIG. 4 is a schematic diagram of a method for controlling a partial erase voltage of a liquid crystal writing device according to a second embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating a control method of the next partial erase voltage in a second embodiment of the present invention.
Detailed Description
It should be noted that the following detailed description is illustrative and is intended to provide further explanation of the present application. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments in accordance with the present application. As used herein, the singular is also intended to include the plural unless the context clearly indicates otherwise, and furthermore, it is to be understood that the terms "comprises" and/or "comprising" when used in this specification are taken to specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof.
The voltages in this patent all refer to potential differences.
The reference potentials in this patent are all considered zero potentials.
The non-erasing area on the first conductive layer and the corresponding non-erasing area on the second conductive layer in this patent refer to the conductive area covering the non-erasing area on the first conductive layer and the conductive area covering the non-erasing area on the second conductive layer.
The local erasing area on the first conductive layer and the corresponding local erasing area on the second conductive layer in this patent refer to the local erasing area covered on the first conductive layer to the conductive area and the local erasing area covered on the second conductive layer to the conductive area.
Example 1
Referring to fig. 1, the structure of the liquid crystal writing device specifically includes: a first conductive layer (upper conductive layer), a liquid crystal layer, and a second conductive layer (lower conductive layer), wherein an insulating layer is disposed between the first conductive layer and the liquid crystal layer, or between the liquid crystal layer and the second conductive layer, or between the first conductive layer and the liquid crystal layer, and between the liquid crystal layer and the second conductive layer; the first conductive layer and the second conductive layer are divided into a plurality of conductive regions, respectively, and as a specific example, the first conductive layer is divided into a plurality of first conductive regions parallel to each other, and the second conductive layer is divided into a plurality of second conductive regions parallel to each other, the first conductive regions and the second conductive regions spatially intersect or are perpendicular to each other.
It should be noted that, in the liquid crystal writing device in this embodiment, a set voltage is applied to each conductive region on the first conductive layer and the second conductive layer, and a corresponding electric field is formed between the first conductive layer and the second conductive layer; when the electric field of a certain area reaches the electric field value required by erasure, the liquid crystal molecules of the area can be changed from a planar state to a focal conic state or from the focal conic state to the planar state, so that erasure of writing marks of the area is realized.
As described in the background art, the liquid crystal writing device having the above-described structure suffers from a problem that the voltage required for the partial erase is affected by the temperature and cannot be rewritten in a short time when the partial erase is performed.
Based on this, in one or more embodiments, a method for controlling a local erase voltage of a liquid crystal writing device is disclosed, which specifically includes the following steps:
(1) Applying a first auxiliary voltage to the non-erased area on the first conductive layer and applying a second auxiliary voltage to the corresponding non-erased area on the second conductive layer;
applying a first voltage to a local erase region on the first conductive layer and applying a second voltage to a corresponding local erase region on the second conductive layer;
(2) Controlling the local erasing area on the first conductive layer and the local erasing area on the second conductive layer to be in a high-resistance state;
applying a voltage which is the same as or similar to the second auxiliary voltage to the non-erasing area on the first conductive layer; applying a voltage which is the same as or similar to the first auxiliary voltage to the corresponding non-erasing area on the second conductive layer;
(3) And applying a voltage which is the same as or similar to the second voltage to the local erasing area on the first conductive layer, and applying a voltage which is the same as or similar to the first voltage to the corresponding local erasing area on the second conductive layer, so that writing marks of the local erasing area are erased, and writing marks of other areas cannot be shallow or vanished.
It should be noted that, a person skilled in the art may reasonably determine the range of the voltage value required to be applied for erasing according to the common general knowledge or factors such as the liquid crystal material, the liquid crystal thickness, the insulating layer thickness, etc. actually adopted by the product.
In this embodiment, the range of values of the similar voltages is as follows:
(1) when there is an insulating layer between only the first conductive layer and the liquid crystal layer, or between only the liquid crystal layer and the second conductive layer, a similar voltage means a voltage that floats up and down by 50% on the basis of the original voltage; such as: the voltage close to the first voltage means: any voltage within the range [ (first voltage) -50% ((first voltage), (first voltage) +50% ((first voltage) ]; at this time, the original voltage is the first voltage; the voltage close to the second voltage means: any voltage within the range [ (second voltage) -50% > (second voltage), (second voltage) +50% > (second voltage) ]; the original voltage is the second voltage at this time; the other voltages are the same and are therefore not listed one by one.
(2) When an insulating layer is present between the first conductive layer and the liquid crystal layer, and between the liquid crystal layer and the second conductive layer, a similar voltage means a voltage that floats up and down by 20% on the basis of the original voltage. Such as: the voltage close to the first voltage means: any voltage within the range of [ (first voltage) -20% > (first voltage), (first voltage) +20% > (first voltage) ]; at this time, the original voltage is the first voltage; the voltage close to the second voltage means: any voltage within the range [ (second voltage) -20% > (second voltage), (second voltage) +20% > (second voltage) ]; the original voltage is the second voltage at this time; the other voltages are the same and are therefore not listed one by one.
Since the writing instrument is not symmetrical in structure in the case of (1), the range of the similar voltage can be larger than that of the nearest voltage in the case of (2).
The same meaning is given for the similar voltages in the following embodiments, and the description is omitted.
In this embodiment, the following relationships are satisfied among the first voltage, the second voltage, the first auxiliary voltage, and the second auxiliary voltage:
first voltage-second voltage > |first voltage-second auxiliary voltage|
First voltage-second voltage > |first auxiliary voltage-second auxiliary voltage|
First voltage-second voltage > |first auxiliary voltage-second voltage|.
As an alternative implementation manner, if the second voltage is taken as a reference value, the second voltage is taken as a zero potential in this embodiment, and the following relationship is satisfied among the first voltage, the first auxiliary voltage and the second auxiliary voltage:
3.45 (first auxiliary voltage) no less than 2.55 (first auxiliary voltage)
2.3 (first auxiliary voltage) no less than 1.7 (first auxiliary voltage)
6 (first auxiliary voltage) > erase start voltage > 3 (first auxiliary voltage)
Wherein the erase start voltage is a voltage that causes a part of liquid crystal molecules to start to change from a planar state to a focal conic state or from a focal conic state to a planar state.
As a more specific example, if the second voltage is zero, the following relationship is satisfied among the first voltage, the first auxiliary voltage, and the second auxiliary voltage:
first voltage= (first auxiliary voltage) ×3
Second auxiliary voltage= (first auxiliary voltage) ×2.
In this embodiment, when the next erasing process is performed, there are two ways:
(1) Taking the erasing process as a primary erasing process; after the primary erasing process is completed, the voltage drop applied by each conductive area on the first conductive layer and the second conductive layer is zero; re-executing the above-described one-time erase process achieves the next erase.
(2) Taking the erasing process as a primary erasing process; after the one-time erasing process is completed, the next time partial erasing is performed, the following process is performed:
controlling the local erasing area on the first conductive layer and the corresponding local erasing area on the second conductive layer to be in a high-resistance state; applying a voltage which is the same as or similar to the first auxiliary voltage to the non-erasing area on the first conductive layer; applying a voltage which is the same as or similar to the second auxiliary voltage to the corresponding non-erasing area on the second conductive layer;
and applying a voltage which is the same as or similar to the first voltage to the local erasing area on the first conductive layer, and applying a voltage which is the same as or similar to the second voltage to the corresponding local erasing area on the second conductive layer, so that the writing trace of the local erasing area is erased, and the writing trace of the non-erasing area cannot be shallow or vanished.
In order to more clearly describe the method of the embodiment, the specific implementation process of the method of the embodiment is described by taking the first voltage as 3Va, the first auxiliary voltage as Va, the second voltage as zero and the second auxiliary voltage as 2Va as an example.
Referring to fig. 2, vertical bars represent conductive areas on the first conductive layer, lateral bars represent conductive areas on the second conductive layer, and middle dark portions represent local erase areas. When the partial erasing is performed, first, a first auxiliary voltage Va is applied to a non-erasing area on the first conductive layer; applying a second auxiliary voltage 2Va to the non-erased area on the second conductive layer; a first voltage 3Va is applied to the locally erased area on the first conductive layer and a second voltage 0 is applied to the locally erased area on the second conductive layer (the reference potential is regarded as zero potential in this embodiment).
Then, the local erasing area on the first conductive layer and the local erasing area on the second conductive layer are controlled to be in a high-resistance state, and the voltage of the rest conductive areas is kept unchanged. The high impedance Hiz is the state in which the circuit controlling the supply of these conductive areas is in an open state.
Applying a voltage which is the same as or similar to the second auxiliary voltage 2Va to the non-erasing area on the first conductive layer; applying a voltage which is the same as or similar to the first auxiliary voltage Va to the non-erasing area on the second conductive layer;
finally, applying a voltage which is the same as or similar to the second voltage 0 to the local erasing area on the first conductive layer, and applying a voltage which is the same as or similar to the first voltage 3Va to the local erasing area on the second conductive layer; at the moment of the application of the voltages of the local erasing areas on the first conductive layer and the second conductive layer, the voltage of the local erasing area is changed to 6Va, the condition of local erasing is achieved, writing marks of the local erasing areas can be erased, and writing marks of other areas cannot be shallow or vanished.
And, at this time, the voltage difference applied to the partial erase region is 3Va, and the erase start voltage has not been reached yet, so that the region can be written again without waiting for the electric field between the two conductive layers to drop to zero.
After the above-mentioned partial erasing process is finished, the voltage drop applied to each conductive area on the two conductive layers can be zero; the next time the partial erase is performed, the above process is re-performed.
Alternatively, after the above-mentioned partial erase process is finished, the current voltage application on the two conductive layers is kept unchanged, and the following process is performed in conjunction with fig. 3 when the partial erase is next performed:
controlling the local erasing area on the first conductive layer and the corresponding local erasing area on the second conductive layer to be in a high-resistance state; applying a voltage which is the same as or similar to the first auxiliary voltage Va to the non-erased area on the first conductive layer; applying a voltage which is the same as or similar to the second auxiliary voltage 2Va to the corresponding non-erasing area on the second conductive layer;
and applying a voltage which is the same as or similar to the first voltage 3Va to the local erasing area on the first conductive layer, and applying a voltage which is the same as or similar to the second voltage 0 to the corresponding local erasing area on the second conductive layer, so that the writing trace of the local erasing area is erased, and the writing trace of the non-erasing area cannot be shallow or vanished.
At this time, the voltages applied to the first conductive layer and the second conductive layer are returned to the state at the time of the one-time erasing process, so that the next time of the partial erasing process is performed again, the process at the time of the one-time erasing can be performed on the basis of this.
Those skilled in the art will understand that, in the next half cycle of the applied voltage, i.e. when the voltages applied to the two conductive layers are interchanged, the specific voltage control process is identical to the above description of the process, and will not be repeated.
The control method of the embodiment can greatly reduce the erasing voltage applied for realizing the local erasing, so that the change of the erasing voltage under the influence of the temperature is also reduced without frequent adjustment under the premise of the same liquid crystal formula in the same temperature change range. At the same time, the locally erased area can be written again in the powered state without waiting for the electric field between the two conductive layers to drop to zero.
Example two
In this embodiment, the liquid crystal writing device is the same as in the first embodiment, and the embodiment discloses a method for controlling a local erasing voltage of the liquid crystal writing device, which specifically includes the following steps:
(1) Applying a first auxiliary voltage to the non-erased area on the first conductive layer and applying a second auxiliary voltage to the non-erased area on the second conductive layer;
applying a first voltage to the locally erased area on the first conductive layer and a second voltage to the locally erased area on the second conductive layer;
(2) Controlling all conductive areas on the first conductive layer and the second conductive layer to be in a high-resistance state;
(3) Applying a voltage which is the same as or similar to the second auxiliary voltage to the non-erasing area on the first conductive layer; applying a voltage which is the same as or similar to the first auxiliary voltage to the non-erasing area on the second conductive layer, wherein the local erasing areas on the first conductive layer and the second conductive layer are still in a high-resistance state Hiz;
(4) And applying a voltage which is the same as or similar to the second voltage to the local erasing area on the first conductive layer, and applying a voltage which is the same as or similar to the first voltage to the local erasing area on the second conductive layer, so that writing marks of the local erasing area are erased, and writing marks of other areas cannot be shallow or vanished.
In this embodiment, the following relationships are satisfied among the first voltage, the second voltage, the first auxiliary voltage, and the second auxiliary voltage:
first voltage-second voltage > |first voltage-second auxiliary voltage|
First voltage-second voltage > |first auxiliary voltage-second auxiliary voltage|
First voltage-second voltage > |first auxiliary voltage-second voltage|.
As an alternative embodiment, if the second voltage is taken as a reference value (i.e. the second voltage is taken as zero potential), the following relationship is satisfied among the first voltage, the first auxiliary voltage and the second auxiliary voltage:
3.45 (first auxiliary voltage) no less than 2.55 (first auxiliary voltage)
2.3 (first auxiliary voltage) no less than 1.7 (first auxiliary voltage)
6 (first auxiliary voltage) > erase start voltage > 3 (first auxiliary voltage)
Wherein the erase start voltage is a voltage that causes a part of liquid crystal molecules to start to change from a planar state to a focal conic state or from a focal conic state to a planar state.
As a more specific example, if the second voltage is zero, the following relationship is satisfied among the first voltage, the first auxiliary voltage, and the second auxiliary voltage:
first voltage= (first auxiliary voltage) ×3
Second auxiliary voltage= (first auxiliary voltage) ×2.
In this embodiment, when the next erasing process is performed, there are two ways:
(1) Taking the erasing process as a primary erasing process; after the primary erasing process is completed, the voltage drop applied by each conductive area on the first conductive layer and the second conductive layer is zero; re-executing the above-described one-time erase process achieves the next erase.
(2) Taking the erasing process as a primary erasing process; after the one-time erasing process is completed, the next time partial erasing is performed, the following process is performed:
controlling all areas on the first conductive layer and the second conductive layer to be in a high-resistance state; applying a first auxiliary voltage to the non-erased area on the first conductive layer, and applying a second auxiliary voltage to the corresponding non-erased area on the second conductive layer, wherein the local erased areas on the first conductive layer and the second conductive layer are still in a high-resistance state Hiz;
and applying a first voltage to the local erasing area on the first conductive layer and applying a second voltage to the corresponding local erasing area on the second conductive layer, so that writing marks of the local erasing area are erased, and writing marks of other areas cannot be shallow or vanished.
In order to more clearly describe the method of the embodiment, the specific implementation process of the method of the embodiment is still described by taking the first voltage as 3Va, the first auxiliary voltage as Va, the second voltage as zero and the second auxiliary voltage as 2Va as an example.
Referring to fig. 4, vertical bars represent conductive areas on the first conductive layer, lateral bars represent conductive areas on the second conductive layer, and middle dark portions represent local erase areas. When the partial erasing is performed, first, a first auxiliary voltage Va is applied to a non-erasing area on the first conductive layer; applying a second auxiliary voltage 2Va to the non-erased area on the second conductive layer; a first voltage 3Va is applied to the locally erased area on the first conductive layer and a second voltage 0 is applied to the locally erased area on the second conductive layer.
Then controlling all conductive areas on the first conductive layer and the second conductive layer to be in a high-resistance state Hiz;
applying a voltage which is the same as or similar to the second auxiliary voltage 2Va to the non-erasing area on the first conductive layer; applying a voltage which is the same as or similar to the first auxiliary voltage Va to the non-erased area on the second conductive layer; the locally erased areas on the first and second conductive layers remain in the high resistance state Hiz.
Finally, a voltage which is the same as or similar to the second voltage 0 is applied to the local erasing area on the first conductive layer, and a voltage which is the same as or similar to the first voltage 3Va is applied to the local erasing area on the second conductive layer.
As in the first embodiment, after the above-mentioned partial erasing process is finished, the voltage drop applied to each conductive region on the two conductive layers may be zero; the next time the partial erase is performed, the above process is re-performed.
Alternatively, after the above-mentioned partial erase process is finished, the current voltage application on the two conductive layers is kept unchanged, and the following process is performed in conjunction with fig. 5 when the partial erase is next performed:
controlling all conductive areas on the first conductive layer and the second conductive layer to be in a high-resistance state;
applying a first auxiliary voltage Va to the non-erased area on the first conductive layer, and applying a second auxiliary voltage 2Va to the corresponding non-erased area on the second conductive layer, wherein the local erased areas on the first conductive layer and the second conductive layer are still in a high-resistance state Hiz;
and applying a first voltage 3Va to the local erasing area on the first conductive layer, and applying a second voltage 0 to the corresponding local erasing area on the second conductive layer, so that writing marks of the local erasing area are erased, and writing marks of other areas cannot be shallow or vanished.
The technical effects achieved in this embodiment and the reasons for achieving the technical effects are the same as those in the first embodiment, and will not be described in detail here.
Example III
In one or more embodiments, a liquid crystal writing device is disclosed, including a first conductive layer, a liquid crystal layer, and a second conductive layer, an insulating layer disposed between the first conductive layer and the liquid crystal layer, or disposed between the liquid crystal layer and the second conductive layer, or disposed between the first conductive layer and the liquid crystal layer, and between the liquid crystal layer and the second conductive layer, respectively; the liquid crystal writing device in the first embodiment or the second embodiment is adopted to realize local erasing by adopting the local erasing voltage control method.
The liquid crystal writing device of the present embodiment may be a tablet, a drawing board, a blackboard, or the like.
As a specific example, the liquid crystal writing device may be any one of the following products:
light energy writing boards, light energy liquid crystal writing boards, light energy large liquid crystal writing boards, light energy dust-free writing boards, light energy portable blackboard, electronic drawing boards, LCD electronic writing boards, electronic notebooks, graffiti boards, child writing boards, child graffiti drawing boards, eraser function sketching boards, liquid crystal electronic drawing boards or color liquid crystal writing boards or other related products which can be known to those skilled in the art.
While the foregoing description of the embodiments of the present invention has been presented in conjunction with the drawings, it should be understood that it is not intended to limit the scope of the invention, but rather, it is intended to cover all modifications or variations within the scope of the invention as defined by the claims of the present invention.
Claims (18)
1. A method for controlling a local erase voltage of a liquid crystal writing device, comprising:
applying a first auxiliary voltage to a non-erased area on the first conductive layer and applying a second auxiliary voltage to a corresponding non-erased area on the second conductive layer;
applying a first voltage to a local erase region on the first conductive layer and applying a second voltage to a corresponding local erase region on the second conductive layer;
controlling the local erasing area on the first conductive layer and the corresponding local erasing area on the second conductive layer to be in a high-resistance state; applying a voltage which is the same as or similar to the second auxiliary voltage to the non-erased area on the first conductive layer, and applying a voltage which is the same as or similar to the first auxiliary voltage to the corresponding non-erased area on the second conductive layer;
and applying a voltage which is the same as or similar to the second voltage to the local erasing area on the first conductive layer, and applying a voltage which is the same as or similar to the first voltage to the corresponding local erasing area on the second conductive layer, so that writing marks of the local erasing area are erased, and writing marks of non-erasing areas cannot be shallow or vanished.
2. The method of controlling a partial erase voltage of a liquid crystal writing apparatus according to claim 1, wherein when an insulating layer is present only between the first conductive layer and the liquid crystal layer or between the liquid crystal layer and the second conductive layer, the similar voltage means a voltage which floats up and down by 50% on the basis of the original voltage.
3. The method of controlling a partial erase voltage of a liquid crystal writing apparatus according to claim 1, wherein when an insulating layer is present between the first conductive layer and the liquid crystal layer, and between the liquid crystal layer and the second conductive layer, the similar voltage means a voltage which floats up and down by 20% on the basis of the original voltage.
4. The method of controlling a partial erase voltage of a liquid crystal writing apparatus according to claim 1, wherein the first voltage, the second voltage, the first auxiliary voltage, and the second auxiliary voltage satisfy the following relationship:
first voltage-second voltage > |first voltage-second auxiliary voltage|
First voltage-second voltage > |first auxiliary voltage-second auxiliary voltage|
First voltage-second voltage > |first auxiliary voltage-second voltage|.
5. The method of claim 1, wherein if the second voltage is used as a reference potential, the following relationships are satisfied among the first voltage, the second voltage, the first auxiliary voltage and the second auxiliary voltage:
3.45 (first auxiliary voltage-second voltage) > or (first voltage-second voltage) > or 2.55 (first auxiliary voltage-second voltage);
2.3 x (first auxiliary voltage-second voltage) > or (second auxiliary voltage-second voltage) > or (first auxiliary voltage-second voltage);
6 (first auxiliary voltage-second voltage) > erase start voltage > 3 (first auxiliary voltage-second voltage);
wherein the erase start voltage is a voltage that causes a part of liquid crystal molecules to start to change from a planar state to a focal conic state or from a focal conic state to a planar state.
6. The method of claim 1, wherein if the second voltage is used as a reference potential, the following relationships are satisfied among the first voltage, the second voltage, the first auxiliary voltage and the second auxiliary voltage:
(first voltage-second voltage) = (first auxiliary voltage-second voltage) = 3
(second auxiliary voltage-second voltage) = (first auxiliary voltage-second voltage) ×2.
7. A method of controlling a partial erase voltage of a liquid crystal writing apparatus according to claim 1, wherein the erase process according to any one of claims 1 to 6 is used as a one-time erase process; after the primary erasing process is completed, the voltage drop applied by each conductive area on the first conductive layer and the second conductive layer is zero; re-executing the one-time erase process achieves the next erase.
8. A method of controlling a partial erase voltage of a liquid crystal writing apparatus according to claim 1, wherein the erase process according to any one of claims 1 to 6 is used as a one-time erase process; after the one-time erasing process is completed, the next time partial erasing is performed, the following process is performed:
controlling the local erasing area on the first conductive layer and the corresponding local erasing area on the second conductive layer to be in a high-resistance state; applying a voltage which is the same as or similar to the first auxiliary voltage to the non-erasing area on the first conductive layer; applying a voltage which is the same as or similar to the second auxiliary voltage to the corresponding non-erasing area on the second conductive layer;
and applying a voltage which is the same as or similar to the first voltage to the local erasing area on the first conductive layer, and applying a voltage which is the same as or similar to the second voltage to the corresponding local erasing area on the second conductive layer, so that the writing trace of the local erasing area is erased, and the writing trace of the non-erasing area cannot be shallow or vanished.
9. A liquid crystal writing device comprising a first conductive layer, a liquid crystal layer and a second conductive layer, an insulating layer being provided between the first conductive layer and the liquid crystal layer and/or between the liquid crystal layer and the second conductive layer; the method for controlling the local erasing voltage of the liquid crystal writing device is characterized in that the method for controlling the local erasing voltage of the liquid crystal writing device is adopted to realize local erasing.
10. A method for controlling a local erase voltage of a liquid crystal writing device, comprising:
applying a first auxiliary voltage to a non-erased area on the first conductive layer and applying a second auxiliary voltage to a corresponding non-erased area on the second conductive layer;
applying a first voltage to a local erase region on the first conductive layer and applying a second voltage to a corresponding local erase region on the second conductive layer;
controlling all areas on the first conductive layer and the second conductive layer to be in a high-resistance state;
applying a voltage which is the same as or similar to the second auxiliary voltage to the non-erased area on the first conductive layer, and applying a voltage which is the same as or similar to the first auxiliary voltage to the corresponding non-erased area on the second conductive layer, wherein the local erased areas on the first conductive layer and the second conductive layer are still in a high-resistance state Hiz;
and applying a voltage which is the same as or similar to the second voltage to the local erasing area on the first conductive layer, and applying a voltage which is the same as or similar to the first voltage to the corresponding local erasing area on the second conductive layer, so that writing marks of the local erasing area are erased, and writing marks of other areas cannot be shallow or vanished.
11. The method of claim 10, wherein when an insulating layer is present only between the first conductive layer and the liquid crystal layer or between the liquid crystal layer and the second conductive layer, the similar voltage means a voltage which floats up and down by 50% on the basis of the original voltage.
12. The method of claim 10, wherein when the insulating layer is present between the first conductive layer and the liquid crystal layer, and between the liquid crystal layer and the second conductive layer, the similar voltage means a voltage which floats up and down by 20% on the basis of the original voltage.
13. The method of controlling a partial erase voltage of a liquid crystal writing apparatus according to claim 1, wherein the first voltage, the second voltage, the first auxiliary voltage, and the second auxiliary voltage satisfy the following relationship:
first voltage-second voltage > |first voltage-second auxiliary voltage|
First voltage-second voltage > |first auxiliary voltage-second auxiliary voltage|
First voltage-second voltage > |first auxiliary voltage-second voltage|.
14. The method of claim 1, wherein if the second voltage is used as a reference potential, the following relationships are satisfied among the first voltage, the second voltage, the first auxiliary voltage and the second auxiliary voltage:
3.45 (first auxiliary voltage-second voltage) > or (first voltage-second voltage) > or 2.55 (first auxiliary voltage-second voltage);
2.3 x (first auxiliary voltage-second voltage) > or (second auxiliary voltage-second voltage) > or (first auxiliary voltage-second voltage);
6 (first auxiliary voltage-second voltage) > erase start voltage > 3 (first auxiliary voltage-second voltage);
wherein the erase start voltage is a voltage that causes a part of liquid crystal molecules to start to change from a planar state to a focal conic state or from a focal conic state to a planar state.
15. The method of claim 1, wherein if the second voltage is used as a reference potential, the following relationships are satisfied among the first voltage, the second voltage, the first auxiliary voltage and the second auxiliary voltage:
(first voltage-second voltage) = (first auxiliary voltage-second voltage) = 3
(second auxiliary voltage-second voltage) = (first auxiliary voltage-second voltage) ×2.
16. A method of controlling a partial erase voltage of a liquid crystal writing apparatus according to claim 10, wherein the erase process according to any one of claims 10 to 15 is used as a one-time erase process; after the primary erasing process is completed, the voltage drop applied by each conductive area on the first conductive layer and the second conductive layer is zero; re-executing the one-time erase process achieves the next erase.
17. A method of controlling a partial erase voltage of a liquid crystal writing apparatus according to claim 10, wherein the erase process according to any one of claims 10 to 15 is used as a one-time erase process; after the one-time erasing process is completed, the next time partial erasing is performed, the following process is performed:
controlling all areas on the first conductive layer and the second conductive layer to be in a high-resistance state;
applying a first auxiliary voltage to the non-erased area on the first conductive layer, and applying a second auxiliary voltage to the corresponding non-erased area on the second conductive layer, wherein the local erased areas on the first conductive layer and the second conductive layer are still in a high-resistance state Hiz;
and applying a first voltage to the local erasing area on the first conductive layer and applying a second voltage to the corresponding local erasing area on the second conductive layer, so that writing marks of the local erasing area are erased, and writing marks of other areas cannot be shallow or vanished.
18. A liquid crystal writing device comprising a first conductive layer, a liquid crystal layer and a second conductive layer, an insulating layer being provided between the first conductive layer and the liquid crystal layer and/or between the liquid crystal layer and the second conductive layer; the method for controlling the local erasing voltage of the liquid crystal writing device according to any one of claims 10 to 17 is characterized in that the local erasing is realized.
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| CN117572680A (en) * | 2024-01-16 | 2024-02-20 | 山东蓝贝思特教装集团股份有限公司 | Local erasing control method and device for liquid crystal writing device |
| CN117572680B (en) * | 2024-01-16 | 2024-05-14 | 山东蓝贝思特教装集团股份有限公司 | Local erasing control method and device for liquid crystal writing device |
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| CN117572680A (en) * | 2024-01-16 | 2024-02-20 | 山东蓝贝思特教装集团股份有限公司 | Local erasing control method and device for liquid crystal writing device |
| CN117572680B (en) * | 2024-01-16 | 2024-05-14 | 山东蓝贝思特教装集团股份有限公司 | Local erasing control method and device for liquid crystal writing device |
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