CN116338338A - Initiating explosive device activation and test circuit - Google Patents
Initiating explosive device activation and test circuit Download PDFInfo
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- CN116338338A CN116338338A CN202211307642.7A CN202211307642A CN116338338A CN 116338338 A CN116338338 A CN 116338338A CN 202211307642 A CN202211307642 A CN 202211307642A CN 116338338 A CN116338338 A CN 116338338A
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- 238000012360 testing method Methods 0.000 title claims abstract description 99
- 239000002360 explosive Substances 0.000 title claims abstract description 89
- 230000000977 initiatory effect Effects 0.000 title claims abstract description 89
- 230000004913 activation Effects 0.000 title claims abstract description 66
- 230000003213 activating effect Effects 0.000 claims abstract description 20
- 239000007787 solid Substances 0.000 claims description 36
- 230000003287 optical effect Effects 0.000 claims description 34
- 238000001514 detection method Methods 0.000 claims description 15
- 230000008901 benefit Effects 0.000 abstract description 6
- 238000000034 method Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 230000007547 defect Effects 0.000 description 3
- 238000011990 functional testing Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000035939 shock Effects 0.000 description 2
- 238000002679 ablation Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/003—Environmental or reliability tests
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
- Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection
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- Environmental & Geological Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
Abstract
The invention provides an initiating explosive device activating and testing circuit, which comprises: initiating explosive device positive bus execution circuit and initiating explosive device negative bus execution circuit; the initiating explosive device positive bus execution circuit and the initiating explosive device negative bus execution circuit are connected to the initiating explosive device activation voltage in an execution mode that an electromagnetic relay is arranged at the front stage and a solid-state relay is arranged at the rear stage from an activation power supply. The initiating explosive device activating and testing circuit provided by the invention solves the problems of insufficient product reliability and safety and overlarge volume and power consumption caused by simply using the electromagnetic relay in the past by introducing the scheme that the solid-state relay is matched with the electromagnetic relay and combining the advantages of the solid-state relay and the solid-state relay, and has the capability of testing and detecting the working state.
Description
Technical Field
The invention relates to safe and reliable execution of an initiating explosive device, in particular to an activating circuit of an initiating explosive device with a test function.
Background
The initiating explosive device plays an important role in various links, such as normal activation of a battery, safe self-destruction and the like, so that the initiating explosive device has very important significance for safe and reliable ignition of the initiating explosive device.
The conventional initiating explosive device activation circuit is usually formed by combining electromagnetic relays, and although normal functions can be realized, the reliability, the safety, the power consumption and the volume of products are limited due to the defects of poor mechanical environment resistance, poor overcurrent impact capability (in a disconnected state), high power consumption, large volume and the like of the electromagnetic relays. Aiming at the requirements of a service object of an initiating explosive device in different stages of launching, flying, activating and the like, an activating circuit formed by a single electromagnetic relay is not ideal.
Disclosure of Invention
Aiming at the current state of the prior art, the invention aims to solve the problems of insufficient product reliability and safety and overlarge volume and power consumption caused by simply using the electromagnetic relay in the past by introducing a scheme that the solid state relay is used for matching the electromagnetic relay and combining the advantages of the solid state relay and the solid state relay, and has the capability of testing and detecting the working state.
Specifically, the invention provides an activation and test circuit of an initiating explosive device, which can be divided into an activation circuit part and a test circuit part, wherein the activation circuit part comprises: initiating explosive device positive bus execution circuit and initiating explosive device negative bus execution circuit. The initiating explosive device positive bus execution circuit and the initiating explosive device negative bus execution circuit are connected to initiating explosive device activation voltage in an execution mode that an electromagnetic relay is arranged at the front stage (from an activation power supply) and a solid-state relay is arranged at the rear stage.
The initiating explosive device positive bus execution circuit comprises an active power supply positive end VCC and two circuits connected in parallel, wherein the first circuit sequentially comprises an electromagnetic relay K1, a solid relay K5 and an active current limiting resistor R1 from the power supply positive end VCC; the second circuit sequentially comprises an electromagnetic relay K2, a solid-state relay K6 and an activation current limiting resistor R2 from a power supply positive end VCC; the normally open contacts of the electromagnetic relay K1 and the electromagnetic relay K2 are connected with the positive end VCC of the power supply; and the other ends of the activation current limiting resistor R1 and the activation current limiting resistor R2 are connected in parallel and then output an initiating explosive device activation voltage positive end FIRE+. Specifically, a common contact of the electromagnetic relay K1 is connected with one end of the solid-state relay K5, and the other end of the solid-state relay K5 is connected with the activation current-limiting resistor R1; the common contact of the electromagnetic relay K2 is connected with one end of the solid-state relay K6, and the other end of the solid-state relay K6 is connected with the activated current-limiting resistor R2.
The initiating explosive device negative bus execution circuit also comprises an active power negative terminal GND and two parallel circuits, and the third circuit sequentially comprises an electromagnetic relay K3 and a solid relay K7 from the power negative terminal GND; the fourth circuit sequentially comprises an electromagnetic relay K4 and a solid-state relay K8 from the power negative end GND; the normally open contacts of the electromagnetic relay K3 and the electromagnetic relay K4 are connected with the power negative terminal GND, and the other ends of the solid relay K7 and the solid relay K8 are connected in parallel and then output an initiating explosive device activation voltage negative terminal FIRE-. Further, the common contact of the electromagnetic relay K3 is connected to one end of the solid-state relay K7, and the common contact of the electromagnetic relay K4 is connected to one end of the solid-state relay K8.
Further, the initiating explosive device activating and testing circuit of the present invention further comprises a testing circuit part, specifically, the testing circuit comprises: the TEST circuit comprises a TEST power supply connected to the normally closed contact of the electromagnetic relay, a diode connected with the TEST voltage VCC_TEST of the TEST power supply and the normally closed contact of the electromagnetic relay of the initiating explosive device positive bus execution circuit, and three groups of optocouplers (U1-U3). The input end of the optical coupler U1 is respectively connected with two ends of the test power supply; the input end of the optical coupler U2 is respectively connected with two ends of the initiating explosive device activation voltage; the input end of the optical coupler U3 is respectively connected with an initiating explosive device activation voltage positive end FIRE+ and the ground GND_TEST of a TEST power supply; the FPGA processor is connected with the output ends of the three groups of optocouplers and used for functional test and detection of the circuit.
Preferably, the optocouplers U1, U2 and U3 are respectively provided with a test current-limiting resistor at the input positive end, a signal ground connected to 3.3V through a pull-up resistor at the output positive end, and the output negative end is connected with the FPGA processor; and the output signal is connected to the input end of the FPGA processor for detection.
Further, the test circuit specifically includes: the power supply, the diodes D1 and D2, the optocouplers U1, U2 and U3, the current limiting resistors R3, R5 and R7, and the pull-up resistors R4, R6 and R8 are tested. The test circuit (optocoupler output) is externally connected with a 3.3V voltage and an FPGA processor.
The ground GND_TEST of the TEST power supply is connected to normally-closed contacts of the electromagnetic relays K3 and K4; after the diodes D1 and D2 are connected in parallel, one end of the diode D1 is connected with the TEST voltage VCC_TEST of the TEST power supply, and the other end of the diode D2 is connected with the normally-closed contacts of the electromagnetic relays K1 and K2 in parallel. The input positive end of the optocoupler U1 is connected to a TEST voltage VCC_TEST of a TEST power supply through a TEST current limiting resistor R3, and the input negative end of the optocoupler U1 is connected to a ground GND_TEST of the TEST power supply; the positive end FIRE_FPGA1 of the output of the optical coupler U1 is connected to 3.3V through a pull-up resistor R4, and meanwhile, the output signal is sent to the input end of an external FPGA processor for detection (signal processing and result judgment), and the negative end of the output of the optical coupler U1 is connected with the signal ground of the FPGA processor. The input positive end of the optical coupler U2 is connected to the initiating explosive device activating voltage positive end FIRE+ through a test current limiting resistor R5, and the input negative end of the optical coupler U2 is connected to the initiating explosive device activating voltage negative end FIRE-; the positive output end FIRE_FPGA2 of the optical coupler U2 is connected to 3.3V through a pull-up resistor R6, and meanwhile, the output signal is sent to the input end of the FPGA processor for detection, and the negative output end of the optical coupler U2 is connected with the signal ground of the FPGA processor. The input positive end of the optocoupler U3 is connected to the initiating explosive device activating voltage positive end FIRE+ through a TEST current limiting resistor R7, and the input negative end of the optocoupler U3 is connected to the ground GND_TEST of a TEST power supply; the positive end FIRE_FPGA3 of the output of the optical coupler U3 is connected to 3.3V through a pull-up resistor R8, and meanwhile, the output signal is sent to the input end of the FPGA processor for detection, and the negative end of the output of the optical coupler U3 is connected with the signal ground of the FPGA processor.
Aiming at different test and detection requirements, the detection principle and the judgment standard of the initiating explosive device activation and test circuit are as follows:
in the testing stage (e.g. storage and transportation stages), the functional test of the initiating explosive device positive/negative bus execution circuit is as follows: the contacts of the electromagnetic relays K1, K2, K3 and K4 of the activation circuit part are in an open state, the normally closed contacts of the electromagnetic relays K1 and K2 can be connected by the TEST voltage VCC_TEST through the diodes D1 and D2, the normally closed contacts of the electromagnetic relays K3 and K4 are connected by the GND_TEST, at the moment, the input end of the optocoupler U1 is conducted, the output positive end FIRE_FPGA1 is in a low level, and the normal closing of the electromagnetic relay can be judged. When the FPGA processor controls the solid state relays K5-K8 to be disconnected, the output positive end FIRE_FPGA3 of the optocoupler U3 is at a high level, and the fact that the solid state relays are disconnected normally can be judged. When the FPGA processor controls the solid state relays K5-K8 to be closed, the output positive end FIRE_FPGA3 of the optocoupler U3 is low level, and the solid state relay can be judged to be normally closed.
The closing detection of the electromagnetic relay is as follows: before the initiating explosive device activation target is transmitted, a closing instruction of the electromagnetic relays K1-K4 is sent out from the ground, the electromagnetic relays K1, K2, K3 and K4 are controlled to be closed (switched to normally closed contacts), at the moment, the input end of the optical coupler U1 is disconnected, the output positive end FIRE_FPGA1 is high level, and then the electromagnetic relays can be judged to be normally closed.
The initiating explosive device is activated and successfully detected as follows: when initiating explosive device needs to be activated, the controller can control the solid state relays K5, K6, K7 and K8 to be closed in a machine-selecting mode, and output/activation of initiating explosive device activation voltage is achieved. Meanwhile, the input end of the optocoupler U2 is conducted, and the output positive end FIRE_FPGA2 is changed from high level to low level, so that the success of activating output can be judged.
The activation operation process specifically comprises the following steps: before the activation object of the initiating explosive device is emitted (after the function test is qualified), an electromagnetic relay closing instruction is sent out from the ground to control the electromagnetic relays K1, K2, K3 and K4 to be closed. When the activation object is required to be activated in the flight process, the controller can be used for controlling the solid state relays K5, K6, K7 and K8 to be closed in a machine-selecting mode, and the output of initiating explosive device activation voltage is achieved, so that activation is achieved.
The invention has the advantages that:
the electromagnetic relay has the advantage of complete isolation under the disconnected body, but has the defects of large volume, high power consumption, poor vibration resistance under the power-off (disconnected) state, poor instant overcurrent capacity during closing and the like; in contrast, the solid state relay has the advantages of small volume, low power consumption, strong vibration resistance and large overcurrent capacity, but the disconnection of the solid state relay depends on the insulation characteristic of the semiconductor, so that the solid state relay cannot be completely isolated, and has lower safety coefficient.
Aiming at the specific conditions of two relays, the safe and reliable initiating explosive device activation and test circuit provided by the invention is designed to be an execution mode of using an electromagnetic relay in a front stage and using a solid-state relay in a rear stage, so that the respective advantages of the two relays are fully exerted, and the respective defects are avoided:
the electromagnetic relay is positioned at the front stage of the execution circuit and is completely isolated under the condition of disconnection, so that the two ends of the initiating explosive device can be ensured not to contact with a power supply in a normal state, and the safety of the initiating explosive device in a storage state is ensured; the electromagnetic relay in the activation circuit of the present invention is designed to be already in a closed state before the activation target is emitted, and the closed state of the electromagnetic relay has higher mechanical shock resistance and overcurrent shock performance than the open state.
The solid-state relay is positioned at the rear stage of the execution circuit and is used for final communication of the activation circuit path in the flying process, and can bear instantaneous heavy current load at the moment of initiating explosive device activation, so that the problem that false triggering or instantaneous contact overcurrent ablation is easy to occur when the electromagnetic relay is used as the rear stage in the previous design is solved, and the activation success rate is guaranteed/improved.
Meanwhile, the circuit has a safety detection function, and by switching the normally open contact and the normally closed contact of the electromagnetic relay, accessing a small voltage (test voltage) and matching with a plurality of groups of optocoupler acquisition circuits, the functional requirement test on various different combination states such as opening and closing of the electromagnetic relay and the solid relay is realized, the fault condition of an operator in each state is timely reminded, and potential safety hazards are avoided.
Drawings
FIG. 1 is a schematic diagram of an activation circuit portion of an initiating explosive device activation and test circuit according to the present invention.
Fig. 2 is a schematic diagram of an optocoupler portion of a test circuit of an initiating explosive device activation and test circuit according to the present invention.
Detailed Description
The invention further describes an initiating explosive device activation and test circuit with reference to the attached drawings.
A safe and reliable initiating explosive device activation and test circuit, comprising: initiating explosive device positive bus execution circuit, initiating explosive device negative bus execution circuit and test circuit.
Wherein, initiating explosive device positive bus execution circuit includes: the power supply positive terminal VCC, electromagnetic relays K1 and K2, solid state relays K5 and K6 are activated, and current limiting resistors R1 and R2 are activated. The normally open contacts of the electromagnetic relays K1 and K2 are connected with a positive power supply end VCC, the common contact is respectively connected with one ends of the solid relays K5 and K6, the other ends of the solid relays K5 and K6 are respectively connected with the activating current limiting resistors R1 and R2, and the other ends of the R1 and R2 are connected in parallel and then output an initiating explosive device activating voltage positive end FIRE+.
Initiating explosive device burden generating line execution circuit includes: the negative end GND of the power supply, electromagnetic relays K3 and K4, and solid state relays K7 and K8 are activated. The normally open contacts of the electromagnetic relays K3 and K4 are connected with the GND of the negative end of the power supply, the public contact is respectively connected with one ends of the solid relays K7 and K8, and the other ends of the solid relays K7 and K8 are connected in parallel and then output an initiating explosive device activation voltage negative end FIRE-.
A test circuit, comprising: TEST power supply (VCC_TEST and GND_TEST), diodes D1 and D2, optocouplers U1, U2 and U3, TEST current limiting resistors R3, R5 and R7, pull-up resistors R4, R6 and R8. After the diodes D1 and D2 are connected in parallel, one end of the diode is connected with the TEST voltage VCC_TEST, and the other end of the diode is connected with normally-closed contacts of the electromagnetic relays K1 and K2 in parallel; the ground gnd_test of the TEST voltage is connected to the normally closed contacts of the electromagnetic relays K3 and K4. The input positive terminal of the optocoupler U1 is connected to the TEST voltage VCC_TEST through the TEST current limiting resistor R3, the negative end of the input terminal is connected to the ground GND_TEST; the positive end FIRE_FPGA1 of the output of the optical coupler U1 is connected to 3.3V through a pull-up resistor R4, and meanwhile, the signal is sent to the input end of an external FPGA processor for detection, and the negative end of the output of the optical coupler is connected with the signal ground of the FPGA processor. The input positive end of the optical coupler U2 is connected to the initiating explosive device activating voltage positive end FIRE+ through a test current limiting resistor R5, the input negative end of the optical coupler U2 is connected to the initiating explosive device activating voltage negative end FIRE-, the output positive end FIRE_FPGA2 of the optical coupler U2 is connected to 3.3V through a pull-up resistor R6, meanwhile, the signal is connected to the input end of the FPGA processor for detection, and the output negative end of the optical coupler is connected to the signal ground of the FPGA processor. The input positive end of the optical coupler U3 is connected to the initiating explosive device activating voltage positive end FIRE+ through a TEST current limiting resistor R7, the input negative end of the optical coupler U3 is connected to the ground GND_TEST of the TEST voltage VCC_TEST, the output positive end FIRE_FPGA3 of the optical coupler is connected to 3.3V through a pull-up resistor R8, meanwhile, the signal is connected to the input end of the FPGA processor for detection, and the output negative end of the optical coupler is connected to the signal ground of the FPGA processor.
In the TEST stage, the electromagnetic relays K1, K2, K3 and K4 are in an open state, the normally closed contacts of the electromagnetic relays K1 and K2 can be connected by the TEST voltage vcc_test through the diodes D1 and D2, and the gnd_test is connected to the normally closed contacts of the electromagnetic relays K3 and K4, at this time, the input end of the optocoupler U1 is turned on, and the output positive end fire_fpgas 1 is at a low level, thereby judging that the electromagnetic relays are normally closed. When the FPGA processor controls the solid state relays K5-K8 to be disconnected, the output positive end FIRE_FPGA3 of the optocoupler U3 is at a high level, so that the solid state relay is judged to be normally disconnected; when the FPGA processor controls the solid state relays K5-K8 to be closed, the output positive end FIRE_FPGA3 of the optocoupler U3 is low level, so that the solid state relay is judged to be normally closed, and the functional test of the initiating explosive device positive bus execution circuit is realized.
Before the initiating explosive device activation target is transmitted, an electromagnetic relay closing instruction is sent out from the ground to control the electromagnetic relays K1, K2, K3 and K4 to be closed, at the moment, the input end of the optical coupler U1 is disconnected, the output positive end FIRE_FPGA1 is high level, and therefore the electromagnetic relay is judged to be normally closed.
In the flying process of the activation target, the controller can be used for controlling the solid state relays K5, K6, K7 and K8 to be closed in a machine-selecting mode, and the output of the initiating explosive device activation voltage is achieved. Meanwhile, the input end of the optical coupler U2 is conducted, and the output positive end FIRE_FPGA2 is changed from high level to low level, so that the success of activation and output is judged.
Before emission, an electromagnetic relay closing instruction is sent out by the ground to control the electromagnetic relays K1, K2, K3 and K4 to be closed. In the flying process, the controller can selectively control the solid state relays K5, K6, K7 and K8 to be closed, so that the output of initiating explosive device activation voltage is realized.
The foregoing description is only illustrative of the preferred embodiment of the present invention, and is not to be construed as limiting the invention, but is to be construed as limiting the invention to any simple modification, equivalent variation and variation of the above embodiments according to the technical matter of the present invention without departing from the scope of the invention.
Claims (8)
1. An initiating explosive device activation and test circuit, the circuit comprising: initiating explosive device positive bus execution circuit and initiating explosive device negative bus execution circuit; the initiating explosive device positive bus execution circuit and the initiating explosive device negative bus execution circuit are connected to the initiating explosive device activation voltage in an execution mode that an electromagnetic relay is arranged at the front stage and a solid-state relay is arranged at the rear stage from an activation power supply.
2. The initiating explosive device activating and testing circuit according to claim 1, wherein the initiating explosive device positive bus executing circuit comprises an activating power supply positive terminal VCC and two parallel circuits, and the first circuit comprises an electromagnetic relay K1, a solid state relay K5 and an activating current limiting resistor R1 in sequence from the power supply positive terminal VCC; the second circuit sequentially comprises an electromagnetic relay K2, a solid-state relay K6 and an activation current limiting resistor R2 from a power supply positive end VCC; wherein,, the normally open contacts of the electromagnetic relay K1 and the electromagnetic relay K2 are connected with the positive end VCC of the power supply; and the other ends of the activation current limiting resistor R1 and the activation current limiting resistor R2 are connected in parallel and then output an initiating explosive device activation voltage positive end FIRE+.
3. The initiating explosive device activation and test circuit according to claim 1 or 2 wherein the initiating explosive device negative bus execution circuit comprises an activation power negative terminal GND and two parallel circuits, a third circuit comprising an electromagnetic relay K3 and a solid state relay K7 in sequence from the power negative terminal GND; the fourth circuit sequentially comprises an electromagnetic relay K4 and a solid-state relay K8 from the power negative end GND; the normally open contacts of the electromagnetic relay K3 and the electromagnetic relay K4 are connected with the power negative terminal GND, and the other ends of the solid relay K7 and the solid relay K8 are connected in parallel and then output an initiating explosive device activation voltage negative terminal FIRE-.
4. A initiating explosive device activation and testing circuit as defined in any one of claims 1 to 3, wherein the circuit further comprises a testing circuit; the test circuit includes: the device comprises a TEST power supply connected with a normally closed contact of an electromagnetic relay, a diode connected with a TEST voltage VCC_TEST of the TEST power supply and the normally closed contact of the electromagnetic relay of the initiating explosive device positive bus execution circuit, and three groups of optocouplers; the input end of the optical coupler U1 is respectively connected with two ends of the test power supply; the input end of the optical coupler U2 is respectively connected with the two ends of the initiating explosive device activation voltage; the input end of the optical coupler U3 is respectively connected with the initiating explosive device activating voltage positive end FIRE+ and the ground GND_TEST of the TEST power supply.
5. The initiating explosive device activating and testing circuit according to claim 4, wherein the optocouplers U1, U2 and U3 are respectively provided with a test current limiting resistor at an input positive end, a signal ground connected to 3.3V through a pull-up resistor at an output positive end, and an output negative end connected to the FPGA processor; and the output signal is sent to the input of the FPGA processor for detection.
6. The initiating explosive device activation and testing circuit of claim 4 or 5 wherein the functional testing of the initiating explosive device positive bus execution circuit is: the TEST voltage VCC_TEST is connected into the normally closed contact of the electromagnetic relay of the initiating explosive device positive bus execution circuit through a diode, the ground GND_TEST of the TEST power supply is connected into the normally closed contact of the electromagnetic relay of the initiating explosive device negative bus execution circuit, at the moment, the input end of the optical coupler U1 is conducted, the output positive end FIRE_FPGA1 of the optical coupler U1 is at a low level, and then the electromagnetic relay is judged to be normally closed; when the solid-state relay is disconnected, the output positive end FIRE_FPGA3 of the optical coupler U3 is at a high level, and the solid-state relay is judged to be normally disconnected; when the solid state relay is closed, the output positive end FIRE_FPGA3 of the optocoupler U3 is at a low level, and the solid state relay is judged to be normally closed.
7. The initiating explosive device activation and testing circuit of claim 4 or 5 wherein the closing detection of the electromagnetic relay is: before the initiating explosive device activation target is transmitted, an electromagnetic relay closing instruction is sent out from the ground to control the electromagnetic relay to be switched to a normally closed contact, at the moment, the input end of the optical coupler U1 is disconnected, the output positive end FIRE_FPGA1 of the optical coupler U1 is at a high level, and then the electromagnetic relay is judged to be normally closed.
8. The initiating explosive device activation and testing circuit of claim 4 or 5 wherein the initiating explosive device activation and activation success detection is: when the initiating explosive device needs to be activated, the solid state relay is controlled to be closed, so that the output of the initiating explosive device activation voltage is realized; meanwhile, the input end of the optical coupler U2 is conducted, the output positive end FIRE_FPGA2 of the optical coupler U2 is changed from high level to low level, and then the activation is judged to be successful.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211307642.7A CN116338338A (en) | 2022-10-25 | 2022-10-25 | Initiating explosive device activation and test circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211307642.7A CN116338338A (en) | 2022-10-25 | 2022-10-25 | Initiating explosive device activation and test circuit |
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| CN116338338A true CN116338338A (en) | 2023-06-27 |
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| CN202211307642.7A Pending CN116338338A (en) | 2022-10-25 | 2022-10-25 | Initiating explosive device activation and test circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116667305A (en) * | 2023-07-31 | 2023-08-29 | 北京凌空天行科技有限责任公司 | Method for completely isolating secondary energy storage initiating explosive device activation circuit and timing control method |
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2022
- 2022-10-25 CN CN202211307642.7A patent/CN116338338A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116667305A (en) * | 2023-07-31 | 2023-08-29 | 北京凌空天行科技有限责任公司 | Method for completely isolating secondary energy storage initiating explosive device activation circuit and timing control method |
| CN116667305B (en) * | 2023-07-31 | 2023-10-20 | 北京凌空天行科技有限责任公司 | Method for completely isolating secondary energy storage initiating explosive device activation circuit and timing control method |
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