CN116319464A

CN116319464A - Network message flow statistics method, system, storage medium and electronic equipment

Info

Publication number: CN116319464A
Application number: CN202310255680.0A
Authority: CN
Inventors: 阮召崧
Original assignee: Nanjing Jinzhen Microelectronics Technology Co ltd
Current assignee: Nanjing Jinzhen Microelectronics Technology Co ltd
Priority date: 2023-03-16
Filing date: 2023-03-16
Publication date: 2023-06-23
Anticipated expiration: 2043-03-16
Also published as: CN116319464B

Abstract

The invention provides a network message flow statistics method, a system, a storage medium and electronic equipment, wherein the method comprises the following steps: acquiring a stream ID and a message byte length of a network message, and constructing a counter based on the stream ID and the message byte length; setting a time stamp on the network message; storing the counter and the timestamp in an internal cache; if the internal cache is full, the counter and the time stamp are recorded in an external memory statistical table and stored in an external memory; and reading the counter and the time stamp in the internal cache and the external memory statistics table to realize network message flow statistics. The network message flow statistics method, the system, the storage medium and the electronic equipment can quickly carry out classified statistics and reading on a large number of network messages, and meet the requirements of actual application scenes.

Description

Network message flow statistics method, system, storage medium and electronic equipment

Technical Field

The invention belongs to the technical field of network messages, and particularly relates to a network message flow statistics method, a system, a storage medium and electronic equipment.

Background

With the increasing data traffic of data centers, particularly the surge in traffic after the 5G age, data centers are faced with greater network pressure from applications and data. As network bandwidth increases and traffic types increase, the need for fast statistics of high speed network traffic and rich network types also increases in bursts.

Disclosure of Invention

In view of the above-mentioned drawbacks of the prior art, the present invention aims to provide a network message traffic statistics method, system, storage medium and electronic device, which can quickly classify, count and read a large number of network messages, and meet the requirements of practical application scenarios.

In a first aspect, the present invention provides a method for counting network message traffic, the method comprising the following steps: acquiring a stream ID and a message byte length of a network message, and constructing a counter based on the stream ID and the message byte length; setting a time stamp on the network message; storing the counter and the timestamp in an internal cache; if the internal cache is full, the counter and the time stamp are recorded in an external memory statistical table and stored in an external memory; and reading the counter and the time stamp in the internal cache and the external memory statistics table to realize network message flow statistics.

In one implementation of the first aspect, the external memory employs a DDR memory.

In one implementation of the first aspect, reading the counter and the timestamp in the internal cache and the external memory statistics table comprises the steps of:

acquiring a stream ID to be counted;

based on the stream ID, a matching counter and timestamp are read in the internal cache and the external memory statistics table using a DMA read mode or a fixed/debug read mode.

In an implementation manner of the first aspect, before storing the counter and the timestamp in an internal cache, the method further includes:

setting a moving window;

judging whether stream IDs corresponding to the storage commands in the moving window are the same or not according to the counter and the storage commands of the time stamp;

if so, merging the storage commands with the same stream ID to store the counter and the timestamp into an internal cache based on the merged storage command.

In an implementation manner of the first aspect, the method further includes setting a counter maximum value, and stopping merging the storage commands with the same stream ID when the counter reaches the counter maximum value.

In one implementation manner of the first aspect, storing the counter and the timestamp in an internal cache includes the steps of:

acquiring the existing time of the existing items in the internal cache;

judging whether the existing time is larger than an aging threshold value or not;

if yes, recording the existing entry into an external memory statistical table and storing the entry into an external memory; storing the new entry in the internal cache.

In a second aspect, the present invention provides a network message traffic statistics system, where the system includes an acquisition module, a setting module, a storage module, and a reading module;

the acquisition module is used for acquiring the stream ID and the message byte length of the network message and constructing a counter based on the stream ID and the message byte length;

the setting module is used for setting a time stamp on the network message;

the storage module is used for storing the counter and the timestamp into an internal cache; if the internal cache is full, the counter and the time stamp are recorded in an external memory statistical table and stored in an external memory;

the reading module is used for reading the counter and the time stamp in the internal cache and the external memory statistical table so as to realize network message flow statistics.

In one implementation of the second aspect, the external memory employs DDR memory.

In one implementation manner of the second aspect, the reading module reads the counter and the timestamp in the internal cache and the external memory statistics table includes the following steps:

acquiring a stream ID to be counted;

In an implementation manner of the second aspect, the device further includes an acceleration buffer module, where the acceleration buffer module is configured to set a moving window before the counter and the timestamp are stored in the internal buffer; judging whether stream IDs corresponding to the storage commands in the moving window are the same or not according to the counter and the storage commands of the time stamp; if so, merging the storage commands with the same stream ID to store the counter and the timestamp into an internal cache based on the merged storage command.

In an implementation manner of the second aspect, the acceleration buffer module is further configured to set a counter maximum value, and stop merging the storage commands with the same stream ID when the counter reaches the counter maximum value.

In one implementation manner of the second aspect, the storing, by the storage module, the counter and the timestamp into an internal cache includes the steps of:

acquiring the existing time of the existing items in the internal cache;

In a third aspect, the present invention provides an electronic device comprising: a processor and a memory.

The memory is used for storing a computer program;

the processor is configured to execute the computer program stored in the memory, so that the electronic device executes the network packet flow statistics method.

In a fourth aspect, the present invention provides a computer readable storage medium having a computer program stored thereon, where the program when executed by an electronic device implements the network packet traffic statistics method described above.

In a fifth aspect, the present invention provides a network packet traffic statistics system, including the electronic device and an external memory.

As described above, the network message traffic statistics method, system, storage medium and electronic device of the present invention have the following beneficial effects:

(1) The method can quickly classify, count and read a large number of network messages, and meet the requirement of the increasingly-growing data center for quickly processing the network messages;

(2) The service bandwidth required by accessing the DDR memory is obviously reduced, and the statistical efficiency is improved;

(3) Can support 1.6 x 10 ⁷ Message statistics of individual flows supports flows up to 50 Gbps.

Drawings

FIG. 1 is a schematic view of an electronic device according to an embodiment of the invention;

FIG. 2 is a flow chart of a network message traffic statistics method according to an embodiment of the invention;

FIG. 3 is a schematic diagram of a moving window model according to an embodiment of the present invention;

FIG. 4 is a diagram showing an external memory statistics table according to an embodiment of the invention;

FIG. 5 is a schematic diagram of an aging process according to an embodiment of the present invention;

FIG. 6 is a schematic diagram showing the timing of the read/write operations of different streams according to an embodiment of the present invention;

FIG. 7 is a diagram illustrating a hash lookup process according to an embodiment of the present invention;

fig. 8 is a schematic diagram of a network packet flow statistics system according to an embodiment of the invention;

fig. 9 is a schematic structural diagram of an electronic device according to an embodiment of the invention.

Detailed Description

Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict.

It should be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.

The following embodiments of the present invention provide a network message traffic statistics method, which can be applied to an electronic device as shown in fig. 1. The electronic device in the present invention may include a mobile phone 11, a tablet computer 12, a notebook computer 13, a wearable device, a vehicle-mounted device, an augmented Reality (Augmented Reality, AR)/Virtual Reality (VR) device, an Ultra-Mobile Personal Computer (UMPC), a netbook, a personal digital assistant (Personal Digital Assistant, PDA) and the like with a wireless charging function, and the specific type of the electronic device is not limited in the embodiments of the present invention.

For example, the electronic device may be a Station (ST) in a wireless charging enabled WLAN, a wireless charging enabled cellular telephone, a cordless telephone, a Session initiation protocol (Session InitiationProtocol, SIP) telephone, a wireless local loop (WirelessLocal Loop, WLL) station, a personal digital assistant (Personal Digital Assistant, PDA) device, a wireless charging enabled handheld device, a computing device or other processing device, a computer, a laptop computer, a handheld communication device, a handheld computing device, and/or other devices for communicating over a wireless system, as well as next generation communication systems, such as a mobile terminal in a 5G network, a mobile terminal in a future evolved public land mobile network (PublicLand Mobile Network, PLMN), or a mobile terminal in a future evolved Non-terrestrial network (Non-terrestrial Network, NTN), etc.

For example, the electronic device may communicate with networks and other devices via wireless communications. The wireless communications may use any communication standard or protocol including, but not limited to, global system for mobile communications (GlobalSystem of Mobile communication, GSM), general Packet radio service (General Packet RadioService, GPRS), code division multiple access (Code Division Multiple Access, CDMA), wideband code division multiple access (Wideband Code Division Multiple Access, WCDMA), long term evolution (Long Term Evolution, LTE)), email, short message service (Short Messaging Service, SMS), BT, GNSS, WLAN, NFC, FM, and/or IR techniques, among others. The GNSS may include a global satellite positioning system (Global Positioning System, GPS), a global navigation satellite system (Global Navigation Satellite System, GLONASS), a beidou satellite navigation system (BeiDou navigation Satellite System, BDS), a Quasi zenith satellite system (Quasi-Zenith Satellite System, QZSS) and/or a satellite based augmentation system (Satellite Based Augmentation Systems, SBAS).

The following describes the technical solution in the embodiment of the present invention in detail with reference to the drawings in the embodiment of the present invention.

As shown in fig. 2, the network message traffic statistics method of the present invention includes the following steps:

step S1, obtaining a stream ID and a message byte length of a network message, and constructing a counter based on the stream ID and the message byte length.

Specifically, firstly, classifying network messages to obtain stream IDs and message byte lengths of the network messages. The invention adopts a counter to count the network message flow. Wherein updating of the counter is done based on the stream ID and the message byte length.

And step S2, setting a time stamp on the network message.

Specifically, when a new network message is received, a timestamp is set for the network message first.

Step S3, storing the counter and the time stamp into an internal cache; and if the internal cache is full, recording the counter and the time stamp into an external memory statistical table, and storing the counter and the time stamp into an external memory.

Specifically, the counter and the corresponding timestamp are stored as one entry in the internal cache, which can speed up the statistics rate and achieve better performance than if the counter and the corresponding timestamp were stored directly in the external memory. In one implementation of the first aspect, the external memory employs a DDR memory.

Meanwhile, an external memory statistic table is preset. And when the internal cache is full and cannot continue to store new entries, the external memory statistical table is updated according to the new entries, and the new entries are stored in the external memory.

In one embodiment, there are 16M (1.6X10A 7) statistics entries in the external memory DDR for 16M streams. Each entry has 16B (bytes). When a new data packet is received, the external memory statistics table ddr_counting_table module reads the entries in the external memory, updates the counter and the timestamp, and writes the new entries back to the external memory. Since the external memory DDR has a long R/W (read/write) delay, an internal RL buffer (read delay buffer) is required to accumulate the flow counter of the input packet during the external memory DDR read back.

The structure of the external memory statistics is shown in fig. 4. An internal ram called "ddr_rl_cache" is used to accumulate an increment counter of incoming packets during the delay time of the ddr read request, and the counter is cleared after the ddr read data is received.

Cpu_cmd_fifo for receiving read commands for a particular stream from the stat_dma module.

Stat_in_fifo for receiving packet commands from the previous module.

Ins_fail_fifo for receiving packet commands from the ddr_rd_pro module when the RL cache insertion fails. Ins_fail_fifo should not push back pressure to the ddr_rd_pro module.

Ddr_cache_pre for providing a CRC hash function to generate ram addresses, the input of which is a stream id message extracted from a packet command or CPU command. A Strict Priority (SP) scheduling policy is implemented between the three input sources (fifo), with ins_fail_fifo having the highest priority being scheduled, while cpu_cmd_fifo has the lowest priority.

The function of ddr_rd_pro is as follows:

1) First, the ddr_rl_cache is read using ram_addr and four entry data are obtained.

2) Second, each entry is compared to the command by the stream id.

3) If there is no match, then a new entry is inserted into ram in the unoccupied free location, while the ddr read request is sent and the read command message is stored in rdcmd_fifo.

4) If there is at least one entry that matches, then the entry is updated and no more DDR requests are sent.

The entries in the ddr_rl_cache are shown in table 1.

Entries in Table 1, ddr_rl_cache

[123]	[122]	[121:74]	[73:26]	[25:0]
					valid	cpu_rd_A	pkt_cntA	byte_cntA	flowA_id

The function of ddr_wr_pro is as follows:

1) The command message is read from rdcmd_fifo, and then the DDR data is read from rdata_fifo.

2) The ddr_rl_cache is read to obtain an incremental packet count and byte count.

3) New statistical entry data is calculated.

4) For a CPU command, returning a new statistical entry to the stat_dma module, and writing zero into the DDR; for other commands, the new entry is written to the DDR.

There are two read sources and two write sources (ddr_rd_pro/ddr_wr_pro) that have the opportunity to access the ddrurl_cache on a single w/r ram port, thus requiring arbitration of multiple sources. In short, source1 performs a read/write operation every four cycles, so source2 may also use three more cycles. To avoid write conflicts for multiple sources, source2 needs to monitor the actions taken by source1, see if source1 has the same stream id as source2, and find the appropriate time slot to perform the write operation.

And S4, reading the counter and the time stamp in the internal cache and the external memory statistical table to realize network message flow statistics.

Specifically, reading the counters and timestamps in the internal cache and the external memory statistics table includes the steps of:

411 A stream ID requiring statistics is obtained.

412 Based on the stream ID, a matching counter and timestamp are read in the internal cache and the external memory statistics table using a DMA read mode or a fixed/debug read mode.

Preferably, the invention implements counter and timestamp reading through the stat_dma module, supporting a fixed/debug read mode and a DMA read mode.

The stat_dma module retrieves the counter data from the internal cache and the external memory statistics table and then adds them to obtain the total value of the count. In the fixed mode, the CPU configures a single stream ID through the control register and triggers the DMA controller to read the counter data. After successfully acquiring the counter data, the DMA controller returns 128-bit counter data to the PCIe register. In the DMA mode, the DMA controller performs hardware statistics collection with the in-band manager. Using in-band data packets, the in-band statistics manager receives various control commands from the CPU and automatically executes these commands to complete the corresponding configuration work. In this way, the in-band statistics manager will trigger when triggered to begin collecting in-stream ID range counter data

The DMA controller performs a DAM operation that will read the entire stream data and DMA the stream with a non-zero counter to the in-band statistics manager. In addition, the stat_dma module supports clearing a single traffic count through additional CPU configurable registers.

Specifically, there are two methods for the CPU access count table:

1) PCIE registration access

The CPU communicates with the control plan PCIe to access multiple registers in the stat acc, which provides a way to read statistics of a single stream ID for debugging. The stat_dma module operates in a fixed read mode and ignores the value of stat_cpu_acc_range.

2) In-band access

The CPU communicates with the in-band manager module to access a plurality of registers in the stat_acc, which provides a method of triggering HW stat collection within the stream ID range { stat_cpu_acc_flowid, STATUCPU_acc_flowid+stat_cpu_CC_range-1 }. The stat_dma module operates in a DMA read mode.

It should be noted that, the above two access methods are controlled and switched by the system level control bit "stat_tbl_access_switch", and by default, the stat_tbl_access_switch is "in-band access", and the RDL register may be used for the in-band manager. Once SW sets the stat_tbl_access_switch to "PCIE Reg Access", the RDL register will switch to the control path PCIE.

The software configuration steps of the method are as follows:

PCIE Reg access (reading table data for fixed stream id):

1. the stat_tbl_access_switch is set to "PCIE Reg access".

2. The stat_tbl_access_switch_result is read to confirm that the switching action is completed.

3. The stream ID to be read in the register stat_cpu_acc_flow is configured.

4. A request is set in register stat cpu acc ctrl to trigger a read from the count memory.

SW polls stat_cpu_status in the stat_cpu_acc_status register. Upon completion, the 16B data "{ stat_cpu_read_data_3, stat_cpu_read_data_2, stat_cpu_reads_data_1, stat_cpu_read_data_0 }" will follow the format as shown in Table 2.

Table 2, data reading format

bit 127:bit 96	bit 95:bit 48	bit 47:bit 0
			Timestamp	Pkt_Count	Byte_Count

In-band access (statistical collection of stream ID ranges):

1. the stat_tbl_access_switch is set to "in-band access".

3. By in-band grouping, the stream ID to be read in the register stat_cpu_acc_flow is configured, which is the start stream ID of the stat collection.

4. By configuring the stat_cpu_acc_range by the intra-band packet SW, the range of stream ids collected by the stat is indicated.

5. A round of statistics collection is triggered from the count memory by setting a register stat cpu acc ctrl through the in-band packet SW.

6. The stat_dma of the counting module starts to scan the counting memory in the range of { acc_flow, accuflow_wid+acc_range-1 }, and at the same time, the FSM returns stat_cpu_dma_data and a non-zero counter to the in-band Stat manager, wherein the data is encapsulated into an in-band response packet and sent to the CPU.

7. The in-band stat manager waits until the rising edge of the stat_cpu_acc_done signal before processing the next command.

In one embodiment, to further speed up the statistics rate, the present invention speeds up the statistics by using a moving window to incorporate commands for stream IDs. Specifically, before storing the counter and the timestamp in the internal cache, the method further includes:

a) A moving window win_size is set. As shown in fig. 3, the moving window contains four registers for moving between successive commands, different colors representing different stream IDs.

B) And judging whether the stream IDs corresponding to the storage commands in the moving window are the same or not according to the counter and the storage commands of the time stamp. Wherein the first command is compared with the other commands by stream ID.

C) If so, merging the storage commands with the same stream ID to store the counter and the timestamp into an internal cache based on the merged storage command. Wherein if an equivalent stream ID is found, it is merged into the closest stream ID, otherwise the first command will be popped up.

Preferably, a counter maximum is set, and when the counter reaches the counter maximum, the memory commands with the same stream ID are stopped from being combined. For example, the counter maximum value is set to "cnt_th". When the counter maximum is reached, the merging and popping up of commands is stopped. The moving window SIZE win_size and the counter maximum value cnt_th may be set according to the actual application scenario.

The optimization operation effectively improves the statistical performance under specific conditions, reduces the possibility of back-to-back commands with the same stream ID, and reduces the design complexity of processing ram r/w pipeline operation.

In one embodiment of the present invention, storing the counter and the timestamp in an internal cache includes the steps of:

421 The time of existence of the existing entry in the internal cache is obtained.

Specifically, in the internal cache, each flow entry keeps its aging state, i.e., records its lifetime, respectively, with the help of an internal aging engine.

422 Judging whether the existing time is larger than an aging threshold value.

423 If yes, recording the existing entry into an external memory statistical table and storing the entry into an external memory; storing the new entry in the internal cache.

Specifically, when the presence time exceeds the aging threshold, the entry present in the internal cache acc_ram will be marked as an "old" entry. Replacement of the old entry may occur if the new entry fails to insert or the internal cache acc ram is full. In this case, the new flow counter is stored in the internal cache acc_ram, while the old entry is sent to the external memory statistics ddr_counting_table. In addition, if the new stream cannot replace the existing stream, it is directly transmitted to the external memory statistics table ddr_accounting_table.

In one embodiment, the acc_cache module includes sub-modules as shown in FIG. 5.

Acc_pre for hash computation from the stream ID.

Acc_ram_ctrl, responsible for temporarily storing the entire counter in the stream-based RAM, named acc_ram, and clearing the stream count as its interior ages and is replaced by a new stream.

When performing read-modify-write (RMW) of acc_ram, there are several cases:

1) Case 1: referring to the CPU command, when there is already a specific stream ID in the acc_ram (entry matching is successful), the module clears the counter of the entry and returns the data to the CPU.

2) Case 2: referring to the packet command, when a specific flow ID already exists in the acc_ram (entry matching is successful), the module updates the counter and timestamp of the entry and updates the aging state of ag_ram

3) Case 3: when there is no flow of the same ID in acc_ram, the CPU cannot read (entry does not match), and then returns zero to the CPU.

4) Case 4: when the grouping command fails to match any entry, but a new available location is found in the acc_ram, the module inserts the new entry into the acc_ram and loads the aging state at ag_ram.

5) Case 5: when the packet command cannot match any entry or any available location in the acc_ram, but a stale entry is found, the module will replace the entry in the acc_ram and flush the stale entry to the downstream module.

6) Case 6: when the packet command fails to match any entry or find any available location and aged entry, the module sends the new entry directly to the downstream module.

In all cases, it takes 4 clock cycles to perform a ram RMW stream update, while it will share the same ram port as the CPU read/write. To share the same port, the CPU read/clear will occupy slot 2, the normal stream update uses slot 0, and the CPU will read/clear stream A as shown in FIG. 6. At the same time, flow B/C will be updated by acc_ram_ctrl, and a collision will occur on the port, as flow C may read old/erroneous ram data, caused by a previous CPU flush (flow a= flow C), or a previous flush (flow B instead of flow C). To avoid collisions, stream C will monitor other sources during RMW, and once it detects that they have written to the locations in ram where stream C is intended, stream C will discard the current write operation and the packet will be sent directly to the external memory statistics ddr_counting_table.

The present invention allocates 2K entries in acc ram to provide counter accumulation because ram addresses are generated by the hash function, the number of valid entries may be less than 2K. The CRC32 hash function is used to provide a 9-bit ram address from the stream id. As shown in fig. 7, every cycle of the read port reading the acc_ram, a plurality of item data will be output from ram, each item should be matched with the current stream id to find the required real item.

The entry in acc_ram contains the entire traffic counter as shown in table 3.

TABLE 3 flow counter

Since more ram read ports are needed for the aging mechanism, another ram called "ag_ram" (whose layout is the same as that of acc_ram) is instantiated, which will perform the same operation on ag_ram each time acc_ram_ctrl inserts or updates or deletes any entry in the ACCURAM. an ag_ram size of 6bit entry is shown in Table 4.

Table 4, ag_ram structure

Bit[5:0]
	ag_timer

The acc_ag_scan module periodically scans each address in the ag_ram forward, decrementing the ag_timer by 1 if any ag_timer is found to be greater than zero. The scan rate is defined by the parameters AGING_THRESHLOD and AGING_CLOCK, as shown in Table 5.

TABLE 5 scanning Rate parameters

The acc_ram_cpu_access module manages CPU reads/clears acc_ram. It will share the same acc_ram r/w port as normal traffic, using different time slots to avoid r/w collisions. For normal traffic it will occupy slot 0 of RMW and for CPU access it will occupy slot 2, both with RMW delays of 4 clock cycles.

The protection scope of the network message traffic statistics method according to the embodiment of the present invention is not limited to the execution sequence of the steps listed in the embodiment, and all the schemes implemented by the steps of increasing or decreasing and step replacing in the prior art according to the principles of the present invention are included in the protection scope of the present invention.

The embodiment of the invention also provides a network message flow statistical system which can realize the network message flow statistical method of the invention, but the realization device of the network message flow statistical system comprises but is not limited to the structure of the network message flow statistical system listed in the embodiment, and all the structural variations and substitutions of the prior art according to the principles of the invention are included in the protection scope of the invention.

As shown in fig. 8, in an embodiment, the network packet flow statistics system of the present invention includes an obtaining module 81, a setting module 82, a storage module 83, and a reading module 84.

The obtaining module 81 is configured to obtain a stream ID and a message byte length of a network message, and construct a counter based on the stream ID and the message byte length.

The setting module 82 is configured to set a timestamp on the network packet.

The storage module 83 is connected to the obtaining module 81 and the setting module 82, and is configured to store the counter and the timestamp into an internal cache; and if the internal cache is full, recording the counter and the time stamp into an external memory statistical table, and storing the counter and the time stamp into an external memory.

The reading module 84 is connected to the storage module 83, and is configured to read the counters and the timestamps in the internal cache and the external memory statistics table, so as to implement network packet traffic statistics.

The structures and principles of the obtaining module 81, the setting module 82, the storage module 83 and the reading module 84 are in one-to-one correspondence with the steps in the above network message flow statistics method, so that the description thereof is omitted herein.

In the several embodiments provided in the present invention, it should be understood that the disclosed system, apparatus, or method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of modules/units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple modules or units may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or modules or units, which may be in electrical, mechanical or other forms.

The modules/units illustrated as separate components may or may not be physically separate, and components shown as modules/units may or may not be physical modules, i.e., may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules/units may be selected according to actual needs to achieve the objectives of the embodiments of the present invention. For example, functional modules/units in various embodiments of the invention may be integrated into one processing module, or each module/unit may exist alone physically, or two or more modules/units may be integrated into one module/unit.

Those of ordinary skill would further appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, in computer software, or in a combination of the two, and that the elements and steps of the examples have been generally described in terms of function in the foregoing description to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

The embodiment of the invention also provides a computer readable storage medium. Those of ordinary skill in the art will appreciate that all or part of the steps in the method implementing the above embodiments may be implemented by a program to instruct a processor, where the program may be stored in a computer readable storage medium, where the storage medium is a non-transitory (non-transitory) medium, such as a random access memory, a read only memory, a flash memory, a hard disk, a solid state disk, a magnetic tape (magnetic tape), a floppy disk (floppy disk), an optical disk (optical disk), and any combination thereof. The storage media may be any available media that can be accessed by a computer or a data storage device such as a server, data center, or the like that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a digital video disc (digital video disc, DVD)), or a semiconductor medium (e.g., a Solid State Disk (SSD)), or the like.

The embodiment of the invention also provides electronic equipment. The electronic device includes a processor and a memory.

The memory is used for storing a computer program.

The memory includes: various media capable of storing program codes, such as ROM, RAM, magnetic disk, U-disk, memory card, or optical disk.

The processor is connected with the memory and is used for executing the computer program stored in the memory so as to enable the electronic equipment to execute the network message flow statistics method.

Preferably, the processor may be a general-purpose processor, including a central processing unit (Central Processing Unit, abbreviated as CPU), a network processor (Network Processor, abbreviated as NP), etc.; but also digital signal processors (Digital Signal Processor, DSP for short), application specific integrated circuits (Application Specific Integrated Circuit, ASIC for short), field programmable gate arrays (Field Programmable Gate Array, FPGA for short) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

As shown in fig. 9, the electronic device of the present invention is embodied in the form of a general purpose computing device. Components of an electronic device may include, but are not limited to: one or more processors or processing units 91, a memory 92, a bus 93 that connects the different system components (including the memory 92 and the processing unit 91).

Bus 93 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor, or a local bus using any of a variety of bus architectures. By way of example, and not limitation, such architectures include Industry Standard Architecture (ISA) bus, micro channel architecture (MAC) bus, enhanced ISA bus, video Electronics Standards Association (VESA) local bus, and Peripheral Component Interconnect (PCI) bus.

Electronic devices typically include a variety of computer system readable media. Such media can be any available media that can be accessed by the electronic device and includes both volatile and nonvolatile media, removable and non-removable media.

Memory 92 may include computer system readable media in the form of volatile memory, such as Random Access Memory (RAM) 921 and/or cache memory 922. The electronic device may further include other removable/non-removable, volatile/nonvolatile computer system storage media. By way of example only, storage system 923 may be used to read from or write to non-removable, nonvolatile magnetic media (not shown in FIG. 9, commonly referred to as a "hard disk drive"). Although not shown in fig. 9, a magnetic disk drive for reading from and writing to a removable non-volatile magnetic disk (e.g., a "floppy disk"), and an optical disk drive for reading from or writing to a removable non-volatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical media) may be provided. In such cases, each drive may be coupled to bus 93 through one or more data medium interfaces. Memory 92 may include at least one program product having a set (e.g., at least one) of program modules configured to carry out the functions of embodiments of the invention.

A program/utility 924 having a set (at least one) of program modules 9241 may be stored in, for example, memory 92, such program modules 9241 include, but are not limited to, an operating system, one or more application programs, other program modules, and program data, each or some combination of which may include an implementation of a network environment. Program modules 9241 generally perform the functions and/or methods of the embodiments described herein.

The electronic device may also communicate with one or more external devices (e.g., keyboard, pointing device, display, etc.), with one or more devices that enable a user to interact with the electronic device, and/or with any device (e.g., network card, modem, etc.) that enables the electronic device to communicate with one or more other computing devices. Such communication may occur through an input/output (I/O) interface 94. And, the electronic device may also communicate with one or more networks such as a Local Area Network (LAN), a Wide Area Network (WAN) and/or a public network, such as the Internet, through network adapter 95. As shown in fig. 9, the network adapter 95 communicates with other modules of the electronic device over the bus 93. It should be appreciated that although not shown, other hardware and/or software modules may be used in connection with an electronic device, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, data backup storage systems, and the like.

In an embodiment, the network message traffic statistics system of the present invention includes the electronic device and the external memory, and is used for implementing fast statistics of network message traffic.

The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.

Claims

1. The network message flow statistics method is characterized by comprising the following steps:

acquiring a stream ID and a message byte length of a network message, and constructing a counter based on the stream ID and the message byte length;

setting a time stamp on the network message;

storing the counter and the timestamp in an internal cache; if the internal cache is full, the counter and the time stamp are recorded in an external memory statistical table and stored in an external memory;

and reading the counter and the time stamp in the internal cache and the external memory statistics table to realize network message flow statistics.

2. The network message traffic statistics method according to claim 1, wherein: the external memory adopts a DDR memory.

3. The network message traffic statistics method according to claim 1, wherein: reading the counter and the timestamp in the internal cache and the external memory statistics table comprises the steps of:

acquiring a stream ID to be counted;

4. The network message traffic statistics method according to claim 1, wherein: before storing the counter and the timestamp in the internal cache, the method further comprises:

setting a moving window;

5. The network message traffic statistics method according to claim 4, wherein: and setting a maximum counter value, and stopping combining the storage commands with the same stream ID when the counter reaches the maximum counter value.

6. The network message traffic statistics method according to claim 1, wherein: storing the counter and the timestamp in an internal cache includes the steps of:

acquiring the existing time of the existing items in the internal cache;

7. The network message flow statistics system is characterized by comprising an acquisition module, a setting module, a storage module and a reading module;

the setting module is used for setting a time stamp on the network message;

8. The network message traffic statistics system according to claim 7, wherein: the external memory adopts a DDR memory.

9. The network message traffic statistics system according to claim 7, wherein: the reading module reading the counter and the timestamp in the internal cache and the external memory statistics table comprises the following steps:

acquiring a stream ID to be counted;

10. The network message traffic statistics system according to claim 7, wherein: the system further comprises an acceleration cache module, wherein the acceleration cache module is used for setting a moving window before the counter and the time stamp are stored in the internal cache; judging whether stream IDs corresponding to the storage commands in the moving window are the same or not according to the counter and the storage commands of the time stamp; if so, merging the storage commands with the same stream ID to store the counter and the timestamp into an internal cache based on the merged storage command.

11. The network message traffic statistics system according to claim 10, wherein: the acceleration buffer module is further configured to set a counter maximum value, and stop merging the storage commands with the same stream ID when the counter reaches the counter maximum value.

12. The network message traffic statistics system according to claim 7, wherein: the storage module storing the counter and the timestamp in an internal cache comprises the steps of:

acquiring the existing time of the existing items in the internal cache;

13. An electronic device, the electronic device comprising: a processor and a memory;

the memory is used for storing a computer program;

the processor is configured to execute the computer program stored in the memory, so that the electronic device performs the network packet traffic statistics method according to any one of claims 1 to 6.

14. A computer readable storage medium having stored thereon a computer program, which when executed by an electronic device implements the network message traffic statistics method of any of claims 1 to 6.

15. A network message traffic statistics system comprising the electronic device of claim 13 and an external memory.