CN116306403A - Modeling simulation method for exciting 3 rd and 5 th harmonic currents based on series arc resistance turn-to-turn short circuit - Google Patents
Modeling simulation method for exciting 3 rd and 5 th harmonic currents based on series arc resistance turn-to-turn short circuit Download PDFInfo
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Abstract
The invention discloses a modeling simulation method based on 3 and 5 times harmonic current excited by a series arc resistance inter-turn short circuit, which is characterized by comprising the following steps of establishing a digital circuit simulation model according to a current arcing process and a circuit principle during the series arc resistance inter-turn short circuit; and outputting analog electric quantity by using the digital circuit simulation model, and performing circuit equivalent simulation according to a proportional step unit or a non-equal-proportion step unit combination in the digital circuit simulation model according to a fault development process to complete dynamic simulation of the series arc resistance turn-to-turn short circuit and display and reduction of electric characteristic change of the series arc resistance turn-to-turn short circuit. The dynamic real-time waveform data of calculation simulation is utilized to verify the monitoring principle and function of the related fault monitoring and protecting device, the reliability and the accuracy of the monitoring technology and the device thereof are tested and checked, and the principle and performance simulation test of the inter-turn short circuit fault monitoring or protecting device can be carried out in a laboratory environment.
Description
Technical Field
The invention relates to the technical field of power failure simulation, in particular to a modeling simulation method for exciting 3-order and 5-order harmonic currents based on series arc resistance turn-to-turn short circuit.
Background
In the reactive power compensation system of the power transmission and distribution network, parallel compensation capacitor groups (hereinafter referred to as parallel capacitors) which can be switched in groups are adopted. The 1000kV ultra-high voltage transformer substation usually adopts the parallel capacity of about 180Mvar to 240Mvar in a 110kV voltage class configuration group at the third winding of the transformer, the 500kV ultra-high voltage transformer substation usually adopts the parallel capacity of about 45Mvar to 60Mvar in a 66kV or 35kV voltage class configuration group at the third winding of the transformer, and the 220kV and 110kV transformer substations also configure the parallel capacity with proper capacity at the low voltage winding of the transformer according to an in-situ compensation principle so as to compensate reactive power flow, improve power factor and control and stabilize voltage level. Typically, a typical standardized design is to configure 12% series reactors in series with a series reactance rate for a portion of the parallel capacity, and 5-6% series current limiting reactors for the other portion. The current limiting series reactor is used for limiting frequently switched parallel-to-capacitor inrush current, wherein a parallel-to-capacitor group of a 12% series reactor is configured, and meanwhile, the amplifying effect of the parallel-to-capacitor group with 5-6% series reactor on 3 rd harmonic waves of a power system is inhibited, so that the 12% series reactor group is firstly switched and finally withdrawn in a switching sequence, and the amplifying of the 3 rd harmonic waves caused by the independent operation of the 5-6% series reactor is prevented. The parallel-capacity series reactance of the outdoor transformer substation usually adopts a dry air reactor. The main faults of the dry type air-core reactor are inter-strand short circuit, inter-turn short circuit, surface flashover discharge and the like no matter parallel reactance or series reactance.
In order to avoid faults of the transformer or the reactor in the use process, the fault generation reasons of the reactor and the transformer and the fault generation process are simulated, so that workers can be assisted to judge the fault generation reasons in time, fault sources are cut off, fault occurrence trends are known, and larger losses are avoided.
Disclosure of Invention
Therefore, the invention aims to provide a modeling simulation method based on series arc resistance inter-turn short circuit excitation 3, 5-order harmonic current, and the simulation is based on the arc burning discharge characteristic of the turn short circuit when inter-turn faults, and has the repeated process characteristics of arc burning, zero crossing turn-off, arc extinction, delayed turn-on and arc re-burning which occur in a short circuit along with a power frequency period. The method comprises the steps of establishing a computer digital analog circuit model, carrying out analog calculation by using the model, and carrying out dynamic characteristic reduction and reproduction of related fault processes, particularly reducing and revealing unique characteristics and mechanism of stable 3 and 5-order harmonic currents after parallel strings resist inter-turn short circuits, verifying the monitoring principle and function of related fault monitoring and protecting devices by using dynamic real-time waveform data of calculation simulation, testing and verifying the reliability and accuracy of the monitoring technology and devices, and carrying out analog test of the principle and performance of the inter-turn short circuit fault monitoring or protecting devices in a laboratory environment.
In order to achieve the above purpose, the modeling simulation method based on the series arc resistance turn-to-turn short circuit excitation 3, 5-order harmonic current comprises the following steps:
s1, establishing a digital circuit simulation model according to a current arcing process and a circuit principle during series arc resistance turn-to-turn short circuit;
s2, simulating a fault development process by using the digital circuit simulation model, and performing circuit equivalent simulation in the digital circuit simulation model according to the fault development process and the proportional step units or the unequal proportional step unit combination to complete the dynamic process of the series arc resistance turn-to-turn short circuit, the display of the electrical characteristic change and the reduction simulation of the fault case.
Further preferably, the digital circuit simulation model comprises an equivalent simulation part of a power system, an equivalent simulation part of a transformer substation and a capacitor bank, and an equivalent simulation part of a filter bank of a direct current power conversion station alternating current system affecting the harmonic characteristic of the system; the equivalent simulation part of the power system comprises a generator and an ideal double-winding step-up transformer; the transformer substation equivalent simulation part comprises a step-down transformer and a switchable parallel capacitor bank; the power generator is used for providing stable voltage, and the ideal double-winding step-up transformer is used for step-up the stable voltage to reach the power supply standard;
the step-down transformer is used for step-down the high voltage input by the step-up transformer in the power system, and the switchable parallel capacitor bank comprises a series reactor and a capacitor; the coil of the series reactor is provided with a turn-to-turn short circuit fault simulation with expanded number of turns of the developing fault, and the simulation of the early, middle and later stages of the development of the short circuit fault is realized by carrying out equivalence according to the combination values of proportional ladder units or non-equal proportional ladder units when the short circuit simulation is carried out.
Further, preferably, in the digital circuit simulation model, according to the relationship between the ampere-turn balanced magnetic flux number of the short-circuit circulation caused by the number of short-circuit turns and the total ampere-turn number of the whole coil, a real-time electromagnetic induction ampere-turn balanced equation is established as follows:
N12*I1(t)+N2*I2(t)＝0
wherein N12 is a normal turn with a certain turn number, namely a primary side turn, and I1 (t) is a coil passing real-time current, namely a primary side current; n2 is the number of short-circuit turns, i.e. the secondary side turns, and I2 (t) is the short-circuit loop real-time current, i.e. the secondary side current.
In any of the above embodiments, preferably, the local coil inductance is vanished after the real-time ampere-turn balancing according to the arc burning, and the real-time local coil inductance is restored when the arc is extinguished; and (3) carrying out equivalent circuit parameter equivalence from the two ports of the primary side, wherein the equivalent resistance has the following expression formula:
wherein: rs is a single-turn resistor, R12 is a port primary equivalent resistor, I1 is a coil passing current, I2 is a short-circuit loop current, and N2 is a short-circuit turn number.
In any one of the foregoing embodiments, preferably, the proportional ladder unit or the unequal proportional ladder unit includes a plurality of groups of fault series resistance equivalent circuits connected in series, where the fault series resistance equivalent circuits include inter-turn short circuit loss series resistance equivalent inductors, adjustable inter-turn short circuit circulation loss equivalent resistors, and a bidirectional short circuit arc control thyristor for simulating an arc burning extinguishing re-burning process; and the bidirectional short circuit arc control thyristor is connected with the turn-to-turn short circuit circulation loss equivalent resistor in series and then is connected with two ends of the turn-to-turn short circuit loss series reactance equivalent inductor in parallel as a whole.
In any of the above embodiments, it is preferable that the triggering angles of the bidirectional short-circuit arc control thyristors used for simulating the arc extinguishing re-burning process are different to control the on and off time and duration of positive and negative half waves respectively, so as to simulate the re-burning characteristic change after the arc extinguishing of the positive and negative half-wave arc short circuit; the characteristic of active loss equivalent resistance generated by the loop after the turn-to-turn short circuit is simulated by using an adjustable turn-to-turn short circuit loop loss equivalent resistance, and the characteristic of inductance loss increase after the turn-to-turn short circuit is simulated by using the turn-to-turn short circuit loss series reactance equivalent inductance.
In S2, the step units or the unequal step units are combined to be equal to each other to complete a dynamic simulation test of the inter-turn short circuit of the series arc resistance, wherein the series reactor adopts dry hollow series resistance for simulation, adopts step time sequence control to control triggering and conducting angle of the bidirectional thyristor, and simulates the nonlinear expansion process of the short circuit turn of the dry hollow series reactor after failure; the method specifically comprises the following steps:
s201, according to data when a short circuit fault actually occurs, when 100% of inductance loss occurs, the number of short circuit turns is 40, and the inter-turn short circuit loss series reactance equivalent inductance and the adjustable inter-turn short circuit circulation loss equivalent resistance are reduced in an equal proportion or unequal proportion gradient according to preset step times;
s202, when the inter-turn short circuit loss series reactance equivalent inductance and the adjustable inter-turn short circuit circulation loss equivalent resistance are reduced according to the gradient, the current of each stage of series equivalent resistance is calculated according to the increase of the short circuit circulation to about 15-30 times of rated current.
In any one of the foregoing embodiments, preferably, in S201, the inter-turn short-circuit loss series reactance equivalent inductance and the adjustable inter-turn short-circuit circulation loss equivalent resistance are reduced in equal proportion or unequal proportion according to a preset step number; the method also comprises the steps of 5 times of preset step numbers, unequal ratio gradient of inductance loss, and simulating delay short-circuit discharge arc reignition time after a series of anti-voltage peaks in a power frequency cycle according to different trigger angles.
The method in any one of the above embodiments preferably further includes the content of 3 rd order harmonics and 5 th order harmonics in the digital circuit simulation model at different inductance loss levels; and the content of 3 rd harmonic waves and 5 th harmonic waves under different triggering angles.
In any of the above embodiments, preferably, the content of the 3 rd harmonic and the 5 th harmonic obtained in the digital circuit simulation model is compared with the actual parameters of the actual dry type air-core reactance turn-to-turn fault case, and the parameters in the digital circuit simulation model are adjusted according to the comparison result.
The modeling simulation method based on the serial arc resistance inter-turn short circuit excitation 3, 5-order harmonic current, disclosed by the application, comprises the steps of establishing a digital circuit simulation model, carrying out simulation calculation by using the model, carrying out dynamic characteristic reduction and reproduction of related fault processes, reducing and revealing unique characteristics and mechanism of stable 3, 5-order harmonic current after parallel serial arc resistance inter-turn short circuit appears, verifying the monitoring principle and function of related fault monitoring and protecting devices by using dynamic real-time waveform data of calculation simulation, testing and checking the reliability and accuracy of the monitoring technology and devices thereof, and carrying out simulation test of the principle and performance of the inter-turn short circuit fault monitoring or protecting devices in a laboratory environment; the fault model and the simulation method are utilized to calculate and simulate, the power system digital simulation platform such as an RTDS real-time digital simulation system is utilized to generate fault characteristics and characteristics, and the output digital quantity is converted into the fault electrical characteristics output of the physical analog quantity, so that the technical principle and the functional correctness of the fault monitoring or protecting technology are conveniently verified.
Drawings
FIG. 1 is a flow chart of a modeling simulation method based on series arc resistance inter-turn short circuit excitation 3, 5-order harmonic current.
FIG. 2 is a waveform diagram of a short circuit loop of the present invention in computer simulation based on the principle of actual short circuit failure;
FIG. 3 is a typical current waveform of a fault phase in the lc loop of the shunt capacitor bank after turn-to-turn shorting of the present invention;
FIG. 4 is a schematic diagram of a turn-to-turn short circuit of a layer of a branch of a coil according to the present invention;
FIG. 5 is a schematic diagram of the principle of air coil turn-to-turn short circuit electromagnetic induction;
FIG. 6 is a schematic diagram of a circuit of a series equivalent resistor and an inductor parallel connection of a bidirectional thyristor valve for fault turn fault characteristics of the invention;
FIG. 7 is a graph showing the waveform of the arc current in the mid-turn short circuit fault of the air coil (about 50% loss of inductance) according to the present invention;
FIG. 8 is a graph showing the current waveforms of the air-core coil turn-to-turn short circuit fault in the later stage of development (about 90% of the inductance loss);
FIG. 9 is a case-record chart of a 12% series reactance inter-turn short circuit fault of a 35kV3X20Mvar group;
FIG. 10 is an electrical wiring diagram of a power system of the digital circuit simulation model of the present invention;
FIG. 11 is a diagram of a fixed ratio unit steady state model fault phase string anti-equivalence circuit model of the present invention;
FIG. 12 is a computer simulation model of a case of a 35kV3X20Mvar group 12% series reactance inter-turn short circuit fault of the present invention;
FIG. 13 (a) is a waveform diagram of a fault phase of a turn-to-turn short circuit fault simulation in a simulation experiment of the present invention;
FIG. 13 (b) is a schematic diagram of the 3, 5-harmonic current content values of the fault simulation shown in FIG. 13 (a);
FIG. 14 is a waveform of a wave-recording fault phase current of a case-record fault of a 12% series reactance inter-turn short-circuit fault of a 35kV3X20Mvar group according to the present invention;
FIG. 15 is a graph showing the resulting neutral voltage waveforms of the computer simulation results for the turn-to-turn short circuit fault case of the present invention;
FIG. 16 is a plot of three-phase current waveforms and harmonic content within the corner of an inter-turn short circuit fault case transformer of the present invention;
FIG. 17 is a graph showing the 3 rd/5 th harmonic content at 90% inductance loss in a simulation test according to the present invention;
FIG. 18 shows the 3 rd/5 th harmonic content at 80% inductance loss in the simulation test of the present invention;
FIG. 19 is a plot of 3 rd/5 th harmonic content at 50% inductance loss in a simulation test of the present invention;
FIG. 20 shows the 3 rd/5 th harmonic content at 20% inductance loss in the simulation test of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and the detailed description.
As shown in FIG. 1, the modeling simulation method based on series arc resistance inter-turn short circuit excitation 3, 5-order harmonic current provided by the embodiment of the invention comprises the following steps:
s1, establishing a digital circuit simulation model according to a current arcing process and a circuit principle during series arc resistance turn-to-turn short circuit;
s2, simulating a fault development process by using the digital circuit simulation model, and performing circuit equivalent simulation according to the proportional ladder units or the unequal-proportion ladder unit combinations in the digital circuit simulation model to finish the dynamic process of the series arc resistance turn-to-turn short circuit, the display of the electrical characteristic change and the reduction simulation of the fault case.
It should be noted that, when the digital circuit simulation model is built, firstly, according to the actual fault case statistical analysis, the turn-to-turn short circuit loop current is relatively small (the large and short circuit loop current resisting is about 150-300 times of the normal turn current), so that the expansion speed of the turn-to-turn short circuit caused by the high temperature of the short circuit turn and the arc burning is relatively slow, the turn-to-turn short circuit is continuously developed and expanded by about 30-40 turns (the inductance loss caused by 1 turn) after several minutes of development expansion, and the equivalent inductance of the turn-to-turn short circuit becomes very small until the equivalent inductance completely disappears. Because the series reactance equivalent inductance and reactance are reduced, the impedance of the whole loop is increased instead, so that the current of the loop is not increased but reduced instead.
In actual fault cases, the fault tolerance of the string is realized by a 500kV ultrahigh voltage transformer station, the fault tolerance of the 12% string is high, and the following fault rules are found according to analysis and statistical research results of all near 10 cases which can start wave recording to record fault waveforms after faults:
(1) The development of inter-turn short-circuits of the cross-reactor is slow and can last for a period of time ranging from a few minutes (1-5 minutes) to tens of minutes (1-5 minutes or 30 minutes).
(2) The continued development of turn-to-turn shorts results in a sustained nonlinear decrease in equivalent reactance.
(3) The stable 3 and 5 harmonics can be excited and generated in the turn-to-turn fault process.
(4) Eventually, the faults lead to the ignition and spontaneous combustion of the dry air-core reactor.
When research discovers that turn-to-turn short circuits are caused, on one hand, as the number of turns is continuously increased, the equivalent reactance is reduced and the equivalent resistance is increased. On the other hand, because each power frequency cycle inter-turn short circuit exists in an arc shape, the insulation film residues still exist at the high temperature damage or damage position generated by the short circuit circulation arc at the short circuit position of the lead at the initial fault stage, more importantly, as the short circuit wire turns aluminum lead heats and melts under the short circuit circulation flow of 15-30 times, the short circuit is under the actions of continuous arc burning ablation, electric power stretch-breaking and the like, a developing arc ablation gap and a groove can be formed, meanwhile, because inter-turn potential is in the level of tens of volts to tens of volts, when the arc burns in the gap, the maintenance voltage (recovery voltage) is lower, so that air insulation in the gap with the width of a few millimeters to tens of millimeters can be recovered briefly after the short circuit current crosses zero, the arc cannot be reburnt immediately, and is reburned after being extinguished for about 2-6 mS. Therefore, the short-circuit loop waveform is shown in the following figure 2, the short-circuit loop is not a continuous sine wave, but a discontinuous wave, the continuous sine wave with high amplitude in figure 2 is a normal series reactance terminal voltage waveform, and the discontinuous wave with low amplitude is an analogue simulated turn-to-turn short-circuit loop and arc current waveform (the current in the short-circuit loop cannot be directly recorded in the actual fault process); fig. 3 is a waveform diagram of significant 3 and 5 harmonic currents in the lc circuit excited by an arc-type turn-to-turn short circuit fault.
Based on the arc burning process of arc short circuit in ablation slit and groove and its circuit principle, the method can use the repeated process of synchronous control turn-to-turn short circuit by ideal switch or thyristor, arc burning, zero crossing turn-off, arc extinction, delay turn-on and arc reignition, so as to simulate the continuous stable and significant quantity of parallel LC loop current in the series anti-turn-to-turn short circuit process generated or caused by arc short circuit excitation, and the characteristics and fault development change process of 3, 5 and 7 times of main harmonic current, using digital circuit simulation technique, establishing digital circuit model with identical principle and mechanism, setting reasonable simulation method, revealing fault mechanism and characteristics, reducing specific fault case, explaining specific electric characteristics and characteristics occurring in fault, for monitoring fault and checking, checking the fault characteristics of the monitoring technique and time device, for example, using RTDS real-time digital simulation system, establishing simulation method of current limiting series anti-arc resistance short circuit excitation 3 and 5 times of harmonic current based on common 12%, 5-6% series anti-resistance rate of parallel capacitor bank, using digital circuit simulation technique, establishing digital circuit simulation model, and using real-time digital circuit simulation system to output digital circuit simulation system to monitor fault resistance, and test device to detect fault resistance, and test.
As shown in fig. 4-6, in another embodiment of the present invention, when calculating parameters of a digital circuit simulation model, an inter-turn short circuit fault of an inductance coil is breakdown discharge that occurs in which insulation is reduced or damage occurs in a non-metallic direct short circuit (discharge passes through damaged or failed polyester film) at a place between adjacent turns, when there is arc burning at the short circuit place, arc circulation Ic 1=ic 2+ic, and short circuit inter-turn has short circuit circulation Ic2. The current in the short circuit loop is a coil current Ic of tens to tens times, and the current direction is opposite to the coil current.
After a part of turns in the air-core coil are short-circuited between adjacent turns, the short-circuited turns and the normal turns are hinged through an alternating current magnetic field, and the electromagnetic induction principle of the short-circuited turns and the normal turns on a certain small scale in the adjacent space is the induction relation between the two primary-secondary independent coils with good magnetic field coupling. As shown in fig. 6, the whole coil is divided into 3 series parts, namely L11, L12 and L13 parts, the corresponding inductances are k11 x L, k12 x L, k13 x L correspond to turns N11, N12, N13, wherein turn-to-turn short circuit occurs in a plurality of turns in the coil L12, the number of turns of the short circuit is N2, which corresponds to the secondary coil L2 of the coil L12, and the coils L2 and L12 have a complete magnetic flux coupling relationship as the ideal transformer. The balance relation of the magnetic flux ampere-turns based on the electromagnetic induction principle is formed between the short-circuit turns and the normal turns of the magnetic flux tight hinge in a certain surrounding space size range.
In the digital circuit simulation model, according to the relationship between the number of short-circuit circulation ampere-turn balanced magnetic fluxes caused by the number of short-circuit turns and the total ampere-turn of the whole coil, a real-time electromagnetic induction ampere-turn balanced equation is established as follows:
n12×i1 (t) +n2×i2 (t) =0 formula 1
Wherein N12 is a normal turn with a certain turn number, namely a primary side turn, and I1 (t) is a coil passing real-time current, namely a primary side current; n2 is the number of short-circuit turns, i.e. the secondary side turns, and I2 (t) is the short-circuit loop real-time current, i.e. the secondary side current.
When the electric arc burns, the inductance of the local coil disappears after the ampere-turn is balanced in real time, and L12=0; when the arc is extinguished, the inductance of the real-time local coil is recovered, and L12=k12×L; and (3) carrying out equivalent circuit parameter equivalence from the two ports of the primary side, wherein the equivalent resistance has the following expression formula:
wherein: rs is a single-turn resistor, R12 is a port primary equivalent resistor, I1 is a coil passing current, I2 is a short-circuit loop current, and N2 is a short-circuit turn number.
According to actual measurement and theoretical calculation, the common 12% series resistance short circuit is calculated, when the short circuit turns are in a 1-10 turn scale, the short circuit loop current is about 30-40 times of the coil current, namely I 2 /I 1 = (30-40). 5-6% of the series resistance short-circuit loop current is about 15-30 times of the coil current.
Because the ampere turns of 6% and 12% of common series reactance are far smaller than and resistant to the ampere turns, the short circuit circulation of the short circuit turns is about 15-40 times of the normal current (the large and short circuit circulation resistant is 150-300 times), so that the fault of the short circuit part of the actual wire turns still has insulation film residues at the high-temperature damage or damage part generated by the short circuit circulation arc at the short circuit part of the initial wire, the aluminum wire of the short circuit turns heats and melts under the action of 15-30 times of the short circuit circulation, continuous arc burning ablation, electric power stretch-off and the like at the short circuit part can form a developing arc ablation gap and a groove, the short circuit circulation is extinguished due to the short recovery of air insulation with the distance of a few millimeters to approximately 10 millimeters after the zero crossing of the arc current, the short circuit circulation is reburned after being extinguished after being delayed for 1-3 mS in the next power frequency half-wave period due to reapplication of turn potential, the process is equivalent to the synchronous control by an ideal switch or a thyristor, and the reburning/turn-off process of the short circuit part is generated after the inductance.
On the other hand, in order to verify the rationality of circuit control simulation by using a thyristor, the relation between the triggering angle of the thyristor and the discontinuous waveform of the short-circuit loop current and the 3 rd harmonic and the 5 th harmonic needs to be further studied, as shown in fig. 7, the relationship between the c-phase series resistance fault in the three-phase parallel capacitor bank and the short-circuit loop current and the coil current (inductance loss 50 percent) of the middle turn-to-turn short-circuit current arc combustion, which undergo zero-crossing extinction-reignition cycle, is simulated, the triggering angle of the thyristor is a 36-degree short-circuit loop current discontinuous waveform diagram, the curve with the high peak value in the diagram is the reference Uc voltage (kilovolt), the curve with the low peak value is the amplified ten times of the current Ic1 x 10 (kiloamperes), as shown in fig. 8, and the coil and the LC loop current (Ic) waveform diagram after the thyristor is controlled under the condition that the arc extinction time is longer, namely the corresponding triggering angle is larger (65 degrees), wherein the 3 rd harmonic current content at the moment exceeds 22 percent and the 5 th harmonic current content reaches about 13 percent; as shown in fig. 9, the waveform of the fault reactor recorded current after the 35kv parallel-serial fault-tolerant case of the 500kv substation actually occurs for about 5 minutes, wherein the 3 rd harmonic current content exceeds 20%, the 5 th harmonic current content reaches more than about 10%, and it can be seen that the waveforms and the harmonic current characteristics of the two have high similarity, the actual fault case recorded graph (after the fault has developed for about 5 minutes, the inductance loss reaches 80-90 percent) is matched with the simulation result. From this, it can be derived that the digital circuit simulation model can be constructed using the following structure.
As shown in fig. 10, in one embodiment of the present invention, the digital circuit simulation model includes a power system equivalent simulation part, a transformer substation and capacitor bank equivalent simulation part, and a filter bank equivalent simulation part of a dc converter station ac system that affects the harmonic characteristics of the system; the equivalent simulation part of the power system comprises a generator and an ideal double-winding step-up transformer; wherein G is a constant voltage source of an infinite generator, T is an ideal non-short-circuit impedance non-loss double-winding step-up transformer, and X S Is equivalent system inductive reactance, R S Is equivalent system resistance. The transformer substation equivalent simulation part comprises a step-down transformer and a switchable parallel capacitor bank; the power generator is used for providing stable voltage, and the ideal double-winding step-up transformer is used for step-up the stable voltage to reach the power supply standard;
the step-down transformer is used for conveying the step-up transformer in the power systemThe input high voltage is reduced, and the switchable parallel capacitor bank comprises a series reactor and a capacitor; wherein STB is a step-down transformer, SC is a switchable parallel capacitor bank (series resistance X L Capacitor X C Composition; the coil of the series reactor is provided with a turn-to-turn short circuit fault simulation with expanded number of turns of the developing fault, and the simulation of the early, middle and later stages of the development of the short circuit fault is realized by carrying out equivalence according to the combination values of proportional ladder units or non-equal proportional ladder units when the short circuit simulation is carried out. Other power systems may affect the 3, 5, and 7 harmonic absorption amplification characteristics such as the dc converter station lines and their filter bank equivalent parts: including line equivalent reactance X L Ac field filtering and compensating capacitor bank (possibly including switching capacitor SC,3 times and 12/24 times filter bank), and shunt reactor X provided for balancing power frequency capacitive compensation capacity g (calculation simulation needs, actual alternating current field does not have parallel reactor)
The electric connection of the parallel capacitor group units in the figure is formed by adopting a star connection mode to connect according to a three-phase group and carrying 12% (or 5-6%) current-limiting series reactance and parallel capacitance.
As shown in fig. 11, therefore, in one embodiment of the present application, a thyristor is used to set a proportional ladder unit or a non-equal proportional ladder unit as a fault string anti-equivalent circuit, so as to implement a string anti-short-circuit fault simulation, where the proportional ladder unit or the non-equal proportional ladder unit includes multiple groups of fault string anti-equivalent circuits connected in series, where the fault string anti-equivalent circuit includes an inter-turn short-circuit loss string anti-equivalent inductance, an adjustable inter-turn short-circuit circulation loss equivalent resistor, and a bidirectional short-circuit arc control thyristor for simulating arc arcing and extinguishing a re-ignition process; and the bidirectional short circuit arc control thyristor is connected with the turn-to-turn short circuit circulation loss equivalent resistor in series and then is connected with two ends of the turn-to-turn short circuit loss series reactance equivalent inductor in parallel as a whole. In the figure, C is the capacitance of a parallel capacitor, R is a series resistance equivalent normal loss resistor, L1-L5 are equal proportion or unequal proportion inter-turn short circuit loss series resistance inductors, deltaR is an inter-turn short circuit circulation loss equivalent resistor, and V1-V5 are bidirectional thyristor valves for simulating the quenching-reburning characteristics of a short circuit arc.
Further, the two-way short circuit arc is adopted to control the on and off time and duration of positive and negative half waves respectively, so as to simulate the re-ignition characteristic change after the arc of the positive and negative half wave arc short circuit is extinguished; the characteristic of active loss equivalent resistance generated by the loop after the turn-to-turn short circuit is simulated by using an adjustable turn-to-turn short circuit loop loss equivalent resistance, and the characteristic of inductance loss increase after the turn-to-turn short circuit is simulated by using the turn-to-turn short circuit loss series reactance equivalent inductance.
Further, in S2, the dynamic simulation test of the series arc resistance turn-to-turn short circuit is completed according to the equivalence of the proportional ladder unit or the non-proportional ladder unit combination, which includes that the series reactor adopts dry hollow series reactance for simulation, adopts step-type time sequence control, controls the triggering and the conducting angle of the bidirectional thyristor, and simulates the nonlinear expansion process of the short circuit turn of the dry hollow series reactor after the fault; the method specifically comprises the following steps:
s201, according to data when a short circuit fault actually occurs, when 100% of inductance loss occurs, the number of short circuit turns is 40, and the inter-turn short circuit loss series reactance equivalent inductance and the adjustable inter-turn short circuit circulation loss equivalent resistance are reduced in an equal proportion or unequal proportion gradient according to preset step times;
s202, when the inter-turn short circuit loss series reactance equivalent inductance and the adjustable inter-turn short circuit circulation loss equivalent resistance are reduced according to the gradient, the current of each stage of series equivalent resistance is calculated according to the increase of the short circuit circulation to about 15-30 times of rated current.
In any one of the foregoing embodiments, preferably, in S201, the inter-turn short-circuit loss series reactance equivalent inductance and the adjustable inter-turn short-circuit circulation loss equivalent resistance are reduced in equal proportion or unequal proportion according to a preset step number; the method also comprises the steps of 5 times of preset step numbers, unequal ratio gradient of inductance loss, and simulating delay short-circuit discharge arc reignition time after a series of anti-voltage peaks in a power frequency cycle according to different trigger angles.
For simple simulation, the equivalent inductance and the equivalent resistance can be reduced by 20% in equal proportion by adopting the turn-to-turn short circuit development scale steps, and the incremental equivalent inductance is reduced. The control is performed according to the 5-stage ladder setting control time sequence of 20%,40%,60%,80% and 100%, and the corresponding serial equivalent resistance of each stage is calculated according to the increase of the short-circuit circulation current to about 15-30 times (25 times can be set on average) rated current, and the number of short-circuit turns is about 40 turns when 100% of the inductance is lost, so that the total equivalent short-circuit circulation heating effect resistance is 40 turns x25 times/1000 turns=25 times.
After every 20% of inductance loss proportion unit thyristor valve group, serial equivalent resistance is assigned according to the relation of 25/5 equal to 5 times, and 4-6 times serial reactance normal total loss equivalent resistance is adopted, so that 6 times value can be assigned when the inductance loss overall is smaller than 50% of faults, and 4 times value can be assigned when the inductance loss overall is larger than 80% of faults.
According to the research analysis and fitting of a plurality of fault cases, the cutting effect of the fault string resistance, which is formed by the high-temperature ablation of electric arcs, the melting of aluminum wires and the electric power stretch-breaking effect from the initial fault point, is found to form an air gap and a groove which continuously develop along with the turn-to-turn short circuit fault and the continuous development of the number of the fault turns, as shown in the anatomical photograph after the real fault of fig. 11, the short circuit arc burning discharge causes the short circuit potential after the zero crossing of the electric arc current, and the short circuit turns induce the turn-to-turn electric potential, and the arc discharging is recovered between the short circuit turns and between the blown turns under the power frequency voltage of tens of volts and the electric arc reburning, so the short circuit arc has the characteristics of discharging arc-electric arc current zero crossing extinction-delay reburning along with the power frequency voltage periodicity (which is equivalent to the controlled triggering and the natural turn-off characteristics of the current zero crossing of the two-way thyristor valve in fig. 6 and 10)
The method in any one of the above embodiments preferably further includes the content of 3 rd order harmonics and 5 th order harmonics in the digital circuit simulation model at different inductance loss levels; and the content of 3 rd harmonic waves and 5 th harmonic waves under different triggering angles.
In any of the above embodiments, preferably, the content of the 3 rd harmonic and the 5 th harmonic obtained in the digital circuit simulation model is compared with the actual parameters of the actual dry type air-core reactance turn-to-turn fault case, and the parameters in the digital circuit simulation model are adjusted according to the comparison result.
The following description will be made with reference to a three-phase group of 35kv3×20mvar,12% series resistance, which is common in common use and failure:
(1) Transformer substation and power system operation condition collection parameters thereof
And I, collecting model numbers, wiring groups, transformation ratios, capacities and short-circuit impedance percentage values of the step-down transformers.
II. And the equivalent short-circuit impedance of the high-voltage side and the medium-voltage side of the step-down transformer in a large mode and a small mode is collected according to the state and the running condition of the power system, the equivalent short-circuit impedance comprises impedance characteristics (namely reactance and resistance proportion), and the power system generator is modeled according to an infinite system.
And III, collecting the alternating current system filter parameters with direct current station switching in the 50km distance range of the fault station and the impedance parameters of the connecting line of the alternating current system filter parameters. (the harmonic impedance characteristics of an ac filter bank of a dc converter station (typically configured with 3 th order, 11/13 th order, etc. filter banks) can have an impact on turn-to-turn short circuit faults and the 3, 5, 7, and 11 th order harmonics.
(2) Calculating the values of equal-proportion (20%, 5) step equivalent inductance and equivalent resistance
As shown in tables 1 and 2.
Table 1-35kV 3X20Mvar,12% series resistance three-phase group parameter Table
| Parallel capacitance parameter | 3X20Mvar,12% group | |
12% series reactance rate series reactance |
| Capacitive reactance (omega) | 28.801 | Inductive reactance (omega) | 3.46 |
| Capacitance (mu F) | 110.52 | Inductance (H) | 0.011 |
| Equivalent resistance (omega) | 0.035 (about 1% inductive reactance value) | / | / |
Table 2-35kV 3X20Mvar,12% series resistance ratio turn-to-turn fault 5 series stage equal ratio inductance and equivalent resistance meter
Note that: all of the above calculations are based on a power frequency 50Hz power system.
Selecting system parameters, and establishing a simulation model by using PSCAD to form a computer simulation model of the 12% series reactance turn-to-turn short circuit fault case shown in FIG. 12; and carrying out simulation based on the two characteristics of extinction and reburning of arc burning discharge characteristics at turn-to-turn short circuit when the series reactor turns-to-turn faults, simulating arc extinction interruption, and then delaying the arc short circuit process of reburning after a certain time (angle). The simulation can reproduce stable 3 rd harmonic current and 5 th harmonic current which appear after parallel-series anti-turn-to-turn short circuit in a fault case, and special characteristics and characteristics of the neutral point voltage under the state of obvious 3 rd harmonic current, 5 th harmonic current and 7 th harmonic current which accompany the induction loss after the turn-to-turn short circuit.
FIG. 13 (a) is a graph showing the results of computer simulation, i.e., fault phase current waveforms, and FIG. 13 (b) is a graph showing the 3 and 5-order harmonic current content values; (current unit kA in the figure), table 3 shows the statistics of the current and neutral point offset voltage data for each frequency of the thyristor valve block at different firing angles (simulating a c-phase fault, taking a-phase voltage as a reference angle of 0 degrees, and scanning possible thyristor firing angles).
Table 3-coil current and neutral point voltage shift data after arc re-ignition at different arc-off times/angles of triggering at 90% inductance loss.
The 3 rd harmonic current content is triggered at a trigger angle of 215 degrees (corresponding to 65 degrees after the peak value of the C-phase inductance coil voltage, more than 22 percent, and the 5 th harmonic current content is between about 10 and 13 percent), 150 degrees is corresponding to 0 degree delay (corresponding to the highest peak value point of the C-phase series resistance voltage waveform), the reference voltage waveform moment of the trigger angle is the sine wave 0 degree point of the bus voltage A phase, the actual series resistance voltage is the series resistance terminal voltage and the bus voltage opposite phase due to the relation that the capacitive current is applied to the reactance, thus when the B-phase series resistance fault is simulated, 30 degrees is corresponding to 0 degree delay after the a-phase voltage peak value, and when the A-phase series resistance fault is simulated, 270 degrees is corresponding to 0 degree delay after the voltage peak value.
Table 4-35kV 3x20Mvar group 12% series reactance inter-turn short circuit fault case record harmonic current change table.
The actual fault case recording data (the inductance loss reaches 80-90% after the fault is developed for about 5 minutes) is very consistent with the simulation result table. Fig. 14 shows the actual fault case current waveform and harmonic content analysis, wherein the 3 rd harmonic current content is between 11.3% and 33%, the 5 th harmonic current content is between 4.4% and 14%, and after the fault progresses to about 5 minutes, the arc burns more unstable due to the expansion of the number of turns of the short circuit and the formation of arc ablation cutting slits and grooves, and the reburning time after the arc is extinguished is increased (the angle of triggering is increased), resulting in the drastic increase of 3 th and 5 th harmonics, which is characterized in accordance with the rules of simulation characteristics).
Fig. 15 is a voltage waveform (voltage unit kV in the figure) of a neutral point of a computer simulation result of a case of a 12% series reactance turn-to-turn short circuit fault of a 35kV3×20Mvar group. Wherein the harmonics are mainly 5, 11, 13 and 3 times.
Fig. 16 is an analysis of the three-phase current waveform and harmonic content in the corner of another set of 35kV3x20Mvar set 12% series reactance inter-turn short circuit fault case transformers (the middle column of current waveforms in the figure is the fault phase waveform, wherein the harmonic content at the moment of the cursor is converted to 3 times of 8.2% and 5 times of 13% of the branches of the capacitor bank fault outside the corner), and the harmonic current occurs for 5 times to more than 3 times.
As can be seen from the harmonic content calculated in table 3, with the instability of the short-circuit loop arc combustion and the increase in the loop break time and angle caused by the occurrence of arc harmonics, the 3 rd order harmonic content increases non-linearly, whereas the 5 th order harmonic current increases non-linearly and then decreases gradually after a certain angle (205 degrees in table 1), and the 5 th order harmonic current content is greater than 3 rd order harmonics before.
In the actual fault case trace (fig. 16), the situation that the 5 th harmonic current exceeds the 3 rd harmonic is also found, and the correctness of the simulation characteristic is proved.
The short circuit circulation based on the electromagnetic induction ampere-turn balance principle is gradually reduced after the short circuit turns are expanded, so that the turn-to-turn short circuit is developed more and the short circuit turns are bigger, the short circuit circulation is smaller, the loss inductance is bigger at the moment, the whole series resistance characteristic tends to be free of induction resistance, the magnetic flux of the coil also tends to be zero, and the induction potential of the coil turns is smaller. Therefore, the time for extinguishing the arc current after zero crossing becomes longer, so the content of the 3 rd harmonic current in the harmonic current reaches 20 to 30% and the content of the 5 th harmonic current reaches about 6 to 10% as the trend shown by the simulation results of fig. 13 and table 3 in the simulation case.
Fig. 17 to 20 are graphs showing harmonic content at different firing angles for different inductance losses. Wherein the horizontal axis of the coordinates is the trigger delay angle, and the vertical axis is the content of 3 and 5 times harmonic current in the coil current (branch current). Table 5 is a table of real parameters of 12% series resistance dry type air-core inter-turn fault cases of C-phase of 3×20Mvar group according to fig. 1335kV, and simulation results based on a computer simulation model, the following table 5 simulates the delayed short-circuit discharge arc re-ignition time after series resistance voltage peak in one power frequency cycle according to the delay re-ignition characteristics after the discharge arc is extinguished according to five situations of inductance loss 90%, 80%, 50%, 40% and 20%, 150 degrees is 0 delay time for C-phase, 270 degrees is 0 delay time for a-phase, and 30 degrees is 0 delay time for B-phase.
Table 5 is a table of simulation results based on computer simulation models for real parameters of the 12% series resistance dry type air-core inter-turn fault case of the C phase of the 35kV3X20Mvar group according to FIG. 13
As can be seen from the comparison of the simulation test and the actual fault case, the simulation model realizes the arc burning-arc extinguishing-delayed reburning characteristics and the change rule of the arc burning-arc extinguishing-delayed reburning characteristics along with the arc short circuit characteristics; the fault process of restoring the specific case is realized, and fault characteristic analysis of the specific case, and fault electrical characteristic and characteristic restoration demonstration are carried out.
The fault model and simulation method are utilized to calculate and simulate, the digital simulation platform of the power system such as RTDS real-time digital simulation system is utilized to generate fault characteristics and characteristics, and the output digital quantity is converted into the fault electrical characteristics output of the physical analog quantity, which is used for verifying the technical principle and functional correctness of the fault monitoring or protecting technology
It is apparent that the above examples are given by way of illustration only and are not limiting of the embodiments. Other variations or modifications of the above teachings will be apparent to those of ordinary skill in the art. It is not necessary here nor is it exhaustive of all embodiments. While still being apparent from variations or modifications that may be made by those skilled in the art are within the scope of the invention.
Claims (10)
1. A modeling simulation method based on series arc resistance turn-to-turn short circuit excitation 3, 5-order harmonic current is characterized by comprising the following steps:
s1, establishing a digital circuit simulation model according to a current arcing process and a circuit principle during series arc resistance turn-to-turn short circuit;
s2, simulating a fault development process by using the digital circuit simulation model, and performing circuit equivalent simulation according to the proportional ladder units or the unequal-proportion ladder unit combinations in the digital circuit simulation model to finish the dynamic process of the series arc resistance turn-to-turn short circuit, the display of the electrical characteristic change and the reduction simulation of the fault case.
2. The modeling simulation method based on serial arc resistance inter-turn short circuit excitation 3, 5-order harmonic current according to claim 1, wherein the digital circuit simulation model comprises a power system equivalent simulation part, a transformer substation and capacitor bank equivalent simulation part and a filter bank equivalent simulation part of a direct current power station alternating current system affecting the system harmonic characteristic;
wherein the equivalent simulation part of the power system comprises a generator, an ideal double-winding step-up transformer,
The transformer substation equivalent simulation part comprises a step-down transformer and a switchable parallel capacitor bank; the power generator is used for providing stable voltage, and the ideal double-winding step-up transformer is used for step-up the stable voltage to reach the power supply standard;
the step-down transformer is used for step-down the high voltage input by the step-up transformer in the power system, and the switchable parallel capacitor bank comprises a series reactor and a capacitor; the coil of the series reactor is provided with a turn-to-turn short circuit fault simulation with expanded number of turns of the developing fault, and the simulation of the early, middle and later stages of the development of the short circuit fault is realized by carrying out equivalence according to the combination values of proportional ladder units or non-equal proportional ladder units when the short circuit simulation is carried out.
3. The modeling simulation method based on series arc resistance inter-turn short circuit excitation 3, 5-order harmonic current according to claim 2, wherein in the digital circuit simulation model, according to the relationship between the number of short circuit loop ampere-turn balanced magnetic fluxes caused by the number of short circuit turns and the total ampere-turn number of the whole coil, a real-time electromagnetic induction ampere-turn balanced equation is established as follows:
N12*I1(t)+N2*I2(t)＝0
wherein N12 is a normal turn with a certain turn number, namely a primary side turn, and I1 (t) is a coil passing real-time current, namely a primary side current; n2 is the number of short-circuit turns, i.e. the secondary side turns, and I2 (t) is the short-circuit loop real-time current, i.e. the secondary side current.
4. The modeling simulation method based on serial arc resistance inter-turn short circuit excitation 3, 5-order harmonic current according to claim 3, wherein the local coil inductance disappears after the real-time ampere turn balance when the arc burns, and the local coil inductance recovers when the arc extinguishes; and (3) carrying out equivalent circuit parameter equivalence from the two ports of the primary side, wherein the equivalent resistance has the following expression formula:
wherein: rs is a single-turn resistor, R12 is a port primary equivalent resistor, I1 is a coil passing current, I2 is a short-circuit loop current, and N2 is a short-circuit turn number.
5. The modeling simulation method based on series arc resistance inter-turn short circuit excitation 3, 5-order harmonic current according to claim 2, wherein the proportional ladder unit or the unequal proportional ladder unit comprises a plurality of groups of fault series resistance equivalent circuits connected in series, wherein the fault series resistance equivalent circuits comprise inter-turn short circuit loss series resistance equivalent inductors, adjustable inter-turn short circuit circulation loss equivalent resistors and bidirectional short circuit arc control thyristors for simulating arc burning extinguishing re-burning process; and the bidirectional short circuit arc control thyristor for simulating the arc extinguishing and reburning process is connected with the inter-turn short circuit circulation loss equivalent resistor in series and then is connected with the two ends of the inter-turn short circuit loss series reactance equivalent inductor in parallel as a whole.
6. The modeling simulation method based on serial arc resistance inter-turn short circuit excitation 3, 5 times harmonic current according to claim 5, characterized in that the different control positive and negative half-waves of trigger angles of the bidirectional short circuit arc control thyristors are adopted to respectively control on and off time duration and duration, and the re-ignition characteristic change after the arc of the positive and negative half-wave arc short circuit is extinguished is simulated; the characteristic of active loss equivalent resistance generated by the loop after the turn-to-turn short circuit is simulated by using an adjustable turn-to-turn short circuit loop loss equivalent resistance, and the characteristic of inductance loss increase after the turn-to-turn short circuit is simulated by using the turn-to-turn short circuit loss series reactance equivalent inductance.
7. The modeling simulation method based on serial arc resistance inter-turn short circuit excitation 3, 5 times harmonic current according to claim 5, wherein in S2, the dynamic simulation test of serial arc resistance inter-turn short circuit is completed according to the equal value of the proportional step unit or the unequal proportional step unit combination, the method comprises the steps that a serial reactor adopts dry type hollow serial reactor for simulation, step type time sequence control is adopted, the triggering and the conduction angle of a bidirectional thyristor are controlled, and the process of nonlinear expansion of the short circuit turn of the dry type hollow serial reactor after fault is simulated; the method specifically comprises the following steps:
s201, according to data when a short circuit fault actually occurs, when 100% of inductance loss occurs, the number of short circuit turns is 40, and the inter-turn short circuit loss series reactance equivalent inductance and the adjustable inter-turn short circuit circulation loss equivalent resistance are reduced in an equal proportion or unequal proportion gradient according to preset step times;
s202, when the inter-turn short circuit loss series reactance equivalent inductance and the adjustable inter-turn short circuit circulation loss equivalent resistance are reduced according to the gradient, the current of each stage of series equivalent resistance is calculated according to the increase of the short circuit circulation to about 15-30 times of rated current.
8. The modeling simulation method based on series arc resistance inter-turn short circuit excitation 3, 5-order harmonic current according to claim 7, wherein in S201, the inter-turn short circuit loss series resistance equivalent inductance and the adjustable inter-turn short circuit circulation loss equivalent resistance are reduced in equal proportion or unequal proportion according to a preset step number; the method also comprises the steps of 5 times of preset step numbers, unequal ratio gradient of inductance loss, and simulating delay short-circuit discharge arc reignition time after a series of anti-voltage peaks in a power frequency cycle according to different trigger angles.
9. The modeling simulation method based on serial arc resistance inter-turn short circuit excitation 3, 5-order harmonic current according to claim 6, further comprising 3-order harmonic and 5-order harmonic content under different inductance loss degrees in a digital circuit simulation model; and the content of 3 rd harmonic waves and 5 th harmonic waves under different triggering angles.
10. The modeling simulation method based on series arc resistance inter-turn short circuit excitation 3, 5-order harmonic current according to claim 5, wherein the content of 3-order harmonic and 5-order harmonic obtained in the digital circuit simulation model is compared with actual dry type air-core reactance inter-turn fault case real parameters, and parameters in the digital circuit simulation model are adjusted according to the comparison result.
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