CN116303212A

CN116303212A - Data access method, device, computer equipment and storage medium

Info

Publication number: CN116303212A
Application number: CN202310245317.0A
Authority: CN
Inventors: 杜福慧; 袁典涛; 刘俣
Original assignee: Shanghai Enflame Technology Co ltd
Current assignee: Shanghai Enflame Technology Co ltd
Priority date: 2023-03-14
Filing date: 2023-03-14
Publication date: 2023-06-23

Abstract

The invention discloses a data access method, a data access device, computer equipment and a storage medium. The method is performed by an interconnect device configured between a single master and a plurality of slaves, comprising: the method comprises the steps of replacing a source identifier in an access request sent by a host with a mapping identifier of a slave to which the access request points, and then sending each access request to each slave; maintaining the sending sequence of the access requests corresponding to each source identifier and the sending sequence of the access requests sent to the same slave in real time, and maintaining the access request pointed by the next access response to be fed back by each slave in real time; and feeding back the access response fed back by each slave to the host according to the sending sequence of the access request according to the real-time maintenance result. By adopting the technical scheme, when a single host computer sends out access requests with the same source identifiers to a plurality of slaves, the access requests with the same source identifiers can be processed in parallel, so that the cache access performance of the chip is improved.

Description

Data access method, device, computer equipment and storage medium

Technical Field

The present invention relates to the field of information processing technologies, and in particular, to a data access method, a data access device, a computer device, and a storage medium.

Background

In a large-scale computing chip, an access request can be sent by a host, and an access request is received by a slave and an access response is replied to realize information transmission in the chip. In general, a NoC (Network on Chip) interconnection architecture may be used to implement interconnection between multiple hosts and multiple slaves, but the NoC has access restrictions on access requests with identical identities, that is, for multiple access requests with identical identities, the NoC waits for the slaves to return an access response of a previous access request before continuing to send a next access request to the slaves.

When a single master sends multiple access requests with the same identifier to multiple slaves, each slave actually has the capability of processing the access requests in parallel, but due to the restriction of NoC, multiple access requests with the same identifier may need to be sent in sequence, so this access request processing manner may generate unnecessary waiting delay, and affect the cache performance of the whole chip.

Disclosure of Invention

The invention provides a data access method, a data access device, computer equipment and a storage medium, which can process access requests with the same source identifiers in parallel when a single host computer sends the access requests with the same source identifiers to a plurality of slaves, so that the cache access performance of a chip is improved.

According to an aspect of the present invention, there is provided a data access method performed by an interconnect device configured between a single master and a plurality of slaves, comprising:

after the source identifier in the access request sent by the host is replaced by the mapping identifier of the slave to which the access request points, sending each access request to each slave, wherein a single host corresponds to at least one source identifier, and different slaves correspond to different mapping identifiers;

maintaining the sending sequence of the access requests corresponding to each source identifier and the sending sequence of the access requests sent to the same slave in real time, and maintaining the access request pointed by the next access response to be fed back by each slave in real time;

and feeding back the access response fed back by each slave to the host according to the sending sequence of the access request according to the real-time maintenance result.

According to another aspect of the present invention, there is provided a data access apparatus, which is performed by an interconnect device configured between a single master and a plurality of slaves, comprising:

the source identifier replacing module is used for replacing a source identifier in an access request sent by the host computer with a mapping identifier of a slave computer pointed by the access request, and then sending each access request to each slave computer, wherein a single host computer corresponds to at least one source identifier, and different slave computers correspond to different mapping identifiers;

The access information maintenance module is used for maintaining the sending sequence of the access requests corresponding to each source identifier respectively and the sending sequence of the access requests sent to the same slave machine in real time, and maintaining the access request pointed by the next access response to be fed back by each slave machine in real time;

and the access response feedback module is used for feeding back the access response fed back by each slave machine to the host machine according to the sending sequence of the access request according to the real-time maintenance result.

According to another aspect of the present invention, there is provided a computer apparatus including:

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein,,

the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the data access method according to any one of the embodiments of the present invention.

According to another aspect of the present invention, there is provided a computer readable storage medium storing computer instructions for causing a processor to execute a data access method according to any one of the embodiments of the present invention.

According to the technical scheme, the source identifier in the access request sent by the host is replaced by the mapping identifier of the slave to which the access request points, and the relevant information of each access request is maintained in real time, and according to the real-time maintenance result, the access response fed back by each slave is fed back to the host according to the sending sequence of the access request, so that when a single host sends out access requests with the same source identifier to a plurality of slaves, the access requests with the same source identifier can be processed in parallel, and meanwhile, the occurrence of the condition that the plurality of access requests sent in parallel return in disorder can be avoided, the cache access performance of a chip can be effectively improved, and meanwhile, the safety and the integrity of information can be ensured.

It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a flow chart of a method for accessing data according to a first embodiment of the present invention;

FIG. 2 is a flow chart of another data access method according to a second embodiment of the present invention;

fig. 3 is a schematic structural diagram of a data access device according to a third embodiment of the present invention;

fig. 4 is a schematic structural diagram of a computer device implementing a data access method according to an embodiment of the present invention.

Detailed Description

In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

Example 1

Fig. 1 is a flowchart of a data access method according to a first embodiment of the present invention, where the method may be applied to a case where access requests sent by a single host and having the same source identifier of different slaves are sent to each slave in parallel, and access responses fed back by each slave are fed back to the host according to a sending order of the access requests, and the method may be performed by a data access device, where the data access device may be implemented in a form of hardware and/or software, and may be generally configured in a processor with a data processing function, where the processor is configured between the single host and a plurality of slaves. As shown in fig. 1, the method includes:

s110, after the source identifier in the access request sent by the host is replaced by the mapping identifier of the slave to which the access request points, each access request is sent to each slave.

Wherein, a single host corresponds to at least one source identifier, and different slaves correspond to different mapping identifiers.

The host is used for sending the access request and receiving the access response sent by the slave, the slave is used for receiving the access request sent by the host and feeding back the access response to the host, and the host and the slave are both arranged inside the chip.

It can be understood that the identifier of the access request is used for marking the access request, in the prior art, the access requests with the same identifier need to be sent sequentially, that is, after the host receives the access response of the last access request, the next access request with the same identifier can be sent, and different access requests with different identifiers can be sent in parallel.

The source identifier of the access request may generally be an original ID (Identity Document, identity number) of the access request, where each task in a single host corresponds to one source identifier, for example, when two different tasks in the host send one access request respectively, the source identifiers of the two access requests are different, and when a certain task in the host sends multiple access requests, the source identifiers of the multiple access requests are the same. Thus, a single host may send multiple access requests with the same source identification, or multiple access requests with different source identifications.

When a single host sends a plurality of access requests with the same source identification to a plurality of slaves, in order to solve the problem that the access requests with the same source identification cannot be sent in parallel, the source identification of each access request can be replaced by a mapping identification matched with each access request, and the access requests directed to different slaves have different mapping identifications, so that the mapping identifications of the access requests directed to different slaves after the identification replacement are different, and the access requests with different mapping identifications are sent in parallel.

The mapping identity may be determined from the slave address accessed by each access request. Alternatively, the mapping identifier may be extracted from the slave address of the slave to which the access request is directed, for example, for a slave address with an address bit width of 48 bits, 8 bits may be extracted as the mapping identifier at a fixed location in the slave address. Since each slave has a pre-assigned unique address range, the mapping identity that each slave matches is different.

After the source identifier of each access request is replaced by the mapping identifier, the access requests with different mapping identifiers can be sent to each slave in parallel, if the mapping identifiers of the access requests are the same, the slaves accessed by the access requests are the same, and the slaves still need to be sent in sequence according to the access sequence.

And S120, maintaining the sending sequence of the access requests corresponding to each source identifier and the sending sequence of the access requests sent to the same slave in real time, and maintaining the access request pointed by the next access response to be fed back by each slave in real time.

After each access request is sent to each slave, the access request processing time of each slave is different, and the return time of the access response fed back by each slave is also different, so that each access request with the same source identifier but different mapping identifier may be returned out of order. However, during the access process of the host, the access requests with the same source identifier may be sent in parallel, but must be returned sequentially according to the access sequence, that is, the host should receive the access response matched with the access request sent by the first, and then receive the access response matched with the access request sent by the second, and so on.

In order to solve the above problems, the invention creatively proposes that after the source identifier of the access request sent by the host is replaced by the mapping identifier, the related information of each access request should be maintained in real time, so as to determine whether the access response can be immediately sent to the host by inquiring the maintained information after a certain access response is obtained, thereby avoiding the occurrence of the condition of disordered feedback of the access response.

Optionally, the information maintained in real time may include an access request sending sequence corresponding to each source identifier, a sending sequence of each access request sent to the same slave, and an access request pointed by a next access response to be fed back by each slave, where the information may be maintained in a data link form in a register.

The method comprises the steps that the index positions of the next source identification of each access request in a register array according to the transmission sequence are recorded in the access request transmission sequence corresponding to each source identification, and the specific storage position of the next access request of a certain access request in the register array can be obtained by inquiring the index positions of the next source identification of the same access request in the register array; the transmission sequence of each access request transmitted to the same slave machine records the index position of each access request in the register array according to the next mapping identification of the transmission sequence.

Alternatively, multiple data links may be included in the register array, each maintaining all access requests with some same source identification.

Further, for multiple access requests with the same mapping identifier sent to the same slave, since the access requests must be limited to be sent according to the access sequence when being sent, the sequence of the access responses fed back by each slave is relatively fixed, and the sequence of the access responses fed back by each slave is the same as the sending sequence of the access requests, so that the maintenance of the access request pointed by the next access response to be fed back by each slave can be implemented according to the current feedback condition of each slave.

In a specific example, if the host includes task 1 and task 2, and the source identifiers corresponding to the access requests sent by task 1 and task 2 are respectively 4 and 6, task 1 sends 2 access requests to slave 1 and 1 access request to slave 2, task 2 sends 1 access request to slave 1 and 2 access requests to slave 2, and the mapping identifiers corresponding to slave 1 and slave 2 are respectively 5 and 7, then the host sends 3 access requests with source identifier of 4, and the mapping identifiers thereof are respectively 5, and 7, and the host also sends 3 access requests with source identifier of 6, and the mapping identifiers thereof are respectively 5, 7, and 7. On this basis, tables 1 and 2 are an alternative real-time maintenance content.

TABLE 1

free	ID	next	head	slv_next	addr	pending
								0	4	1	1	1	0,1,2,3	1	0
0	4	2	0	3		0	1
								0	4	256	0	4	4,5,6,7	1	2
0	6	4	1	256		0	3
								0	6	5	0	5	8	1	4
0	6	256	0	256	9	1	5
								1		256	0	256		0	6

TABLE 2

slv_chain_heads
		0
	1
		2
	3
		4
0	5
		6
2	7

The sending sequence of the access requests corresponding to each source identifier and the sending sequence of the access requests sent to the same slave are maintained in real time in table 1, the content shown in table 1 is actually a register array formed by a plurality of data links, the access request pointed by the next access response to be fed back by each slave is maintained in real time in table 2, and the content shown in table 2 is actually a data link.

In table 1, the first column free is used to mark whether each register is in idle state, if it is in idle state, free is set to 1, which means that a new access request can be stored in the row, if it is not in idle state, free is set to 0; the second column ID is used for recording the source identification of each access request; the third column next is used for recording the index position of the next access request with the same identification of each access request source in the register array; the last column of table 1 may represent the index corresponding to each access request in the register array, and it should be further noted that, the index value recorded in the last column of table 1 is a default value of the register array, where the index value is shown in table 1 only for clarity of illustrating the embodiment of the present invention, but actually the index value need not be stored in the register array; the fourth column head is used for recording whether each access request is a head access request in a data link to which the access request belongs, if so, the head is marked as 1, and if not, the head is marked as 0; wherein, table 1 includes two data links with source identifier 4 and source identifier 6, if the access request is a head access request in the data link to which the access request belongs, the access response matched with the access request can be directly sent to the host, if the access request is not a head access request in the data link, even if the slave has fed back the access response matched with the access request, the access response needs temporary storage and cannot be fed back to the host immediately; the fifth column slv _next is used to record the index position of each access request map identifying the same next access request in the register array; the sixth column addr is used for recording the temporary storage address of the access response matched with the access request; the seventh column of pending is used for identifying whether the access response matched with each access request is temporarily stored in the memory, if yes, the label is 1, and if not, the label is 0.

In table 2, a first column slv _chain_heads is used to mark the index position in the register array of the access request to which the next access response to be fed back by each slave is directed; the second column may represent the mapping identity that matches each slave, and as with table 1, the mapping identity of the last column in table 2 is the default value in the data link, and in fact the mapping identity shown in the last column need not be stored in the data link. For example, in table 2, the index position of the access request pointed to by the next access response to be fed back of the slave identified as 5 is 0 in the register array, and the index position of the access request pointed to by the next access response to be fed back of the slave identified as 7 is 2 in the register array.

By maintaining the related information of the access request in real time, after the slave machine feeds back the access response, whether the current access response meets the condition of being directly sent to the host machine can be conveniently judged, so that whether the access response fed back by the slave machine is directly sent to the host machine can be conveniently determined.

S130, feeding back the access response fed back by each slave to the host according to the sending sequence of the access request according to the real-time maintenance result.

After the slave machine feeds back the access response, the slave machine can inquire whether the access request matched with the current access response is the first access request in the source identification data chain or not through real-time maintenance results, if so, the access response can be fed back to the host machine, if not, the feedback response can be temporarily stored, after all the access response feedback which has the same source identification and the transmission sequence before the feedback response is waited, the feedback response is acquired from the memory and fed back to the host machine.

Specifically, after the slave machine feeds back the access response, firstly, determining the index position of the access request corresponding to the access response in the register array according to the mapping identification of the access response, after determining the index position, inquiring the information of the access request in the register array, and judging whether the access request is the first access request in the source identification data chain through the information stored in the register array.

Further, after the feedback response sent by the slave machine is fed back to the host machine, the information maintained in real time should be modified, for example, after the access response corresponding to the first access request with the source identifier of 4 is sent to the host machine, the register where the access request is located may be marked as an idle state in table 1, the next access request with the source identifier of 4 is recorded as the first access request in the source identifier data chain, and the index position of the access request pointed by the next access response to be fed back by the slave machine in the register array may be updated in table 2.

Example two

Fig. 2 is a flowchart of a data access method according to a second embodiment of the present invention, and the present embodiment specifically illustrates a maintenance process of access request information based on the foregoing embodiment. As shown in fig. 2, the method includes:

s210, when a target access request is received, extracting a target slave address in the target access request.

The target access request may be understood as an access request currently sent by the host, and the target slave address may be understood as a slave address of the slave to which the target access request is directed.

S220, obtaining the mapping identification of the target access request according to the target slave address, and replacing the source identification in the target access request by using the mapping identification of the target access request.

S230, sending each access request to each slave.

S240, when a current access request sent by a host is received, a first source identifier and a first mapping identifier matched with the current access request are obtained.

The first source identifier may be understood as a source identifier of the current access request, and the first mapping identifier may be understood as a mapping identifier generated according to an access address in the current access request, where the first source identifier and the first mapping identifier are used for distinguishing from other source identifiers and mapping identifiers, and are not used for describing a specific sequence or precedence.

S250, according to the first source identification, storing first type description information matched with the current access request in an idle target register.

The first type of descriptive information comprises a first source identifier, whether the current access request is a first access request of the first source identifier and an index position of a next access request of the first source identifier.

According to the first source identifier, storing first type description information matched with the current access request in an idle target register may specifically include:

inquiring a source identification inquiry table to judge whether the current access request is the first access request of a first source identification, wherein the source identification inquiry table stores the index position of the last access request of each source identification;

if yes, updating a source identification lookup table according to the index position of the target register;

if not, acquiring a first index position matched with the first source identifier from the source identifier lookup table, updating the index position of the next access request of the first source identifier stored in the first index position according to the index position of the target register, and storing the index position of the target register in the source identifier lookup table;

and according to the judging result, storing the first type of description information matched with the current access request in the target register.

Alternatively, each time the host sends a new access request, an idle target register may be obtained in the register array, and information about the access request may be stored in the idle target register. In the previous example, each time the host sends a new access request, a register with free 1 may be obtained from the registers shown in table 1, and the relevant information of the access request may be stored in the register with free 1.

Table 3 is an alternative source identification look-up table, and the contents shown in table 3 are actually one data link.

In the source identifier lookup table shown in table 3, the first column of chain_files is used to mark the index position of the last access request matched with each source identifier in the register array; the second column may represent the source identifier that matches each task in the host, and as with table 2, the source identifier in the last column in table 3 is the default value in the data link, and in fact the source identifier shown in the last column need not be stored in the data link.

TABLE 3 Table 3

chain_tails
			0
	1
			2
	3
		2	4
	5
		5	6
	7

Further, if the chain_files column of the first source identifier is empty, the current access request is the first access request of the first source identifier, in the register array shown in table 1, the head entry of the current access request is 1, the next entry is 256 when the current access request is stored, where the next entry is 256 represents that there is no next access request identical to the access request source identifier in the register array. If the current request is not the first access request of the first source identifier, acquiring a register storing the previous access request with the same identifier as the current access request source identifier in a register array shown in table 1 according to the index position recorded in the chain corresponding to the first source identifier in the data link shown in table 3, modifying 256 stored in a next item in the register into the index position of a target register, storing the current access request information in the target register, wherein the head item stored in the target register is 0, and the next item is 256.

And S260, storing second type description information matched with the current access request in a target register according to the first mapping identification.

Wherein the second type of descriptive information includes an index location of a next access request identified by the first mapping.

Wherein, according to the first mapping identifier, storing the second type of description information matched with the current access request in the target register may specifically include:

inquiring a first mapping identification lookup table, and judging whether the current access request is the first access request of the first mapping identification, wherein the first mapping identification lookup table stores the index position of the last access request of each mapping identification;

if yes, updating a first mapping identification lookup table according to the index position of the target register;

if not, acquiring a second index position matched with the first mapping identification from the first mapping identification lookup table, and after updating the index position of the next access request of the first mapping identification stored under the second index position according to the index position of the target register, storing the index position of the target register in the first mapping identification lookup table;

and the set tail identifier is used as second type description information matched with the current access request and is stored in a target register.

Table 4 identifies the look-up table for an alternative first mapping, the contents shown in table 4 being actually a data link.

TABLE 4 Table 4

slv_chain_tails
		0
	1
		2
	3
		4
3	5
		6
5	7

Wherein, in the first mapping identity lookup table shown in table 4, the first column slv _chain_tags is used for marking the index position of the last access request matched with each mapping identity in the register array; the second column may represent the mapping identity that each slave matches, and as in table 3, the mapping identity of the last column in table 4 is the default value in the data link, and in fact the mapping identity shown in the last column need not be stored in the data link.

Further, if the slv _chain_files column of the first mapping identifier is empty, the current access request is the first access request of the first mapping identifier. When the current access request is stored in the register array as shown in table 1, the current access request is stored with a slv _next entry of 256, where slv _next entry of 256 represents that there is no next access request in the register array that is identical to the access request map identification. If the current access request is not the first access request of the first mapping identifier, acquiring a register storing the previous access request with the same mapping identifier as the current access request in a register array shown in table 1 according to the index position recorded in slv _chain_files corresponding to the first mapping identifier in a data link shown in table 4, and modifying 256 stored in slv _next items in the register to be the index position of the target register.

S270, after the first mapping identification lookup table is queried and the current access request is determined to be the first access request of the first mapping identification, the index position of the target register is stored in the second mapping identification lookup table, and the index position of the first access request of each mapping identification is stored in the second mapping identification lookup table.

Table 2 is an optional second mapping identity lookup table. As shown in table 2, the index position of the first access request with the mapping identification 5 in the register array is 0, and the index position of the first access request with the mapping identification 7 in the register array is 2.

And S280, when receiving the current access response fed back by the current slave, acquiring a second mapping identification matched with the current access response.

The second mapping identifier may be understood as a mapping identifier carried in the current access response.

S290, inquiring a second mapping identification inquiring table, acquiring a third index position matched with the second mapping identification, and updating the second mapping identification inquiring table by using the index position of the next access request of the second mapping identification stored at the third index position.

Wherein the third index position may be understood as the index position of the first access request identified by the second mapping in the register array.

It will be appreciated that the current access response fed back by the slave must match the first access request of the slave. In the previous example, if the index position of the first access request with the mapping identifier of 5 in table 2 in the register array is 0, if the second mapping identifier of the current fed-back access response is 5, the index position of the current access request matched with the current access response in the register array is 0. After determining the index position of the current access request in the register array, the index position of the next access request, i.e., the index position stored in the slv _next entry in table 1, according to the second mapping identification stored in the third index position may be used to replace the first access request, i.e., the slv _chain_heads entry in table 2, in the second mapping identification lookup table that matches the second mapping identification.

And S2100, feeding back the access response fed back by each slave to the host according to the sending sequence of the access request according to the real-time maintenance result.

According to the real-time maintenance result, the access response fed back by each slave is fed back to the host according to the sending sequence of the access request, which may specifically include:

extracting a target mapping identifier in a target access response when the target access response is received;

Inquiring a second mapping identification inquiry table according to the target mapping identification, and acquiring a target index position matched with the target mapping identification;

determining a target source identifier matched with the target access response according to the information stored in the target index position, and verifying whether the target access response points to the first access request of the target source identifier;

if yes, directly feeding back the target access response to the host, and acquiring the index position of the next access request of the target source identifier from the information stored in the target index position;

updating the stored access request as the first access request of the target source identifier in the index position of the next access request of the target source identifier, and updating the register state matched with the target index position into an idle state;

if not, the target access response is cached until the host receives all access responses before the target access response.

In the previous examples, a simple explanation of the process of sending an access response to a host is made with the contents stored in tables 1 and 2. If the target mapping identifier of the currently received target access response is 5, the index position in the register array corresponding to the mapping identifier 5 is queried in table 2 to be 0, namely, the target index position matched with the target mapping identifier is 0, the target source identifier matched with the target access response can be determined to be 4 according to the data line with the index position of 0 in table 1, the head item is 1, the target access response is the first access request pointing to the target source identifier, the target access response can be directly fed back to the host, the index position of the next access request of the target source identifier is acquired according to the stored content of the next item is 1, the head item in the data line with the index position of 1 is modified from 0 to 1, and the register free item matched with the index position of 0 is updated to 1. If the target mapping identifier of the currently received target access response is 7, the index position in the register array corresponding to the mapping identifier 5 is 2 in the table 2, the target source identifier matched with the target access response can be determined to be 4 according to the data line with the index position of 2 in the table 1, the head item is 0, the target access response is not the first access request pointing to the target source identifier, the target access response is cached until all the access requests with the index positions of 0 and 1 in the register array are returned, and the target access response can be returned to the host.

Optionally, in the register array shown in table 1, address information, that is, addr entries, stored in the memory for each access request is also stored. When a certain access request temporarily stored in the memory can be sent to the host, the access request is acquired according to the storage content in the addr item in the register array, and the address is designated in the memory and is sent to the host.

According to the technical scheme, by setting the source identification lookup table and the first mapping identification lookup table, when a host sends a new access request, relevant information of the access request can be accurately obtained and stored in the register array, and by feeding back access responses fed back by all slaves to the host according to the sending sequence of the access request according to the real-time maintenance result of the access request, when a single host sends access requests with the same source identification to a plurality of slaves, the access requests with the same source identification can be processed in parallel, and meanwhile, the occurrence of the condition that the access requests sent in parallel are returned in an out-of-order manner can be avoided, so that the cache access performance of a chip can be effectively improved, and meanwhile, the safety and the integrity of information can be ensured.

Example III

Fig. 3 is a schematic structural diagram of a data access device according to a third embodiment of the present invention. As shown in fig. 3, the apparatus includes: a source identification replacement module 310, an access information maintenance module 320, and an access response feedback module 330.

The source identifier replacing module 310 is configured to replace a source identifier in an access request sent by a host with a mapping identifier of a slave to which the access request points, and send each access request to each slave, where each host corresponds to at least one source identifier and different slaves correspond to different mapping identifiers.

The access information maintenance module 320 is configured to maintain in real time an access request sending sequence corresponding to each source identifier, and a sending sequence of each access request sent to the same slave, and maintain in real time an access request pointed by a next access response to be fed back by each slave.

The access response feedback module 330 is configured to feedback the access response fed back by each slave to the host according to the sending sequence of the access request according to the real-time maintenance result.

Based on the above embodiments, the source identifier replacing module 310 may be specifically configured to:

when a target access request is received, extracting a target slave address in the target access request;

and acquiring the mapping identifier of the target access request according to the target slave address, and replacing the source identifier in the target access request by using the mapping identifier of the target access request.

Based on the above embodiments, the access information maintenance module 320 may include:

the device comprises an identifier acquisition unit, a first mapping unit and a second mapping unit, wherein the identifier acquisition unit is used for acquiring a first source identifier and a first mapping identifier matched with a current access request when receiving the current access request sent by a host;

the first type descriptive information storage unit is used for storing first type descriptive information matched with the current access request in an idle target register according to a first source identifier, wherein the first type descriptive information comprises the first source identifier, whether the current access request is a first access request of the first source identifier and an index position of a next access request of the first source identifier;

and the second type descriptive information storage unit is used for storing second type descriptive information matched with the current access request in the target register according to the first mapping identification, wherein the second type descriptive information comprises an index position of the next access request of the first mapping identification.

On the basis of the above embodiments, the first type of description information storage unit may be specifically configured to:

On the basis of the above embodiments, the second type of description information storage unit may be specifically configured to:

Based on the above embodiments, the access information maintenance module 320 may be further specifically configured to:

after the first mapping identification lookup table is queried and the current access request is determined to be the first access request of the first mapping identification, the index position of the target register is stored in a second mapping identification lookup table, and the index position of the first access request of each mapping identification is stored in the second mapping identification lookup table;

acquiring a second mapping identifier matched with the current access response when the current access response fed back by the current slave is received;

and inquiring the second mapping identification inquiry table, acquiring a third index position matched with the second mapping identification, and updating the second mapping identification inquiry table by using the index position of the next access request of the second mapping identification stored at the third index position.

Based on the above embodiments, the access response feedback module 330 may be specifically configured to:

The data access device provided by the embodiment of the invention can execute the data access method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.

Example IV

Fig. 4 shows a schematic diagram of a computer device 10 that may be used to implement an embodiment of the invention. Computer devices are intended to represent various forms of digital computers, such as laptops, desktops, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Computer devices may also represent various forms of mobile equipment, such as personal digital processing, cellular telephones, smart phones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing equipment. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.

As shown in fig. 4, the computer device 10 includes at least one processor 11, and a memory, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one processor 11, in which the memory stores a computer program executable by the at least one processor, and the processor 11 may perform various suitable actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the computer device 10 can also be stored. The processor 11, the ROM 12 and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.

Various components in computer device 10 are connected to I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the computer device 10 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.

The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as the data access method described in embodiments of the present invention. Namely:

after the source identifier in the access request sent by the host is replaced by the mapping identifier of the slave to which the access request points, sending each access request to each slave, wherein each host corresponds to at least one source identifier, and different slaves correspond to different mapping identifiers;

In some embodiments, the data access method may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the computer arrangement 10 via the ROM 12 and/or the communication unit 19. One or more of the steps of the data access method described above may be performed when the computer program is loaded into RAM 13 and executed by processor 11. Alternatively, in other embodiments, the processor 11 may be configured to perform the data access method in any other suitable way (e.g. by means of firmware).

Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.

A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

To provide for interaction with a user, the systems and techniques described here can be implemented on a computer device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and pointing device (e.g., a mouse or trackball) by which a user can provide input to the computer device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.

The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.

It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.

The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims

1. A data access method performed by an interconnect device configured between a single master and a plurality of slaves, comprising:

2. The method of claim 1, wherein replacing the source identifier in the access request sent by the host with the mapping identifier of the slave to which the access request is directed comprises:

3. The method according to claim 1, wherein maintaining in real time the transmission order of the access requests respectively corresponding to each source identifier and the transmission order of the access requests transmitted to the same slave comprises:

when a current access request sent by a host is received, a first source identifier and a first mapping identifier which are matched with the current access request are obtained;

storing first type description information matched with a current access request in an idle target register according to a first source identifier, wherein the first type description information comprises the first source identifier, whether the current access request is a first access request of the first source identifier and an index position of a next access request of the first source identifier;

and storing second type of descriptive information matched with the current access request in a target register according to the first mapping identification, wherein the second type of descriptive information comprises an index position of a next access request of the first mapping identification.

4. A method according to claim 3, wherein storing the first type of descriptive information matching the current access request in the idle destination register based on the first source identification comprises:

5. A method according to claim 3, wherein storing in the destination register, based on the first mapping identity, a second type of descriptive information matching the current access request, comprises:

6. The method of claim 5, wherein maintaining in real time the access request to which the next access response to be fed back by each slave is directed comprises:

7. The method of claim 6, wherein feeding back the access response fed back by each slave to the host according to the sending order of the access requests based on the real-time maintenance result, comprises:

8. A data access apparatus, executed by an interconnect device disposed between a single master and a plurality of slaves, comprising:

9. A computer device, the computer device comprising:

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein,,

the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the data access method of any one of claims 1-7.

10. A computer readable storage medium storing computer instructions for causing a processor to perform the data access method of any one of claims 1-7.