CN116302913A

CN116302913A - Test method, test apparatus, test device, test program, and test program

Info

Publication number: CN116302913A
Application number: CN202211085958.6A
Authority: CN
Inventors: 张静
Original assignee: Beijing Eswin Computing Technology Co Ltd; Guangzhou Quanshengwei Information Technology Co Ltd
Current assignee: Beijing Eswin Computing Technology Co Ltd; Guangzhou Quanshengwei Information Technology Co Ltd
Priority date: 2022-09-06
Filing date: 2022-09-06
Publication date: 2023-06-23

Abstract

The embodiment of the application provides a test method, a test device, a test equipment, a readable storage medium and a program product, wherein the test method comprises the following steps: acquiring at least two excitation programs; determining an automated regression testing script based on the at least two incentive programs; simulating a first code program of a target chip corresponding to at least two excitation programs through an automatic regression test script based on the priority between the at least two excitation programs, and determining a first code coverage rate of the at least two excitation programs for the first code program; if the first code coverage rate is smaller than the preset code coverage rate threshold value, carrying out corresponding regression processing based on the first code coverage rate and the preset code coverage rate threshold value, and determining a new first code coverage rate, wherein the new first code coverage rate is larger than or equal to the preset code coverage rate threshold value; thus, the code coverage rate of the excitation program for the first code program of the target chip is automatically and rapidly improved.

Description

Test method, test apparatus, test device, test program, and test program

Technical Field

The present application relates to the field of computer technology, and in particular, to a test method, apparatus, device, readable storage medium, and program product.

Background

In the prior art, chip verification is accompanied by a large number of test cases, i.e., stimulus programs or stimulus codes. Among them, chip authentication is, for example, large IP (Intellectual Property ) core authentication or SOC (System On Chip) authentication. In the chip verification process, a user manually compiles and simulates a large number of excitation programs one by one, and collects code coverage rate of the excitation programs on the code programs of the chip. Thus, a lot of manpower and time are wasted, and code coverage rate of the incentive program for the code program of the chip is low.

Disclosure of Invention

Aiming at the defects of the existing mode, the application provides a testing method, a testing device, testing equipment, a computer readable storage medium and a computer program product, which are used for solving the problem of how to quickly improve the code coverage rate of a code program of an incentive program aiming at a chip.

In a first aspect, the present application provides a test method comprising:

acquiring at least two excitation programs;

determining an automated regression testing script based on the at least two incentive programs;

simulating a first code program of a target chip corresponding to at least two excitation programs through an automatic regression test script based on the priority between the at least two excitation programs, and determining a first code coverage rate of the at least two excitation programs for the first code program;

If the first code coverage rate is smaller than the preset code coverage rate threshold value, carrying out corresponding regression processing based on the first code coverage rate and the preset code coverage rate threshold value, and determining a new first code coverage rate, wherein the new first code coverage rate is larger than or equal to the preset code coverage rate threshold value.

In one embodiment, before simulating the first code program of the target chip corresponding to the at least two excitation programs by the automated regression test script based on the priority between the at least two excitation programs, and determining the first code coverage rate of the at least two excitation programs for the first code program, the method further comprises:

determining the instruction number of text files corresponding to each excitation program in at least two excitation programs;

the priority between at least two motivations is determined based on the number of instructions for each text file.

In one embodiment, simulating a first code program of a target chip corresponding to at least two excitation programs by an automated regression test script based on a priority between the at least two excitation programs, and determining a first code coverage rate of the at least two excitation programs for the first code program, includes:

Simulating the first code programs of the target chips corresponding to the at least two excitation programs in sequence based on the order of the priority between the at least two excitation programs from large to small through an automatic regression test script, and determining the coverage rate of each excitation program in the at least two excitation programs for the first subcodes of the first code programs;

based on each first subcode coverage, a first code coverage for the first code program for at least two incentive programs is determined.

In one embodiment, determining the first code coverage of at least two incentive programs for the first code program based on each first subcode coverage comprises:

creating a coverage rate integration script;

and integrating the coverage rate of each first subcode through a coverage rate integration script to obtain a code coverage rate report of at least two motivation programs for the first code program, wherein the code coverage rate report comprises the first code coverage rate of at least two motivation programs for the first code program.

In one embodiment, based on the first code coverage and a preset code coverage threshold, performing a corresponding regression process to determine a new first code coverage, including:

determining the number of newly added excitation programs based on the first code coverage rate and a preset code coverage rate threshold value;

Determining a new automated regression testing script based on the at least two incentive programs and the newly added incentive program;

and carrying out corresponding regression processing based on the number of the newly added excitation programs and the new automatic regression test script, and determining the coverage rate of the new first code.

In one embodiment, based on the number of newly added incentives and the new automated regression test script, performing a corresponding regression process to determine a new first code coverage rate, including:

if the number of the newly added excitation programs is a preset number, creating a compiling script and a simulation script;

compiling the newly added excitation program through a compiling script to obtain a text file corresponding to the newly added excitation program;

based on a text file corresponding to the newly added excitation program, simulating the first code program through a simulation script; determining a second subcode coverage rate of the newly added excitation program for the first code program through a new automatic regression test script;

a new first code coverage is determined based on each of the first and second subcode coverage.

If the number of the newly added excitation programs is greater than the preset number, simulating the first code program through a new automatic regression test script based on the priorities between at least two excitation programs and the newly added excitation programs, and determining the coverage rate of the new first code.

In a second aspect, the present application provides a test apparatus comprising:

the first processing module is used for acquiring at least two excitation programs;

a second processing module for determining an automated regression testing script based on the at least two incentive programs;

the third processing module is used for simulating the first code programs of the target chips corresponding to the at least two excitation programs through the automatic regression test script based on the priority between the at least two excitation programs, and determining the first code coverage rate of the at least two excitation programs for the first code programs;

and the fourth processing module is used for carrying out corresponding regression processing based on the first code coverage rate and the preset code coverage rate threshold value if the first code coverage rate is smaller than the preset code coverage rate threshold value, and determining a new first code coverage rate which is larger than or equal to the preset code coverage rate threshold value.

In one embodiment, the test apparatus further comprises a priority setting module for:

In one embodiment, the third processing module is specifically configured to:

creating a coverage rate integration script;

In one embodiment, the fourth processing module is specifically configured to:

determining a new automated regression testing script based on at least two incentive programs and the newly added incentive program;

In one embodiment, the fourth processing module is specifically configured to:

In a third aspect, the present application provides an electronic device, including: a processor, a memory, and a bus;

a bus for connecting the processor and the memory;

a memory for storing operation instructions;

and the processor is used for executing the test method of the first aspect of the application by calling the operation instruction.

In a fourth aspect, the present application provides a computer readable storage medium storing a computer program for performing the test method of the first aspect of the present application.

In a fifth aspect, the present application provides a computer program product comprising a computer program which, when executed by a processor, implements the steps of the test method as in the first aspect of the present application.

The technical scheme provided by the embodiment of the application has at least the following beneficial effects:

acquiring at least two excitation programs; determining an automated regression testing script based on the at least two incentive programs; simulating a first code program of a target chip corresponding to the at least two excitation programs through an automatic regression test script based on the priority between the at least two excitation programs, and determining a first code coverage rate of the at least two excitation programs for the first code program; if the first code coverage rate is smaller than the preset code coverage rate threshold value, carrying out corresponding regression processing based on the first code coverage rate and the preset code coverage rate threshold value, and determining a new first code coverage rate, wherein the new first code coverage rate is larger than or equal to the preset code coverage rate threshold value; therefore, the code coverage rate of the excitation program for the first code program of the target chip is automatically and rapidly improved, the workload of target chip verification is reduced, and the verification efficiency of the target chip is improved, so that the defects generated in the design of the target chip are effectively reduced, and the success probability of one-time streaming of the target chip is improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings that are required to be used in the description of the embodiments of the present application will be briefly described below.

FIG. 1 is a schematic diagram of a test system according to an embodiment of the present disclosure;

FIG. 2 is a schematic flow chart of a testing method according to an embodiment of the present disclosure;

FIG. 3 is a flow chart of another testing method according to an embodiment of the present disclosure;

fig. 4 is a schematic structural diagram of a testing device according to an embodiment of the present application;

fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

Embodiments of the present application are described below with reference to the drawings in the present application. It should be understood that the embodiments described below with reference to the drawings are exemplary descriptions for explaining the technical solutions of the embodiments of the present application, and the technical solutions of the embodiments of the present application are not limited.

As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless expressly stated otherwise, as understood by those skilled in the art. It will be further understood that the terms "comprises" and "comprising," when used in this application, specify the presence of stated features, information, data, steps, operations, elements, and/or components, but do not preclude the presence or addition of other features, information, data, steps, operations, elements, components, and/or groups thereof, all of which may be included in the present application. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or wirelessly coupled. The term "and/or" as used herein indicates at least one of the items defined by the term, e.g. "a and/or B" indicates implementation as "a", or as "B", or as "a and B".

It will be appreciated that in the specific embodiments of the present application, where test-related data is involved, user approval or consent is required when the above embodiments of the present application are applied to specific products or technologies, and the collection, use and processing of the related data is required to comply with relevant laws and regulations and standards of the relevant country and region.

For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

The embodiment of the application provides a test method for a test system, and the test method relates to the fields of SOC test and the like.

In order to better understand and illustrate the embodiments of the present application, some technical terms related to the embodiments of the present application are briefly described below.

Code coverage: code coverage is used to measure the quality of the incentive program, and code coverage is also used to measure the sufficiency of verification of the IP core or SOC.

makefile script: the makefile script is a command tool, and describes compiling, connection rules and the like of the whole project; the makefile script includes which source files in the project need to be compiled, how to compile, which library files need to be created, how to create these library files, how to finally produce the required executable files. If the correct makefile script is provided, the makefile script may use a row of commands to complete automated compilation; the whole project can be compiled to input a make command under a cshell script (cshell script calls makefile script) prompt, so that the whole project is completely and automatically compiled, and the efficiency is greatly improved.

The solution provided in the embodiments of the present application relates to a data processing technology, and the technical solution of the present application is described in detail in the following with specific embodiments. The following embodiments may be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments. Embodiments of the present application will be described below with reference to the accompanying drawings.

In order to better understand the scheme provided by the embodiment of the present application, the scheme is described below in connection with a specific application scenario.

In one embodiment, fig. 1 shows a schematic architecture of a test system to which the embodiment of the present application is applicable, and it can be understood that the test method provided in the embodiment of the present application may be applicable, but not limited to, being applied to the application scenario shown in fig. 1.

In this example, as shown in FIG. 1, the architecture of the test system in this example may include, but is not limited to, a terminal 10, a server 20, a network 30, and a database 40. Interactions between the terminal 10, the server 20 and the database 40 may be through the network 30. The server 20 obtains at least two incentive programs; the server 20 determines an automated regression testing script based on the at least two incentive programs; the server 20 simulates the first code program of the target chip corresponding to the at least two excitation programs by an automated regression test script based on the priority between the at least two excitation programs, and determines the first code coverage rate of the at least two excitation programs for the first code program; if the first code coverage is smaller than the preset code coverage threshold, the server 20 performs corresponding regression processing based on the first code coverage and the preset code coverage threshold to determine a new first code coverage, where the new first code coverage is greater than or equal to the preset code coverage threshold. The server 20 transmits the first code coverage and the new first code coverage to the terminal 10 and the database 40 through the network 30, the terminal 10 displays the first code coverage and the new first code coverage to the user, and the database 40 stores the first code coverage and the new first code coverage.

It will be appreciated that the above is only an example, and the present embodiment is not limited thereto.

The terminal may be a smart phone (such as an Android phone, an iOS phone, etc.), a phone simulator, a tablet computer, a notebook computer, a digital broadcast receiver, a MID (Mobile Internet Devices, mobile internet device), a PDA (personal digital assistant), etc. The server may be an independent physical server, a server cluster or a distributed system formed by a plurality of physical servers, or a cloud server or a server cluster for providing cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDNs (Content Delivery Network, content delivery networks), basic cloud computing services such as big data and artificial intelligent platforms, and the like.

The network may include, but is not limited to: a wired network, a wireless network, wherein the wired network comprises: local area networks, metropolitan area networks, and wide area networks, the wireless network comprising: bluetooth, wi-Fi, and other networks implementing wireless communications. And in particular, the method can be determined based on actual application scene requirements, and is not limited herein.

Referring to fig. 2, fig. 2 shows a schematic flow chart of a test method provided in the embodiments of the present application, where the method may be performed by any electronic device, and as an alternative implementation, the method may be performed by a server, and for convenience of description, in the following description of some alternative embodiments, a server will be taken as an example of a method execution body. As shown in fig. 2, the test method provided in the embodiment of the present application includes the following steps:

S201, at least two excitation programs are acquired.

Specifically, the excitation program may be an excitation code, which is a test code, and which is used to verify whether certain functional scenarios that need to be implemented in the SOC are expected.

S202, determining an automated regression testing script based on at least two incentive programs.

In particular, one automated regression test script may be created by cshell script, which may correspond to all stimulus programs, i.e., at least two stimulus programs. The automated regression testing script may be presim.

S203, based on the priority between the at least two excitation programs, simulating the first code programs of the target chips corresponding to the at least two excitation programs through an automatic regression test script, and determining the first code coverage rate of the at least two excitation programs for the first code programs.

Specifically, a first code program of a target chip corresponding to at least two excitation programs is simulated; at least two excitation programs correspond to the target chip, and the first code program of the target chip is simulated. The target chip may be an SOC, for example, the target chip is a WIFI chip, the core of the WIFI chip is a D10 processor of Andes, and the WIFI chip further includes a plurality of peripheral interfaces, for example, a SPI, UART, USB interface, and the like. The first code program of the target chip may be RTL (Register Transfer Level ) code; such as the RTL code of the SOC, where the RTL code refers to the RTL code of the entire SOC. The first code coverage may include row coverage, expression coverage, flip coverage, state machine coverage, condition coverage, branch coverage, and the like.

S204, if the first code coverage rate is smaller than the preset code coverage rate threshold, performing corresponding regression processing based on the first code coverage rate and the preset code coverage rate threshold to determine a new first code coverage rate, wherein the new first code coverage rate is larger than or equal to the preset code coverage rate threshold.

Specifically, the preset code coverage threshold is the code coverage expected by the user, and the preset code coverage threshold is 96.03%, for example.

In the embodiment of the application, at least two excitation programs are acquired; determining an automated regression testing script based on the at least two incentive programs; simulating a first code program of a target chip corresponding to at least two excitation programs through an automatic regression test script based on the priority between the at least two excitation programs, and determining a first code coverage rate of the at least two excitation programs for the first code program; if the first code coverage rate is smaller than the preset code coverage rate threshold value, carrying out corresponding regression processing based on the first code coverage rate and the preset code coverage rate threshold value, and determining a new first code coverage rate, wherein the new first code coverage rate is larger than or equal to the preset code coverage rate threshold value; therefore, the code coverage rate of the excitation program for the first code program of the target chip is automatically and rapidly improved, the workload of target chip verification is reduced, and the verification efficiency of the target chip is improved, so that the defects generated in the design of the target chip are effectively reduced, and the success probability of one-time streaming of the target chip is improved.

Specifically, the cshell script determines the priority among the plurality of incentive programs through a screening and sorting algorithm. The screening and sorting algorithm comprises the following steps: the cshell script divides the simulation priority of the excitation program based on the instruction number in the ndsrom. Dat (text file) corresponding to the excitation program, and the more the instruction number is, the more actions to be executed by the chip are indicated, the longer the simulation time of the chip is, namely the higher the priority of the excitation program is. The simulation time for prioritizing using the screening ranking algorithm is less than the simulation time for unordered.

Specifically, for example, the first code program is RTL code; creating an automatic regression test script through a cshell script, wherein the automatic regression test script corresponds to 10 excitation programs, and based on the priority order of the 10 excitation programs, the automatic regression test script automatically simulates RTL codes corresponding to each excitation program respectively to obtain a simulation result (LOG) and the code coverage rate of each excitation program for the RTL codes; wherein the code coverage rate of each incentive program aiming at the RTL code is the first subcode coverage rate of each incentive program aiming at the RTL code; and creating a coverage rate integration script (imc _merge_all.cmd) through the Makefile script, integrating the first subcode coverage rates under all the incentive program directories through the coverage rate integration script, and outputting a code coverage rate report (html), namely the first code coverage rates of the 10 incentive programs for RTL codes.

creating a coverage rate integration script;

Specifically, for example, a coverage rate integration script (imc _merge_all.cmd) is created through the Makefile script, the first subcode coverage rates under all the incentive program directories are integrated through the coverage rate integration script, and a code coverage rate report (html) is output, that is, the first code coverage rates of the 10 incentive programs for the RTL code.

Specifically, the code coverage report includes a first code coverage of at least two incentive programs for the first code program, which may include row coverage, expression coverage, flip coverage, state machine coverage, and the like. Analyzing the code coverage rate report, namely analyzing uncovered functional points based on the first code coverage rate and a preset code coverage rate threshold value to obtain an analysis result; if the analysis result shows that the coverage is not enough and the missing is caused, the annotation is added to the finer file for the function points which are not enough, and the number of the newly added incentive programs is determined for the missing function points, and the newly added incentive programs are verified.

Specifically, for example, the predetermined number may be 1, the compiled script may be a make. If the number of the newly added excitation programs is 1, creating a make.rule script and a make.vars script through the Makefile script; compiling the newly added excitation program through a make/run script to obtain a text file (NDSROM/dat) corresponding to the newly added excitation program, wherein the text file is used for describing the function implementation of the target chip in a certain scene; based on a text file corresponding to the newly added excitation program, simulating the RTL code through a make. Vars; determining a second subcode coverage rate of the newly added excitation program for the RTL code through a new automatic regression test script; and creating a coverage rate integration script (imc _merge_all.cmd) through the Makefile script, integrating the coverage rates of the first subcode and the second subcode through the coverage rate integration script, and determining the coverage rate of the new first subcode.

Specifically, for example, the predetermined number may be 1, and the first code program is an RTL code. If the number of the newly added excitation programs is greater than 1, simulating the RTL code through a new automatic regression test script based on the priorities between at least two excitation programs and the newly added excitation programs, and determining the coverage rate of the new first code.

The application of the embodiment of the application has at least the following beneficial effects:

the code coverage rate of the exciting program to the RTL code of the target chip is automatically and rapidly improved, the workload of target chip verification is reduced, and the verification efficiency of the target chip is improved, so that the defects generated in the design of the target chip are effectively reduced, and the success probability of one-time streaming of the target chip is improved.

In order to better understand the method provided by the embodiment of the present application, the scheme of the embodiment of the present application is further described below with reference to an example of a specific application scenario.

In a specific application scenario embodiment, for example, an SOC test scenario, referring to fig. 3, a process flow of another test method is shown, and as shown in fig. 3, the process flow of the test method provided in the embodiment of the present application includes the following steps:

s301, a verification platform in a server creates a make.rules script through a Makefile script; the incentive program is compiled through a make.

Specifically, the make.rules script is a simulation script, and a single stimulus program can be compiled by the make.rules script. Compiling the newly added excitation program through a make.rule script to obtain a text file (NDSROM.dat) corresponding to the newly added excitation program.

S302, a verification platform in a server creates a make.vars script through a Makefile script; and simulating the verification platform code and the RTL code through a make.vars script.

Specifically, the RTL code refers to the RTL code of the entire SOC. Based on a text file (NDSROM. Dat) corresponding to the excitation program, simulating the RTL code through a make. Vars; and simulating the verification platform code through the make.vars, wherein the verification platform code is a program of a verification platform running in the server. The verification platform comprises a backstend folder, a dur folder, a flist folder, a lib folder, a tools folder, an ids_vip folder and the like; the back end folder is used for storing the back end netlist and the sdf file, and is only used when the netlist is simulated; the dut folder stores all RTL codes used in the simulation; the flist folder stores the filist of the simulation platform; the lib folder stores model files used for simulation; the testbench folder stores related codes of the verification platform; the tools folder stores scripts to convert binary files into text files; the files of the device are stored with simulation scripts and planned use cases, each use case is named by test, each case directory is stored with a C file and a pat file, the C file realizes the configuration of the functional scene, and the pat file realizes the functions of macro definition, signal checking, monitoring and the like.

S303, the verification platform in the server creates an automatic regression testing script through the cshell script, the automatic regression testing script corresponds to a plurality of excitation programs, and based on the priority sequence of the excitation programs, RTL codes corresponding to the excitation programs are automatically simulated through the automatic regression testing script respectively, so that a simulation result and code coverage rate of the excitation programs for the RTL codes are obtained.

Specifically, the automated regression testing script may be presim.csh, the simulation result may be a LOG file, and the simulation result and the code coverage (subcode coverage) of each incentive program for the RTL code may be placed under the corresponding directory of each incentive program.

S304, a verification platform in the server creates a coverage rate integration script through a Makefile script; and integrating subcode coverage corresponding to the plurality of incentive programs through a coverage rate integration script, and outputting a code coverage rate report, wherein the code coverage rate report comprises code coverage rates of the plurality of incentive programs for RTL codes.

Specifically, the coverage rate integration script may be imc _merge_all_cmd, the subcode coverage rate (first subcode coverage rate) corresponding to each incentive program is the code coverage rate of each incentive program for the RTL code, and the code coverage rates of the multiple incentive programs for the RTL code are the first code coverage rates.

S305, the verification platform in the server judges whether the code coverage rate of the plurality of motivation programs for the RTL codes is larger than or equal to a preset code coverage rate threshold value, and if the code coverage rate of the plurality of motivation programs for the RTL codes is larger than or equal to the preset code coverage rate threshold value, the step S308 is carried out; if it is determined that the code coverage rate of the plurality of incentive programs for the RTL code is not greater than or equal to the preset code coverage rate threshold, the process proceeds to step S306.

S306, determining uncovered function points by the verification platform in the server based on the code coverage report, and adding an incentive program for the uncovered function points.

S307, the verification platform in the server judges whether the number of the newly added excitation programs is larger than 1, if the number of the newly added excitation programs is not larger than 1, namely, the number of the newly added excitation programs is 1, the step S301 is carried out; if the number of newly added excitation programs is greater than 1, the process proceeds to step S303.

Specifically, if the number of the newly added excitation programs is 1, creating a make.rule script and a make.vars script through a Makefile script; compiling the newly added excitation program through a make/run script to obtain a text file (NDSROM/dat) corresponding to the newly added excitation program, wherein the text file is used for describing the function implementation of the target chip in a certain scene; based on a text file corresponding to the newly added excitation program, simulating the RTL code through a make. Vars; determining a second subcode coverage rate of the newly added excitation program for the RTL code through a new automatic regression test script; and creating a coverage rate integration script (imc _merge_all.cmd) through the Makefile script, integrating the coverage rates of the first subcode and the second subcode through the coverage rate integration script, and determining the coverage rate of the new first subcode. If the number of the newly added excitation programs is greater than 1, simulating the RTL code through a new automatic regression test script based on priorities among the plurality of excitation programs and the newly added excitation programs, and determining the coverage rate of the new first code.

S308, outputting by a verification platform in a server: verification for RTL code passes.

the code coverage rate of the excitation program for RTL codes is automatically and rapidly improved, the workload of SOC verification is reduced, and the verification efficiency of the SOC is improved, so that defects generated in the SOC design are effectively reduced, and the success probability of one-time SOC chip streaming is improved.

The embodiment of the application further provides a testing device, and a schematic structural diagram of the testing device is shown in fig. 4, and the testing device 40 includes a first processing module 401, a second processing module 402, a third processing module 403, and a fourth processing module 404.

A first processing module 401 for acquiring at least two excitation programs;

a second processing module 402 for determining an automated regression testing script based on the at least two incentive programs;

a third processing module 403, configured to simulate, by using an automated regression test script, a first code program of a target chip corresponding to at least two excitation programs based on a priority between the at least two excitation programs, and determine a first code coverage rate of the at least two excitation programs for the first code program;

And a fourth processing module 404, configured to, if the first code coverage is smaller than the preset code coverage threshold, perform corresponding regression processing based on the first code coverage and the preset code coverage threshold, and determine a new first code coverage, where the new first code coverage is greater than or equal to the preset code coverage threshold.

In one embodiment, the test apparatus further comprises a priority setting module 405, the priority setting module 405 being configured to:

In one embodiment, the third processing module 403 is specifically configured to:

creating a coverage rate integration script;

In one embodiment, the fourth processing module 404 is specifically configured to:

acquiring at least two excitation programs; determining an automated regression testing script based on the at least two incentive programs; simulating a first code program of a target chip corresponding to at least two excitation programs through an automatic regression test script based on the priority between the at least two excitation programs, and determining a first code coverage rate of the at least two excitation programs for the first code program; if the first code coverage rate is smaller than the preset code coverage rate threshold value, carrying out corresponding regression processing based on the first code coverage rate and the preset code coverage rate threshold value, and determining a new first code coverage rate, wherein the new first code coverage rate is larger than or equal to the preset code coverage rate threshold value; therefore, the code coverage rate of the excitation program for the first code program of the target chip is automatically and rapidly improved, the workload of target chip verification is reduced, and the verification efficiency of the target chip is improved, so that the defects generated in the design of the target chip are effectively reduced, and the success probability of one-time streaming of the target chip is improved.

The embodiment of the application further provides an electronic device, a schematic structural diagram of which is shown in fig. 5, and an electronic device 4000 shown in fig. 5 includes: a processor 4001 and a memory 4003. Wherein the processor 4001 is coupled to the memory 4003, such as via a bus 4002. Optionally, the electronic device 4000 may further comprise a transceiver 4004, the transceiver 4004 may be used for data interaction between the electronic device and other electronic devices, such as transmission of data and/or reception of data, etc. It should be noted that, in practical applications, the transceiver 4004 is not limited to one, and the structure of the electronic device 4000 is not limited to the embodiment of the present application.

The processor 4001 may be a CPU (Central Processing Unit ), general purpose processor, DSP (Digital Signal Processor, data signal processor), ASIC (Application Specific Integrated Circuit ), FPGA (Field Programmable Gate Array, field programmable gate array) or other programmable logic device, transistor logic device, hardware components, or any combination thereof. Which may implement or perform the various exemplary logic blocks, modules, and circuits described in connection with this disclosure. The processor 4001 may also be a combination that implements computing functionality, e.g., comprising one or more microprocessor combinations, a combination of a DSP and a microprocessor, etc.

Bus 4002 may include a path to transfer information between the aforementioned components. Bus 4002 may be a PCI (Peripheral Component Interconnect, peripheral component interconnect standard) bus or an EISA (Extended Industry Standard Architecture ) bus, or the like. The bus 4002 can be divided into an address bus, a data bus, a control bus, and the like. For ease of illustration, only one thick line is shown in fig. 5, but not only one bus or one type of bus.

Memory 4003 may be, but is not limited to, ROM (Read Only Memory) or other type of static storage device that can store static information and instructions, RAM (Random Access Memory ) or other type of dynamic storage device that can store information and instructions, EEPROM (Electrically Erasable Programmable Read Only Memory ), CD-ROM (Compact Disc Read Only Memory, compact disc Read Only Memory) or other optical disk storage, optical disk storage (including compact discs, laser discs, optical discs, digital versatile discs, blu-ray discs, etc.), magnetic disk storage media, other magnetic storage devices, or any other medium that can be used to carry or store a computer program and that can be Read by a computer.

The memory 4003 is used for storing a computer program that executes an embodiment of the present application, and is controlled to be executed by the processor 4001. The processor 4001 is configured to execute a computer program stored in the memory 4003 to realize the steps shown in the foregoing method embodiment.

Among them, electronic devices include, but are not limited to: a server, etc.

Embodiments of the present application provide a computer readable storage medium having a computer program stored thereon, where the computer program, when executed by a processor, may implement the steps and corresponding content of the foregoing method embodiments.

The embodiments of the present application also provide a computer program product, which includes a computer program, where the computer program can implement the steps of the foregoing method embodiments and corresponding content when executed by a processor.

Based on the same principle as the method provided by the embodiments of the present application, the embodiments of the present application also provide a computer program product or computer program comprising computer instructions stored in a computer readable storage medium. The computer instructions are read from a computer-readable storage medium by a processor of a computer device, and executed by the processor, cause the computer device to perform the method provided in any of the alternative embodiments of the present application described above.

It should be understood that, although the flowcharts of the embodiments of the present application indicate the respective operation steps by arrows, the order of implementation of these steps is not limited to the order indicated by the arrows. In some implementations of embodiments of the present application, the implementation steps in the flowcharts may be performed in other orders as desired, unless explicitly stated herein. Furthermore, some or all of the steps in the flowcharts may include multiple sub-steps or multiple stages based on the actual implementation scenario. Some or all of these sub-steps or phases may be performed at the same time, or each of these sub-steps or phases may be performed at different times, respectively. In the case of different execution time, the execution sequence of the sub-steps or stages may be flexibly configured according to the requirement, which is not limited in the embodiment of the present application.

The foregoing is merely an optional implementation manner of the implementation scenario of the application, and it should be noted that, for those skilled in the art, other similar implementation manners based on the technical ideas of the application are adopted without departing from the technical ideas of the application, and also belong to the protection scope of the embodiments of the application.

Claims

1. A test device, comprising:

the third processing module is used for simulating a first code program of a target chip corresponding to the at least two excitation programs through the automatic regression test script based on the priority between the at least two excitation programs, and determining the first code coverage rate of the at least two excitation programs for the first code program;

and the fourth processing module is used for carrying out corresponding regression processing based on the first code coverage rate and the preset code coverage rate threshold value if the first code coverage rate is smaller than the preset code coverage rate threshold value, and determining a new first code coverage rate, wherein the new first code coverage rate is larger than or equal to the preset code coverage rate threshold value.

2. The apparatus of claim 1, wherein the testing apparatus further comprises a priority setting module for:

determining the instruction number of the text files corresponding to each excitation program in the at least two excitation programs;

the priority between the at least two motivations is determined based on the number of instructions for each text file.

3. The apparatus according to claim 1, wherein the third processing module is specifically configured to:

sequentially simulating first code programs of target chips corresponding to the at least two excitation programs based on the order of the priority between the at least two excitation programs from large to small through the automatic regression test script, and determining first subcode coverage rate of each excitation program in the at least two excitation programs for the first code programs;

based on each first subcode coverage, a first code coverage of the at least two incentive programs for the first code program is determined.

4. The apparatus according to claim 3, wherein the third processing module is specifically configured to:

creating a coverage rate integration script;

And integrating the coverage rate of each first subcode through the coverage rate integration script to obtain a code coverage rate report of the at least two incentive programs for the first code program, wherein the code coverage rate report comprises the first code coverage rate of the at least two incentive programs for the first code program.

5. The apparatus according to claim 1, wherein the fourth processing module is specifically configured to:

determining the number of newly added excitation programs based on the first code coverage rate and the preset code coverage rate threshold;

6. The apparatus according to claim 5, wherein the fourth processing module is specifically configured to:

compiling the newly added excitation program through the compiling script to obtain a text file corresponding to the newly added excitation program;

Simulating the first code program through the simulation script based on the text file corresponding to the newly added excitation program; determining a second subcode coverage rate of the newly added incentive program for the first code program through the new automatic regression test script;

a new first code coverage is determined based on the respective first and second subcode coverage.

7. The apparatus according to claim 5, wherein the fourth processing module is specifically configured to:

if the number of the newly added excitation programs is larger than the preset number, simulating the first code program through the new automatic regression testing script based on the priorities between the at least two excitation programs and the newly added excitation programs, and determining new first code coverage rate.

8. A method of testing, comprising:

acquiring at least two excitation programs;

simulating a first code program of a target chip corresponding to the at least two excitation programs through the automated regression test script based on the priority between the at least two excitation programs, and determining a first code coverage rate of the at least two excitation programs for the first code program;

If the first code coverage rate is smaller than a preset code coverage rate threshold value, performing corresponding regression processing based on the first code coverage rate and the preset code coverage rate threshold value, and determining a new first code coverage rate, wherein the new first code coverage rate is larger than or equal to the preset code coverage rate threshold value.

9. The method of claim 8, further comprising, prior to simulating a first code program of a target chip corresponding to the at least two stimulus programs by the automated regression test script based on the priority between the at least two stimulus programs and determining a first code coverage of the at least two stimulus programs for the first code program:

10. The method of claim 8, wherein simulating, by the automated regression test script, a first code program of the target chip corresponding to the at least two incentive programs based on the priority between the at least two incentive programs, and determining a first code coverage of the at least two incentive programs for the first code program, comprises:

11. The method of claim 10, wherein determining the first code coverage of the at least two incentive programs for the first code program based on each first subcode coverage comprises:

creating a coverage rate integration script;

12. The method of claim 8, wherein the performing a corresponding regression process based on the first code coverage and the predetermined code coverage threshold to determine a new first code coverage comprises:

13. The method of claim 12, wherein the determining a new first code coverage based on the number of the new incentives and the new automated regression testing script performs a corresponding regression process comprising:

14. The method of claim 12, wherein the determining a new first code coverage based on the number of the new incentives and the new automated regression testing script performs a corresponding regression process comprising:

15. An electronic device comprising a memory, a processor and a computer program stored on the memory, characterized in that the processor executes the computer program to carry out the steps of the method of any one of claims 7-14.

16. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 7-14.

17. A computer program product comprising a computer program, characterized in that the computer program, when executed by a processor, implements the steps of the method of any of claims 7-14.